JP2004193621A - 金属バリア接着性が改良された、シリコン−炭素−酸素誘電体を有する半導体デバイス、及びその形成方法 - Google Patents
金属バリア接着性が改良された、シリコン−炭素−酸素誘電体を有する半導体デバイス、及びその形成方法 Download PDFInfo
- Publication number
- JP2004193621A JP2004193621A JP2003412698A JP2003412698A JP2004193621A JP 2004193621 A JP2004193621 A JP 2004193621A JP 2003412698 A JP2003412698 A JP 2003412698A JP 2003412698 A JP2003412698 A JP 2003412698A JP 2004193621 A JP2004193621 A JP 2004193621A
- Authority
- JP
- Japan
- Prior art keywords
- dielectric layer
- layer
- forming
- exposing
- plasma
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/071—Manufacture or treatment of dielectric parts thereof
- H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
- H10W20/084—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures
- H10W20/085—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures involving intermediate temporary filling with material
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/071—Manufacture or treatment of dielectric parts thereof
- H10W20/074—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H10W20/076—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/071—Manufacture or treatment of dielectric parts thereof
- H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/071—Manufacture or treatment of dielectric parts thereof
- H10W20/093—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts
- H10W20/096—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts by contacting with gases, liquids or plasmas
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/071—Manufacture or treatment of dielectric parts thereof
- H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
- H10W20/082—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts the openings being tapered via holes
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Formation Of Insulating Films (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/318,309 US6720255B1 (en) | 2002-12-12 | 2002-12-12 | Semiconductor device with silicon-carbon-oxygen dielectric having improved metal barrier adhesion and method of forming the device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2004193621A true JP2004193621A (ja) | 2004-07-08 |
| JP2004193621A5 JP2004193621A5 (https=) | 2006-12-28 |
Family
ID=32043034
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2003412698A Abandoned JP2004193621A (ja) | 2002-12-12 | 2003-12-11 | 金属バリア接着性が改良された、シリコン−炭素−酸素誘電体を有する半導体デバイス、及びその形成方法 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US6720255B1 (https=) |
| EP (1) | EP1429383B1 (https=) |
| JP (1) | JP2004193621A (https=) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005045176A (ja) * | 2003-07-25 | 2005-02-17 | Fujitsu Ltd | 半導体装置及びその製造方法 |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050067702A1 (en) * | 2003-09-30 | 2005-03-31 | International Business Machines Corporation | Plasma surface modification and passivation of organo-silicate glass films for improved hardmask adhesion and optimal RIE processing |
| KR100571395B1 (ko) * | 2004-05-11 | 2006-04-14 | 동부아남반도체 주식회사 | 반도체 소자의 제조 방법 |
| US20070066060A1 (en) * | 2005-09-19 | 2007-03-22 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor devices and fabrication methods thereof |
| US8946782B2 (en) | 2012-04-19 | 2015-02-03 | International Business Machines Corporation | Method for keyhole repair in replacement metal gate integration through the use of a printable dielectric |
| US11462397B2 (en) * | 2019-07-31 | 2022-10-04 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor device and method of forming the same |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6054379A (en) * | 1998-02-11 | 2000-04-25 | Applied Materials, Inc. | Method of depositing a low k dielectric with organo silane |
| EP1081751A3 (en) | 1999-09-02 | 2003-03-19 | Applied Materials, Inc. | Methods of pre-cleaning dielectric layers of substrates |
| US6936533B2 (en) | 2000-12-08 | 2005-08-30 | Samsung Electronics, Co., Ltd. | Method of fabricating semiconductor devices having low dielectric interlayer insulation layer |
| US6562416B2 (en) | 2001-05-02 | 2003-05-13 | Advanced Micro Devices, Inc. | Method of forming low resistance vias |
-
2002
- 2002-12-12 US US10/318,309 patent/US6720255B1/en not_active Expired - Lifetime
-
2003
- 2003-12-11 JP JP2003412698A patent/JP2004193621A/ja not_active Abandoned
- 2003-12-12 EP EP03104678A patent/EP1429383B1/en not_active Expired - Lifetime
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005045176A (ja) * | 2003-07-25 | 2005-02-17 | Fujitsu Ltd | 半導体装置及びその製造方法 |
| US7189643B2 (en) | 2003-07-25 | 2007-03-13 | Fujitsu Limited | Semiconductor device and method of fabricating the same |
Also Published As
| Publication number | Publication date |
|---|---|
| EP1429383A3 (en) | 2008-08-13 |
| EP1429383A2 (en) | 2004-06-16 |
| EP1429383B1 (en) | 2011-07-20 |
| US6720255B1 (en) | 2004-04-13 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20061109 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20061109 |
|
| A762 | Written abandonment of application |
Free format text: JAPANESE INTERMEDIATE CODE: A762 Effective date: 20081210 |