JP2004193363A - Semiconductor device and method of manufacturing the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device which is obtained by laminating semiconductor chips, which is not restricted by a chip size, which uses a wire bonding and which is short in height. <P>SOLUTION: First and second semiconductor chips 2a and 2b are laminated in order on a substrate 1, and electrodes on the respective semiconductor chips 2a and 2b and an electrode on the substrate are connected by wire bonding. A space between first and second semiconductor chips 2a and 2b is filled with an insulating adhesive 4, and a first wire 3a to be connected to the upper surface of the first semiconductor chip 2a on a lower side is crushed by the lower surface of the second semiconductor chip 2b. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a semiconductor device in which wire-bonded semiconductor chips are stacked and sealed, and more particularly to a semiconductor device having a short height and a method of manufacturing the same.
[0002]
[Prior art]
In order to reduce the size of the module, a semiconductor device in which semiconductor chips are stacked and sealed has been developed. FIG. 5 is a sectional view of a conventional semiconductor device, and shows a device in which semiconductor chips are stacked and sealed.
Conventionally, referring to FIG. 5A, first to third semiconductor chips 2a to 2c are laminated on a die pad of a lead 11 with an adhesive 5 interposed therebetween. The first to third semiconductor chips 2a to 2c gradually decrease in chip size as going upward, and there is room for bonding electrodes on the upper surface of the lower semiconductor chip. The semiconductor circuits formed on the first to third semiconductor chips 2a to 2c are connected to the leads 11 from the spaces provided on the upper surfaces of the semiconductor chips 2a to 2c via the bonding wires 3a to 3c. The whole is sealed using a sealing material 6 such as a mold. (See, for example, Patent Document 1).
[0003]
However, in this semiconductor device, in order to leave room for providing a bonding electrode, a semiconductor chip to be stacked on the upper side must be reduced in size, which limits the degree of freedom in design.
As a method of stacking semiconductor chips of the same size, there is a method using a spacer. Referring to FIG. 5B, the first semiconductor chip 2a is bonded to the circuit board 1 and the circuit board 1 and the semiconductor chip 2a are connected to each other by the wire-bonded wires 3a. The second semiconductor chip 2b is stacked via the second semiconductor chip 2b. The spacer 12 is provided so that the loop of the wire 3a is not deformed when the second semiconductor chip 2b is stacked. (See, for example, Patent Document 2).
[0004]
In this method, there is no particular limitation on the dimensions of the semiconductor chips to be stacked. However, there is a problem that the height is increased due to the interposition of the spacers 12.
Further, a method using an insulating resin instead of the spacer has been devised. Referring to FIG. 5C, after bonding and wire bonding the first semiconductor chip 2a on the circuit board 1, an insulating resin 13 is applied to the upper surface of the first semiconductor chip 2a to cover the wire 3a. Then, the second semiconductor chip 2b is mounted thereon, and the insulating resin 13 is cured. Thereafter, the whole is sealed with a sealing material 6. (See, for example, Patent Document 3).
[0005]
This method also maintains the loop shape of the bonded wire 3a, and has a problem that the thickness of the insulating resin 13 must be higher than the loop height, which increases the height.
As a method of lowering the height of a semiconductor device in which semiconductor chips are stacked, there is a method in which a lower semiconductor chip is face-down bonded and an upper semiconductor chip is wire-bonded. (For example, see Patent Document 4).
[0006]
In this method, the lower and upper semiconductor chips can be in close contact with each other, so that the height is reduced. However, two types of semiconductor chips, one for face-down bonding and one for wire bonding, are required, and there is a problem that the upper and lower semiconductor chips cannot be made identical. In addition, face down is more expensive than wire bonding.
[0007]
There is also a method of forming a short package and stacking it. In this method, referring to FIG. 5 (d), first, a lead 11 is arranged on an upper surface of a semiconductor chip 2 via an insulating layer 13, and the lead and the upper surface of the semiconductor chip are connected by wire-bonded wires 3. . Then, the polyimide thin film 15 coated with the adhesive 14 is laminated on the lower surface and pressed to crush the loop of the wire 3. A plurality of packages thus formed can be stacked. (See, for example, Patent Document 5).
[0008]
In this method, since the loop formed by bonding the wire 3 is crushed, the height of the package can be reduced accordingly. However, since the leads 11 and the polyimide thin film 15 are interposed between the stacked semiconductor chips, the height cannot be reduced too much.
[0009]
[Patent Document 1]
JP 2001-118877 A
[Patent Document 2]
JP-A-2002-141449
[Patent Document 3]
JP-A-8-88316
[Patent Document 4]
JP 2001-35994 A
[Patent Document 5]
JP-A-5-109801
[Problems to be solved by the invention]
As described above, in a conventional semiconductor device in which semiconductor chips are stacked and connected by wire bonding, there is a problem that the dimensions of the semiconductor chip are limited or the height cannot be reduced sufficiently. Further, in a semiconductor device using face-down bonding, there is a problem that the same semiconductor chip cannot be used and the bonding cost increases.
[0015]
An object of the present invention is to provide a semiconductor device in which stacked semiconductor chips are connected by wire bonding and sealed in one package, and are not limited by the dimensions of the stacked semiconductor chips and have a short height. The purpose is.
[0016]
[Means for Solving the Problems]
A semiconductor device according to the present invention for solving the above-described problems includes a first and a second semiconductor chips sequentially stacked on a substrate, and a first and a second electrode provided on an upper surface of each semiconductor chip and a substrate. In a semiconductor device in which a bonding electrode provided above is connected with a bonding wire, a gap between the first and second semiconductor chips is filled with an insulating adhesive, and a loop of the first wire is connected to the second semiconductor chip. Characterized by being crushed.
[0017]
In the semiconductor device of the present invention, a wire that is wire-bonded to the electrode on the upper surface of the first semiconductor chip located on the lower side and drawn out onto the substrate is pressed down on the lower surface of the upper second semiconductor chip, and is formed by bonding. The second semiconductor chip is stacked by crushing the wire loop. Therefore, the interval between the first and second semiconductor chips can be made smaller than the wire loop height at the time of bonding, so that the overall height of the semiconductor device can be reduced. In addition, since the second semiconductor chip is stacked while being wire-bonded to the upper surface of the first semiconductor chip, there is no restriction on the dimensions of the upper second semiconductor chip.
[0018]
In such a semiconductor device, after bonding a first wire to an electrode on the upper surface of a lower first semiconductor chip, a thermoplastic insulating adhesive is formed on the first semiconductor chip, and the insulating material is heated in an insulated state. It can be formed by pressing down the second semiconductor chip from above the adhesive and crushing the loop of the first wire formed by wire bonding.
[0019]
According to this method, when the loop of the wire is crushed, the wire is covered with the plastic insulating adhesive, so that the wire is protected and the generation of scratches and breakage can be avoided. Further, electrical insulation between the wires and the upper and lower semiconductor chips is maintained.
The semiconductor chip of the present invention only needs to have an electrode for wire bonding on the upper surface. The dimensions of the first and second semiconductor chips may be the same or different. For example, the size of the upper semiconductor chip can be increased. The wires are wire-bonded so as to connect the electrodes on the upper surfaces of the first and second semiconductor chips and the bonding electrodes on the substrate. At this time, one wire may be connected to one bonding electrode, or a plurality of wires may be connected to one bonding electrode.
[0020]
Further, in order to prevent the first wire from coming into contact with the upper surface corner of the first semiconductor chip, the surface of the outer peripheral portion of the upper surface of the lower first semiconductor chip is recessed from the surface of the central portion of the upper surface. It is preferable to do so. Further, it is preferable to insulate the back surface of the second semiconductor chip that pushes down the first wire.
The insulating adhesive of the present invention may include a filler having a diameter larger than the diameter of the first wire. Thereby, the interval between the first and second semiconductor chips can be maintained at a constant value determined by the diameter of the filler, and unnecessary bending of the wire can be prevented.
[0021]
BEST MODE FOR CARRYING OUT THE INVENTION
FIG. 1 is a cross-sectional process diagram of the first embodiment of the present invention, showing a manufacturing process of a semiconductor device in which two semiconductor chips are stacked and sealed. 2 is a partially enlarged sectional view of the first embodiment of the present invention. FIG. 2 (a) is a part of FIG. 1 (b), and FIG. 2 (b) is a part of FIG. 1 (d). Is enlarged.
[0022]
In the first embodiment of the present invention, referring to FIG. 1A, first, a first semiconductor chip 2a is bonded onto a substrate 1 (interposer) using an adhesive 5. Next, the first electrode 17a formed on the upper surface of the first semiconductor chip 2a and the bonding electrode 16 formed on the upper surface of the peripheral portion of the substrate 1 are connected by wire bonding the first wire 3a. At this time, the first wire 3a forms an upwardly convex loop determined by the bonding tool. Next, the insulating adhesive 4 is applied to the upper surface of the first semiconductor chip 2a. As the insulating adhesive 4, a thermoplastic and filling adhesive was used.
[0023]
Next, referring to FIG. 1B, the substrate 1 is placed on a heating table (not shown) and heated to liquefy the thermoplastic insulating adhesive 4. At this time, referring to FIG. 2A, the liquefied insulating adhesive 4 spreads over the upper surface of the first semiconductor chip so as to cover the loop-shaped first wire 3a.
Next, referring to FIG. 1C, a second semiconductor chip 2b having the same dimensions as the first semiconductor chip 2a is placed and pressed to crush the loop of the first wire 3a. As a result, referring to FIG. 2B, the first wire 3a is pressed against the surface of the first semiconductor chip 2a by the lower surface of the second semiconductor chip 2b. While maintaining this state, the temperature is lowered to cure the insulating adhesive.
[0024]
In this embodiment, the insulating film 7 is formed on the upper surface of the first semiconductor chip 2a and the lower surface of the second semiconductor chip 2b. For this reason, even if the first wire 3a sandwiched between the first and second semiconductor chips 2a and 2b contacts these semiconductor chips, electrical insulation is ensured. Further, when a bonding wire coated with insulation is used as the first wire 3a, the insulating film 7 can be omitted. In addition, even if the bonding wire which does not form the insulating film 7 and is not coated with the insulation is used, since the insulating adhesive 4 covers the first wire 3a, the first and second semiconductor chips 2a and 2b are not covered. The insulation between the first wires 3a is maintained.
[0025]
Next, referring to FIG. 1D, a second wire 3b is wire-bonded between the electrode 17b formed on the upper surface of the second semiconductor chip 2b and the bonding electrode 16 formed on the upper surface of the substrate 1. Dengue and connect.
Next, referring to FIG. 1E, the upper surface of the substrate 1 is filled with a sealing material 6 and sealed. At this time, since the first wire 3a sandwiched between the first and second semiconductor chips 2a and 2b is buried in the cured insulating adhesive material 4, the first wire 3a moves by the flow pressure of the sealing material 6. Or there is little possibility of being cut. Next, solder balls 8 are joined to the lower surface of the substrate 1 to manufacture a semiconductor device.
[0026]
In the first embodiment, the independent substrate 1 (interposer) is used for each semiconductor device. However, the process from the sealing with the sealing material 6 to the bonding step of the solder balls 8 using the large substrate 1 (for example, a wafer) is performed. After that, the semiconductor device can be divided into individual semiconductor devices.
In the present embodiment, the insulating adhesive 4 is supplied to the upper surface of the first semiconductor chip 2a bonded on the substrate 1, but the first semiconductor chip 2a having the insulating adhesive 4 on the upper surface in advance is provided. May be adhered to the substrate 1. In order to supply the insulating adhesive material 4 to the upper surface of the first semiconductor chip 2a, the liquid insulating adhesive material 4 is dropped, the paste insulating adhesive material 4 is printed, and the sheet-shaped insulating adhesive material is laminated. A method of attaching the material 4 can be used. Further, the method of supplying the insulating adhesive 4 may be applied to the semiconductor wafer on which the first semiconductor chip 2a is manufactured, and then divided into individual semiconductor chips.
[0027]
FIG. 3 is a sectional view of a second embodiment of the present invention. In the present embodiment, referring to FIG. 3, a depression 9 is formed in a peripheral portion of the upper surface of the lower first semiconductor chip 2a. According to the present embodiment, the first wire 3a is unlikely to come into contact with the peripheral portion of the upper surface of the first semiconductor chip 2a, and the insulation between the first wire 3a and the first semiconductor chip 2a is further ensured. Can be.
[0028]
FIG. 4 is a sectional view of a third embodiment of the present invention. In the present embodiment, referring to FIG. 4, the insulating adhesive 4 contains a filler, and the distance between the first and second semiconductor chips 2a, 2b is maintained at the diameter of the filler. Therefore, by minimizing the diameter of the filler within a range where the first wire 3a does not break, the height of the semiconductor device can be reliably minimized without impairing reliability.
[0029]
The above specification includes the following aspects of the invention.
(Supplementary Note 1) Connecting first and second semiconductor chips sequentially laminated on a substrate provided with a bonding electrode, and connecting the first electrode provided on the upper surface of the first semiconductor chip and the bonding electrode. In a semiconductor device having a first wire and a second wire connecting the second electrode provided on the upper surface of the second semiconductor chip and the bonding electrode,
A semiconductor device, wherein a space between the first and second semiconductor chips is filled with an insulating adhesive, and the first wire is crushed by the second semiconductor chip.
(Supplementary Note 2) In the semiconductor device according to Supplementary Note 1,
The semiconductor device, wherein the insulating adhesive includes a filler having a diameter larger than a diameter of the wire.
(Supplementary Note 3) In the semiconductor device according to Supplementary Note 1 or 2,
The semiconductor device according to claim 1, wherein the first semiconductor chip has a surface at an outer peripheral portion of the upper surface recessed from a surface at a central portion of the upper surface.
(Supplementary Note 4) In the semiconductor device according to Supplementary Note 1, 2, or 3,
A method for manufacturing a semiconductor device, wherein a back surface of the second semiconductor chip is subjected to an insulation treatment.
(Supplementary Note 5) In the method for manufacturing a semiconductor device according to Supplementary Note 1, 2, 3, or 4,
Mounting the first semiconductor chip on the substrate, and wire bonding the first wire;
Then, forming the thermoplastic insulating adhesive on the first semiconductor chip,
Then, pressing the second semiconductor chip from above the insulating adhesive in a heated state, and crushing the loop of the first wire formed by the wire bonding. Semiconductor device manufacturing method.
(Supplementary Note 6) In the method of manufacturing a semiconductor device according to Supplementary Note 1, 2, 3, or 4,
Mounting the first semiconductor chip on a wafer, and wire bonding the first wire;
Then, forming the thermoplastic insulating adhesive on the first semiconductor chip,
Then, pressing the second semiconductor chip over the insulating adhesive in a heated state, crushing the loop of the first wire formed by the wire bonding,
Supplying a sealing material on the wafer to seal the first and second semiconductor chips;
Dividing the wafer into individual substrates together with the sealing material and separating the wafer into individual semiconductor devices.
(Supplementary Note 7) A semiconductor in which an electrode for wire bonding and a thermoplastic insulating adhesive having a film thickness smaller than the height of a loop formed by bonding the wire to the electrode are provided on the upper surface. Chips.
[0030]
【The invention's effect】
According to the present invention, it is possible to minimize the gap between the semiconductor chips by crushing the loops of the bonding wires between the stacked semiconductor chips, so that there is provided a semiconductor device which is short even when wire bonding is used. be able to.
[Brief description of the drawings]
FIG. 1 is a sectional process view of a first embodiment of the present invention; FIG. 2 is a partially enlarged sectional view of a first embodiment of the present invention; FIG. 3 is a sectional view of a second embodiment of the present invention; FIG. FIG. 5 is a sectional view of a third embodiment of the invention. FIG. 5 is a sectional view of a conventional semiconductor device.
DESCRIPTION OF SYMBOLS 1 Substrate 2 Semiconductor chip 2a First semiconductor chip 2b Second semiconductor chip 2c Third semiconductor chip 3 Wire 3a First wire 3b Second wire 3c Third wire 4 Insulating adhesive 5 Adhesive 6 Sealing Stopping material 7 Insulating film 8 Solder ball 9 Depression 10 Filler 11 Lead 11a Die pad 12 Spacer 13 Insulating resin 14 Adhesive material 15 Polyimide thin film 16 Bonding electrode 17a First electrode 17b Second electrode

Claims (5)

First and second semiconductor chips sequentially stacked on a substrate provided with a bonding electrode, and a first wire connecting the first electrode provided on the upper surface of the first semiconductor chip and the bonding electrode And a semiconductor device having a second electrode provided on the upper surface of the second semiconductor chip and a second wire connecting the bonding electrode,
A semiconductor device, wherein a space between the first and second semiconductor chips is filled with an insulating adhesive, and the first wire is crushed by the second semiconductor chip. The semiconductor device according to claim 1,
The semiconductor device, wherein the insulating adhesive includes a filler having a diameter larger than a diameter of the wire. The semiconductor device according to claim 1, wherein
The semiconductor device according to claim 1, wherein the first semiconductor chip has a surface at an outer peripheral portion of the upper surface recessed from a surface at a central portion of the upper surface. The semiconductor device according to claim 1, 2 or 3,
A method for manufacturing a semiconductor device, wherein a back surface of the second semiconductor chip is subjected to an insulation treatment. The method for manufacturing a semiconductor device according to claim 1, 2, 3, or 4,
Mounting the first semiconductor chip on the substrate, and wire bonding the first wire;
Then, forming the thermoplastic insulating adhesive on the first semiconductor chip,
Then, pressing the second semiconductor chip from above the insulating adhesive in a heated state, and crushing the loop of the first wire formed by the wire bonding. Semiconductor device manufacturing method.

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