JP2004187472A - Power converter and its open phase detecting program - Google Patents

Power converter and its open phase detecting program Download PDF

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Publication number
JP2004187472A
JP2004187472A JP2002355176A JP2002355176A JP2004187472A JP 2004187472 A JP2004187472 A JP 2004187472A JP 2002355176 A JP2002355176 A JP 2002355176A JP 2002355176 A JP2002355176 A JP 2002355176A JP 2004187472 A JP2004187472 A JP 2004187472A
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Prior art keywords
voltage
time point
time
frequency
difference
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JP2002355176A
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Japanese (ja)
Inventor
Takashi Kojima
崇 小嶋
Nobunaga Suzuki
宣長 鈴木
Hideto Takada
英人 高田
Masaki Sugiura
正樹 杉浦
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Hitachi Industrial Equipment Systems Co Ltd
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Hitachi Industrial Equipment Systems Co Ltd
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  • Emergency Protection Circuit Devices (AREA)
  • Protection Of Static Devices (AREA)
  • Power Conversion In General (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a technology for detecting the open phase of a power converter stably by an arrangement of low cost. <P>SOLUTION: A smoothed voltage is detected and two voltage maximal points or voltage minimal points located at adjacent time-positions are determined from the difference of the detected voltage between first and second moments in time and a difference between second and third moments in time. A period or a frequency of a voltage ripple is then determined based on a time interval between two voltage maximal points or voltage minimal points. An open phase is determined by comparing that a period or a frequency with a preset reference period or frequency. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

【0001】
【発明の属する技術分野】
本発明は、複数相の交流電力を全波整流し平滑化して負荷側に供給する電力変換装置に係り、特に、欠相検出の技術に関する。
【0002】
【従来の技術】
欠相検出の従来技術としては例えば、特開平11−215686公報(特許文献1)、特開平11−206003公報(特許文献2)及び特開平6−276665公報(特許文献3)に記載されたものがある。特開平11−215686公報には、順変換器(コンバータ)の後段に接続された平滑コンデンサの両端電圧の分圧におけるリップル電圧の振幅を検出し該振幅の大きさによって欠相検出を行う構成が記載され、特開平11−206003公報には、インバータ装置の電解コンデンサの両端電圧を検出し、該検出電圧のリップル成分を高域フィルタにより抽出し、該リップル成分の周波数または繰り返し周期を計測することで欠相を検出する構成が記載され、特開平6−276665公報には、電力系統を保護する周波数保護継電器として、電力系統の電流または電圧を所定のサンプリング時間軸でサンプリングしてデジタル量子化したデジタルデータを、時系列を保って時系列データ保存回路に保存し、該保存されたデジタルデータの絶対値をとり、該絶対値データの最大のデータが保存されたサンプリング時刻を判定し、該判定されたサンプリング時刻に基づき演算に必要な時系列関係を有するデータを時系列データ保存回路から抽出し、これを所定の演算式に代入して電力系統の周波数を算定し欠相を検出する構成が記載されている。
【0003】
【特許文献1】
特開平11−215686公報
【特許文献2】
特開平11−206003公報
【特許文献3】
特開平6−276665公報
【0004】
【発明が解決しようとする課題】
一般に電力変換装置では電源電圧を、例えば380V〜480V程度と広範囲に変化させる場合も多い。特開平11−215686公報記載の技術では、上記リップル電圧の振幅が電源電圧の変化によっても変動するため、電源電圧が大幅に変化する場合には、欠相に起因した振幅増大の検出基準の設定が難しくなり、安定した欠相検出ができないおそれがある。また、特開平11−206003公報記載の技術では、リップル成分の抽出のために高域フィルタ等を必要とする。また、特開平6−276665公報記載の技術では、デジタルデータ保存回路と時系列保存回路とを必要とし、かつ、該時系列データ保存回路に時系列で保存した過去のデジタルデータを所定の基準により検索する必要がある。
本発明の課題点は、(1)電源電圧が大幅に変化する場合にも、安定した欠相検出ができるようにすること、(2)マイコン等の部品を共用し低コストで対応できるようにすること、等である。
本発明の目的は、かかる課題点を解決できる技術の提供にある。
【0005】
【課題を解決するための手段】
上記課題点を解決するために、本発明では、電力変換装置またはそれに用いる欠相検出用のプログラムにおいて、基本的に、全波整流後平滑化された電圧のサンプリング時点における電圧差に基づきリップルの周期または周波数を求め、正常時と欠相時における該周波数の違いから欠相を検出する。すなわち、第1の時点における電圧と第2の時点における電圧との電圧差が正、該第2の時点における電圧と第3の時点における電圧との電圧差が負となる2個の電圧極大点、または、第1の時点における電圧と第2の時点における電圧との電圧差が負、該第2の時点における電圧と第3の時点における電圧との電圧差が正となる2個の電圧極小点を、互いに隣り合う時間位置に求め、該2個の電圧極大点間の時間または該2個の電圧極小点間の時間を1周期とする電圧リップルの周期または周波数を求め、該周期または周波数を、予め設定された基準周期または基準周波数と比較して欠相か否かを判定する。また、該判定結果を表示する。具体的には、電力変換装置として、(1)平滑化された電力の電圧を検出する電圧検出手段と、該検出した電圧の、第1の時点と第2の時点の電圧差と、該第2の時点と第3の時点の電圧差とから、互いに隣り合う時間位置にある2個の電圧極大点または電圧極小点を求め、該2個の電圧極大点間または該2個の電圧極小点間の時間に基づき電圧リップルの周期または周波数を求め、該周波数を、予め設定された基準周期または基準周波数と比較して欠相を判定する演算手段と、該判定結果を表示する手段とを備えた構成とする。(2)交流電力を全波整流するコンバータと、平滑コンデンサを用い該全波整流された電力を平滑化する平滑手段と、該平滑コンデンサの両端の電圧を検出する電圧検出手段と、該検出した電圧につき、第1の時点の電圧値と第2の時点の電圧値の差としての第1の電圧差と、該第2の時点の電圧値と第3の時点の電圧値の差としての第2の電圧差とを求める手段と、該第1の電圧差が正、該第2の電圧差が負となる2個の電圧極大点、または、該第1の電圧差が負、該第2の電圧差が正となる2個の電圧極小点を互いに隣り合う時間位置に求める手段と、該2個の電圧極大点間または該2個の電圧極小点間の時間に基づき電圧リップルの周期または周波数を求める手段と、該求めた周期または周波数を、予め設定された基準周期または基準周波数と比較して欠相を判定する手段とを備えて成る演算手段と、該判定結果を表示する手段とを備えた構成とする。また、欠相検出用プログラムとして(3)コンピュータに、平滑化された電圧の第1の時点と第2の時点の電圧差と、該第2の時点と第3の時点の電圧差とを求める第1の手順と、該第1の手順における上記第1の時点と第2の時点の電圧差が正、上記第2の時点と第3の時点の電圧差が負となる2個の電圧極大点、または、上記第1の時点と第2の時点の電圧差が負、上記第2の時点と第3の時点の電圧差が正となる2個の電圧極小点を互いに隣り合う時間位置に求める第2の手順と、該2個の電圧極大点間の時間または該2個の電圧極小点間の時間から電圧リップルの周期または周波数を求める第3の手順と、該求めた周期または周波数を、予め設定された基準周期または基準周波数と比較して欠相を判定する第4の手順と、該判定結果の表示指示を行う第5の手順とを実行させる構成とする。
【0006】
【発明の実施の形態】
以下、本発明の実施例につき、図面を用いて説明する。
図1は、本発明の実施例としての電力変換装置の構成例を示す図である。
図1において、1は多相交流電源、2は、多相交流電力を全波整流するコンバータ、3は、全波整流された電力を平滑化する平滑コンデンサ、4は、平滑化された直流電力を変換して負荷に供給するインバータ、5は負荷装置としての電動機、6は、平滑コンデンサ3の両端の電圧VDCを検出する電圧検出手段としての電圧検出回路、8、9、10は分圧用抵抗、11は電圧検出信号線、12は基準電位線、7は、検出された電圧信号のサンプリング時点の電圧差に基づき電圧リップルの周波数を算定し該算定結果から欠相を判定する演算手段としての演算処理装置である。電圧検出回路6は、平滑コンデンサ6が接続される直流母線に直接つながれている。検出された電圧信号は電圧検出回路6内で分圧用抵抗8、9、10によって分圧され、電圧検出信号線11及び基準電位線12により演算処理装置7に入力される。演算処理装置7に入力された信号(アナログ信号)は該演算処理装置7の内部でA/D変換されデジタル信号化される。演算処理装置7は、内部のプログラムにより、インバータ4の駆動や、そのための情報処理等を行い、上記電圧信号は、インバータ4を駆動するための情報とされる。また、演算処理装置7は、電圧検出回路6からの信号を、商用電源の周期に比べ高速で処理するようになっている。該演算処理装置7はマイコン等で構成される。
【0007】
図2は、正常受電時に負荷装置としての電動機5を運転しているときの直流電圧波形の例を示す。リップル電圧の振幅は小さく、その周期はtである。演算処理装置7には、電圧検出回路6の、分圧用抵抗8、9、10で分圧された電圧波形が伝送されて処理される。
【0008】
図3は欠相受電時、負荷装置としての電動機5を運転しているときの直流電圧波形の例を示す。3相交流受電の場合、1相が欠相すると単相受電となるため大きなリップル波形になる。この時の周期は3tとなる。
【0009】
図4、図5は、演算処理装置7の説明図である。図4は、電圧検出回路6から入力される電圧信号のサンプリングの説明図、図5は、内部に格納された欠相検出用プログラムによる欠相検出処理の手順例を示す図である。欠相検出用プログラムの実行が開始されると、(1)電圧信号につき、図4のようなサンプリングを行い、第1の時点tn−2、第2の時点tn−1、第3の時点tにつき、それぞれの電圧値Vn−2、Vn−1、Vを読込み、電圧値Vn−2と電圧値Vn−1との電圧差ΔVn−1(=Vn−1−Vn−2)と、電圧値Vと電圧値Vn−1との電圧差ΔV(=V−Vn−1)とを演算する(ステップS51)。(2)ステップS51の演算結果により、電圧差ΔVn−1、ΔVのそれぞれにつき、正負を判定し、ΔVn−1が正、ΔVが負の場合は、第2の時点tn−1またはその近傍の時点における電圧値が極大に達していると判定し、そうでない場合、すなわち、ΔVn−1、ΔVがともに正、ΔVn−1、ΔVがともに負、またはΔVn−1が負、ΔVが正の場合は、第2の時点tn−1またはその近傍の時点における電圧値が極大に達していないと判定する。電圧が極大点に達していると判定した場合は、その電圧極大点を1個目の電圧極大点として、その時点(第2の時点tn−1)を記憶し、該時点を起点に時間をカウントしながら、さらに続けて、上記サンプリング、電圧差演算、電圧差判定を行い、2個目の電圧極大点とその時点を求める(ステップS52)。(3)上記ステップS52で、電圧が極大点に達していないと判定した場合は、時間カウントの積算を開始する(ステップS53)。(4)上記ステップS52で、2個の電圧極大点とその時点が求まった場合は、時間カウントした該2個の電圧極大点間の時間の積算値を1周期とする周波数fに変換し、これをリップル電圧の周波数とする(ステップS54)。(5)上記周波数fと、予め保存された欠相判定用の基準周波数であって欠相状態であるとするときの上限周波数Fと比較し、欠相状態か否かを判定する(ステップS56)。(6)f>Fの関係を満たす場合は欠相がない正常状態と判定し、時間カウント積算をリセットしてステップS51に戻る(ステップS57)。(7)f>Fの関係を満たさない場合は欠相状態と判定する(ステップS58)。(8)表示手段により警告表示を行い(ステップS59)、プログラムを終了する。本実施例では、上記ステップS58を実行した後も、電力変換装置の運転は継続して電動機5の運転を続行させる。これにより、不用意な電力変換装置の運転停止による他の装置への影響を防ぐことが可能となる。また、運転停止後、欠相状態のまま再び運転を開始しようとするときには警告表示を行い運転再開を阻止するようになっている。これにより、電力変換装置や負荷装置の安全性やユーザの安全性が確保される。また、上記ステップS51から上記ステップS58までの動作を複数回繰り返し、欠相状態と判定される回数により欠相状態を判定するようにしてもよい。この場合は、欠相検出の精度を高めることができる。
【0010】
上記実施例では、演算処理装置7において、電圧のサンプリング時点の電圧差から2個の電圧極大点を求め、これに基づく電圧リップルの周波数の演算結果から欠相検出を行うとしたが、この他、電圧のサンプリング時点の電圧差から2個の電圧極小点を求め、これに基づく電圧リップルの周波数の演算結果から欠相検出を行う方法もある。この場合は、演算処理装置7内の欠相検出用プログラムが、例えば以下のような欠相検出処理の手順を実行する。すなわち、(1)電圧信号につき、図4のようなサンプリングを行い、第1の時点tn−2、第2の時点tn−1、第3の時点tにつき、それぞれの電圧値Vn−2、Vn−1、Vを読込み、電圧値Vn−2と電圧値Vn−1との電圧差ΔVn−1(=Vn−1−Vn−2)と、電圧値Vと電圧値Vn−1との電圧差ΔV(=V−Vn−1)とを演算する。(2)上記(1)の演算結果により、電圧差ΔVn−1、ΔVのそれぞれにつき、正負を判定し、ΔVn−1が負、ΔVが正の場合は、第2の時点tn−1またはその近傍の時点における電圧値が極小値に達していると判定し、そうでない場合、すなわち、ΔVn−1、ΔVがともに負、ΔVn−1、ΔVがともに正、またはΔVn−1が正、ΔVが負の場合は、第2の時点tn−1またはその近傍の時点における電圧値が極小値に達していないと判定する。電圧が極小点に達していると判定した場合は、その電圧極小点を1個目の電圧極小点として、その時点(第2の時点tn−1)を記憶し、該時点を起点に時間をカウントしながら、さらに続けて、上記サンプリング、電圧差演算、電圧差判定を行い、2個目の電圧極小点とその時点を求める。(3)上記(2)において、電圧が極小点に達していないと判定した場合は、時間カウントの積算を開始する。(4)上記(2)で、2個の電圧極小点とその時点が求まった場合は、時間カウントした該2個の電圧極小点間の時間の積算値を1周期とする周波数fに変換し、これをリップル電圧の周波数とする。(5)上記周波数fと、予め保存された欠相判定用の基準周波数であって欠相状態であるとするときの上限周波数Fと比較し、欠相状態か否かを判定する。(6)f>Fの関係を満たす場合は欠相がない正常状態と判定し、時間カウント積算をリセットして上記(1)に戻る。(7)f>Fの関係を満たさない場合は欠相状態と判定する。(8)表示手段により警告表示を行い、プログラムを終了する。
上記の場合も、上記(1)から上記(6)までの動作を複数回繰り返し、欠相状態と判定される回数により欠相状態を判定するようにしてもよい。
【0011】
また、上記2個の電圧極大点を求める場合と上記電圧極小点を求める場合の各実施例では、演算により周波数fを求め、これを、予め保存された欠相判定用の基準周波数であって欠相状態であるとするときの上限の基準周波数Fと比較して欠相検出を行うとしたが、本発明はこれに限定されず、上記2個の電圧極大点とその時点、または、上記2個の電圧極小点とその時点が求まった場合、時間カウントした該2個の電圧極大点間または2個の電圧極小点間の時間の積算値を1周期として、これを欠相判定用の基準周期T(=1/F)と比較することで欠相検出を行うようにしてもよい。
【0012】
上記実施例によれば、電源電圧が大幅に変化する場合にも、振幅変動に左右されずに安定した欠相検出ができるようになる。マイコン等の部品を共用して低コストに対応できる。欠相検出の精度を向上させることも可能となる。
【0013】
【発明の効果】
本発明によれば、安定した欠相検出を低コストな構成で実現することができる。
【図面の簡単な説明】
【図1】本発明の実施例としての電力変換装置の構成例を示す図である。
【図2】全波整流波形を示す図である。
【図3】欠相状態の直流電圧波形を示す図である。
【図4】電圧信号のサンプリング動作の説明図である。
【図5】本発明における欠相検出処理の手順例を示す図である。
【符号の説明】
1…多相交流電源、 2…コンバータ、 3…平滑コンデンサ、 4…インバータ、 5…電動機、 6…電圧検出回路、 7…演算処理装置、 8、9、10…分圧用抵抗、 11…電圧検出信号線、 12…基準電位線。
[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a power converter that performs full-wave rectification and smoothing of AC power of a plurality of phases and supplies the smoothed AC power to a load side, and more particularly to a technique of detecting an open phase.
[0002]
[Prior art]
Conventional techniques for detecting phase loss are described in, for example, JP-A-11-215686 (Patent Document 1), JP-A-11-206003 (Patent Document 2), and JP-A-6-276665 (Patent Document 3). There is. Japanese Patent Application Laid-Open No. H11-215686 discloses a configuration in which the amplitude of a ripple voltage in the voltage division of a voltage across a smoothing capacitor connected to the subsequent stage of a forward converter (converter) is detected, and phase loss detection is performed based on the amplitude. Japanese Unexamined Patent Application Publication No. 11-206003 discloses detecting a voltage across an electrolytic capacitor of an inverter device, extracting a ripple component of the detected voltage by a high-pass filter, and measuring a frequency or a repetition period of the ripple component. In JP-A-6-276665, as a frequency protection relay for protecting a power system, current or voltage of a power system is sampled on a predetermined sampling time axis and digitally quantized. The digital data is stored in a time-series data storage circuit while maintaining the time series, and the absolute value of the stored digital data is stored. The sampling time at which the maximum data of the absolute value data is stored is determined, and data having a time-series relationship required for the operation is extracted from the time-series data storage circuit based on the determined sampling time. Is substituted into a predetermined arithmetic expression to calculate the frequency of the power system and detect an open phase.
[0003]
[Patent Document 1]
JP-A-11-215686 [Patent Document 2]
JP-A-11-206003 [Patent Document 3]
JP-A-6-276665
[Problems to be solved by the invention]
Generally, in a power converter, the power supply voltage is often changed in a wide range, for example, about 380 V to 480 V. In the technique described in Japanese Patent Application Laid-Open No. H11-215686, the amplitude of the ripple voltage fluctuates due to a change in the power supply voltage. This may make it difficult to perform stable open phase detection. In the technique described in Japanese Patent Application Laid-Open No. H11-206003, a high-pass filter or the like is required for extracting a ripple component. Further, the technology described in Japanese Patent Application Laid-Open No. 6-276665 requires a digital data storage circuit and a time-series storage circuit, and the past digital data stored in the time-series data storage circuit in a time-series manner according to a predetermined standard. Need to search.
The problems of the present invention are: (1) to enable stable open-phase detection even when the power supply voltage changes greatly; and (2) to cope with low cost by sharing components such as a microcomputer. And so on.
An object of the present invention is to provide a technique capable of solving such a problem.
[0005]
[Means for Solving the Problems]
In order to solve the above problems, in the present invention, in a power converter or a program for detecting an open phase used in the power converter, basically, ripples based on a voltage difference at the time of sampling of a voltage smoothed after full-wave rectification. A cycle or frequency is obtained, and a phase loss is detected from a difference between the frequency at a normal time and a frequency at a phase loss. That is, two voltage maximum points where the voltage difference between the voltage at the first time point and the voltage at the second time point is positive, and the voltage difference between the voltage at the second time point and the voltage at the third time point is negative. Or two voltage minima where the voltage difference between the voltage at the first time and the voltage at the second time is negative and the voltage difference between the voltage at the second time and the voltage at the third time is positive. A point is determined at a time position adjacent to each other, a period or a frequency of a voltage ripple having a period between the two voltage maximum points or the time between the two voltage minimum points as one period is determined, and the period or the frequency is determined. Is compared with a preset reference cycle or reference frequency to determine whether or not the phase is missing. In addition, the determination result is displayed. Specifically, as the power converter, (1) voltage detecting means for detecting a voltage of the smoothed power, a voltage difference between the detected time and a first time point and a second time point, and From the voltage difference between the second time point and the third time point, two voltage maximum points or voltage minimum points at time positions adjacent to each other are obtained, and between the two voltage maximum points or the two voltage minimum points. Calculating means for determining the phase or frequency of the voltage ripple based on the time between the two, and comparing the frequency with a preset reference cycle or reference frequency to determine open phase; and means for displaying the determination result. Configuration. (2) a converter for full-wave rectification of AC power, a smoothing means for smoothing the full-wave rectified power using a smoothing capacitor, a voltage detection means for detecting a voltage across the smoothing capacitor, and The voltage includes a first voltage difference as a difference between a voltage value at a first time point and a voltage value at a second time point, and a second voltage value as a difference between the voltage value at the second time point and the voltage value at a third time point. Means for determining the two voltage differences, wherein the first voltage difference is positive and the second voltage difference is negative, or two voltage maxima, or the first voltage difference is negative and the second voltage difference is negative. Means for determining two voltage minimum points at which the voltage difference is positive at time positions adjacent to each other; and determining the period of the voltage ripple or the period of the voltage ripple based on the time between the two voltage maximum points or between the two voltage minimum points. Means for determining the frequency, and determining the determined cycle or frequency by a preset reference cycle or reference Calculation means comprising a means for determining a phase loss as compared to the wave number, a configuration and means for displaying the determination result. Further, (3) the computer calculates the voltage difference between the first time point and the second time point of the smoothed voltage and the voltage difference between the second time point and the third time point as a program for detecting an open phase. A first procedure and two voltage maxima in which the voltage difference between the first time point and the second time point in the first procedure is positive and the voltage difference between the second time point and the third time point is negative. A point or two voltage minimum points where the voltage difference between the first time point and the second time point is negative and the voltage difference between the second time point and the third time point is positive are located at time positions adjacent to each other. A second procedure for obtaining, a third procedure for obtaining the period or frequency of the voltage ripple from the time between the two voltage maximum points or the time between the two voltage minimum points, and A fourth procedure for determining a phase loss by comparing with a preset reference cycle or reference frequency, and a result of the determination A configuration to execute a fifth step of performing a display instruction.
[0006]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1 is a diagram illustrating a configuration example of a power conversion device as an embodiment of the present invention.
In FIG. 1, 1 is a polyphase AC power supply, 2 is a converter for full-wave rectification of the polyphase AC power, 3 is a smoothing capacitor for smoothing the full-wave rectified power, and 4 is a smoothed DC power. , An inverter for supplying a voltage to a load, 5 an electric motor as a load device, 6 a voltage detecting circuit as voltage detecting means for detecting a voltage VDC across the smoothing capacitor 3, 8, 9 and 10 for voltage dividing A resistor, 11 is a voltage detection signal line, 12 is a reference potential line, 7 is a calculating means for calculating the frequency of the voltage ripple based on the voltage difference at the time of sampling of the detected voltage signal and determining the phase loss from the calculation result. Arithmetic processing device. The voltage detection circuit 6 is directly connected to a DC bus to which the smoothing capacitor 6 is connected. The detected voltage signal is divided by the voltage dividing resistors 8, 9, and 10 in the voltage detection circuit 6, and is input to the arithmetic processing device 7 through the voltage detection signal line 11 and the reference potential line 12. The signal (analog signal) input to the arithmetic processing unit 7 is A / D converted and converted into a digital signal inside the arithmetic processing unit 7. The arithmetic processing device 7 performs driving of the inverter 4 and information processing therefor by an internal program, and the voltage signal is information for driving the inverter 4. In addition, the arithmetic processing unit 7 processes the signal from the voltage detection circuit 6 at a higher speed than the cycle of the commercial power supply. The arithmetic processing unit 7 is constituted by a microcomputer or the like.
[0007]
FIG. 2 shows an example of a DC voltage waveform when the electric motor 5 as a load device is operated during normal power reception. The amplitude of the ripple voltage is small, and its cycle is t. The voltage waveform divided by the voltage dividing resistors 8, 9, and 10 of the voltage detection circuit 6 is transmitted to the arithmetic processing device 7 and processed.
[0008]
FIG. 3 shows an example of a DC voltage waveform when the electric motor 5 as a load device is operating at the time of phase loss power reception. In the case of three-phase AC power reception, if one phase is lost, single-phase power reception is performed, resulting in a large ripple waveform. The cycle at this time is 3t.
[0009]
4 and 5 are explanatory diagrams of the arithmetic processing device 7. FIG. FIG. 4 is an explanatory diagram of sampling of a voltage signal input from the voltage detection circuit 6, and FIG. 5 is a diagram illustrating an example of a procedure of an open phase detection process by an internally stored open phase detection program. When the execution of the open phase detection program is started, (1) the voltage signal is sampled as shown in FIG. 4, the first time point t n−2 , the second time point t n−1 , and the third time point t n−1 , per time point t n, each of the voltage values V n-2, V n-1, the voltage difference between the V n read, the voltage value V n-2 and the voltage value V n-1 ΔV n-1 (= V n- 1− V n−2 ) and a voltage difference ΔV n between the voltage value V n and the voltage value V n−1 (= V n −V n−1 ) are calculated (step S51). (2) Based on the calculation result of step S51, whether the voltage difference ΔV n−1 or ΔV n is positive or negative is determined. If ΔV n−1 is positive and ΔV n is negative, the second time point t n− It is determined that the voltage value at or near 1 has reached a local maximum, otherwise, ΔV n−1 and ΔV n are both positive, ΔV n−1 and ΔV n are both negative, or ΔV n -1 negative, if [Delta] V n is positive, it is determined that the voltage value at the time of the second time point t n-1 or the vicinity thereof has not reached the maximum. When it is determined that the voltage has reached the maximum point, the voltage maximum point is set as the first voltage maximum point, the time point (second time point t n−1 ) is stored, and the time point is set as the starting point. While counting, the sampling, the voltage difference calculation, and the voltage difference determination are further performed to obtain the second voltage maximum point and the time point (step S52). (3) If it is determined in step S52 that the voltage has not reached the maximum point, the counting of the time count is started (step S53). (4) When the two voltage maximum points and the time point are obtained in the step S52, the frequency f is converted into a frequency f in which the integrated value of the time counted between the two voltage maximum points is one cycle, This is set as the frequency of the ripple voltage (step S54). (5) The frequency f is compared with an upper limit frequency F which is a reference frequency stored in advance and is an open phase state when the open phase is determined (step S56). ). (6) When the relationship of f> F is satisfied, it is determined that there is no phase loss in a normal state, the time count integration is reset, and the process returns to step S51 (step S57). (7) If the relationship of f> F is not satisfied, it is determined that the phase is open (step S58). (8) A warning is displayed by the display means (step S59), and the program ends. In the present embodiment, the operation of the power converter is continued even after the execution of step S58, and the operation of the electric motor 5 is continued. Thereby, it is possible to prevent the influence of the careless shutdown of the power conversion device on other devices. Further, after the operation is stopped, when the operation is to be started again in the open phase state, a warning is displayed and the restart of the operation is prevented. Thereby, the safety of the power conversion device and the load device and the safety of the user are ensured. Further, the operation from step S51 to step S58 may be repeated a plurality of times, and the open phase state may be determined based on the number of times that the open phase state is determined. In this case, the accuracy of the phase loss detection can be improved.
[0010]
In the above embodiment, the arithmetic processing unit 7 determines two voltage maximum points from the voltage difference at the time of voltage sampling, and performs the phase loss detection based on the calculation result of the frequency of the voltage ripple based on this. There is also a method in which two voltage minimum points are obtained from a voltage difference at the time of voltage sampling, and a phase loss is detected from a calculation result of a frequency of a voltage ripple based on the two minimum points. In this case, the missing phase detection program in the arithmetic processing unit 7 executes, for example, the following missing phase detection processing procedure. That is, (1) per voltage signal, to sample as shown in FIG. 4, the first time point t n-2, the second time point t n-1, per third time point t n, each of the voltage values V n -2, reads the V n-1, V n, a voltage difference [Delta] V n-1 between the voltage value V n-2 and the voltage value V n-1 and (= V n-1 -V n -2), the voltage value V n and the voltage difference [Delta] V n between the voltage value V n-1 (= V n -V n-1) to calculate a. (2) by the calculation result of the (1), the voltage difference [Delta] V n-1, for each of the [Delta] V n, determines the sign, if [Delta] V n-1 is negative, [Delta] V n is positive, the second time point t It is determined that the voltage value at or near the time point n−1 has reached the minimum value, otherwise, ΔV n−1 and ΔV n are both negative, ΔV n−1 and ΔV n are both positive, Alternatively, when ΔV n−1 is positive and ΔV n is negative, it is determined that the voltage value at or near the second time point t n−1 has not reached the minimum value. If it is determined that the voltage has reached the minimum point, the voltage minimum point is set as the first voltage minimum point, the time point (second time point t n-1 ) is stored, and the time point is used as the starting point. While counting, the sampling, the voltage difference calculation, and the voltage difference determination are further performed to obtain the second voltage minimum point and the time point. (3) In the above (2), when it is determined that the voltage has not reached the minimum point, integration of the time count is started. (4) When the two voltage minimum points and the time point are obtained in the above (2), the frequency is converted into a frequency f having one cycle as an integrated value of the time between the two voltage minimum points counted by time. , And this is the frequency of the ripple voltage. (5) The frequency f is compared with an upper limit frequency F, which is a reference frequency stored in advance and used for determining an open phase and is assumed to be in an open phase state, to determine whether or not the open phase state is present. (6) If the relationship of f> F is satisfied, it is determined that there is no phase loss in a normal state, the time count integration is reset, and the process returns to (1). (7) If the relation of f> F is not satisfied, it is determined that the phase is open. (8) A warning is displayed by the display means, and the program ends.
Also in the above case, the operations from (1) to (6) may be repeated a plurality of times, and the open phase state may be determined based on the number of times the open phase state is determined.
[0011]
Further, in each of the embodiments for obtaining the two voltage maximum points and for obtaining the voltage minimum points, the frequency f is obtained by calculation, and this is used as the reference frequency for phase loss determination stored in advance. Although it is described that the phase loss detection is performed by comparing with the upper limit reference frequency F when the phase loss state is assumed, the present invention is not limited to this. When the two voltage minimum points and the time point are obtained, the integrated value of the time counted between the two voltage maximum points or the time between the two voltage minimum points is defined as one cycle, and this is used for phase loss determination. The phase loss detection may be performed by comparing with a reference cycle T (= 1 / F).
[0012]
According to the above-described embodiment, even when the power supply voltage changes greatly, stable open-phase detection can be performed without being affected by amplitude fluctuations. Parts such as microcomputers can be shared and low cost can be accommodated. It is also possible to improve the accuracy of phase loss detection.
[0013]
【The invention's effect】
According to the present invention, stable open-phase detection can be realized with a low-cost configuration.
[Brief description of the drawings]
FIG. 1 is a diagram illustrating a configuration example of a power conversion device as an embodiment of the present invention.
FIG. 2 is a diagram showing a full-wave rectified waveform.
FIG. 3 is a diagram showing a DC voltage waveform in an open phase state.
FIG. 4 is an explanatory diagram of a voltage signal sampling operation.
FIG. 5 is a diagram showing an example of a procedure of an open phase detection process according to the present invention.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... Polyphase AC power supply, 2 ... Converter, 3 ... Smoothing capacitor, 4 ... Inverter, 5 ... Electric motor, 6 ... Voltage detection circuit, 7 ... Arithmetic processing unit, 8, 9, 10 ... Resistor for voltage division, 11 ... Voltage detection Signal line, 12 ... Reference potential line.

Claims (5)

複数相の交流電力を全波整流し平滑化して負荷側に供給する電力変換装置において、
上記平滑化された電力の電圧を検出する電圧検出手段と、
該検出した電圧の、第1の時点と第2の時点の電圧差と、該第2の時点と第3の時点の電圧差とから、互いに隣り合う時間位置にある2個の電圧極大点または電圧極小点を求め、該2個の電圧極大点間または該2個の電圧極小点間の時間に基づき電圧リップルの周期または周波数を求め、該周期または周波数を、予め設定された基準周期または基準周波数と比較して欠相を判定する演算手段と、
該判定結果を表示する手段と、
を備えた構成を特徴とする電力変換装置。
In a power converter that supplies full-wave rectified and smoothed AC power of multiple phases to the load side,
Voltage detection means for detecting the voltage of the smoothed power,
From the voltage difference between the first time point and the second time point of the detected voltage and the voltage difference between the second time point and the third time point, two voltage maximum points at time positions adjacent to each other or A voltage minimum point is obtained, a period or frequency of a voltage ripple is obtained based on a time between the two voltage maximum points or a time between the two voltage minimum points, and the period or the frequency is determined by a predetermined reference period or reference. Calculating means for determining an open phase by comparing with the frequency;
Means for displaying the determination result;
A power converter characterized by comprising:
複数相の交流電力を全波整流し平滑化して負荷側に供給する電力変換装置において、
交流電力を全波整流するコンバータと、
該全波整流された電力を、平滑コンデンサを用い平滑化する平滑手段と、
該平滑コンデンサの両端の電圧を検出する電圧検出手段と、
該検出した電圧につき、第1の時点の電圧値と第2の時点の電圧値の差としての第1の電圧差と、該第2の時点の電圧値と第3の時点の電圧値の差としての第2の電圧差とを求める手段と、該第1の電圧差が正、該第2の電圧差が負となる2個の電圧極大点、または、該第1の電圧差が負、該第2の電圧差が正となる2個の電圧極小点を互いに隣り合う位置に求める手段と、該2個の電圧極大点間または該2個の電圧極小点間の時間に基づき電圧リップルの周期または周波数を求める手段と、該求めた周期または周波数を、予め設定された基準周期または基準周波数と比較して欠相を判定する手段とを備えて成る演算手段と、
該判定結果を表示する手段と、
を備えた構成を特徴とする電力変換装置。
In a power converter that supplies full-wave rectified and smoothed AC power of multiple phases to the load side,
A converter for full-wave rectification of AC power,
Smoothing means for smoothing the full-wave rectified power using a smoothing capacitor;
Voltage detection means for detecting the voltage across the smoothing capacitor;
For the detected voltage, a first voltage difference as a difference between the voltage value at the first time point and the voltage value at the second time point, and a difference between the voltage value at the second time point and the voltage value at the third time point Means for determining the second voltage difference as the first voltage difference, and two voltage maximum points where the first voltage difference is positive and the second voltage difference is negative, or the first voltage difference is negative, Means for determining two voltage minimum points at which the second voltage difference is positive at positions adjacent to each other; and determining a voltage ripple based on the time between the two voltage maximum points or the time between the two voltage minimum points. Means for determining a cycle or frequency, and arithmetic means comprising means for comparing the determined cycle or frequency with a preset reference cycle or reference frequency to determine phase loss,
Means for displaying the determination result;
A power converter characterized by comprising:
上記演算手段は、上記2個の電圧極大点のうち1個目の電圧極大点、または上記2個の電圧極小点のうち1個目の電圧極小点を検知した時点から時間カウントを開始し該2個の電圧極大点間の時間または該2個の電圧極小点間の時間を求める構成である請求項1または請求項2に記載の電力変換装置。The calculating means starts time counting from the time when the first voltage maximum point of the two voltage maximum points or the first voltage minimum point of the two voltage minimum points is detected. The power converter according to claim 1 or 2, wherein a time between two voltage maximum points or a time between the two voltage minimum points is obtained. 上記電圧検出手段は、電圧を分圧する構成である請求項1または請求項2に記載の電力変換装置。The power converter according to claim 1, wherein the voltage detection unit is configured to divide a voltage. 複数相の交流電力を全波整流し平滑化して負荷側に供給する電力変換装置に用いる欠相検出用プログラムであって、
コンピュータに、
平滑化された電圧の、第1の時点と第2の時点の電圧差と、該第2の時点と第3の時点の電圧差とを求める第1の手順と、
上記第1の手順における上記第1の時点と第2の時点の電圧差が正、上記第2の時点と第3の時点の電圧差が負となる2個の電圧極大点、または、上記第1の時点と第2の時点の電圧差が負、上記第2の時点と第3の時点の電圧差が正となる2個の電圧極小点を互いに隣り合う時間位置に求める第2の手順と、
該2個の電圧極大点間の時間または該2個の電圧極小点間の時間から電圧リップルの周期または周波数を求める第3の手順と、
該求めた周期または周波数を、予め設定された基準周期または基準周波数と比較して欠相を判定する第4の手順と、
該判定結果の表示指示を行う第5の手順と、
を実行させることを特徴とする欠相検出用プログラム。
An open-phase detection program used in a power converter that supplies full-wave rectified and smoothed multi-phase AC power to a load side,
On the computer,
A first procedure for obtaining a voltage difference between the first time point and the second time point of the smoothed voltage and a voltage difference between the second time point and the third time point;
Two voltage maximum points where the voltage difference between the first time point and the second time point in the first procedure is positive, and the voltage difference between the second time point and the third time point is negative, or A second procedure for determining two voltage minimum points at which the voltage difference between the first time point and the second time point is negative and the voltage difference between the second time point and the third time point is positive at time positions adjacent to each other; ,
A third procedure for determining the period or frequency of the voltage ripple from the time between the two voltage maximum points or the time between the two voltage minimum points;
A fourth procedure of comparing the determined cycle or frequency with a preset reference cycle or frequency to determine phase loss;
A fifth procedure for instructing display of the determination result,
The program for detecting an open phase, wherein the program is executed.
JP2002355176A 2002-12-06 2002-12-06 Power converter and its open phase detecting program Pending JP2004187472A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2020145851A (en) * 2019-03-06 2020-09-10 高周波熱錬株式会社 Power supply device for induction heating and method for detecting abnormality of the same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2020145851A (en) * 2019-03-06 2020-09-10 高周波熱錬株式会社 Power supply device for induction heating and method for detecting abnormality of the same
JP7101133B2 (en) 2019-03-06 2022-07-14 高周波熱錬株式会社 Power supply for induction heating and its abnormality detection method

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