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複数の端子を有する半導体素子と、この半導体素子の１つの端子にバイアス電圧を供給するバイアス電源回路とを具備した半導体素子用バイアス回路において、前記１つの端子と前記バイアス電源回路との間の点の電圧が所定値を越えた場合に、前記点の電圧の上昇を停止させる保護回路を設けたことを特徴とする半導体素子用バイアス回路。A bias circuit for a semiconductor device comprising a semiconductor device having a plurality of terminals and a bias power supply circuit for supplying a bias voltage to one terminal of the semiconductor device, and a point between the one terminal and the bias power supply circuit If the voltage of exceeds a predetermined value, the bias circuit for the semiconductor element characterized in that a protection circuit for stopping the increase of the voltage of the point. 複数の端子を有する半導体素子と、この半導体素子の１つの端子にバイアス電圧を供給するバイアス電源回路とを具備した半導体素子用バイアス回路において、前記１つの端子と前記バイアス電源回路との間の点の電圧が所定値よりも低下した場合に、前記点の電圧の降下を停止させる保護回路を設けたことを特徴とする半導体素子用バイアス回路。A bias circuit for a semiconductor device comprising a semiconductor device having a plurality of terminals and a bias power supply circuit for supplying a bias voltage to one terminal of the semiconductor device, and a point between the one terminal and the bias power supply circuit A bias circuit for a semiconductor element, provided with a protection circuit that stops a drop in the voltage at the point when the voltage of the voltage drops below a predetermined value. 複数の端子を有する半導体素子と、この半導体素子の１つの端子にバイアス電圧を供給するバイアス電源回路とを具備した半導体素子用バイアス回路において、前記１つの端子と前記バイアス電源回路との間の点に接続し、前記点の電圧が所定値よりも大きい場合に導通状態となる回路素子を有する保護回路を設けたことを特徴とする半導体素子用バイアス回路。A bias circuit for a semiconductor device comprising a semiconductor device having a plurality of terminals and a bias power supply circuit for supplying a bias voltage to one terminal of the semiconductor device, and a point between the one terminal and the bias power supply circuit And a protective circuit having a circuit element that is conductive when the voltage at the point is higher than a predetermined value. 複数の端子を有する半導体素子と、この半導体素子の１つの端子にバイアス電圧を供給するバイアス電源回路とを具備した半導体素子用バイアス回路において、前記１つの端子と前記バイアス電源回路との間の点に接続し、前記点の電圧が所定値よりも小さい場合に導通状態となる回路素子を有する保護回路を設けたことを特徴とする半導体素子用バイアス回路。A bias circuit for a semiconductor device comprising a semiconductor device having a plurality of terminals and a bias power supply circuit for supplying a bias voltage to one terminal of the semiconductor device, and a point between the one terminal and the bias power supply circuit And a protection circuit having a circuit element that is conductive when the voltage at the point is smaller than a predetermined value. 複数の端子を有する半導体素子と、この半導体素子の１つの端子にバイアス電圧を供給するバイアス電源回路とを具備した半導体素子用バイアス回路において、前記１つの端子と前記負電圧供給回路との間の点に接続し、かつ、前記点の電圧が第１所定値よりも大きい場合に導通状態となる第１回路素子および前記点の電圧が第２所定値よりも小さい場合に導通状態となる第２回路素子を有する保護回路を設けたことを特徴とする半導体素子用バイアス回路。A semiconductor element having a plurality of terminals, in the semiconductor device bias circuits and a bias power supply circuit for supplying a bias voltage to one terminal of the semiconductor device, between the one terminal and the negative voltage supply circuit A first circuit element that is connected to a point and is conductive when the voltage at the point is greater than a first predetermined value and a second circuit element that is conductive when the voltage at the point is less than a second predetermined value. A bias circuit for a semiconductor element, comprising a protection circuit having a circuit element. 半導体素子が電界効果トランジスタで、１つの端子がゲート端子である請求項１ないし請求項５のいずれか１つに記載の半導体素子用バイアス回路。 6. The bias circuit for a semiconductor element according to claim 1, wherein the semiconductor element is a field effect transistor and one terminal is a gate terminal.
JP2002347827A2002-11-292002-11-29Bias circuit for semiconductor element
PendingJP2004186735A
(en)