JP2004181788A - False end face type thermal head and its manufacturing method - Google Patents

False end face type thermal head and its manufacturing method Download PDF

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Publication number
JP2004181788A
JP2004181788A JP2002351700A JP2002351700A JP2004181788A JP 2004181788 A JP2004181788 A JP 2004181788A JP 2002351700 A JP2002351700 A JP 2002351700A JP 2002351700 A JP2002351700 A JP 2002351700A JP 2004181788 A JP2004181788 A JP 2004181788A
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Japan
Prior art keywords
thermal head
type thermal
common
pseudo
cmp
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JP2002351700A
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Japanese (ja)
Inventor
Kiyoshi Sato
清 佐藤
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Alps Electric Co Ltd
アルプス電気株式会社
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Priority to JP2002351700A priority Critical patent/JP2004181788A/en
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a false end face type thermal head which can surely prevent generation of an open short and can print by a high resolution, and to provide its manufacturing method. <P>SOLUTION: A thermal insulation layer; an insulating layer; a plurality of heating resistors; conductors made conductive to both ends in a resistance length direction of the plurality of heating resistors, respectively; and a protecting layer are sequentially stacked on a substrate. The thermal head is the false end face type in which the plurality of heating resistors are positioned at an end of the substrate end face side. A surface of the insulating layer is CMP flattened, and the plurality of heating resistors, conductors and protecting layer are stacked and formed on the CMP flat face. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a pseudo end face type thermal head and a method for manufacturing the same.
[0002]
[Prior art and its problems]
In recent years, attention has been paid to an end face type (pseudo end face type) for performing flat printing without winding an object to be printed on a platen so that printing can be performed even on a non-bending material such as a resin card, for example, in a thermal head. . Such an end-face type thermal head generally has a glaze insulating layer formed on an end face of a ceramic substrate or on a tapered portion provided on the end face of the substrate, and then a heating resistor, a conductor (common electrode) is formed on the glaze insulating layer. And a protective layer are sequentially laminated. Alternatively, after a glaze insulating layer is formed on a ceramic substrate, a heating resistor, a conductor (including a common electrode), and a protective layer are sequentially stacked on the glaze insulating layer in the vicinity of an end surface of the substrate.
[0003]
However, the above-mentioned conventional end-face type thermal head is not suitable for high-speed operation because of its necessity to form the glaze heat-insulating layer thickly, so that it is not excellent in heat dissipation.
[0004]
In order to realize a high-speed operation of the head, it is conceivable to use a Si substrate having good heat dissipation instead of the ceramic substrate. When a Si substrate is used, it is essential to provide a heat insulating layer on the substrate in order to improve thermal efficiency. An end face type thermal head is completed by forming a common electrode on the heat retaining layer via an insulating layer and forming a heating resistor and a conductor on the common electrode via an insulating layer. However, the heat insulating layer is generally formed of a cermet material such as TaCrSiO, and has a coarse particle size. For this reason, the surface of the heat insulating layer is microscopically uneven, and when the above layers are laminated on the heat insulating layer, arcing occurs, and it is difficult to secure insulation. Further, conventionally, as described above, a two-layer insulating structure in which an insulating layer is formed above and below a common electrode is adopted, so that the height of the head in the thickness direction is increased, which also ensures insulation. It was difficult.
[0005]
Particularly recently, high-resolution printing performance of about 600 to 1200 dpi has been demanded. In order to realize such high-resolution printing performance, it is necessary to form a heating resistor and a conductor by high-definition patterning. In this case, it has been found that open and short circuits occur frequently.
[0006]
[Patent Document]
JP-A-3-73365
JP-A-6-8500
[0007]
[Object of the invention]
The present invention has been made in view of the above circumstances, and has as its object to provide a pseudo end face type thermal head capable of reliably preventing the occurrence of open / short and printing at high resolution, and a method of manufacturing the same.
[0008]
Summary of the Invention
According to the present invention, in a pseudo end face type thermal head formed on a substrate, if a heating resistor, a conductor, and a protective layer are sequentially laminated on a flat insulating layer, insulation is ensured regardless of irregularities of a heat insulating layer. It focuses on what can be done.
[0009]
That is, the pseudo end face type thermal head of the present invention comprises a heat insulating layer; an insulating layer; a plurality of heating resistors; conductors respectively conducting to both ends of the plurality of heating resistors in the resistance length direction; A pseudo end face type thermal head in which a plurality of heat generating resistors are positioned at an end on the substrate end face side, wherein the surface of the insulating layer is flattened by CMP (Chemical Mechanical Polishing). A plurality of heating resistors, conductors, and protective layers are laminated on a flat CMP surface.
[0010]
The pseudo end face type thermal head can include a common electrode embedded in the insulating layer and in contact with the plurality of heating resistors via the CMP flat surface of the insulating layer. If the common electrode is buried in the insulating layer in this way, there is no need to provide an insulating layer above and below the common electrode as in the conventional structure. And insulation can be more easily secured. It is practical that the plane shape of the common electrode is U-shaped.
[0011]
The common electrode can be formed of, for example, Cu / Ni or Au / Ni, and it is preferable that Ni is exposed on the flat surface of the CMP so that a surface oxide layer is not generated. Alternatively, it may be formed of a single Au layer.
[0012]
As another embodiment, a common conductor is interposed between the heat insulating layer and the insulating layer, and a common contact portion in contact with the common conductor is buried in the insulating layer to form the common contact portion. A plurality of heating resistors can be contacted through the surface. As described above, even with the configuration including the common conductor and the common contact portion, it is not necessary to provide insulating layers above and below the common electrode as in the conventional structure, so that the height of the head in the film thickness direction can be reduced as compared with the conventional structure. .
[0013]
The common conductor is preferably formed of any one of Cu / Ni, Au / Ni, Cu, and Au. The common contact portion is preferably formed of Ni when the common conductor is formed of Cu / Ni or Au / Ni, and is preferably formed of Cu / Ni or Ni when the common conductor is formed of Cu. When the common conductor is formed of Au, it is preferable that the common conductor be formed of any of Au / Ni, Au, and Ni. It is preferable to expose Ni or Au in the common contact portion so that a surface oxide layer is not generated on the flat CMP surface.
[0014]
As yet another embodiment, a common electrode may be provided on an end face of the substrate, the common electrode being in contact with at least one of the plurality of heating resistors and the conductor exposed on the end face. Also with this configuration, the height of the head in the film thickness direction can be reduced, and insulation can be easily obtained. In this case, the common electrode is preferably formed of one of Cu / Ni, Au / Ni, and Au.
[0015]
In the pseudo end face type thermal head described above, the heat insulating layer is preferably formed of any of TaSi, TaSiW, TaSiO, TaSiWO, NbSi, NbSiO, and NbSiWO. According to the above material, although it is a cermet material, it can be easily etched using a CF-based gas at the time of an RIE (reactive ion etching) process, and an arbitrary pattern can be easily formed. Further, it is preferable that the protective layer is provided with a tapered portion formed by shaving the corner at the corner on the substrate end surface side. If this tapered portion is provided, the contact efficiency with the platen via the tapered portion is improved, and the print density is improved.
[0016]
The method for manufacturing a pseudo end face type thermal head according to the present invention includes: a heat insulating layer; an insulating layer; a plurality of heating resistors; conductors respectively conducting to both ends of the plurality of heating resistors in a resistance length direction; A pseudo end face type thermal head in which a plurality of heat generating resistors are positioned at the end of the substrate end face side, wherein the surface of the insulating layer is subjected to a CMP process to form a CMP flat face. A plurality of heating resistors, conductors, and protective layers are laminated on the flat CMP surface.
[0017]
When a plurality of heating resistors, conductors, and protective layers are formed on the CMP flat surface in this manner, the flatness is ensured by the CMP flat surface, and the heating resistors and conductors are formed by high-definition patterning. However, there is no fear that open shorts frequently occur. Further, even if the heat insulating layer is microscopically uneven and the unevenness becomes large due to arcing, the insulating property can be satisfactorily secured by a sufficient thickness of the insulating layer.
[0018]
In the above manufacturing method, a common electrode is formed at a specific position on the heat insulating layer before forming the insulating layer, and the insulating layer can be formed on the common electrode and the heat insulating layer. After this insulating layer is formed, a common electrode is exposed on the CMP flat surface when forming the CMP flat surface by the CMP processing, and then a plurality of heating resistors are formed on the CMP flat surface on which the common electrode is exposed. The plurality of heat generating resistors are brought into contact with a common electrode. Thereby, the common electrode electrically connected to the plurality of heating resistors can be embedded and formed in the insulating layer. This common electrode is preferably made of Cu / Ni or Au / Ni, and Ni is preferably exposed on the flat CMP surface.
[0019]
As another embodiment, before forming the insulating layer, a common conductor is entirely formed on the heat insulating layer, and a common contact portion is formed at a specific position on the common conductor. An insulating layer can be formed on the portion, the common conductor, and the heat insulating layer. After the insulating layer is formed, a common contact portion is exposed on the CMP flat surface when the CMP flat surface is formed by the CMP process, and then a plurality of heating resistors are formed on the CMP flat surface on which the common contact portion is exposed. A body is formed and the plurality of heating resistors are brought into contact with the common contact portion. Thus, a common contact portion for electrically connecting the common conductor interposed between the heat insulating layer and the insulating layer and the plurality of heating resistors can be formed by being buried in the insulating layer. This common conductor is preferably formed of one of Cu / Ni, Au / Ni, Cu, and Au. The common contact portion is preferably formed of Ni when the common conductor is formed of Cu / Ni or Au / Ni, and is preferably formed of Cu / Ni or Ni when the common conductor is formed of Cu. When the common conductor is formed of Au, it is preferable that the common conductor be formed of any of Au / Ni, Au, and Ni. It is preferable to expose Ni or Au in the common contact portion so that a surface oxide layer is not generated on the flat CMP surface.
[0020]
In the above two embodiments, it is preferable that the common electrode and the common contact portion are formed in a substantially triangular cross section by plating. When the common electrode and the common contact portion have a substantially triangular cross section in this manner, the insulating layer can be formed without generating a cavity around the common electrode and the common contact portion. There is no risk that holes will be formed on the surface (CMP flat surface).
[0021]
As yet another embodiment, a common electrode electrically connected to a plurality of heating resistors can be formed on the outside (end face) of the substrate. That is, after forming the protective layer, the substrate is cut to divide the individual end-face type thermal heads, and the substrate end faces of each end-face type thermal head are polished to form at least the conductor and the plurality of heating resistors on the board end faces. One is exposed, and a common electrode that contacts at least one of the exposed heating resistors and at least one of the conductors is formed on the end face of the substrate. In this case, the common electrode is preferably formed of one of Cu / Ni, Au / Ni, and Au.
[0022]
In the above manufacturing method, it is preferable that the heat retaining layer is formed of any of TaSi, TaSiW, TaSiO, TaSiWO, NbSi, NbSiO, and NbSiWO. Further, after the formation of the protective layer, a step may be provided in which a corner of the protective layer on the side of the substrate end surface is cut into a tapered shape by machining.
[0023]
BEST MODE FOR CARRYING OUT THE INVENTION
FIG. 1 is a cross-sectional view showing a pseudo end face type thermal head H1 according to the first embodiment of the present invention, and FIG. 2 is a plan view showing the pseudo end face type thermal head H1 (excluding the protective layer 13 and the organic insulating film 14). is there. The end face type thermal head H1 is a line head formed on a flat Si substrate 1. On the Si substrate 1, a heat insulating layer 3 is provided via an insulating film 2 in order to improve the thermal efficiency of the head. The heat retaining layer 3 is preferably formed of TaSi, TaSiW, TaSiO, TaSiWO, NbSi, NbSiO, NbSiWO, or the like.
[0024]
On the heat retaining layer 3, a common electrode 5 formed at the end on the substrate end face A side via the plating seed film 4 and an insulating layer 6 formed by embedding the common electrode 5 are provided. A CMP flat surface α flattened by the common electrode 5 and the insulating layer 6 is formed. The common electrode 5 has a two-layer structure including a Cu conductor film 5a and a Ni conductor film 5b, and the Ni conductor film 5b is exposed on the CMP flat surface α. The common electrode 5 is formed by electrolytic plating so that the planar shape is U-shaped as shown in FIG. 2 and the cross-sectional shape is substantially triangular as shown in FIG. The insulating layer 6 is made of SiO 2 , Al 2 O 3 , SION, and SIALON.
[0025]
On the CMP flat surface α, a plurality of heating resistors 7, conductors (first conductor 8, second conductor 10) in contact with both ends of the heating resistors 7 in the resistance length direction, and a protective layer 13 are sequentially laminated. Have been. The first conductor 8 is divided into a first conductor 8a on the common electrode side and a first conductor 8b on the individual electrode side by an opening 9 exposing the plurality of heating resistors 7. The first conductor 8a on the common electrode side is in contact with all of the plurality of heating resistors 7 and is further electrically connected to the common electrode 5 located immediately below via the plurality of heating resistors 7. On the other hand, the first conductor 8b on the individual electrode side is divided into a plurality of regions that individually contact the plurality of heating resistors 7, and the first conductor 8b is thicker than the first conductor 8 on the plurality of regions. Two conductors 10 are formed. In the present embodiment, the first conductor 8b and the second conductor 10 form an individual electrode. The first conductor 8 is preferably formed of a conductive material such as Cr, Mo, W, and the like, and the second conductor 10 is formed of a conductive material such as Al, Cr / Au / Cr, and Cr / Cu / Cr. preferable.
[0026]
A bonding pad layer 12 for external connection is formed on the second conductor 10 at an end on the center side of the substrate. The bonding pad layer 12 is formed of Au via the plating seed film 11 in the case of the wire bonding method, and is formed of Sn in the case of the flip chip method.
[0027]
The protective layer 13 functions as a wear-resistant layer and an oxidation preventing layer, and is formed to cover the insulating layer 6, the first conductor 8, the plurality of heating resistors 7, and the second conductor 10 from the substrate end face A side. I have. The protective layer 13 is provided with a tapered portion 13a formed by cutting a corner on the substrate end surface side by machining. The tapered portion 13a facilitates contact of the head (the plurality of heating resistors 7) with the platen. An organic insulating layer 14 is formed on the second conductor 10 and the insulating layer 6 that are not covered by the protective layer 13. Only the bonding pad layer 12 is exposed from the organic insulating layer 14.
[0028]
Next, an embodiment of a method of manufacturing the end face type thermal head H1 shown in FIG. 1 will be described with reference to FIGS. 3 to 14 are (a) a sectional view and (b) a partial plan view showing a manufacturing process of the end face type thermal head H1. In this embodiment, an end face type thermal head H1 (line head) is formed on a flat Si substrate 1 having a thickness of about 1.0 mm.
[0029]
First, as shown in FIG. 3, an insulating film 2 and a heat insulating layer 3 are continuously formed on a Si substrate 1. Sputtering, vapor deposition, or the like is used for film formation. In the present embodiment, the thickness of the insulating film 2 is about 1.0 μm, and the thickness of the heat insulating layer 3 is about 5.0 μm. The insulating film 2 is made of SiO 2 , Al 2 O 3 Preferably, the heat insulating layer 3 is formed of any of TaSi, TaSiW, TaSiO, TaSiWO, NbSi, NbSiO, and NbSiWO. The step of forming the insulating film 2 can be omitted, and the heat retaining layer 3 may be formed directly on the Si substrate 1.
[0030]
Next, as shown in FIG. 4, a plating seed film 4 is formed on the heat insulating layer 3 at an end on the substrate end surface A side, and a common electrode 5 is formed on the plating seed film 4. Sputtering, vapor deposition, or the like is used for film formation. The plating seed film 4 is preferably formed of Cr / Cu, Cr / Au, NiFe, or the like, and is formed in a range slightly smaller than the range in which the common electrode 5 is actually formed. The area where the plating seed film 4 and the common electrode 5 are formed has a U-shape in plan view as shown in FIG. FIG. 4B shows a part of the U-shape.
[0031]
In the common electrode 5, a Cu conductor film 5a and a Ni conductor film 5b are continuously formed by electrolytic plating so that the cross-sectional shape becomes substantially triangular. In order to expose the Ni conductor film 5b on the CMP flat surface formed in a later step, the thickness of the Cu conductor film 5a is preferably 8 μm or less, and the total thickness of the Cu conductor film 5a and the Ni conductor film 5b is set. Preferably, the thickness is about 10 to 20 μm. The Ni conductor film 5b functions as an oxidation prevention film for the Cu conductor film 5a. The common electrode 5 may be formed by using an Au conductor film instead of the Cu conductor film 5a, or may be formed by a single Au layer instead of the Cu conductor film 5a and the Ni conductor film 5b.
[0032]
Subsequently, as shown in FIG. 5, a thick insulating layer 6 is formed on the heat insulating layer 3 and the common electrode 5, and the common electrode 5 is embedded in the insulating layer 6. A sputtering method is used for film formation. In this embodiment, since the common electrode 5 has a triangular cross section, the insulating layer 6 can be formed without generating a cavity around the common electrode 5. The insulating layer 6 is made of SiO 2 , Al 2 O 3 , SION, or SIALON, and the film thickness is preferably about 10 to 20 μm.
[0033]
After the insulating layer 6 is formed, a CMP process is performed as shown in FIG. 6 to flatten the surface of the insulating layer 6 to form a CMP flat surface α, and the Ni conductive film 5b of the common electrode 5 is formed on the CMP flat surface α. To expose. That is, the CMP process is performed until the Ni conductor film 5b of the common electrode 5 is exposed. It is preferable that the thickness of the insulating layer 6 after the CMP process is about 10 μm. When the common electrode 5 is formed of Au / Ni, Ni is exposed on the flat CMP surface α, and when the common electrode 5 is formed of a single Au layer, Au is exposed on the flat CMP surface α.
[0034]
When the CMP flat surface α exposing the Ni conductor film 5b is formed by the above-described CMP processing, no hole is formed in the CMP flat surface α. This is because the insulating layer 6 is formed without forming a cavity around the common electrode 5. When the common electrode 5 is formed in a rectangular cross section, a cavity β where the insulating layer 6 is not formed is formed around the common electrode 5 as shown in FIG. A hole is formed in α.
[0035]
Subsequently, as shown in FIG. 7, using a photolithography technique, a resistive film 7 'and a first conductor 8, which will later become a plurality of heating resistors, are formed on the exposed CMP flat surface α of the common electrode 5. To form Thereby, the resistance film 7 ′ and the first conductor 8 are electrically connected to the common electrode 5. The resistance film 7 ′ is preferably formed of a cermet material of a high melting point metal such as Ta—Si—O, TaSiONb, Ti—Si—O, and Cr—Si—O, which easily increases the resistance. The first conductor 8 can be formed of Cr, Mo, W, or the like, and is particularly preferably formed of Cr.
[0036]
After the formation of the first conductor 8, as shown in FIG. 8, an opening 9 for exposing the resistance film 7 'is formed. That is, a first resist that defines the resistance length L of the resistive film 7 'is formed on the first conductor 8, and the portion of the first conductor 8 not covered with the first resist is subjected to RIE (reactive ion etching) or wet etching. After removal by etching, the first resist is removed. By this step, the first conductor 8 is connected to the first conductor 8a on the common electrode side electrically connected to the common electrode 5 and the first conductor 8b on the individual electrode side not electrically connected to the common electrode 5. Separated.
[0037]
After the opening 9 is formed, the resistance width W of the heating resistor to be formed and the conductor pattern of the first conductor 8 are determined by using the photolithography technique. That is, a second resist that defines the resistance width W and the conductor pattern of the heating resistor is formed on the first conductor 8 and the resistive film 7 ′ exposed from the first conductor 8, and is covered with the second resist. After the unremoved first conductor 8 and the resistive film 7 'are removed to expose the insulating layer 6 from the removed portion, the second resist is removed. By this step, the connected resistive film 7 'is separated into individual (plural) heat generating resistors 7 having a defined resistance length L and resistance width W, as shown in FIG. In addition, the first conductor 8b on the individual electrode side is divided into a plurality of regions that independently contact each heating resistor 7. In this embodiment, a large number of heating resistors 7 are formed by performing high-definition patterning so as to obtain printing performance of 600 to 1200 dpi.
[0038]
Subsequently, as shown in FIG. 10, a second conductor 10 having a thickness larger than that of the first conductor 8 is formed on the first conductor 8b divided into a plurality of regions. For forming the second conductor 10, sputtering, photolithography, etching, or the like is used. The second conductor 10 can be formed of Al, Cr / Au / Cr, Cr / Cu / Cr, or the like, and is particularly preferably formed of Al.
[0039]
After the second conductor 10 is formed, the substrate surface (the insulating layer 6, the heating resistor 7, the first conductor 8, and the second conductor 10 exposed on the substrate surface) is scraped by a predetermined thickness by reverse sputtering or the like. To expose a new film surface. Then, as shown in FIG. 11, the exposed insulating layer 6 (the insulating layer 6 on the substrate end face A side), the first conductor 8, the plurality of heat generating resistors 7, and the new film surface of the second conductor 10 The protection layer 13 is formed. The protective layer 13 is made of SiAlON or Ta by using a bias sputtering method. 2 O 5 It is preferred to be formed from a wear-resistant material such as.
[0040]
After the protection layer 13 is formed, as shown in FIG. 12, a plating seed film 11 is formed on the end of each second conductor 10 exposed from the protection layer 13, and a bonding pad layer is formed on the plating seed film 11. 12 is formed by plating. When the wire bonding method is used, it is preferable that the bonding pad layer 12 be formed of Au and the plating seed film 11 be formed in a two-layer structure of, for example, Cr / Au or Ti / Au. On the other hand, when the flip chip bonding method is used, it is preferable that the bonding pad layer 12 is formed of Sn and the plating seed film 11 is formed of, for example, Cr / Cu, Cr / Ni, NiFe, or the like.
[0041]
Subsequently, as shown in FIG. 13, the second conductor 10 and the insulating layer 6 exposed on the substrate surface are covered with the organic insulating layer 14, and only the bonding pad layer 12 is exposed on the substrate surface. Then, as shown in FIG. 14, mechanical processing (polishing) is performed on the corner 13A on the substrate end surface side of the protective layer 13 from two directions to form a tapered part 13a inclined by a predetermined angle from the state before processing. . When the tapered portion 13a is formed, the contact efficiency with the platen is improved, and the print density is improved. Thus, the end face type thermal head H1 shown in FIG. 1 is obtained.
[0042]
As described above, according to the first embodiment, the CMP flat surface α is formed by the insulating layer 6, and the heating resistor 7, the conductors (the first conductor 8, the second conductor 10), and the protection are formed on the CMP flat surface α. Since the layer 13 is laminated, the flatness is ensured by the CMP flat surface α, and there is no possibility that open / short will occur frequently even if the heating resistor and the electrode are formed by high-definition patterning. Further, since the thickness of the insulating layer 6 is sufficiently ensured, even if the heat retaining layer 3 is microscopically uneven and arcing occurs, the insulating property can be maintained well even if the unevenness becomes large. Can be. According to the thermal head H1, it is possible to obtain a high resolution of about 600 to 1200 dpi.
[0043]
In the first embodiment, the common electrode 5 is embedded in the insulating layer 6 (the periphery thereof is covered with the insulating layer 6), and the common electrode 5 and the plurality of heating resistors are formed via the CMP flat surface α. Since the body 7 is in contact, there is no need to provide insulating layers above and below the common electrode as in the conventional case. Therefore, the height of the head in the film thickness direction can be reduced as compared with the related art, and it becomes easier to secure insulation.
[0044]
The common electrode 5 is formed in a substantially triangular cross section in the first embodiment, but may be formed in a mushroom cross section as shown in FIG. After forming a thin resist r around the plating seed film 4 as shown in FIG. 16, the common electrode 5 ′ is formed so as to have a total thickness of about 10 to 20 μm. It can be formed by forming the Ni conductor film 5b by electrolytic plating and removing the resist r later. According to the common electrode 5 ′ having the mushroom cross section, a cavity β is formed around the plating seed film 4. However, since the CMP processing is completed when the Ni conductor film 5 b is exposed, the CMP flat surface is formed. There is no risk that holes will occur in α. The plane shape of the common electrode 5 'having a mushroom cross section is the same as the plane shape of the common electrode 5 shown in FIG.
[0045]
FIG. 17 is a cross-sectional view showing an end face type thermal head H2 according to the second embodiment of the present invention. In the second embodiment, instead of the common electrode 5 of the first embodiment, a common conductor 50 formed entirely on the heat insulation layer 3 and a common conductor 50 via the common conductor 50 and the plurality of heating resistors 7 are provided. And a common contact portion 51 for electrically connecting the first conductor 8a on the electrode side. The common contact portion 51 is located at the end on the substrate end surface A side. 17, components having substantially the same functions as those in the first embodiment shown in FIG. 1 are denoted by the same reference numerals as those in FIG.
[0046]
With reference to FIGS. 18 to 20, one embodiment of a method of manufacturing the pseudo end face type thermal head H2 shown in FIG. 17 will be described. 18 to 20 are (a) a cross-sectional view and (b) a partial plan view showing a manufacturing process of the end face type thermal head H1. In the following, the steps of forming the heat insulating layer 3 are the same as those of the first embodiment, and thus the description thereof will be omitted.
[0047]
After forming the heat insulating layer 3, as shown in FIG. 18, a plating seed film 4 is formed on the entire surface of the heat insulating layer 3, and a common conductor 50 is formed on the plating seed film 4 by electrolytic plating. The plating seed film 4 is preferably formed of Cr / Cu as in the first embodiment. The common conductor 50 can be formed of, for example, Cu / Ni, Au / Ni, Cu, or Au. In another embodiment, the common conductor 50 may be formed from Cr, Cr / Cu / Cr, or the like by using a sputtering method.
[0048]
Next, as shown in FIG. 19, a common contact portion 51 is formed on the common conductor 50 by electrolytic plating so as to be located at the end on the substrate end surface A side. The common contact portion 51 is formed in a substantially triangular or mushroom-shaped cross section similar to the common electrodes 5 and 5 ′ described above so as not to form a hole in a flat CMP surface to be formed later. In the illustrated embodiment, the common contact portion 51 has a substantially triangular cross section. The common contact portion 51 can be formed of Cu / Ni, Au / Ni, Cu, Au. For example, when the common conductor 50 is formed of Cu / Ni or Au / Ni, the common contact portion 51 is preferably formed of Ni. Further, when the common conductor 50 is formed of Cu, the common contact portion 51 is preferably formed of Cu / Ni or Cu. When the common conductor 50 is formed of Au, the common contact portion 51 is formed of Cu. It is preferable to be formed of Au / Ni, Au, or Ni. When the common contact portion 51 is formed of Cu / Ni or Au / Ni, the thickness of Cu is preferably 8 μm or less in order to expose Ni on a CMP flat surface formed in a later step. It is preferable that the total thickness of the portions 51 is about 10 to 20 μm.
[0049]
Subsequently, as shown in FIG. 20, after forming the insulating layer 6 on the common conductor 50 and the common contact portion 51, the surface of the insulating layer 6 is subjected to a CMP process to form a CMP flat surface α. The common contact portion 51 is exposed on the flat surface α. Then, on the exposed CMP flat surface α of the common electrode 5, a resistance film 7 ′, which will be a plurality of heating resistors later, and a first conductor 8 are formed. After the first conductor 8 is formed, the steps shown in FIGS. 7 to 14 are performed as in the first embodiment. Thus, the pseudo end face type thermal head H2 shown in FIG. 17 is completed.
[0050]
As described above, even in the second embodiment including the common conductor 50 formed entirely on the heat insulating layer 3 and the common contact portion 51, the plurality of heating resistors 7 on the CMP flat surface α Since the first conductor 8, the second conductor 10, and the like are formed in layers, insulation can be reliably performed. Further, since it is not necessary to provide insulating layers above and below the common electrode as in the conventional structure, the height of the head in the thickness direction can be reduced as compared with the conventional structure, and the insulating property can be more easily secured.
[0051]
FIG. 21 is a cross-sectional view showing a pseudo end face type thermal head H3 according to the third embodiment of the present invention. In the third embodiment, the insulating layer 6 is formed entirely on the heat insulating layer 3, and the common electrode 500 that contacts the plurality of heating resistors 7 and the first conductor 8 is formed on the end face A of the substrate. I have. In FIG. 21, components having substantially the same functions as those in the first embodiment shown in FIG. 1 are denoted by the same reference numerals as those in FIG.
[0052]
The common electrode 500 is formed as follows.
First, after forming the insulating film 2 and the heat insulating layer 3 on the Si substrate 1, the insulating layer 6 is formed directly on the entire heat insulating layer 3. Next, CMP processing is performed on the surface of the insulating layer 6 to form a CMP flat surface α. Subsequently, the steps shown in FIGS. 7 to 14 are performed as in the first embodiment. Then, the Si substrate 1 is cut and divided into individual end surface type thermal heads, and the substrate side surface A of each end surface type thermal head is polished and a plurality of heating resistors 7 and the first conductor 8 (common electrode) are formed on the substrate end surface A. The first conductor 8a on the side is exposed, and a common electrode 500 is formed on the exposed plurality of heating resistors 7 and the first conductor 8a.
[0053]
As described above, even in the third embodiment including the common electrode 500 formed on the substrate end surface A, the plurality of heating resistors 7, the first conductor 8, the second conductor 10, and the like are formed on the CMP flat surface α. Therefore, insulation can be reliably performed. In addition, since it is not necessary to provide insulating layers above and below the common electrode, the height of the head in the thickness direction can be reduced as compared with the related art, and the insulating property can be more easily secured. In the third embodiment, the common electrode 500 is in contact with both the heating resistor 7 and the first conductor 8a. However, the common electrode 500 is in contact with one of the heating resistor 7 and the first conductor 8a. It should just be. Note that this embodiment is particularly effective when the electrode length X of the first conductor 8a on the common electrode side cannot be sufficiently obtained, that is, when it is difficult to form the common electrode 5 and the contact portion 51 in the insulating layer 6. is there.
[0054]
According to each of the above embodiments, since the plurality of heating resistors 7, the conductors (the first conductor 8, the second conductor 10), and the protective layer 13 are laminated on the CMP flat surface α, the heat insulating layer 3 is microscopic. Even if the heating resistor and the electrode are formed by high-definition patterning, there is no possibility that open / short occurs frequently. According to the end face type thermal heads H1 to H3, a high resolution of about 600 to 1200 dpi can be obtained.
[0055]
In each embodiment, the conductor is constituted by the first conductor 8 and the second conductor 10, but the conductor may be a single layer or three or more layers.
[0056]
【The invention's effect】
As described above, according to the present invention, the surface of the insulating layer formed on the heat insulating layer is subjected to the CMP process, and the heating resistor, the electrode, and the protective layer are laminated on the flat surface of the CMP. Even if it is visually uneven, there is no effect, and the insulating property can be secured well and arcing can be prevented. Therefore, even if the heating resistor and the electrode are formed by high-definition patterning, there is no possibility that open / short occurs frequently, and a high resolution of about 600 to 1200 dpi can be obtained.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing a structure of a pseudo end face type thermal head according to an embodiment of the present invention.
FIG. 2 is an overall plan view showing a pseudo end face type thermal head of FIG. 1 (with a protective layer and an organic insulating film removed).
3A is a cross-sectional view and FIG. 3B is a partial plan view illustrating one process of a method for manufacturing the pseudo end face thermal head of FIG. 1;
4A is a sectional view showing a step subsequent to the step shown in FIG. 3, and FIG.
5A is a sectional view showing a step subsequent to the step shown in FIG. 4, and FIG.
6A is a sectional view showing a step subsequent to the step shown in FIG. 5, and FIG. 6B is a partial plan view.
7A is a cross-sectional view showing a step subsequent to the step shown in FIG. 6, and FIG.
8A is a sectional view showing a step subsequent to the step shown in FIG. 7, and FIG. 8B is a partial plan view.
9A is a sectional view showing a step subsequent to the step shown in FIG. 8, and FIG. 9B is a partial plan view.
10A is a sectional view showing a step subsequent to the step shown in FIG. 9, and FIG. 10B is a partial plan view.
11A is a sectional view showing a step subsequent to the step shown in FIG. 10, and FIG. 11B is a partial plan view.
12A is a sectional view showing a step subsequent to the step shown in FIG. 11, and FIG. 12B is a partial plan view.
13A is a cross-sectional view showing a step subsequent to the step shown in FIG. 12, and FIG. 13B is a partial plan view.
14A is a sectional view showing a step subsequent to the step shown in FIG. 13, and FIG. 14B is a partial plan view.
FIG. 15 is a cross-sectional view showing an end face type thermal head having a common electrode formed in a mode different from that of FIG. 4;
16 is a cross-sectional view showing a step of forming the common electrode shown in FIG.
FIG. 17 is a sectional view showing an end face type thermal head having a common electrode according to another embodiment.
18A is a cross-sectional view showing one step of forming the common electrode shown in FIG. 16, and FIG. 18B is a partial plan view.
19A is a sectional view showing a step subsequent to the step shown in FIG. 17, and FIG. 19B is a partial plan view.
20A is a sectional view showing a step subsequent to the step shown in FIG. 18, and FIG. 20B is a partial plan view.
FIG. 21 is a sectional view showing an end face type thermal head having a common electrode according to still another embodiment.
FIG. 22 is a cross-sectional view for explaining a problem when the common electrode is formed in a rectangular cross section.
[Explanation of symbols]
1 Si substrate
2 Insulating film
3 Insulation layer
4 Plating seed film
5 Common electrode
5a Cu conductor film
5b Ni conductor film
6 Insulation layer
7 Heating resistor
8 First conductor
8a Common electrode side
8b Individual electrode side
9 Open part
10 Second conductor
11 Plating seed film
12 Bonding pad layer
13 Protective layer
13a Tapered part
14 Organic insulation layer
50 common conductor
51 Common contact part
500 common electrode
H1 End-face type thermal head
A Board edge
α CMP flat surface
β cavity

Claims (34)

  1. A heat insulating layer; an insulating layer; a plurality of heating resistors; conductors respectively conducting to both ends in the resistance length direction of the plurality of heating resistors; and a protective layer; A pseudo end face type thermal head in which is positioned at the end on the substrate end face side,
    A pseudo end face type thermal head, wherein a surface of the insulating layer is planarized by CMP, and the plurality of heating resistors, the conductor, and the protective layer are laminated on the planarized CMP surface.
  2. 2. The pseudo end face type thermal head according to claim 1, wherein a common electrode in contact with said plurality of heating resistors is embedded in said insulating layer through a CMP flat surface of said insulating layer.
  3. 3. A pseudo end face type thermal head according to claim 2, wherein said common electrode is formed of Cu / Ni, and Ni is exposed on said flat CMP surface.
  4. 3. The pseudo end face type thermal head according to claim 2, wherein the common electrode is formed of Au / Ni, and Ni is exposed on the CMP flat surface.
  5. 3. The pseudo end face type thermal head according to claim 2, wherein the common electrode is formed of Au, and Au is exposed on the flat CMP surface.
  6. 2. The pseudo end face type thermal head according to claim 1, wherein a common conductor is interposed between the heat insulating layer and the insulating layer, and a common contact portion in contact with the common conductor is buried in the insulating layer. A pseudo end face type thermal head in which the common contact portion further contacts the plurality of heating resistors via a CMP flat surface of the insulating layer.
  7. 7. The pseudo end face type thermal head according to claim 6, wherein said common conductor is formed of Cu, said common contact portion is formed of Cu / Ni or Ni, and Ni is exposed on said CMP flat surface. End face type thermal head.
  8. 7. The pseudo end face type thermal head according to claim 6, wherein the common conductor is formed of Cu / Ni or Au / Ni, the common contact portion is formed of Ni, and Ni is exposed on the flat CMP surface. Pseudo end face type thermal head.
  9. 7. The pseudo end face type thermal head according to claim 6, wherein said common conductor is made of Cu, said common contact portion is made of Cu / Ni or Ni, and Ni is exposed on said CMP flat surface. Type thermal head.
  10. 7. The pseudo end face type thermal head according to claim 6, wherein said common conductor is formed of Au, and said common contact portion is formed of one of Au / Ni, Au and Ni.
  11. 2. The pseudo end face type thermal head according to claim 1, further comprising a common electrode on an end face of the substrate, the common electrode being in contact with at least one of the plurality of heating resistors and conductors exposed on the end face. .
  12. The pseudo end face type thermal head according to claim 11, wherein the common electrode is formed of Cu / Ni.
  13. The pseudo end face type thermal head according to claim 10, wherein the common electrode is formed of Au / Ni.
  14. The pseudo end face type thermal head according to claim 10, wherein the common electrode is formed of Au.
  15. 15. The pseudo end face type thermal head according to claim 1, wherein the heat retaining layer is formed of any of TaSi, TaSiW, TaSiO, TaSiWO, NbSi, NbSiO, and NbSiWO. head.
  16. The pseudo end face type thermal head according to any one of claims 1 to 15, wherein the protective layer has a tapered portion formed by shaving the corner at a corner on the substrate end surface side. Pseudo end face type thermal head.
  17. A heat insulating layer; an insulating layer; a plurality of heating resistors; conductors respectively conducting to both ends in the resistance length direction of the plurality of heating resistors; and a protection layer; A method for manufacturing a pseudo end face type thermal head in which the
    A pseudo end face type wherein a CMP flat surface is formed by performing a CMP process on a surface of the insulating layer, and the plurality of heating resistors, the conductor, and the protective layer are formed on the flat CMP surface. Manufacturing method of thermal head.
  18. 18. The method of manufacturing a pseudo end face type thermal head according to claim 17, wherein a common electrode is formed at a specific position on the heat insulating layer before forming the insulating layer, and thereafter, the common electrode and the heat insulating layer are formed. Forming the insulating layer thereon, further exposing the common electrode on the CMP flat surface when forming a CMP flat surface by CMP, and forming the plurality of the plurality of common electrodes on the CMP flat surface exposing the common electrode. A method of manufacturing a pseudo end face type thermal head in which a heating resistor is formed and the plurality of heating resistors are brought into contact with the common electrode.
  19. 19. The method according to claim 18, wherein the common electrode is formed of Cu / Ni, and Ni is exposed on the CMP flat surface.
  20. 19. The method according to claim 18, wherein the common electrode is formed of Au / Ni and Ni is exposed on the flat surface of the CMP.
  21. 20. The method for manufacturing a pseudo end face type thermal head according to claim 18, wherein the common electrode is formed of Au, and the Au is exposed on the flat CMP surface.
  22. 22. The method of manufacturing a pseudo end face type thermal head according to claim 18, wherein the common electrode is formed in a substantially triangular cross section by plating.
  23. 18. The method for manufacturing a pseudo end face type thermal head according to claim 17, wherein a common conductor is entirely formed on the heat insulating layer before forming the insulating layer, and a common contact is formed at a specific position on the common conductor. Part is formed, and thereafter, the insulating layer is formed on the common contact portion, the common conductor and the heat insulating layer, and further, when the CMP flat surface is formed by CMP processing, the CMP flat surface is formed. A pseudo end face type in which the plurality of heating resistors are formed on a CMP flat surface where the common contact portion is exposed, and the plurality of heating resistors are brought into contact with the common contact portion. Manufacturing method of thermal head.
  24. 24. The method of manufacturing a pseudo end face type thermal head according to claim 23, wherein the common conductor is formed of Cu, the common contact portion is formed of Cu / Ni or Ni, and Ni is exposed on the CMP flat surface. A method for manufacturing an end face type thermal head.
  25. 24. The method according to claim 23, wherein the common conductor is formed of Cu / Ni, the common contact portion is formed of Ni, and Ni is exposed on the CMP flat surface. Manufacturing method of thermal head.
  26. 24. The method of manufacturing a pseudo end face type thermal head according to claim 23, wherein the common conductor is formed of Au, the common contact portion is formed of Au / Ni or Ni, and Ni is exposed on the flat CMP surface. A method for manufacturing an end face type thermal head.
  27. 24. The method according to claim 23, wherein the common conductor is formed of Au / Ni, the common contact is formed of Ni, and the Ni is exposed on the flat CMP surface. Manufacturing method of thermal head.
  28. 28. The method according to claim 23, wherein the common contact portion is formed in a substantially triangular cross section by plating.
  29. 18. The method of manufacturing a pseudo end face type thermal head according to claim 17, wherein after forming the protective layer, the substrate is cut to divide each end face type thermal head, and the end face of each end face type thermal head is polished. Exposing at least one of the conductor and the plurality of heating resistors on the end face of the substrate, and forming a common electrode in contact with at least one of the exposed plurality of heating resistors and the conductor on the end face of the substrate. Manufacturing method of a pseudo end face type thermal head.
  30. 30. The method according to claim 29, wherein the common electrode is formed of Cu / Ni.
  31. 31. The method according to claim 30, wherein the common electrode is formed of Au / Ni.
  32. 31. The method of manufacturing a pseudo end face type thermal head according to claim 30, wherein the common electrode is formed of Au.
  33. 33. The method of manufacturing a pseudo end face type thermal head according to claim 17, wherein the heat insulating layer is formed of any of TaSi, TaSiW, TaSiO, TaSiWO, NbSi, NbSiO, and NbSiWO. Head manufacturing method.
  34. The method of manufacturing a pseudo end face type thermal head according to any one of claims 17 to 33, wherein a corner portion of the protective layer on the side of the substrate end face side is formed into a tapered shape by machining. Production method.
JP2002351700A 2002-12-03 2002-12-03 False end face type thermal head and its manufacturing method Withdrawn JP2004181788A (en)

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CN 200310118796 CN1275775C (en) 2002-12-03 2003-12-03 Anolog endface type hot printing head and its making method

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009137284A (en) * 2007-11-13 2009-06-25 Tdk Corp Thermal head, manufacturing method for thermal head, and printer

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2669093B1 (en) * 2011-01-25 2019-06-26 Kyocera Corporation Thermal head and thermal printer equipped with same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009137284A (en) * 2007-11-13 2009-06-25 Tdk Corp Thermal head, manufacturing method for thermal head, and printer

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CN1275775C (en) 2006-09-20

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