JP2004164383A5 - - Google Patents

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Publication number
JP2004164383A5
JP2004164383A5 JP2002330569A JP2002330569A JP2004164383A5 JP 2004164383 A5 JP2004164383 A5 JP 2004164383A5 JP 2002330569 A JP2002330569 A JP 2002330569A JP 2002330569 A JP2002330569 A JP 2002330569A JP 2004164383 A5 JP2004164383 A5 JP 2004164383A5
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JP
Japan
Prior art keywords
circuit
circuits
finite field
multiplication
configuration method
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JP2002330569A
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English (en)
Japanese (ja)
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JP2004164383A (ja
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Priority to JP2002330569A priority Critical patent/JP2004164383A/ja
Priority claimed from JP2002330569A external-priority patent/JP2004164383A/ja
Priority to US10/706,811 priority patent/US7039880B2/en
Publication of JP2004164383A publication Critical patent/JP2004164383A/ja
Publication of JP2004164383A5 publication Critical patent/JP2004164383A5/ja
Pending legal-status Critical Current

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JP2002330569A 2002-11-14 2002-11-14 回路構成方法、その方法およびそのプログラム Pending JP2004164383A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2002330569A JP2004164383A (ja) 2002-11-14 2002-11-14 回路構成方法、その方法およびそのプログラム
US10/706,811 US7039880B2 (en) 2002-11-14 2003-11-12 Circuit design method, apparatus and program using polynomial primitive root

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002330569A JP2004164383A (ja) 2002-11-14 2002-11-14 回路構成方法、その方法およびそのプログラム

Publications (2)

Publication Number Publication Date
JP2004164383A JP2004164383A (ja) 2004-06-10
JP2004164383A5 true JP2004164383A5 (enExample) 2005-03-17

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Family Applications (1)

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JP2002330569A Pending JP2004164383A (ja) 2002-11-14 2002-11-14 回路構成方法、その方法およびそのプログラム

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US (1) US7039880B2 (enExample)
JP (1) JP2004164383A (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4851077B2 (ja) * 2003-10-14 2012-01-11 パナソニック株式会社 データ変換装置およびその方法
US20060287905A1 (en) * 2005-06-16 2006-12-21 International Business Machines Corporation Calendar folders
US7444275B2 (en) * 2005-07-22 2008-10-28 Agere Systems Inc. Multi-variable polynomial modeling techniques for use in integrated circuit design
US8375077B2 (en) * 2008-09-29 2013-02-12 Intel Corporation Method, apparatus and media for performing GF(2) polynomial operations

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW421756B (en) * 1998-10-01 2001-02-11 Wei Shiue Wen Arithmetic operation circuit of finite field GF(2<m>)

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