JP2004164383A - 回路構成方法、その方法およびそのプログラム - Google Patents

回路構成方法、その方法およびそのプログラム Download PDF

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Publication number
JP2004164383A
JP2004164383A JP2002330569A JP2002330569A JP2004164383A JP 2004164383 A JP2004164383 A JP 2004164383A JP 2002330569 A JP2002330569 A JP 2002330569A JP 2002330569 A JP2002330569 A JP 2002330569A JP 2004164383 A JP2004164383 A JP 2004164383A
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Japan
Prior art keywords
finite field
polynomial
primitive root
circuit
extension
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Pending
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JP2002330569A
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Japanese (ja)
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JP2004164383A5 (enExample
Inventor
Makiko Suga
真紀子 菅
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Sony Corp
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Sony Corp
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Priority to JP2002330569A priority Critical patent/JP2004164383A/ja
Priority to US10/706,811 priority patent/US7039880B2/en
Publication of JP2004164383A publication Critical patent/JP2004164383A/ja
Publication of JP2004164383A5 publication Critical patent/JP2004164383A5/ja
Pending legal-status Critical Current

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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Complex Calculations (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
JP2002330569A 2002-11-14 2002-11-14 回路構成方法、その方法およびそのプログラム Pending JP2004164383A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2002330569A JP2004164383A (ja) 2002-11-14 2002-11-14 回路構成方法、その方法およびそのプログラム
US10/706,811 US7039880B2 (en) 2002-11-14 2003-11-12 Circuit design method, apparatus and program using polynomial primitive root

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002330569A JP2004164383A (ja) 2002-11-14 2002-11-14 回路構成方法、その方法およびそのプログラム

Publications (2)

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JP2004164383A true JP2004164383A (ja) 2004-06-10
JP2004164383A5 JP2004164383A5 (enExample) 2005-03-17

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ID=32290102

Family Applications (1)

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JP2002330569A Pending JP2004164383A (ja) 2002-11-14 2002-11-14 回路構成方法、その方法およびそのプログラム

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US (1) US7039880B2 (enExample)
JP (1) JP2004164383A (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005141198A (ja) * 2003-10-14 2005-06-02 Matsushita Electric Ind Co Ltd データ変換装置およびその方法

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060287905A1 (en) * 2005-06-16 2006-12-21 International Business Machines Corporation Calendar folders
US7444275B2 (en) * 2005-07-22 2008-10-28 Agere Systems Inc. Multi-variable polynomial modeling techniques for use in integrated circuit design
US8375077B2 (en) * 2008-09-29 2013-02-12 Intel Corporation Method, apparatus and media for performing GF(2) polynomial operations

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW421756B (en) * 1998-10-01 2001-02-11 Wei Shiue Wen Arithmetic operation circuit of finite field GF(2<m>)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005141198A (ja) * 2003-10-14 2005-06-02 Matsushita Electric Ind Co Ltd データ変換装置およびその方法

Also Published As

Publication number Publication date
US20040098679A1 (en) 2004-05-20
US7039880B2 (en) 2006-05-02

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