JP2004140299A - Semiconductor integrated element - Google Patents

Semiconductor integrated element Download PDF

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JP2004140299A
JP2004140299A JP2002305932A JP2002305932A JP2004140299A JP 2004140299 A JP2004140299 A JP 2004140299A JP 2002305932 A JP2002305932 A JP 2002305932A JP 2002305932 A JP2002305932 A JP 2002305932A JP 2004140299 A JP2004140299 A JP 2004140299A
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layer
type
semiconductor integrated
concentration
substrate
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JP4039203B2 (en
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Takeshi Takahashi
高橋 健
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Hitachi Cable Ltd
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Hitachi Cable Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To manufacture with a high yield and at a low price a semiconductor integrated element having optical/electronic semiconductor elements, by suppressing Fe from diffusing from a β-FeSi<SB>2</SB>layer into an Si substrate, and by improving the performance of the electronic element. <P>SOLUTION: In the semiconductor integrated element, a plurality of optical semiconductor elements are formed on the same Si substrate, or optical and electronic semiconductor elements are formed on a single Si substrate. Further, in the active layers of the optical semiconductor element which contains Fe-Si compounds, a high-concentration p-type Si layer 8/a high-concentration p-type Si layer 9 are formed between an Fe-Si compound layer 2 and an Si substrate 1, and the concentration of acceptor of each high-concentration p-type Si layer is made not smaller than 5×10<SP>18</SP>cm<SP>-3</SP>. <P>COPYRIGHT: (C)2004,JPO

Description

【0001】
【発明の属する技術分野】
本発明は、半導体集積素子に係り、特に同一Si基板上に複数の光半導体素子が形成された光半導体集積素子又は光半導体素子と電子半導体素子が形成された光・電子半導体集積素子に関するものである。
【0002】
【従来の技術】
従来、フォトカプラやフォトインタラプタ等の受光素子として使用されるフォトトランジスタの製造については、エミッタ形成予定領域の周囲にたとえばP型のベース拡散領域を予め形成した後、硼素(B)と砒素(As)のような二種類のイオンを打ち込み、一回の熱処理により、エミッタ層とその直下のベース層とを同時に形成する、といったことが行われる(例えば、特許文献1参照。)。
【0003】
また、導波路と光検出手段をモノリシックに集積した光検出器において、p型不純物拡散層とn型不純物拡散層の少なくとも一方を光検出手段の近傍に選択的に設け、且つそれぞれの領域に電極を設ける構造なども知られている(例えば、特許文献2参照。)。
【0004】
一方、Fe−Si化合物であるベータ鉄シリサイド(以下、β−FeSi)は、バンドキャップが約0.85eVの直接遷移型半導体であり、1.5μm波長帯の発光ダイオードやレーザーの能動層材料として応用が可能である。この波長帯は、石英光ファイバの損失が最低となることから、光ファイバを用いた情報システム用デバイス材料として注目されている。特に、β−FeSiはSiとの格子定数の差が約5%と小さく、単結晶Siの(100)面上へのエピタキシャル成長が可能である。このため、β−FeSiを能動層に用いた光半導体素子(発光素子、受光素子)とSi系光半導体素子及び電子半導体素子をモノリシックに集積させた光半導体集積素子や光・電子半導体集積素子の開発が精力的に進められている。さらに、β−FeSiは、Fe、Siといった資源的制約がなく安全な元素で構成されるため、環境への負荷が極めて小さい半導体材料としても注目されている。
【0005】
図3は、β−FeSiを能動層に用いた受光素子と、Si系電子素子で構成される電子回路をモノリシックに集積させた従来の光・電子半導体集積素子の一例を簡略化して示すものである。本図を用いて光・電子半導体集積回路の構成を簡単に説明する。
【0006】
受光素子は、Si基板1上にエピタキシャル成長させたn型Si層2、n型β−FeSi層3及びp型β−FeSi層4から構成される。n型β−FeSi層3とp型β−FeSi層4は受光素子の能動層であり、波長1.5μmよりも短波長の光を電気信号に変換することができる。受光素子の電気信号を外部に取り出すためp型β−FeSi層4上にアノード電極5、及びn型Si層2上にカソード電極6がそれぞれ形成されている。
【0007】
詳細には図示されていないが、n型Si層2、n型β−FeSi層3及びp型β−FeSi層4が選択的に除去された図中二点破線で示す領域7には、Si系電子素子が形成されており、受光素子の電気信号を処理するための電子回路が構成されている。電子素子と受光素子の表面は、図中では省略されている絶縁膜で覆われ、さらに、電子素子と受光素子の間は、図中では省略されている金属配線により電気的に接続されている。
【0008】
【特許文献1】
特開平5−063228号公報(段落番号0012)
【0009】
【特許文献2】
特開平5−160430号公報
【0010】
【発明が解決しようとする課題】
しかしながら、図3に示すような光・電子半導体集積素子の製作においては、エピタキシャル成長や不純物拡散等の半導体素子製造工程が不可欠である。これらの工程においては、素子形成用のSi基板を800℃〜900℃程度の温度で、最短でも30分以上熱処理する必要がある。
【0011】
一方、β−FeSi層のエピタキシャル成長において、程度の差はあるにしても余剰なFe原子が膜中に取り込まれることは不可避である。これらの余剰なFe原子は、エピタキシャル成長や拡散工程の熱処理によりSi基板中に拡散する。Si中に不純物として存在するFe原子は、バンドキャップ中に深い準位を形成し、電子や正孔をトラップする。これらの深い準位は、MOSFETやバイポーラトランジスタの性能を著しく低下させ、スイッチング動作不良、応答特性不良、増幅率低下等の問題を引き起こす。これらの問題を回避するためには、深い準位の密度を1012cm−3台に抑える必要がある。
【0012】
図3に示す、光・電子半導体集積素子の領域7をDLTS(deep level transient spectorscopy)で評価した結果、1016cm−3台の深い準位が存在することが確認された。この高密度の深い準位により、電子素子がスイッチング動作不良、応答特性不良、増幅率低下等を呈し、光・電子半導体集積素子としての所望の性能を得ることができなかった。
【0013】
そこで、本発明の目的は、上記課題を解決し、β−FeSi層からSi基板中へのFeの拡散を抑止し、電子素子の性能を向上させ、光・電子半導体集積素子を高歩留で製作するとともに、安価に提供することにある。
【0014】
【課題を解決するための手段】
上記目的を達成するため、本発明は、次のように構成したものである。
【0015】
請求項1の発明に係る半導体集積素子は、同一Si基板上に複数の光半導体素子が形成された半導体集積素子であって、光半導体素子の能動層がFe−Si化合物を含む半導体集積素子において、Fe−Si化合物層とSi基板の間に、高濃度p型Si層を有し、且つ高濃度p型Si層のアクセプタ濃度が5×1018cm−3以上であることを特徴とする。
【0016】
請求項2の発明に係る半導体集積素子は、同一Si基板上に光半導体素子と電子半導体素子が形成された半導体集積素子であって、光半導体素子の能動層がFe−Si化合物を含む半導体集積素子において、Fe−Si化合物層とSi基板の間に、高濃度p型Si層を有し、且つ高濃度p型Si層のアクセプタ濃度が5×1018cm−3以上であることを特徴とする。
【0017】
請求項3の発明は、請求項1又は2に記載の半導体集積素子において、高濃度p型Si層のドーパントがBもしくはAl、またはBとAlの両方であることを特徴とする。
【0018】
請求項4の発明は、請求項1又は2に記載の半導体集積素子において、高濃度p型Si層がBドープ層とAlドープ層の二層で構成されていることを特徴とする。
【0019】
請求項5の発明は、請求項1〜4のいずれかに記載の半導体集積素子において、Si基板の裏面に、BもしくはAlのドープによる高濃度p型Si層が形成されていることを特徴とする。
【0020】
<発明の要点>
本発明に係わる半導体集積素子では、Fe−Si化合物層の例えばβ−FeSiをエピタキシャル成長させる前に、高キャリア濃度のp型Si層を形成する。このp型Si層は、Bドープp型層、または、Alドープp型層、または、Bドープp型層とAlドープp型層の二層から構成される。アクセプタであるB、Alの濃度はいずれも5×1018cm−3以上である。
【0021】
Fe原子は、熱処理により容易にSi中を移動し、その拡散係数は、1.1×10−3exp(−0.66/kT)cm−1程度と見積られる。ところが、BやAlを高濃度にドープしたSi層中では、Feの見かけ上の拡散係数は約2桁小さくなる。これは、BやAlを高濃度にドープしたSi層中では、B−Fe化合物あるいはAl−Fe化合物が短時間で形成され、これらの化合物の拡散係数がFe単体に比べて極端に小さくなるためと考えられる。
【0022】
従って、BやAlを高濃度にドープしたSi層をβ−FeSi層とSi基板の間に形成することにより、β−FeSi層からSi基板へのFe原子の拡散を抑止することが可能になる。この結果、Si基板中の深い準位の密度が低く抑えられ、電子半導体素子の性能を向上させることが可能となる。
【0023】
一方、BやAlを高濃度にドープしたSi層中のFe濃度は高くなるが、これらの層は能動層ではないため、素子特性に影響を与えることはない。
【0024】
【発明の実施の形態】
以下、本発明の実施形態を図示の発光素子の実施例に基づいて説明する。
【0025】
<第一実施例>
図1は、β−FeSiを能動層に用いた受光素子と、Si系電子素子で構成される電子回路をモノリシックに集積させた半導体集積素子(光・電子半導体集積素子)の一例を簡略化して示すものである。
【0026】
まず、Si基板1上に拡散法によりAlドープによる高キャリア濃度p型Si層8を形成した。この層の平均的なAl濃度は、1×1019cm−3とした。次に、Alドープによる高キャリア濃度p型Si層8の上に、Bドープによる高キャリア濃度p型Si層9をエピタキシャル成長させた。この層のB濃度は1×1019cm−3とした。
【0027】
Bドープ及びAlドープによる高キャリア濃度p型Si層9、8を形成した後、受光素子の構成層であるn型Si層2、n型β−FeSi層3及びp型β−FeSi層4をエピタキシャル成長法で形成した。
【0028】
Si系電子素子は、主にMOSFETとバイポーラトランジスタで構成した。これらの素子は、図1において詳細には示していないが、Bドープ及びAlドープによる高キャリア濃度p型Si層9、8、n型Si層2、n型β−FeSi層3及びp型β−FeSi層4を選択的に除去した後、図中二点破線で示した領域(Si系電子素子形成領域)7に形成した。電子素子の電極を形成する過程で、受光素子のアノード電極5及びカソード電極6も同時に形成した。また、図1では省略されているが、電子素子と受光素子の表面は絶縁膜で覆われ、さらに、電子素子と受光素子の間は金属配線により電気的に接続されている。
【0029】
図1に示した実施例において、Fe原子の拡散を抑止するための高キャリア濃度p形Si層は、Bドープ層9とAlドープ層8の二層で構成し、アクセプタ濃度はいずれも1×1019cm−3とした。この構成において、領域7の深い準位の密度をDLTS法で評価したところ、2×1012cm−3と低い値であった。この結果から、高キャリア濃度p型Si層8、9が、Fe拡散の抑止層として効果的に機能していることが確認できた。また、Si系電子素子形成領域7に形成した電子素子もほぼ設計通りに動作することが確認できた。
【0030】
また、高キャリア濃度p型Si層をBドープ層単層、あるいは、Alドープ層単層で構成した場合も評価した。アクセプタ濃度を5×1018cm−3とし、Bドープ層単層で構成した場合の領域7における深い準位の密度は8×1012cm−3であった。一方、同じアクセプタ濃度のAlドープ層単層の場合は6×1012cm−3であった。いずれの場合においても、Si系電子素子形成領域7に形成した電子素子は、ほぼ設計通りの性能を示した。ところが、アクセプタ濃度が5×1018cm−3よりも低くなると、深い準位の密度は急激に増加し2×1013cm−3以上となった。この場合、領域7に形成した電子素子にはスイッチング動作不良、応答特性不良、増幅率低下等の不良が多発し、素子の歩留が著しく低下した。
【0031】
<第二実施例>
図2は、β−FeSiを能動層に用いた受光素子と、Si系電子素子で構成される電子回路をモノリシックに集積させた半導体集積素子(光・電子半導体集積素子)の変形例を簡略化して示すものである。
【0032】
図1に示した第1実施例に対して、Si基板1の裏面に、BドープまたはAlドープによる高キャリア濃度p型Si層10が形成されている。このp型Si層を素子形成の過程で形成し、素子形成後に400℃〜700℃の温度範囲で30分〜120分程度熱処理すると、Si基板中の深い準位密度はさらに低減され、1×1012cm−3以下になった。これは、Si基板中に存在した極微量のFe原子が、熱処理中に高キャリア濃度p型Si層10に取りこまれたためと考えられる。このような処理をした電子素子の特性はさらに改善され、歩留も向上した。高キャリア濃度p型Si層10は、熱処理終了後に除去することが可能である。
【0033】
本発明は、同一Si基板上に光半導体素子と電子半導体素子が形成された半導体集積素子(光・電子半導体集積素子)だけでなく、同一Si基板上に複数の光半導体素子が形成された半導体集積素子についても適用することができる。そして、これらの半導体集積素子は、石英系光ファイバを用いた情報システムや通信システム用のデバイスとして使用することができる。
【0034】
また、テレビ、エアコン等で使用されるリモートコントロールシステムにも応用が可能である。従来は、GaAsLEDとその駆動のためのSiICをディスクリート素子で構成する必要があったが、本発明を適用することにより、赤外LEDと駆動用ICをモノリシックに構成することが可能となる。
【0035】
【発明の効果】
以上説明したように本発明によれば、同一Si基板上に複数の光半導体素子が形成された半導体集積素子又は同一Si基板上に光半導体素子と電子半導体素子が形成された半導体集積素子であって、光半導体素子の能動層がFe−Si化合物を含む半導体集積素子において、Fe−Si化合物層とSi基板の間に、高濃度p型Si層を有し、且つ高濃度p型Si層のアクセプタ濃度が5×1018cm−3以上である構成としたので、β−FeSi系受発光素子とSi系半導体素子をモノリシックに集積させる際の阻害要因であるFeの拡散を抑止することができる。このため、本発明によれば、Si系半導体素子の歩留を大幅に向上させることが可能になり、環境への負荷が極めて小さいβ−FeSi系素子を用いた光・電子半導体集積素子等の半導体集積素子を安価に供給できるようになる。
【図面の簡単な説明】
【図1】本発明に係わる第一実施例のβ−FeSi系受光素子と、Si系電子素子をモノリシックに集積させた光・電子半導体集積素子の断面構造の概略図である。
【図2】本発明に係わる第二実施例のβ−FeSi系受光素子と、Si系電子素子をモノリシックに集積させた光・電子半導体集積素子の断面構造の概略図である。
【図3】従来のβ−FeSi系受光素子とSi系電子素子をモノリシックに集積させた光・電子半導体集積素子の断面構造の概略図である。
【符号の説明】
1 Si基板
2 n型Si層
3 n型β−FeSi
4 p型β−FeSi
5 アノード電極
6 カソード電極
7 Si系電子素子形成領域
8 Alドープ高キャリア濃度p型Si層
9 Bドープ高キャリア濃度p型Si層
10 AlまたはBドープによる高キャリア濃度p型Si層
[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a semiconductor integrated device, and more particularly to an optical semiconductor integrated device in which a plurality of optical semiconductor devices are formed on the same Si substrate, or an optical / electronic semiconductor integrated device in which an optical semiconductor device and an electronic semiconductor device are formed. is there.
[0002]
[Prior art]
2. Description of the Related Art Conventionally, in manufacturing a phototransistor used as a light receiving element such as a photocoupler or a photointerrupter, for example, a P + -type base diffusion region is formed in advance around an emitter formation region, and then boron (B + ) and arsenic are formed. Two kinds of ions such as (As + ) are implanted, and a single heat treatment is performed to simultaneously form an emitter layer and a base layer immediately below the emitter layer (for example, see Patent Document 1).
[0003]
In a photodetector in which a waveguide and a photodetector are monolithically integrated, at least one of a p-type impurity diffusion layer and an n-type impurity diffusion layer is selectively provided near the photodetector, and an electrode is provided in each region. Is also known (for example, see Patent Document 2).
[0004]
On the other hand, beta iron silicide (hereinafter, β-FeSi 2 ), which is an Fe—Si compound, is a direct transition semiconductor having a band gap of about 0.85 eV, and is a material for an active layer of a light emitting diode or laser having a wavelength band of 1.5 μm. Application is possible. This wavelength band has attracted attention as a device material for information systems using optical fibers since the loss of quartz optical fibers is minimized. In particular, β-FeSi 2 has a small lattice constant difference from Si of about 5%, and single crystal Si can be epitaxially grown on the (100) plane. Therefore, an optical semiconductor device (light emitting device, light receiving device) using β-FeSi 2 for an active layer, an optical semiconductor integrated device in which a Si-based optical semiconductor device and an electronic semiconductor device are monolithically integrated, and an optical / electronic semiconductor integrated device Is being actively developed. Further, β-FeSi 2 is attracting attention as a semiconductor material having an extremely small load on the environment because β-FeSi 2 is composed of a safe element such as Fe and Si without resource restrictions.
[0005]
FIG. 3 shows a simplified example of a conventional optical / electronic semiconductor integrated device in which an electronic circuit composed of a Si-based electronic device and a light receiving device using β-FeSi 2 as an active layer are monolithically integrated. It is. The configuration of the optical / electronic semiconductor integrated circuit will be briefly described with reference to FIG.
[0006]
The light receiving element includes an n-type Si layer 2, an n-type β-FeSi 2 layer 3, and a p-type β-FeSi 2 layer 4 epitaxially grown on a Si substrate 1. The n-type β-FeSi 2 layer 3 and the p-type β-FeSi 2 layer 4 are active layers of the light receiving element, and can convert light having a wavelength shorter than 1.5 μm into an electric signal. An anode electrode 5 is formed on the p-type β-FeSi 2 layer 4 and a cathode electrode 6 is formed on the n-type Si layer 2 in order to extract an electric signal of the light receiving element to the outside.
[0007]
Although not shown in detail, a region 7 shown by a two-dot broken line in the figure where the n-type Si layer 2, the n-type β-FeSi 2 layer 3, and the p-type β-FeSi 2 layer 4 are selectively removed is shown in FIG. , A Si-based electronic element, and an electronic circuit for processing an electric signal of the light receiving element. The surfaces of the electronic element and the light receiving element are covered with an insulating film not shown in the figure, and further, the electronic element and the light receiving element are electrically connected by metal wiring not shown in the figure. .
[0008]
[Patent Document 1]
JP-A-5-063282 (paragraph number 0012)
[0009]
[Patent Document 2]
JP-A-5-160430
[Problems to be solved by the invention]
However, in the manufacture of the optical / electronic semiconductor integrated device as shown in FIG. 3, a semiconductor device manufacturing process such as epitaxial growth and impurity diffusion is indispensable. In these steps, it is necessary to heat-treat the Si substrate for element formation at a temperature of about 800 ° C. to 900 ° C. for at least 30 minutes.
[0011]
On the other hand, in the epitaxial growth of the β-FeSi 2 layer, it is inevitable that surplus Fe atoms are incorporated into the film, although the degree is different. These surplus Fe atoms diffuse into the Si substrate by heat treatment in the epitaxial growth or diffusion step. An Fe atom existing as an impurity in Si forms a deep level in the band cap and traps electrons and holes. These deep levels significantly reduce the performance of MOSFETs and bipolar transistors and cause problems such as poor switching operation, poor response characteristics, and reduced amplification factor. In order to avoid these problems, it is necessary to suppress the density of deep levels to the order of 10 12 cm −3 .
[0012]
As a result of evaluating the region 7 of the opto-electronic semiconductor integrated device shown in FIG. 3 by DLTS (deep level transient spectroscopy), it was confirmed that a deep level of 10 16 cm −3 was present. Due to this high-density deep level, the electronic element exhibits poor switching operation, poor response characteristics, low amplification factor, and the like, and the desired performance as an optical / electronic semiconductor integrated element cannot be obtained.
[0013]
Therefore, an object of the present invention is to solve the above problems, suppress the diffusion of Fe from the β-FeSi 2 layer into the Si substrate, improve the performance of the electronic device, and achieve a high yield of the optical / electronic semiconductor integrated device. And to provide it at low cost.
[0014]
[Means for Solving the Problems]
In order to achieve the above object, the present invention is configured as follows.
[0015]
The semiconductor integrated device according to claim 1 is a semiconductor integrated device in which a plurality of optical semiconductor elements are formed on the same Si substrate, wherein the active layer of the optical semiconductor element includes an Fe-Si compound. And a high-concentration p-type Si layer between the Fe-Si compound layer and the Si substrate, and the high-concentration p-type Si layer has an acceptor concentration of 5 × 10 18 cm −3 or more.
[0016]
A semiconductor integrated device according to a second aspect of the present invention is a semiconductor integrated device in which an optical semiconductor device and an electronic semiconductor device are formed on the same Si substrate, wherein the active layer of the optical semiconductor device includes an Fe-Si compound. The device has a feature that a high-concentration p-type Si layer is provided between the Fe—Si compound layer and the Si substrate, and the high-concentration p-type Si layer has an acceptor concentration of 5 × 10 18 cm −3 or more. I do.
[0017]
A third aspect of the present invention is the semiconductor integrated device according to the first or second aspect, wherein the dopant of the high-concentration p-type Si layer is B or Al, or both B and Al.
[0018]
According to a fourth aspect of the present invention, in the semiconductor integrated device according to the first or second aspect, the high-concentration p-type Si layer includes two layers, a B-doped layer and an Al-doped layer.
[0019]
According to a fifth aspect of the present invention, in the semiconductor integrated device according to any one of the first to fourth aspects, a high-concentration p-type Si layer formed by doping B or Al is formed on the back surface of the Si substrate. I do.
[0020]
<The gist of the invention>
In the semiconductor integrated device according to the present invention, a p-type Si layer having a high carrier concentration is formed before epitaxially growing an Fe-Si compound layer, for example, β-FeSi 2 . The p-type Si layer includes a B-doped p-type layer, an Al-doped p-type layer, or two layers of a B-doped p-type layer and an Al-doped p-type layer. The concentrations of B and Al as acceptors are both 5 × 10 18 cm −3 or more.
[0021]
Fe atoms easily move in Si by heat treatment, and the diffusion coefficient thereof is estimated to be about 1.1 × 10 −3 exp (−0.66 / kT) cm 2 s −1 . However, in the Si layer doped with B or Al at a high concentration, the apparent diffusion coefficient of Fe is reduced by about two orders of magnitude. This is because in a Si layer doped with B or Al at a high concentration, a B-Fe compound or an Al-Fe compound is formed in a short time, and the diffusion coefficient of these compounds becomes extremely small as compared with that of Fe alone. it is conceivable that.
[0022]
Therefore, by forming a Si layer doped with B or Al in a high concentration during the beta-FeSi 2 layer and the Si substrate, it is possible to suppress the diffusion of Fe atoms into the Si substrate from the beta-FeSi 2 layer become. As a result, the density of deep levels in the Si substrate can be kept low, and the performance of the electronic semiconductor element can be improved.
[0023]
On the other hand, although the Fe concentration in the Si layer doped with B or Al at a high concentration becomes high, these layers are not active layers and do not affect the device characteristics.
[0024]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described based on examples of the illustrated light emitting device.
[0025]
<First embodiment>
FIG. 1 simplifies an example of a semiconductor integrated device (optical / electronic semiconductor integrated device) in which a light receiving element using β-FeSi 2 for an active layer and an electronic circuit composed of Si-based electronic elements are monolithically integrated. It is shown.
[0026]
First, a high carrier concentration p-type Si layer 8 was formed on a Si substrate 1 by Al doping by a diffusion method. The average Al concentration in this layer was 1 × 10 19 cm −3 . Next, a high carrier concentration p-type Si layer 9 doped with B was epitaxially grown on the high carrier concentration p-type Si layer 8 doped with Al. The B concentration of this layer was 1 × 10 19 cm −3 .
[0027]
After forming p-type Si layers 9 and 8 with high carrier concentration by B doping and Al doping, n-type Si layer 2, n-type β-FeSi 2 layer 3 and p-type β-FeSi 2 layer which are constituent layers of the light receiving element 4 was formed by an epitaxial growth method.
[0028]
The Si-based electronic device was mainly composed of a MOSFET and a bipolar transistor. Although not shown in detail in FIG. 1, these elements have high carrier concentration p-type Si layers 9 and 8, n-type Si layer 2, n-type β-FeSi 2 layer 3 and p-type After the β-FeSi 2 layer 4 was selectively removed, a β-FeSi 2 layer 4 was formed in a region (Si-based electronic element formation region) 7 indicated by a two-dot broken line in the figure. In the process of forming the electrodes of the electronic device, the anode electrode 5 and the cathode electrode 6 of the light receiving device were also formed at the same time. Although not shown in FIG. 1, the surfaces of the electronic element and the light receiving element are covered with an insulating film, and the electronic element and the light receiving element are electrically connected by metal wiring.
[0029]
In the embodiment shown in FIG. 1, the p-type Si layer having a high carrier concentration for suppressing the diffusion of Fe atoms is composed of two layers of a B-doped layer 9 and an Al-doped layer 8, and the acceptor concentration is 1 ×. It was set to 10 19 cm −3 . In this configuration, when the density of the deep level in the region 7 was evaluated by the DLTS method, the value was as low as 2 × 10 12 cm −3 . From this result, it was confirmed that the p-type Si layers 8 and 9 having a high carrier concentration effectively functioned as an Fe diffusion suppressing layer. Further, it was confirmed that the electronic element formed in the Si-based electronic element formation region 7 also operated almost as designed.
[0030]
Further, the case where the high carrier concentration p-type Si layer was constituted by a single layer of a B-doped layer or a single layer of an Al-doped layer was also evaluated. When the acceptor concentration was 5 × 10 18 cm −3 and the single layer of the B-doped layer was used, the density of deep levels in the region 7 was 8 × 10 12 cm −3 . On the other hand, in the case of a single Al-doped layer having the same acceptor concentration, the value was 6 × 10 12 cm −3 . In each case, the electronic device formed in the Si-based electronic device forming region 7 exhibited performance almost as designed. However, when the acceptor concentration was lower than 5 × 10 18 cm −3 , the density of the deep level rapidly increased to 2 × 10 13 cm −3 or more. In this case, in the electronic element formed in the region 7, defects such as a switching operation defect, a response characteristic defect, and a decrease in amplification rate occurred frequently, and the yield of the element was significantly reduced.
[0031]
<Second embodiment>
FIG. 2 shows a simplified example of a semiconductor integrated device (optical / electronic semiconductor integrated device) in which a light receiving element using β-FeSi 2 for an active layer and an electronic circuit composed of Si-based electronic elements are monolithically integrated. It is shown in the form.
[0032]
As compared with the first embodiment shown in FIG. 1, a p-type Si layer 10 having a high carrier concentration by B doping or Al doping is formed on the back surface of a Si substrate 1. When this p-type Si layer is formed in the process of element formation and is heat-treated for about 30 minutes to 120 minutes in the temperature range of 400 ° C. to 700 ° C. after element formation, the deep level density in the Si substrate is further reduced, and 1 × It became 10 < 12 > cm <-3> or less. It is considered that this is because a very small amount of Fe atoms existing in the Si substrate were taken into the high carrier concentration p-type Si layer 10 during the heat treatment. The characteristics of the electronic device subjected to such a treatment were further improved, and the yield was also improved. The high carrier concentration p-type Si layer 10 can be removed after the heat treatment.
[0033]
The present invention relates not only to a semiconductor integrated device in which an optical semiconductor device and an electronic semiconductor device are formed on the same Si substrate (optical / electronic semiconductor integrated device), but also to a semiconductor in which a plurality of optical semiconductor devices are formed on the same Si substrate. The present invention can be applied to an integrated device. These semiconductor integrated devices can be used as devices for information systems and communication systems using silica-based optical fibers.
[0034]
Further, the present invention can be applied to a remote control system used in a television, an air conditioner, and the like. Conventionally, a GaAs LED and a SiIC for driving the GaAs LED had to be constituted by discrete elements. By applying the present invention, an infrared LED and a driving IC can be monolithically constituted.
[0035]
【The invention's effect】
As described above, according to the present invention, a semiconductor integrated device in which a plurality of optical semiconductor devices are formed on the same Si substrate or a semiconductor integrated device in which an optical semiconductor device and an electronic semiconductor device are formed on the same Si substrate. Therefore, in a semiconductor integrated device in which the active layer of the optical semiconductor device includes an Fe-Si compound, a high-concentration p-type Si layer is provided between the Fe-Si compound layer and the Si substrate. Since the acceptor concentration is set to 5 × 10 18 cm −3 or more, it is possible to suppress the diffusion of Fe, which is an obstructive factor when monolithically integrating the β-FeSi 2 -based light emitting / receiving element and the Si-based semiconductor element. it can. Therefore, according to the present invention, it is possible to greatly improve the yield of Si-based semiconductor devices, and to integrate optical / electronic semiconductor devices using β-FeSi 2 -based devices with extremely low environmental load. Can be supplied at a low cost.
[Brief description of the drawings]
FIG. 1 is a schematic view of a cross-sectional structure of an optical / electronic semiconductor integrated device in which a β-FeSi 2 -based light receiving device and a Si-based electronic device are monolithically integrated according to a first embodiment of the present invention.
FIG. 2 is a schematic view of a cross-sectional structure of an optical / electronic semiconductor integrated device in which a β-FeSi 2 -based light receiving device and a Si-based electronic device are monolithically integrated according to a second embodiment of the present invention.
FIG. 3 is a schematic view of a cross-sectional structure of a conventional optical / electronic semiconductor integrated device in which a conventional β-FeSi 2 -based light receiving device and a Si-based electronic device are monolithically integrated.
[Explanation of symbols]
Reference Signs List 1 Si substrate 2 n-type Si layer 3 n-type β-FeSi 2 layer 4 p-type β-FeSi 2 layer 5 anode electrode 6 cathode electrode 7 Si-based electronic element forming region 8 Al-doped high carrier concentration p-type Si layer 9 B-doped High carrier concentration p-type Si layer 10 High carrier concentration p-type Si layer by Al or B doping

Claims (5)

同一Si基板上に複数の光半導体素子が形成された半導体集積素子であって、光半導体素子の能動層がFe−Si化合物を含む半導体集積素子において、
Fe−Si化合物層とSi基板の間に、高濃度p型Si層を有し、且つ高濃度p型Si層のアクセプタ濃度が5×1018cm−3以上であることを特徴とする半導体集積素子。
A semiconductor integrated device in which a plurality of optical semiconductor elements are formed on the same Si substrate, wherein the active layer of the optical semiconductor element includes an Fe-Si compound.
A semiconductor integrated circuit having a high-concentration p-type Si layer between an Fe-Si compound layer and a Si substrate, wherein the high-concentration p-type Si layer has an acceptor concentration of 5 × 10 18 cm −3 or more. element.
同一Si基板上に光半導体素子と電子半導体素子が形成された半導体集積素子であって、光半導体素子の能動層がFe−Si化合物を含む半導体集積素子において、
Fe−Si化合物層とSi基板の間に、高濃度p型Si層を有し、且つ高濃度p型Si層のアクセプタ濃度が5×1018cm−3以上であることを特徴とする半導体集積素子。
A semiconductor integrated device in which an optical semiconductor element and an electronic semiconductor element are formed on the same Si substrate, wherein the active layer of the optical semiconductor element includes an Fe-Si compound.
A semiconductor integrated circuit having a high-concentration p-type Si layer between an Fe-Si compound layer and a Si substrate, wherein the high-concentration p-type Si layer has an acceptor concentration of 5 × 10 18 cm −3 or more. element.
請求項1又は2に記載の半導体集積素子において、
高濃度p型Si層のドーパントがBもしくはAl、またはBとAlの両方であることを特徴とする半導体集積素子。
The semiconductor integrated device according to claim 1, wherein
A semiconductor integrated device, wherein the dopant of the high-concentration p-type Si layer is B or Al, or both B and Al.
請求項1又は2に記載の半導体集積素子において、
高濃度p型Si層がBドープ層とAlドープ層の二層で構成されていることを特徴とする半導体集積素子。
The semiconductor integrated device according to claim 1, wherein
A semiconductor integrated device, wherein a high-concentration p-type Si layer is composed of two layers, a B-doped layer and an Al-doped layer.
請求項1〜4のいずれかに記載の半導体集積素子において、
Si基板の裏面に、BもしくはAlのドープによる高濃度p型Si層が形成されていることを特徴とする半導体集積素子。
The semiconductor integrated device according to claim 1,
A semiconductor integrated device, wherein a high-concentration p-type Si layer formed by doping B or Al is formed on a back surface of a Si substrate.
JP2002305932A 2002-10-21 2002-10-21 Semiconductor integrated device Expired - Fee Related JP4039203B2 (en)

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