JP2004119449A - Semiconductor device and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To decide whether a contact hole is normally formed or not without bringing about a fault in a semiconductor device. <P>SOLUTION: A method for manufacturing the semiconductor device includes the steps of first partitioning an inspecting hole forming region 10 in a non-functional region 11b different from an element forming region 11a of a semiconductor wafer 11, and forming a first insulating film 12 having a thickness and a composition equivalent to those of an interlayer insulating film of the region 11a on the region 10. Then, the method further includes a step of forming a hole 13 having an opening size equivalent to that of a contact hole in the film 12 by using a resist pattern14. The method further includes a step of then inspecting whether a non-through hole 13A which is not penetrating through the film 12, is generated or not by a scanning electron microscope. When a non-through hole 13A is generated, it is judged that the contact hole is not normally formed, while when the hole 13A is not generated, it is judged that the contact hole is normally formed. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a semiconductor device provided with a contact hole used for electrical connection between wirings or between a semiconductor element and a wiring and a method of manufacturing the same, and more particularly to a semiconductor device provided with a contact hole having a high aspect ratio and a method of manufacturing the same.
[0002]
[Prior art]
In recent years, with the miniaturization of semiconductor devices, dimensions of openings of contact holes have also been miniaturized. However, it is necessary to secure a predetermined thickness in the interlayer insulating film in order to suppress an increase in the capacitance between wirings. Therefore, the ratio of the depth dimension to the dimension of the opening (aspect ratio) in the contact hole becomes large. .
[0003]
Here, the contact hole is formed by forming a resist pattern in which a contact hole formation region is opened on the interlayer insulating film and performing dry etching on the interlayer insulating film using the formed resist pattern as a mask ( For example, see Patent Document 1).
[0004]
In this dry etching step, if the aspect ratio of the contact hole to be formed is large, it becomes difficult for the etching gas to reach the interlayer insulating film located on the lower surface of the contact hole being formed. Since the etching stops without penetrating the film, there is a problem that an unpenetrated contact hole is formed. In particular, such a problem is serious in a high-performance device formed with a design rule having a gate width of 0.18 μm or less.
[0005]
When an unpenetrated contact hole is formed, a wiring formed thereon is disconnected from a wiring or an element electrode thereunder, so that the semiconductor device does not operate. Therefore, whether or not the contact hole is formed normally so as to penetrate the interlayer insulating film should be inspected after forming the contact hole and before forming the contact by embedding a conductive material in the contact hole. is important.
[0006]
In the conventional method of manufacturing a semiconductor device, as a step of inspecting whether or not the contact hole is formed normally without destroying the semiconductor device, the contact hole is formed as described above, and then the contact hole is formed. The surface is observed using a scanning electron microscope to check whether an unpenetrated contact hole is formed.
[0007]
If an unpenetrated contact hole is formed, the cause is investigated, and the conditions of the etching step are set again so that an unpenetrated contact hole is not formed.
[0008]
If no unpenetrated contact hole is formed, a conductive material is embedded in the contact hole to form a contact and a wiring, and then a passivation film and a bonding pad are formed to complete the semiconductor device. .
[0009]
[Patent Document 1]
JP 2001-257261 A
[0010]
[Problems to be solved by the invention]
However, according to the conventional method for manufacturing a semiconductor device, the amount of secondary electrons emitted from the bottom surface of the contact hole is reduced, so that it is necessary to observe the contact hole by irradiating a large amount of electron beams. If the MOS transistor is formed so as to open above the diffusion layer, the PN junction of the diffusion layer located below the contact hole and the gate insulating film adjacent to the diffusion layer may cause electrostatic breakdown. .
[0011]
Furthermore, minute particles (particles) in the scanning electron microscope adhere to the contact hole under observation, and the adhered particles cause disconnection between the conductive layer below the contact hole and the upper wiring layer in the process of forming wiring. There is.
[0012]
As described above, according to the conventional method of manufacturing a semiconductor device, there is a problem that a defect such as electrostatic breakdown or disconnection occurs in the semiconductor device by observing the formed contact hole with a scanning electron microscope. .
[0013]
SUMMARY OF THE INVENTION It is an object of the present invention to solve the above-mentioned conventional problems and to make it possible to determine whether or not a contact hole is formed normally without causing a defect in a semiconductor device.
[0014]
[Means for Solving the Problems]
In order to achieve the above object, the present invention forms an inspection hole having an opening size equivalent to a contact hole in a region different from an element formation region where a semiconductor element is formed, and observes the formed inspection hole. Thereby, it is configured to determine whether or not the contact hole is formed normally.
[0015]
Specifically, a method of manufacturing a semiconductor device according to the present invention includes the steps of: forming an interlayer insulating film in an element formation region on a semiconductor substrate; and forming a contact hole in the interlayer insulating film. A method, wherein an inspection hole formation region is divided into a region different from an element formation region on a semiconductor substrate, and an interlayer insulation film and a hole formation insulation film having the same composition and thickness are formed in the inspection hole formation region. The method includes a first step of forming and a second step of forming an inspection hole having the same opening size as the contact hole in the hole forming insulating film.
[0016]
According to the method of manufacturing a semiconductor device of the present invention, since a step for forming a contact hole and an inspection hole having the same opening size is provided in a region different from the element formation region, the inspection hole is inspected. It can be determined whether or not the contact hole has been formed normally. At the time of this inspection, a region different from the element formation region is set as a region to be inspected, so that a defect such as electrostatic breakdown or disconnection does not occur in the semiconductor element.
[0017]
In the method for manufacturing a semiconductor device according to the present invention, the inspection hole is observed using a scanning electron microscope after the second step to determine whether the inspection hole penetrates the hole-forming insulating film. In the case where the inspection hole penetrates the insulating film for hole formation, it is determined that the contact hole is formed normally, and the inspection hole penetrates the insulating film for hole formation. If not, it is preferable to determine that the contact hole is not formed normally. By doing so, by using a scanning electron microscope, secondary electrons generated from the semiconductor substrate can be clearly observed when the inspection hole penetrates the insulating film for forming a hole. When the inspection hole does not penetrate the insulating film for hole formation, since secondary electrons are hardly generated from the insulating film for hole formation, it is determined whether the inspection hole penetrates the insulating film for hole formation. Can be easily distinguished.
[0018]
In the method of manufacturing a semiconductor device according to the present invention, the first step includes a step of forming a conductive film in the inspection hole formation region on the semiconductor substrate and a step of forming the hole formation insulating film on the conductive film in the inspection hole formation region. The second step preferably includes forming an inspection hole such that the conductive film is exposed. In this way, in the step of inspecting the inspection hole using the scanning electron microscope, secondary electrons are hardly generated from the insulating film for hole formation, whereas the secondary electrons are efficiently emitted from the conductive film. Therefore, it can be easily and reliably distinguished whether or not the inspection hole is formed so that the conductive film is exposed.
[0019]
In the step of forming a conductive film in the method for manufacturing a semiconductor device of the present invention, the conductive film is preferably formed so as to be electrically connected to the semiconductor substrate. In this case, since the electrons of the semiconductor substrate also contribute to the emission of secondary electrons, even if the conductive film is formed of a conductive material having a relatively low secondary electron generation efficiency, Since the secondary electrons are efficiently emitted, it is possible to easily and reliably distinguish whether or not the inspection hole is formed so that the conductive film is exposed.
[0020]
In the step of forming a conductive film in the method for manufacturing a semiconductor device of the present invention, the conductive film is preferably formed to have an area at least twice the area of the opening of the inspection hole. With this configuration, the portion of the conductive film covered with the hole-forming insulating film can also contribute to emission of secondary electrons. Therefore, it is easy to determine whether or not the inspection hole is formed so that the conductive film is exposed. Can be reliably distinguished.
[0021]
In the method of manufacturing a semiconductor device according to the present invention, the observation of the inspection hole using the scanning electron microscope includes a step of irradiating the entire surface of the inspection hole formation region with an electron beam before observing the inspection hole. It is preferred to include. By doing so, in the inspection hole formed in the inspection hole formation region, the generation efficiency of secondary electrons from the conductive film is improved, so that the conductive film and the hole forming insulating film in the step of observing the inspection hole are improved. Can be increased in contrast.
[0022]
In the method of manufacturing a semiconductor device according to the present invention, the first step includes a step of forming a convex structure in the inspection hole formation region on the semiconductor substrate and a step of forming the hole formation insulating film in the inspection hole formation region. And forming a hole for inspection so that the step portion of the convex structure is exposed in the second step. By doing so, it is possible to determine whether the contact hole is formed normally by checking whether the step portion of the convex structure is exposed.
[0023]
In the method of manufacturing a semiconductor device according to the present invention, after the second step, by observing the inspection hole using a scanning electron microscope, the upper portion of the step portion of the convex structure is exposed in the inspection hole. The method further comprises the step of inspecting whether or not the contact hole is correctly formed when the upper part of the step portion of the convex structure is exposed in the inspection hole. When the upper part of the step portion of the slab structure is not exposed, it is preferable to determine that the contact hole is not formed normally. In this case, even when the surface of the convex structure is formed of an insulating material, secondary electrons are generated from the step portion by the edge effect, so that the inspection hole is exposed so that the convex structure is exposed. Whether or not it is formed can be easily and reliably distinguished.
[0024]
In the method of manufacturing a semiconductor device according to the present invention, the first step is preferably performed simultaneously with the step of forming an interlayer insulating film, and the second step is preferably performed simultaneously with the step of forming a contact hole.
[0025]
In the method of manufacturing a semiconductor device according to the present invention, the second step preferably includes a step of forming a comparison hole having a smaller opening size than the inspection hole in the hole-forming insulating film. With this configuration, it is possible to determine whether or not a contact hole having an opening diameter smaller than the set diameter due to a variation in the contact hole forming step is formed through the interlayer insulating film.
[0026]
A semiconductor device according to the present invention includes an interlayer insulating film formed in an element forming region on a semiconductor substrate, and a contact hole formed in the interlayer insulating film. A hole formed in a region different from the region and having the same composition and thickness as the interlayer insulating film, and a hole formed as the hole forming insulating film, and having a contact hole and an inspection hole having the same opening size. Have.
[0027]
According to the semiconductor device of the present invention, since the contact hole formed in a region different from the element formation region is provided with the inspection hole having the same opening size, the inspection hole is inspected, so that the contact hole is normally formed. It can be determined whether or not it has been formed. In this inspection, since a region different from the element formation region is to be inspected, defects such as electrostatic breakdown or disconnection do not occur in the semiconductor element.
[0028]
The semiconductor device of the present invention preferably further includes a conductive film formed between the semiconductor substrate and the insulating film for forming holes, a part of which is disposed below the inspection hole.
[0029]
In the semiconductor device of the present invention, it is preferable that the conductive film is electrically connected to the semiconductor substrate.
[0030]
In the semiconductor device of the present invention, the area of the conductive film is preferably at least twice the total area of the openings in the plurality of inspection holes.
[0031]
It is preferable that the semiconductor device of the present invention further includes a step formed between the semiconductor substrate and the insulating film for forming a hole, and the step portion in the convex structure is disposed below the inspection hole.
[0032]
It is preferable that the semiconductor device of the present invention further includes a comparison hole having a smaller opening size than the inspection hole.
[0033]
BEST MODE FOR CARRYING OUT THE INVENTION
(1st Embodiment)
A first embodiment of the present invention will be described with reference to the drawings.
[0034]
FIG. 1 shows a plan configuration of the semiconductor device according to the first embodiment. As shown in FIG. 1, for example, a semiconductor wafer 11 made of silicon is divided into a plurality of element forming regions 11a where semiconductor elements are formed and a non-functional area 11b where no semiconductor elements are formed. The element forming region 11a is divided into scribe regions by dicing and used as semiconductor chips.
[0035]
Although not shown, a semiconductor element such as a MOS transistor is formed in the element forming region 11a, and a wiring is formed thereon via an interlayer insulating film made of silicon oxide. Is electrically connected to the semiconductor element via a contact formed in a contact hole formed in the interlayer insulating film.
[0036]
In the non-functional area 11b of the semiconductor wafer 11, a scribe area between the element forming areas 11a is used for an inspection for inspecting whether or not a contact hole is formed normally so as to penetrate the interlayer insulating film. A hole forming region 10 is defined.
[0037]
Although a plurality of inspection hole formation regions 10 are formed in FIG. 1, one inspection hole formation region may be provided.
[0038]
Further, the inspection hole formation region 10 is formed in the scribe region, but is not limited to this, and may be formed in the non-functional region 11b. For example, the element formation region 11a and the inspection hole formation region 10 A semiconductor chip may be formed so as to include the semiconductor chip.
[0039]
Hereinafter, the inspection hole formation region 10 of the first embodiment will be described with reference to the drawings.
[0040]
FIG. 2A shows a plan configuration of the inspection hole formation region 10 of the first embodiment, and FIG. 2B shows a cross-sectional configuration taken along line IIb-IIb of FIG. 2A. . As shown in FIGS. 2A and 2B, the inspection hole formation region 10 according to the first embodiment is formed on a semiconductor wafer 11 by using, for example, silicon oxide having a thickness of about 0.6 μm. A plurality of holes 13 each having a circular opening having a diameter (opening diameter) of about 0.25 μm are formed in the first insulating film 12. Is formed.
[0041]
Here, the first insulating film 12 is formed as an insulating film having the same composition and film thickness as the interlayer insulating film in the element formation region 11a, and is used as a hole forming insulating film for forming an inspection hole. Become. The hole 13 is formed as a through hole having an opening diameter equivalent to that of the contact hole in the element formation region 11a, and serves as an inspection hole.
[0042]
As described above, since the hole 13 equivalent to the contact hole of the element formation region 11a is formed in a region different from the element formation region 11a, by inspecting the hole 13, the semiconductor element in the element formation region 11a can be statically formed. It is possible to determine whether or not an unpenetrated contact hole has occurred without causing a failure such as electric breakdown.
[0043]
In the first embodiment, silicon oxide is used as a material for forming the first insulating film 12, but it is sufficient that the first insulating film 12 is formed of the same insulating material as the interlayer insulating film in the element formation region 11a.
[0044]
Hereinafter, a method for manufacturing the semiconductor device according to the first embodiment will be described with reference to the drawings.
[0045]
3A and 3B show a cross-sectional configuration in the order of steps of the method for manufacturing a semiconductor device according to the first embodiment. 3 (a) and 3 (b), the same components as those shown in FIG. 2 (b) are denoted by the same reference numerals and description thereof is omitted.
[0046]
First, as shown in FIG. 3A, after a first insulating film 12 is deposited on a semiconductor wafer 11 by, for example, a chemical vapor deposition (CVD) method, a semiconductor element forming process is performed by a photolithography method. A resist pattern 14 having an opening having the same size as the opening of the contact hole opening resist pattern used in the step (a) is formed.
[0047]
Here, the first insulating film 12 is deposited in the same step as the step of depositing the interlayer insulating film in the element forming region 11a so that the first insulating film 12 has the same composition and thickness as the interlayer insulating film in the element forming region 11a. Formed.
[0048]
Next, as shown in FIG. 3B, a hole 13 is formed in the first insulating film 12 by a dry etching method using the resist pattern 14 as a mask.
[0049]
Here, the hole 13 is formed in the same step as the step of forming a contact hole in the element formation region 11a, so that the hole 13 has an opening diameter equivalent to that of the contact hole in the element formation region 11a.
[0050]
At the time of this etching, for example, the etching conditions are inappropriate, or some trouble occurs during the etching process, the etching is completed without the hole 13 penetrating the first insulating film 12, and the non-penetrating hole is formed. 13A may occur.
[0051]
Thereafter, all the holes 13 in the inspection hole formation region 10 are observed with a scanning electron microscope to check whether or not the non-through hole 13A is formed.
[0052]
Hereinafter, the step of observing the inspection hole formation region 10 of the first embodiment with a scanning electron microscope and inspecting whether the non-through hole portion 13A is generated will be specifically described with reference to the drawings.
[0053]
FIG. 4 is a plan view showing an observation image obtained by observing the inspection hole formation region 10 of the first embodiment using a scanning electron microscope.
[0054]
As shown in FIG. 4, when the inspection hole formation region 10 is observed from above the resist pattern 14 with an observation magnification of about 100,000 times using a scanning electron microscope, the opening of the resist pattern 14 Since the next electron is generated, the hole 13 can be confirmed at the opening of the resist pattern 14. In the opening of the resist pattern 14, the hole 13 penetrating the first insulating film 12 is observed brighter than the resist pattern 14, whereas the non-through hole 13 A has the same brightness as the resist pattern 14. In addition, the hole 13 penetrating the first insulating film 12 and the non-through hole 13A can be easily distinguished.
[0055]
This is because the semiconductor wafer 11 is exposed at the bottom of the hole 13 penetrating the first insulating film 12, whereas the bottom of the non-through hole 13 A is the first insulating film 12. Since the semiconductor material has a higher secondary electron generation efficiency between the material and the insulating material, if the hole 13 is formed normally so as to penetrate the first insulating film 12, the semiconductor material 11 This is because secondary electrons can be clearly observed.
[0056]
According to the inspection using the scanning electron microscope described above, when the non-through hole portion 13A is generated, it is determined that the contact hole in the element formation region 11a is not formed normally, the cause is investigated, and the etching is performed. By setting the conditions again, the semiconductor device is manufactured again so that the contact holes surely penetrate the interlayer insulating film.
[0057]
When the non-through hole portion 13A is not generated, it is determined that the contact hole in the element formation region 11a is formed normally, and the contact and the contact are formed by embedding a conductive material in the contact hole in the element formation region 11a. A semiconductor device is completed through a process of forming a wiring and subsequently forming a passivation film and a bonding pad.
[0058]
As described above, according to the method for manufacturing the semiconductor device of the first embodiment, the hole 13 is formed as the inspection hole in the non-functional region 11b which is a region different from the element formation region 11a. Observing the portion 13 does not affect the semiconductor element. Therefore, even if it is determined whether the contact hole formed in the element formation region 11a penetrates the interlayer insulating film, it does not affect the reliability of the semiconductor device.
[0059]
In the first embodiment, the observation magnification of the scanning electron microscope is about 100,000, but any magnification that can identify the bottom of the hole 13 on the monitor may be used.
[0060]
(Modification of First Embodiment)
Hereinafter, a modified example of the first embodiment of the present invention will be described with reference to the drawings. The present modified example is different from the first embodiment in that, in addition to the hole 13 of the first embodiment, a through hole having an opening size different from that of the hole 13 is formed.
[0061]
FIG. 5A shows a plan configuration of the inspection hole formation region 10 according to a modification of the first embodiment, and FIG. 5B shows a cross-sectional configuration taken along line Vb-Vb in FIG. Is shown. 5 (a) and 5 (b), the same members as those shown in FIGS. 2 (a) and 2 (b) are denoted by the same reference numerals and description thereof will be omitted.
[0062]
As shown in FIGS. 5A and 5B, a plurality of holes each having a circular opening having a diameter of about 0.25 μm are formed in the inspection hole forming region 10 of the present modification. 13 and a plurality of small holes 15 having a circular opening having a diameter of about 0.24 μm.
[0063]
Here, similarly to the first embodiment, the hole 13 is an inspection hole formed to have the same opening diameter as the contact hole of the element formation region 11a, and the small hole 15 is formed in the element formation region 11a. Is formed so as to have a smaller opening diameter than that of the contact hole, and serves as a comparison hole for inspecting a contact hole having an opening smaller than a set value due to a variation in a manufacturing process.
[0064]
The manufacturing method of the semiconductor device of this modification is similar to the process shown in FIGS. 3A and 3B, and the hole 13 and the small hole are formed on the first insulating film 12 by photolithography. After forming a resist pattern 14 in which an opening for patterning 15 is formed, a hole 13 and a small hole 15 are formed by a dry etching method using the formed resist pattern 14 as a mask.
[0065]
Thereafter, all the holes 13 and the small holes 15 in the inspection hole formation region 10 are observed with a scanning electron microscope at an observation magnification of about 100,000, and it is inspected whether or not a non-through hole is generated. I do.
[0066]
Here, the effect of providing the small holes 15 in the semiconductor device of the present modification will be described with reference to the drawings.
[0067]
FIGS. 6A and 6B are plan views showing observation images of the inspection hole formation region 10 of the present modified example observed from above the resist pattern 14 using a scanning electron microscope.
[0068]
FIG. 6A shows a case where all the holes 13 penetrate the first insulating film 12 and the small holes 15 have a non-through hole 15A. As shown in FIG. 6B, a contact hole having a normal opening diameter penetrates the interlayer insulating film, but a contact hole having a small opening diameter due to a variation in a contact hole forming process has an interlayer insulating film. Non-penetrating holes that do not penetrate through.
[0069]
FIG. 6B shows a case where the non-through holes 13A are formed in some of the holes 13 and all the small holes 15 are non-through holes 15A. As shown in FIG. 6B, in the case where a non-penetrating hole occurs in the contact hole formed according to the setting of the opening diameter, the contact hole having the small opening diameter due to the variation of the contact hole forming process. Most of them do not penetrate the interlayer insulating film.
[0070]
This is because the smaller the opening diameter of the mask, the lower the etching rate of the film to be etched in the dry etching step. That is, in the process of forming the hole 13, if there is a variation in the opening diameter of the resist pattern 14, the non-through hole 15A is generated in the small hole 15 in the opening smaller than the set value, This indicates that even if a contact hole formed according to the set value is formed normally, a defect may occur in a contact hole formed with a small opening diameter due to variations in a contact hole forming process.
[0071]
In the inspection using the scanning electron microscope of this modified example, when the non-through holes 13A and 15A are generated, it is determined that the contact hole in the element formation region 11a is not formed normally, and the cause is investigated. By again setting the etching conditions, the semiconductor device is manufactured again so that the contact holes surely penetrate the interlayer insulating film.
[0072]
When the non-through holes 13A and 15A are not generated, it is determined that the contact hole in the element forming region 11a is formed normally, and a conductive material is buried in the contact hole in the element forming region 11a. A semiconductor device is completed through a process of forming a contact and a wiring, and subsequently forming a passivation film and a bonding pad.
[0073]
According to the present modification, in addition to obtaining the same effect as in the first embodiment, by providing the small holes 15 serving as comparison holes, the opening diameter is larger than the setting due to the variation in the contact hole forming process. It can be determined whether or not a small contact hole is formed through the interlayer insulating film.
[0074]
The plurality of small holes 15 are not limited to the case where all the small holes 15 are formed to have the same opening diameter, and may have different opening diameters as the opening diameter smaller than the opening diameter of the contact hole. May have a plurality of small holes 15 formed therein.
[0075]
(Second embodiment)
Hereinafter, a second embodiment of the present invention will be described with reference to the drawings.
[0076]
In the semiconductor device according to the second embodiment, a lower wiring connected to a semiconductor element is formed in the element forming region 11a shown in FIG. 1, and an upper wiring is formed thereon via an interlayer insulating film. And the upper wiring are electrically connected via a contact hole formed in the interlayer insulating film.
[0077]
The second embodiment is different from the first embodiment in that a conductive film corresponding to a lower wiring is formed in the inspection hole formation region 10. The arrangement of the inspection hole formation region 10 on the semiconductor wafer 11 is different from that of the first embodiment. 1, is formed in the scribe area of the non-functional area 11b, similarly to the inspection hole formation area 10 of the first embodiment shown in FIG.
[0078]
FIG. 7 shows a cross-sectional configuration of the inspection hole formation region 10 according to the second embodiment. In FIG. 7, the same components as those of the first embodiment shown in FIG.
[0079]
As shown in FIG. 7, the inspection hole formation region 10 of the second embodiment is made of, for example, titanium (Ti) having a thickness of 10 nm on a semiconductor wafer 11 with a first insulating film 12 interposed therebetween. A base film (not shown), a barrier film (not shown) made of titanium nitride (TiN) having a thickness of 100 nm, and a conductive film made of an alloy of aluminum (Al) and copper (Cu) having a thickness of about 0.5 μm; A film 21 and a barrier film (not shown) made of TiN having a thickness of 300 nm are formed, and a second insulating film 22 made of silicon oxide is formed on the conductive film 21. A plurality of holes 13 each having a circular opening having a diameter of about 0.2 μm are formed in the second insulating film 22.
[0080]
Although the conductive film 21 is illustrated as being formed over the entire bottom surface of the hole 13, the conductive film 21 may be arranged so that a part thereof is exposed on the bottom surface of the hole 13.
[0081]
The plan configuration of the inspection hole formation region 10 according to the second embodiment is the same as the plan configuration shown in FIG. 2A except that the hole 13 is formed in the second insulating film 22, and thus the description will be made. Omitted.
[0082]
The hole 13 of the second embodiment is a contact for connecting a lower wiring connected to a semiconductor element in the element forming region 11a and an upper wiring formed on the lower wiring via an interlayer insulating film. The hole becomes an inspection hole for the hole, and the second insulating film 22 of the second embodiment becomes an insulating film for forming a hole.
[0083]
Hereinafter, a method for manufacturing the semiconductor device according to the second embodiment will be described with reference to the drawings.
[0084]
FIGS. 8A and 8B show cross-sectional configurations in the order of steps of a method for manufacturing a semiconductor device according to the second embodiment. 8A and 8B, the same components as those shown in FIG. 7 are denoted by the same reference numerals, and description thereof will be omitted.
[0085]
First, as shown in FIG. 8A, a first insulating film 12 is deposited on a semiconductor wafer 11 by, for example, a CVD method, and then a base film made of Ti, a barrier film made of TiN, and an AlCu film are formed by a sputtering method. And a barrier film made of TiN are sequentially deposited.
[0086]
Next, the conductive film 21 is patterned by a photolithography method and a dry etching method so that the conductive film 21 is formed so as to include at least a part below the hole 13. Subsequently, after forming the second insulating film 22 on the conductive film 21 by, for example, the CVD method, a resist pattern 14 having an opening for forming the hole 13 is formed by the photolithography method. The resist pattern 14 is arranged so that its opening includes a part of the conductive film 21.
[0087]
Here, the second insulating film 22 is deposited in the same step as the step of depositing the interlayer insulating film in the element forming region 11a, so that the second insulating film 22 has the same composition and thickness as the interlayer insulating film in the element forming region 11a. Formed.
[0088]
Next, as shown in FIG. 8B, the hole 13 is formed by etching the second insulating film 22 by a dry etching method using the resist pattern 14 as a mask.
[0089]
Here, the hole 13 is formed in the same step as the step of forming a contact hole in the element formation region 11a, so that the hole 13 has an opening diameter equivalent to that of the contact hole in the element formation region 11a.
[0090]
At the time of this etching, for example, the etching conditions are inappropriate, or some trouble occurs during the etching process, the etching is completed without the hole 13 penetrating the first insulating film 12, and the non-penetrating hole is formed. 13A may occur.
[0091]
Thereafter, all the holes 13 in the inspection hole formation region 10 are observed with a scanning electron microscope to check whether or not the non-through hole 13A is formed.
[0092]
Hereinafter, a process of observing the inspection hole formation region 10 according to the second embodiment with a scanning electron microscope and inspecting whether the non-through hole portion 13A is generated will be specifically described.
[0093]
First, the semiconductor device in which the hole 13 is formed is placed on a sample stage of a scanning electron microscope with the resist pattern 14 facing upward, and the observation magnification is set to about 2000 times, and the entire electron beam is formed in one inspection hole formation region 10. Irradiate the line.
[0094]
As a result, the second insulating film 22 is made of an insulating material, so that almost no secondary electrons are generated from the irradiated electron beam, whereas the conductive film 21 is made of a conductive material having a high secondary electron generation efficiency. Therefore, secondary electrons are efficiently generated from the irradiated electron beam. Therefore, contrast occurs between the second insulating film 22 and the conductive film 21.
[0095]
Next, when observing the hole 13 at an observation magnification of about 100,000 times, the contrast generated by the irradiation of the electron beam can be clearly observed, as in the observation image shown in FIG. The hole 13 penetrating through the membrane 22 and the non-through hole 13A can be distinguished more reliably than in the first embodiment.
[0096]
According to the inspection using the scanning electron microscope described above, when the non-through hole portion 13A is generated, it is determined that the contact hole in the element formation region 11a is not formed normally, the cause is investigated, and the etching is performed. By setting the conditions again, the semiconductor device is manufactured again so that the contact holes surely penetrate the interlayer insulating film.
[0097]
When the non-through hole portion 13A is not generated, it is determined that the contact hole in the element formation region 11a is formed normally, and the contact and the contact are formed by embedding a conductive material in the contact hole in the element formation region 11a. A semiconductor device is completed through a process of forming a wiring and subsequently forming a passivation film and a bonding pad.
[0098]
As described above, according to the second embodiment, since the conductive film 21 is provided on the bottom surface of the hole 13, in the step of inspecting whether the non-through hole 13 </ b> A is formed, Since the secondary electrons are efficiently emitted from the conductive film 21 in the hole 13 penetrating through the insulating film 22, the hole 13 penetrating through the second insulating film 22 and the non-through hole 13A are formed in the first embodiment. It can be more easily and reliably distinguished than the form.
[0099]
In the second embodiment, the set magnification for producing the contrast is set to about 2000 times, but any magnification that can irradiate the entirety of one inspection hole formation region 10 with an electron beam may be used.
[0100]
Further, in the second embodiment, similarly to the modification of the first embodiment, by providing a comparison hole having a different opening diameter from the contact hole of the element formation region 11a, the opening due to a variation in the contact hole forming process is provided. It is also possible to determine whether or not a contact hole having a diameter smaller than the setting is formed to penetrate the interlayer insulating film.
[0101]
(Third embodiment)
Hereinafter, a third embodiment of the present invention will be described with reference to the drawings.
[0102]
In the semiconductor device according to the third embodiment, a lower wiring connected to a semiconductor element is formed in an element forming region 11a shown in FIG. 1, and an upper wiring is formed thereon via an interlayer insulating film. And the upper wiring are electrically connected via a contact hole formed in the interlayer insulating film.
[0103]
The third embodiment is different from the first embodiment in that a conductive film corresponding to a lower wiring is formed in the inspection hole formation region 10. The arrangement of the inspection hole formation region 10 on the semiconductor wafer 11 is different from that of the first embodiment. 1, is formed in the scribe area of the non-functional area 11b, similarly to the inspection hole formation area 10 of the first embodiment shown in FIG.
[0104]
FIG. 9 shows a cross-sectional configuration of an inspection hole formation region 10 according to the third embodiment. In FIG. 9, the same components as those of the first embodiment shown in FIG.
[0105]
As shown in FIG. 9, an inspection hole formation region 10 of the third embodiment is formed on a semiconductor wafer 11 by, for example, a base film (not shown) made of Ti having a thickness of 5 nm and a base film (not shown) having a thickness of 10 nm. A barrier film (not shown) made of TiN and a conductive film 31 made of tungsten of about 80 μm and penetrating through the first insulating film 12 and electrically connected to the semiconductor wafer 11 are sequentially formed. The second insulating film 22 made of silicon oxide is formed on the conductive film 21. A plurality of holes 13 each having a circular opening having a diameter of about 0.2 μm are formed in the second insulating film 22.
[0106]
The planar configuration of the inspection hole formation region 10 of the third embodiment is the same as the planar configuration shown in FIG. 2A except that the hole 13 is formed in the second insulating film 22. Description is omitted.
[0107]
The hole 13 of the third embodiment serves as an inspection hole for a contact hole for connecting a wiring connected to the semiconductor element in the element formation region 11a to an upper wiring, and the second insulating film 22 forms a hole. It becomes an insulating film for use.
[0108]
Hereinafter, a method for manufacturing the semiconductor device according to the third embodiment will be described with reference to the drawings.
[0109]
FIGS. 10A and 10B show cross-sectional configurations in the order of steps of a method for manufacturing a semiconductor device according to the second embodiment. 10 (a) and 10 (b), the same components as those shown in FIG. 9 are denoted by the same reference numerals, and description thereof will be omitted.
[0110]
First, as shown in FIG. 10A, a first insulating film 12 is deposited on a semiconductor wafer 11 by, for example, a CVD method, and then the first insulating film 12 is formed by a photolithography method and a dry etching method. A connection hole for connecting the conductive film 31 to the semiconductor wafer 11 is formed. Subsequently, a base film made of Ti, a barrier film made of TiN, and a conductive film 31 made of tungsten are sequentially deposited by a sputtering method. Thereby, the conductive film 31 is electrically connected to the semiconductor wafer 11 through the connection hole of the first insulating film 12.
[0111]
Next, a second insulating film 22 made of silicon oxide is deposited over the entire surface of the first insulating film 12 including the upper surface of the conductive film 31, and an opening is formed by photolithography so as to include a part of the conductive film 31. A resist pattern 14 having a portion is formed.
[0112]
Here, the second insulating film 22 is deposited in the same step as the step of depositing the interlayer insulating film in the element forming region 11a, so that the second insulating film 22 has the same composition and thickness as the interlayer insulating film in the element forming region 11a. Formed.
[0113]
Next, as shown in FIG. 10B, the holes 13 are formed by etching the second insulating film 22 by a dry etching method using the resist pattern 14 as a mask.
[0114]
Here, the hole 13 is formed in the same step as the step of forming a contact hole in the element formation region 11a, so that the hole 13 has an opening diameter equivalent to that of the contact hole in the element formation region 11a.
[0115]
At the time of this etching, for example, the etching conditions are inappropriate, or some trouble occurs during the etching process, the etching is completed without the hole 13 penetrating the first insulating film 12, and the non-penetrating hole is formed. 13A may occur.
[0116]
Thereafter, all the holes 13 in the inspection hole formation region 10 are observed with a scanning electron microscope to check whether or not the non-through hole 13A is formed.
[0117]
Hereinafter, the process of observing the inspection hole formation region 10 according to the third embodiment with a scanning electron microscope and inspecting whether the non-through hole portion 13A is generated will be specifically described.
[0118]
First, the semiconductor device in which the holes 13 are formed is placed on a sample table of a scanning electron microscope with the resist pattern 14 facing upward, and the observation magnification is set to about 2000 times. Irradiate the line.
[0119]
As a result, the second insulating film 22 is made of an insulating material, so that secondary electrons are hardly generated from the irradiated electron beam, whereas the conductive film 31 is made of a conductive material, and the generation efficiency of the secondary electrons is reduced. Since it is high, contrast occurs between the second insulating film 22 and the conductive film 31.
[0120]
Further, since the conductive film 31 is electrically connected to the semiconductor wafer 11, electrons of the semiconductor wafer 11 can also contribute to emission of secondary electrons. With this configuration, even when the conductive film 31 is formed using tungsten, which has a lower secondary electron generation efficiency than aluminum, the amount of secondary electrons emitted from the conductive film 31 by being connected to the semiconductor wafer 11 is increased. Therefore, the contrast between the second insulating film 22 and the conductive film 31 is increased.
[0121]
Next, when observing the hole 13 with the observation magnification of the scanning electron microscope set to about 200,000 times, the contrast caused by the irradiation of the electron beam can be clearly observed as in the observation image shown in FIG. The hole 13 penetrating through the second insulating film 22 can be easily and reliably distinguished from the non-through hole 13A.
[0122]
As described above, according to the third embodiment, since the conductive film 31 that is electrically connected to the semiconductor wafer 11 is provided on the bottom surface of the hole 13, the electrons on the semiconductor wafer 11 also emit secondary electrons. , The amount of secondary electrons generated from the conductive film 31 increases. Therefore, even when the conductive film 31 is formed of a conductive material having a relatively low secondary electron generation efficiency, the secondary electrons are efficiently emitted from the conductive film 31, and thus the second insulating film 22 is formed. Can easily and reliably be distinguished from the non-through hole 13A.
[0123]
In the third embodiment, the set magnification for producing the contrast is set to 2000 times. However, any magnification may be used as long as the entire inspection hole forming region 10 is irradiated with the electron beam.
[0124]
Further, in the third embodiment, as in the modification of the first embodiment, by providing a comparison hole having a different opening diameter from the contact hole in the element formation region 11a, an opening due to a variation in a contact hole forming process is provided. It is also possible to determine whether or not a contact hole having a diameter smaller than the setting is formed to penetrate the interlayer insulating film.
[0125]
(Fourth embodiment)
Hereinafter, a fourth embodiment of the present invention will be described with reference to the drawings.
[0126]
The semiconductor device of the fourth embodiment differs from the semiconductor device of the third embodiment shown in FIG. 9 in that the area of the upper surface of the conductive film 31 is at least twice the total area of the openings of the resist pattern 14. Form.
[0127]
Hereinafter, a method for manufacturing the semiconductor device according to the fourth embodiment will be described with reference to FIGS. 10A and 10B.
[0128]
First, in the step shown in FIG. 10A, when forming the conductive film 31 on the first insulating film 12, the total area of the openings of the resist pattern 14 for forming the holes 13 is about twice as large. Is formed so as to have an area of
[0129]
Specifically, when the contact hole formed in the element formation region 11a is formed in a circular shape having an opening diameter of about 0.2 μm, one opening of the resist pattern 14 is formed into a circle having an opening diameter of about 0.2 μm. When 100 inspection holes are formed in one inspection hole formation region 10, the total area of the openings of the resist pattern 14 is 0.1 × 0.1 × π × 100 = about 3 μm ² It is. On the basis of this, the conductive film 31 in one inspection hole formation region 10 has an upper surface area of about 6 μm. ² It is formed so that
[0130]
Thereafter, a second insulating film 22 and a resist pattern 14 are sequentially formed over the entire surface of the first insulating film 12 including the conductive film 31.
[0131]
Next, the holes 13 are formed in the second insulating film 22 in the same manner as in FIG.
[0132]
Next, the semiconductor device in which the holes 13 are formed is placed on a sample table of a scanning electron microscope with the resist pattern 14 facing upward, and the entire surface of the inspection hole formation region 10 is irradiated with an electron beam at an observation magnification of about 2000 times. I do.
[0133]
Here, the electron beam emitted from the scanning electron microscope reaches the conductive film 31 through the hole 13 penetrating through the second insulating film 22 and generates secondary electrons. At this time, since the conductive film 31 is formed to have an area twice or more the opening area of the hole 13, the second insulating film 22 in the conductive film 31 is irradiated with the electron beam irradiated from one hole 13. Since secondary electrons are also generated from the portion covered by the hole, the amount of secondary electrons emitted in the hole 13 penetrating through the second insulating film 22 is increased as compared with the third embodiment. The contrast with the portion 13A is larger than in the third embodiment.
[0134]
Next, when observing the hole 13 with the observation magnification of the scanning electron microscope set to about 200,000, the contrast generated by the irradiation of the electron beam can be clearly observed as in the observation image shown in FIG. The hole 13 penetrating through the second insulating film 22 and the non-through hole 13A can be distinguished more easily and reliably than in the third embodiment.
[0135]
Note that the area of the upper surface of the conductive film 31 is not limited to about twice the area of the opening of the resist pattern 14 and may be at least twice the total area of the opening of the resist pattern 14. The conductive film 31 may be formed over the entire surface of the inspection hole formation region 10.
[0136]
As described above, according to the semiconductor device of the fourth embodiment, the conductive film 31 is formed so that the area of the conductive film 31 is twice or more the area of the hole 13 forming region. The portion covered by the insulating film 22 can also contribute to emission of secondary electrons. Therefore
In the fourth embodiment, the configuration in which the area of the conductive film 31 is set to about twice the area of the opening of the resist pattern 14 in the semiconductor device of the third embodiment has been described. The same effect can be obtained even if the area of the conductive film 21 is twice or more the area of the opening of the resist pattern 14 in the semiconductor device.
[0137]
Further, in the fourth embodiment, as in the modification of the first embodiment, by providing a comparison hole having an opening diameter different from that of the contact hole in the element formation region 11a, an opening due to a variation in a contact hole forming process is provided. It is also possible to determine whether or not a contact hole having a diameter smaller than the setting is formed to penetrate the interlayer insulating film.
[0138]
(Fifth embodiment)
Hereinafter, a fifth embodiment of the present invention will be described with reference to the drawings.
[0139]
In the semiconductor device of the fifth embodiment, MOS transistors are formed on a semiconductor wafer 11 in an element formation region 11a shown in FIG. 1, and the source and drain regions of the MOS transistor are self-aligned with an interlayer insulating film. It is connected to the wiring via the formed contact hole.
[0140]
The first point is that a convex structure corresponding to the gate electrode of the MOS transistor of the MOS transistor and the protective insulating film formed on the gate electrode is formed in the inspection hole formation region 10 of the fifth embodiment. Unlike the embodiment, the arrangement of the inspection hole formation region 10 on the semiconductor wafer 11 is similar to that of the inspection hole formation region 10 of the first embodiment shown in FIG. Is formed.
[0141]
The planar configuration of the inspection hole formation region 10 of the fifth embodiment is the same as the inspection hole formation region 10 of the first embodiment shown in FIG.
[0142]
FIG. 11 shows a cross-sectional configuration of an inspection hole formation region 10 according to the fifth embodiment. In FIG. 11, the same components as those in the first embodiment shown in FIG.
[0143]
As shown in FIG. 11, the inspection hole formation region 10 of the fifth embodiment is formed on a semiconductor wafer 11 as a structure equivalent to a gate electrode of a MOS transistor, and is made of polycrystalline silicon having a thickness of about 100 nm. A lower conductive film 41 and an upper conductive film made of tungsten having a film thickness of about 80 nm are formed. On the upper conductive film, an insulating film equivalent to a protective film for protecting an upper portion of a gate electrode of a MOS transistor is formed. A first silicon nitride film 43 having a thickness of about 200 nm is formed.
[0144]
Here, the lower conductive film 41 and the upper conductive film 42 are formed in the same step as the gate electrode of the MOS transistor, and the first silicon nitride film is formed in the same step as the protective film for protecting the gate electrode.
[0145]
Note that an oxide film formed by the same bristling process as the gate insulating film may be formed between the semiconductor wafer 11 and the lower electrode film 41.
[0146]
Further, tetraethylorthosilicate (TEOS: TEOS) is formed on the entire surface of the semiconductor wafer 11 including the first silicon nitride film 43 and the lower conductive film 41, the upper conductive film 42, and the side surfaces of the first silicon nitride film 43. Si (OC ₂ H ₅ ) ₄ A TEOS film 44 having a thickness of about 20 nm and a second silicon nitride film 45 having a thickness of about 50 nm obtained by the thermal decomposition are formed, and on the second silicon nitride film 45, A first insulating film 12 is formed as an insulating film equivalent to the interlayer insulating film in the element forming region 11a.
[0147]
Here, the TEOS film 44 and the second silicon nitride film 45 are the same insulating films as the insulating films forming the sidewalls of the MOS transistor.
[0148]
The laminated structure including the lower conductive film 41, the upper conductive film 42, and the first silicon nitride film 43 is patterned in a convex shape so as to have a width of about 130 nm, and the TEOS film 44 and the second silicon nitride film 45 , So as to cover this laminated structure. Therefore, the second silicon nitride film 45 has a convex structure having a step portion composed of an upper portion located on the first silicon nitride film 43 and a lower portion located between the lower conductive films 41. Become.
[0149]
Each of the first insulating films 12 includes a step portion which is a region between the upper portion and the lower portion of the second silicon nitride film 45 and the lower portion of the second silicon nitride film 45 includes A plurality of holes 13 having a circular opening with a diameter of about 0.2 μm formed so as to be reached are formed.
[0150]
The hole 13 of the fifth embodiment serves as an inspection hole for a contact hole for connecting a semiconductor element and a wiring in the element formation region 11a, and the first insulating film 12 serves as a hole forming insulating film.
[0151]
Hereinafter, a method for manufacturing the semiconductor device according to the fifth embodiment will be described with reference to the drawings.
[0152]
FIGS. 12A and 12B show cross-sectional configurations in the order of steps of a method for manufacturing a semiconductor device according to the third embodiment. 12 (a) and 12 (b), the same components as those shown in FIG. 11 are denoted by the same reference numerals, and description thereof will be omitted.
[0153]
First, as shown in FIG. 12A, a lower conductive film 41 made of polycrystalline silicon, an upper conductive film 42 made of tungsten, and a first silicon nitride film 43 are sequentially formed on a semiconductor wafer 11 by, for example, a CVD method. After the deposition, the lower conductive film 41, the upper conductive film 42, and the first silicon nitride film 43 are patterned into a convex shape by photolithography and dry etching to form a structure equivalent to the gate electrode.
[0154]
Next, the TEOS film 44 and the TEOS film 44 are formed in the inspection hole formation region 10 of the semiconductor wafer 11 including the side surfaces of the lower conductive film 41, the upper conductive film 42 and the first silicon nitride film 43 and the upper side of the first silicon nitride film 43. A second silicon nitride film 45 is formed. At this time, since the lower conductive film 41, the upper conductive film 42, and the first silicon nitride film 43 are patterned in a convex shape, the second silicon nitride film 45 is formed as a convex structure.
[0155]
Next, a first insulating film 12 made of silicon oxide is deposited over the entire surface of the second silicon nitride film 45, and then a step portion in the convex second silicon nitride film 45 is formed by photolithography. Pattern 14 in which openings are arranged as described above.
[0156]
Here, the first insulating film 12 is deposited in the same step as the step of forming the interlayer insulating film in the element forming region 11a so that the first insulating film 12 has the same composition and film thickness as the interlayer insulating film in the element forming region 11a. Formed.
[0157]
Next, as shown in FIG. 12B, the hole 13 is formed by etching the first insulating film 12 by a dry etching method using the resist pattern 14 as a mask. Thus, the hole 13 is opened so as to include the step portion of the second silicon nitride film 45. At the time of this etching, for example, the etching conditions are inappropriate, or some trouble occurs during the etching process, the etching is completed without the hole 13 penetrating the first insulating film 12, and the non-penetrating hole is formed. 13A may occur.
[0158]
Here, the hole 13 is formed in the same step as the step of forming a contact hole in the element formation region 11a, so that the hole 13 has an opening diameter equivalent to that of the contact hole in the element formation region 11a.
[0159]
Thereafter, the semiconductor device in which the holes 13 are formed is observed using a scanning electron microscope to check whether or not the non-through holes 13A are formed.
[0160]
FIG. 13 is a plan view showing an observation image obtained by observing the inspection hole formation region 10 of the fifth embodiment using a scanning electron microscope.
[0161]
As shown in FIG. 13, when the inspection hole formation region 10 is observed from above the resist pattern 14 at an observation magnification of about 200,000 times using a scanning electron microscope, the resist pattern 14 Since the next electron is generated, an opening for forming the hole 13 can be confirmed in the resist pattern 14.
[0162]
In the opening of the resist pattern 14, in the hole 13 penetrating the first insulating film 12, secondary electrons due to the edge effect are generated from near the upper part of the step portion of the second silicon nitride film 45. A part of the inside is observed brightly. On the other hand, since the first insulating film 12 is exposed flat in the non-through hole portion 13A, the brightness is about the same as that of the resist pattern 14 and the hole portion 13 penetrating the first insulating film 12 The non-through hole portion 13A can be easily distinguished.
[0163]
According to the inspection using the scanning electron microscope described above, when the non-through hole portion 13A is generated, it is determined that the contact hole in the element formation region 11a is not formed normally, the cause is investigated, and the etching is performed. By setting the conditions again, the semiconductor device is manufactured again so that the contact holes surely penetrate the interlayer insulating film.
[0164]
When the non-through hole portion 13A is not generated, it is determined that the contact hole in the element formation region 11a is formed normally, and the contact and the contact are formed by embedding a conductive material in the contact hole in the element formation region 11a. A semiconductor device is completed through a process of forming a wiring and subsequently forming a passivation film and a bonding pad.
[0165]
As described above, according to the semiconductor device of the fifth embodiment, the second silicon nitride film 45 having the convex structure is formed, and the hole 13 is formed so as to open the step portion. Since secondary electrons are generated due to the edge effect, it can be observed that the second silicon nitride film 45 made of an insulating material is exposed.
[0166]
In the fifth embodiment, the observation magnification of the scanning electron microscope is about 200,000. However, any magnification may be used as long as the bottom of the hole 13 can be identified on the monitor.
[0167]
In the fifth embodiment, the second silicon nitride film 45 is formed in a convex shape. However, even when the insulating film made of another insulating material is formed in a convex shape, the hole 13 By arranging a step portion inside the hole, generation of secondary electrons from the step portion can be observed, so that the hole portion 13 penetrating the first insulating film 12 and the non-through hole portion 13A can be distinguished. . Further, even in the case of a convex structure made of a conductive material, by disposing the step inside the hole 13, secondary electrons from the step can be efficiently generated. The through hole 13 and the non-through hole 13A can be easily and reliably distinguished.
[0168]
Further, in the fifth embodiment, as in the modification of the first embodiment, by providing a comparison hole having an opening diameter different from that of the contact hole in the element formation region 11a, an opening due to a variation in a contact hole formation process is provided. It is also possible to determine whether or not a contact hole having a diameter smaller than the setting is formed to penetrate the interlayer insulating film.
[0169]
【The invention's effect】
According to the semiconductor device and the method of manufacturing the same of the present invention, by observing the inspection hole formed in the non-functional region different from the element formation region using a scanning electron microscope, it is determined whether the contact hole is formed normally. Can be determined. At this time, since the inspection hole is provided in a region different from the element formation region, the inspection hole can be observed with a scanning electron microscope without causing defects such as electrostatic breakdown or disconnection in the semiconductor element.
[Brief description of the drawings]
FIG. 1 is a plan view showing a semiconductor device according to a first embodiment of the present invention.
FIG. 2A is a plan view showing an inspection hole formation region of the semiconductor device according to the first embodiment of the present invention, and FIG. 2B is a sectional view taken along line IIb-IIb of FIG. is there.
FIGS. 3A and 3B are cross-sectional views in the order of steps showing manufacturing steps of the semiconductor device according to the first embodiment of the present invention.
FIG. 4 is a plan view showing an observation example in which the inspection hole formation region of the semiconductor device according to the first embodiment of the present invention is observed with a scanning microscope.
FIG. 5A is a plan view showing an inspection hole formation region of a semiconductor device according to a modification of the first embodiment of the present invention, and FIG. 5B is a plan view taken along line Vb-Vb of FIG. FIG.
FIGS. 6A and 6B are plan views showing an observation example in which an inspection hole formation region of a semiconductor device according to a modification of the first embodiment of the present invention is observed with a scanning microscope.
FIG. 7 is a sectional view illustrating a configuration of an inspection hole formation region of a semiconductor device according to a second embodiment of the present invention.
FIGS. 8A and 8B are cross-sectional views in the order of steps showing manufacturing steps of a semiconductor device according to a second embodiment of the present invention.
FIG. 9 is a cross-sectional view showing a configuration of an inspection hole formation region of a semiconductor device according to a third embodiment of the present invention.
FIGS. 10A and 10B are cross-sectional views in the order of steps showing manufacturing steps of a semiconductor device according to a third embodiment of the present invention.
FIG. 11 is a sectional view showing a configuration of an inspection hole formation region of a semiconductor device according to a fourth embodiment of the present invention.
FIGS. 12A and 12B are cross-sectional views in the order of steps showing manufacturing steps of a semiconductor device according to a fourth embodiment of the present invention.
FIG. 13 is a plan view showing an observation example in which an inspection hole formation region of a semiconductor device according to a fifth embodiment of the present invention is observed with a scanning microscope.
[Explanation of symbols]
10 Inspection hole formation area
11 Semiconductor wafer (semiconductor substrate)
11a Element formation region
11b Non-functional area
12 First insulating film (Hole forming insulating film)
13 holes (Hole for inspection)
13A Non-through hole
14 Resist pattern
15 Small hole (Hall for comparison)
15A No through hole
21 conductive film
22 Second insulating film (Hole forming insulating film)
31 conductive film
41 Lower conductive film
42 Upper conductive film
43 First silicon nitride film
44 TEOS film
45 Second silicon nitride film

Claims (16)

A method of manufacturing a semiconductor device, comprising: a step of forming an interlayer insulating film in an element formation region on a semiconductor substrate; and a step of forming a contact hole in the interlayer insulating film.
An inspection hole formation region is divided into a region different from the element formation region on the semiconductor substrate, and a hole formation insulation film having the same composition and thickness as the interlayer insulating film is formed in the inspection hole formation region. A first step;
A second step of forming an inspection hole having the same opening size as the contact hole in the hole forming insulating film. After the second step, a step of inspecting whether or not the inspection hole penetrates the hole forming insulating film by observing the inspection hole using a scanning electron microscope is further included. Prepare,
If the inspection hole penetrates the hole-forming insulating film, it is determined that the contact hole is formed normally, and the inspection hole does not penetrate the hole-forming insulating film. 2. The method according to claim 1, wherein it is determined that the contact hole is not formed normally. The first step is a step of forming a conductive film in the inspection hole formation region on the semiconductor substrate, and forming the hole formation insulating film over the entire surface including the conductive film in the inspection hole formation region. Forming, and
3. The method according to claim 2, wherein in the second step, the inspection hole is formed such that the conductive film is exposed. 4. The method according to claim 3, wherein in the step of forming the conductive film, the conductive film is formed so as to be electrically connected to the semiconductor substrate. 5. The semiconductor device according to claim 3, wherein in the step of forming the conductive film, the conductive film is formed so as to have an area equal to or more than twice an area of an opening of the inspection hole. Manufacturing method. Observing the inspection hole using the scanning electron microscope includes a step of irradiating the entire surface of the inspection hole formation region with an electron beam before observing the inspection hole. A method of manufacturing the semiconductor device according to claim 3. The first step includes forming a convex structure in the inspection hole formation region on the semiconductor substrate, and including the hole formation insulating film on the convex structure in the inspection hole formation region. Forming over the entire surface,
2. The method according to claim 1, wherein in the second step, the inspection hole is formed such that a step portion of the convex structure is exposed. After the second step, by inspecting the inspection hole using a scanning electron microscope, it is inspected whether or not the upper part of the step portion of the convex structure is exposed in the inspection hole. Further comprising a process,
If the upper portion of the step portion of the convex structure is exposed in the inspection hole, it is determined that the contact hole is formed normally, and the step of the convex structure is determined to be in the inspection hole. 8. The method according to claim 7, wherein when the upper stage is not exposed, it is determined that the contact hole is not formed normally. The first step is performed simultaneously with the step of forming the interlayer insulating film;
9. The method according to claim 1, wherein the second step is performed simultaneously with the step of forming the contact hole. 10. The method according to claim 1, wherein the second step includes a step of forming a comparison hole having a smaller opening size than the inspection hole in the hole forming insulating film. 13. The method for manufacturing a semiconductor device according to item 5. A semiconductor device comprising an interlayer insulating film formed in an element formation region on a semiconductor substrate, and a contact hole formed in the interlayer insulating film,
A hole formation insulating film formed in a region different from the element formation region on the semiconductor substrate, and having the same composition and thickness as the interlayer insulating film;
A semiconductor device comprising an inspection hole formed in the hole-forming insulating film and having an opening dimension equal to that of the contact hole. 12. The semiconductor according to claim 11, further comprising a conductive film formed between the semiconductor substrate and the hole-forming insulating film, a part of which is disposed below the inspection hole. apparatus. The semiconductor device according to claim 12, wherein the conductive film is electrically connected to the semiconductor substrate. 14. The semiconductor device according to claim 12, wherein an area of an upper surface of the conductive film is twice or more a total area of openings of the plurality of inspection holes. Further comprising a convex structure formed between the semiconductor substrate and the hole-forming insulating film,
12. The semiconductor device according to claim 11, wherein the step in the convex structure is arranged below the inspection hole. The semiconductor device according to claim 11, further comprising a comparison hole having a smaller opening size than the inspection hole.

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