JP2004103827A - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve the characteristics of a TFT (thin film transistor) to reduce the variations of the characteristics of respective TFTs and especially reduce the variations of the characteristics of the TFT, electrically connected to an EL (electro luminescence) element to supply current to the EL element in a picture element. <P>SOLUTION: Semiconductor layers 109, 110, become the active layers of a plurality of thin film transistors arranged in the picture element, and are arranged in the same arranging direction to radiate the laser beam for scanning in the same direction as the lengthwise direction of a channel and obtain a high field-effect mobility by aligning the growing direction of a crystal in the moving direction of a carrier. Further, a driving circuit and a semiconductor layer which becomes the active layer of a plurality of thin film transistors arranged in a CPU (central processing unit) are arranged in the same direction to radiate the laser beam for scanning in the same direction as the lengthwise direction of the channel. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a method for manufacturing a semiconductor device, and particularly to a light emitting device having an organic light emitting element formed on a plastic substrate. In addition, the present invention relates to an EL module in which an IC including a controller is mounted on an EL panel. In this specification, the EL panel and the EL module are collectively referred to as a light emitting device. The present invention further relates to an electronic device using the light emitting device.
[0002]
Note that in this specification, a semiconductor device generally means a device that can function by utilizing semiconductor characteristics, and a light-emitting device, an electro-optical device, a semiconductor circuit, and an electronic device are all semiconductor devices.
[0003]
[Prior art]
In recent years, the technology of forming a TFT (thin film transistor) on a substrate has greatly advanced, and application development to an active matrix display device has been advanced. In particular, a TFT using a polysilicon film has higher field-effect mobility (also referred to as mobility) than a TFT using a conventional amorphous silicon film, and thus can operate at high speed. Therefore, development for providing a driver circuit including a TFT using a polysilicon film on the same substrate as a pixel and controlling each pixel has been actively performed. An active matrix display device in which pixels and a driving circuit are incorporated on the same substrate is expected to provide various advantages such as reduction in manufacturing cost, downsizing of the display device, increase in yield, and reduction in throughput.
[0004]
In addition, research on an active matrix light-emitting device (hereinafter, simply referred to as a light-emitting device) having an EL element in which a layer containing an organic compound is used as a light-emitting layer as a self-luminous element has been activated. The light emitting device is also called an organic light emitting device (OELD: Organic EL Display) or an organic light emitting diode (OLED: Organic Light Emitting Diode).
[0005]
Since the EL element emits light by itself, the visibility is high, the backlight required for a liquid crystal display device (LCD) is not required, the EL element is optimal for thinning, and the viewing angle is not limited. For this reason, light-emitting devices using EL elements have attracted attention as display devices that can replace CRTs and LCDs.
[0006]
[Problems to be solved by the invention]
As one mode of a light emitting device using an EL element, there is known an active matrix driving method in which a plurality of TFTs are provided for each pixel and an image is displayed by sequentially writing video signals. The TFT is an essential element for realizing the active matrix driving method.
[0007]
Conventional TFTs are mostly manufactured using amorphous silicon, but TFTs using amorphous silicon have low field-effect mobility and operate at the frequency required to process video signals. Since it was impossible to perform this, it was used exclusively as a switching element provided for each pixel. A data line side driving circuit for outputting a video signal to a data line and a scanning line side driving circuit for outputting a scanning signal to a scanning line are external ICs (Tape Automated Bonding) or COGs (Chip on Glass). Driver IC).
[0008]
However, as the pixel density increases, the pixel pitch becomes narrower, and it is considered that there is a limit to the method of mounting the driver IC. For example, assuming UXGA (1200 × 1600 pixels), the RGB color system requires 6000 connection terminals even if simply estimated. An increase in the number of connection terminals causes an increase in the probability of occurrence of contact failure. In addition, the area (frame area) in the peripheral portion of the pixel portion increases, which is a factor that impairs the size reduction and appearance design of a semiconductor device using the display as a display. From such a background, the necessity of a display device integrated with a driving circuit has become clear. By integrally forming the pixel portion and the scan line side and data line side drive circuits on the same substrate, the number of connection terminals can be drastically reduced, and the area of the frame region can be reduced.
[0009]
As a means for realizing an active matrix display device in which pixels and a driving circuit are incorporated on the same substrate, a method of forming a TFT with a semiconductor film having a crystal structure, typically, a polysilicon film has been proposed. However, even if a TFT is formed using polysilicon, its electrical characteristics are not comparable to those of a MOS transistor formed on a single-crystal silicon substrate. For example, the field effect mobility of a conventional TFT is 1/10 or less of that of single crystal silicon. In addition, TFTs using polysilicon have a problem that their characteristics are likely to vary due to defects formed in crystal grain boundaries.
[0010]
Generally, in a light emitting device, at least a TFT that functions as a switching element and a TFT that supplies a current to an EL element are provided in each pixel. The TFT that functions as a switching element has a low off-current (I _off ) Is required, the TFT that supplies current to the EL element has a high driving capability (on current, I _on ) And to prevent deterioration due to the hot carrier effect to improve reliability. Further, the TFT of the data line side driving circuit also has a high driving capability (ON current, I _on ) And to prevent deterioration due to the hot carrier effect to improve reliability.
[0011]
In addition, regardless of the driving method, the ON current (I) of the TFT that is electrically connected to the EL element and supplies a current to the EL element. _on Since the brightness of the pixel is determined in (2), when white display is performed on the entire surface, there is a problem that the brightness varies if the on-current is not constant. For example, in the case where the luminance is adjusted according to the light emission time, in the case where the display of 64 gradations is performed, the ON current of the TFT which is electrically connected to the EL element and supplies a current to the EL element is 1. Variation of 56% (= 1/64) results in a shift of one gradation.
[0012]
The present invention has been made in view of the above problems, and further improves the characteristics of the TFT (specifically, increases the on-current and reduces the off-current) and reduces the variation in the characteristics of each TFT. That is the task. At least in a pixel, an ON current (I) of a TFT that is electrically connected to an EL element and supplies a current to the EL element. _on It is an object of the present invention to reduce the variation of the above.
[0013]
[Means for Solving the Problems]
According to the present invention, in order to improve the characteristics of a TFT, in a light-emitting device using an EL element, the channel length directions of regions (referred to as channel formation regions) functioning as channels of a plurality of thin film transistors provided in a pixel are all in the same direction. And irradiating a laser beam which scans in the same direction as the channel length direction to obtain a high field effect mobility by aligning the crystal growth direction and the carrier movement direction.
[0014]
As laser light, gas laser such as excimer laser, Ar laser, Kr laser, YAG laser, YVO laser ₄ Laser, YLF laser, YAlO ₃ A solid-state laser such as a laser, a glass laser, a ruby laser, an Alexandrite laser, a Ti: sapphire laser, or a semiconductor laser may be used. Examples of the solid-state laser include YAG, YVO doped with Cr, Nd, Er, Ho, Ce, Co, Ti, or Tm. ₄ , YLF, YAlO ₃ A laser using a crystal such as is applied. The fundamental wave of the laser depends on the material to be doped, and a laser beam having a fundamental wave of about 1 μm can be obtained. Harmonics with respect to the fundamental wave can be obtained by using a nonlinear optical element. The mode of laser oscillation may be either continuous oscillation or pulse oscillation, and the shape of the laser beam may be linear or rectangular. In order to obtain a crystal with a large grain size when crystallization of a semiconductor film having an amorphous structure, a solid-state laser capable of continuous oscillation is used, and second to fourth harmonics of a fundamental wave are applied. Is preferred.
[0015]
When a non-single-crystal semiconductor film is irradiated with a continuously oscillating laser beam for crystallization, a solid-liquid interface is maintained and continuous crystal growth can be performed in the scanning direction of the laser beam.
[0016]
The configuration of the invention disclosed in this specification is:
A light-emitting device including a plurality of thin film transistors in a pixel portion provided over an insulating surface,
In the pixel portion, a first thin film transistor and a second thin film transistor which are connected to a pixel electrode included in an organic light emitting element are provided, and the first thin film transistor and the second thin film transistor are arranged such that a channel length direction is all the same. A light emitting device wherein the second thin film transistor is arranged.
[0017]
In addition, not only two TFTs (for example, a switching TFT and a driving TFT) for driving one pixel of the pixel portion, but also three cases (for example, a switching TFT, a driving TFT, and an erasing TFT). The present invention can be applied to other inventions of the present invention,
A light-emitting device including a plurality of thin film transistors in a pixel portion provided over an insulating surface,
In the pixel portion, a first thin film transistor, a second thin film transistor, and a third thin film transistor connected to a pixel electrode included in an organic light emitting element are provided so that channel length directions are all in the same direction. A light emitting device, wherein the first thin film transistor, the second thin film transistor, and the third thin film transistor are arranged.
[0018]
Further, the present invention can be applied to a case where three or more TFTs drive one pixel in the pixel portion. In each of the above structures, the present invention can be applied to a case where a pixel portion and a driver circuit are provided over the same substrate, and a driver circuit including a plurality of thin film transistors is provided over the insulating surface. It is characterized in that the thin film transistors are arranged so that the channel length directions are all in the same direction.
[0019]
Further, the present invention can be applied to a buffer circuit which is one circuit of a driver circuit, and a buffer circuit including a plurality of thin film transistors is provided over the insulating surface, and a channel length direction of the thin film transistors in the buffer circuit is in the same direction. It is characterized by being arranged so that it becomes.
[0020]
In each of the above structures, the channel length direction is the same as the scanning direction of the laser light applied to the semiconductor layer of the thin film transistor.
[0021]
In addition, the present invention provides a semiconductor film functioning as an active layer, a first electrode, and a thin film transistor sandwiched between the semiconductor film and the first electrode, as a thin film transistor of a pixel or a driver circuit in each of the light-emitting devices. A second electrode functioning as a gate electrode, and a second insulating film (gate insulating film) interposed between the semiconductor film and the second electrode. And the first electrode and the second electrode overlap each other with a channel formation region included in the semiconductor film interposed therebetween. Note that the semiconductor film has two impurity regions (a source region or a drain region) and a channel formation region sandwiched between the two impurity regions.
[0022]
Further, in the present invention, the first electrode always applies a constant voltage (common voltage) or is electrically connected to the second electrode to have the same potential. By doing so, the ON current (I _on ) Can be reduced.
[0023]
In the case of a TFT in which reduction in off-state current is more important than increase in on-state current, for example, a TFT used as a switching element, it is preferable to apply a constant voltage (common voltage) to the first electrode. When a constant voltage (common voltage) is applied to the first electrode, the constant voltage may be lower than the threshold voltage of the n-channel TFT when the thin-film transistor is an n-channel TFT. In that case, the threshold voltage may be higher than the threshold voltage of the thin film transistor. By applying a common voltage to the first electrode, variation in threshold value can be suppressed and off-state current can be suppressed as compared with the case where one electrode is provided.
[0024]
In the case of a TFT in which an increase in on-current is more important than a reduction in off-state current, for example, a TFT included in a buffer of a driver circuit, the first electrode and the second electrode are electrically connected to each other to have the same potential. It is preferable that When the first electrode and the second electrode are electrically connected to have the same potential, the same voltage is applied to the first electrode and the second electrode to substantially reduce the thickness of the semiconductor film. Since the depletion layer spreads quickly as in the case of thinning, the subthreshold coefficient (S value) can be reduced, and the field effect mobility can be further improved. Therefore, the ON current can be increased as compared with the case where the number of electrodes is one. Therefore, the driving voltage can be reduced by using a TFT having this structure in a driving circuit. Further, since the ON current can be increased, the size (particularly, channel width) of the TFT can be reduced. Therefore, the integration density can be improved.
[0025]
In the above-described thin film transistor, when a projection is formed on the surface of the first insulating film on which the semiconductor film is formed by the first electrode, unevenness is also formed on the surface of the semiconductor film under the influence of the projection. It is preferable that the first insulating film is flattened by chemical mechanical polishing because the crystal grain size may be varied in the crystallization step.
[0026]
Further, the configuration of the invention for realizing the above structure is as follows.
A first step of forming a first electrode on a substrate having an insulating surface;
A second step of forming a first insulating film on the first electrode;
A third step of performing a planarization process on the surface of the first insulating film;
A fourth step of forming a semiconductor film on the first insulating film;
A fifth step of irradiating the semiconductor film with continuous oscillation laser light;
A sixth step of forming a second insulating film on the semiconductor film;
A seventh step of performing a selective etching process on the first insulating film and the second insulating film to form a contact hole reaching the first electrode;
An eighth step of reducing impurities on the surface of the second insulating film;
A ninth step of electrically connecting to the first electrode through the contact hole and forming a second electrode overlying the semiconductor film on the second insulating film. It is a manufacturing method.
[0027]
Further, the configuration of another invention is as follows.
A first step of forming a first electrode on a substrate having an insulating surface;
A second step of forming a first insulating film on the first electrode;
A third step of performing a planarization process on the surface of the first insulating film;
A fourth step of forming a second insulating film on the first insulating film;
A fifth step of forming a semiconductor film on the second insulating film;
A sixth step of irradiating the semiconductor film with continuous oscillation laser light,
A seventh step of forming a third insulating film on the semiconductor film;
An eighth step of performing a selective etching process on the first insulating film, the second insulating film, and the third insulating film to form a contact hole reaching the first electrode;
A ninth step of reducing impurities on the surface of the third insulating film;
Forming a second electrode that is electrically connected to the first electrode through the contact hole and overlaps a part of the semiconductor film on the third insulating film. It is a manufacturing method.
[0028]
Further, the configuration of another invention is as follows.
A first step of forming a first electrode on a substrate having an insulating surface;
A second step of forming a first insulating film on the first electrode;
A third step of performing a planarization process on the surface of the first insulating film;
A fourth step of forming a semiconductor film on the first insulating film;
A fifth step of irradiating the semiconductor film with continuous oscillation laser light;
A sixth step of forming a second insulating film on the semiconductor film;
A seventh step of forming a second electrode overlying a part of the semiconductor film on the second insulating film;
An eighth step of forming a third insulating film on the second electrode;
A first contact hole that reaches the first electrode by selectively etching the first insulating film, the second insulating film, and the third insulating film; A ninth step of forming a second contact hole reaching
Forming a third electrode that is electrically connected to the first electrode and the second electrode through the first contact hole and the second contact hole. .
[0029]
Further, the configuration of another invention is as follows.
A first step of forming a first electrode on a substrate having an insulating surface;
A second step of forming a first insulating film on the first electrode;
A third step of performing a planarization process on the surface of the first insulating film;
A fourth step of forming a second insulating film on the first insulating film;
A fifth step of forming a semiconductor film on the second insulating film;
A sixth step of irradiating the semiconductor film with continuous oscillation laser light,
A seventh step of forming a third insulating film on the semiconductor film;
An eighth step of forming a second electrode overlying a part of the semiconductor film on the third insulating film;
A ninth step of forming a fourth insulating film on the second electrode;
Selectively etching the first insulating film, the second insulating film, the third insulating film, and the fourth insulating film to form a first contact hole reaching the first electrode; A tenth step of forming a second contact hole reaching the second electrode;
An eleventh step of forming a third electrode which is electrically connected to the first electrode and the second electrode through the first contact hole and the second contact hole. .
[0030]
In each structure of the method for manufacturing a semiconductor device, the planarization treatment is a chemical mechanical polishing called CMP.
[0031]
According to the present invention, a semiconductor device including a CPU can be completed.
A semiconductor device having a plurality of thin film transistors over a substrate having an insulating surface,
A central processing unit (also referred to as a CPU) including a control unit and a calculation unit on the substrate, wherein the central processing unit includes at least a first thin film transistor and a second thin film transistor; Wherein the channel length direction of the thin film transistor is the same as the channel length direction of the second thin film transistor. By doing so, further integration is possible, and the overall device can be reduced in size and the manufacturing cost can be reduced.
[0032]
In addition, a semiconductor device including a CPU and a memory on the same substrate can be completed.
A semiconductor device having a plurality of thin film transistors over a substrate having an insulating surface,
A central processing unit including a control unit and a calculation unit; and a storage unit (also referred to as a memory) on the substrate, wherein the storage unit includes at least a first thin film transistor and a second thin film transistor. A channel length direction of the first thin film transistor and a channel length direction of the second thin film transistor are the same.
[0033]
Further, a CPU and a display portion (including a pixel portion) may be formed over the same substrate, or a CPU, a memory, and a display portion (including a pixel portion) may be formed over the same substrate.
[0034]
In each of the above structures of the semiconductor device, the channel length direction is the same as a scanning direction of a laser beam applied to a semiconductor layer of the thin film transistor.
[0035]
In this specification, all layers formed between an anode and a cathode of an EL element are defined as an organic light emitting layer. The organic light emitting layer specifically includes a light emitting layer, a hole injection layer, an electron injection layer, a hole transport layer, an electron transport layer, and the like. Basically, an EL element has a structure in which an anode / light-emitting layer / cathode is laminated in this order. In addition to this structure, an anode / hole injection layer / light-emitting layer / cathode or an anode / hole injection layer is provided. In some cases, the light emitting layer has a structure in which the layers are stacked in the following order: a light emitting layer / an electron transport layer / a cathode.
[0036]
The EL element has a layer containing an organic compound (organic light emitting material) from which luminescence (Electroluminescence) generated by applying an electric field is obtained (hereinafter, referred to as an organic light emitting layer), an anode, and a cathode. Luminescence of an organic compound includes light emission (fluorescence) when returning from a singlet excited state to a ground state and light emission (phosphorescence) when returning from a triplet excited state to a ground state. Either one of the above-described light emissions may be used, or both light emissions may be used. Note that the organic light emitting layer may include an inorganic material.
[0037]
BEST MODE FOR CARRYING OUT THE INVENTION
An embodiment of the present invention will be described below.
[0038]
(Embodiment 1)
Hereinafter, a typical procedure for manufacturing a TFT will be briefly described with reference to FIGS.
[0039]
In FIG. 1A, 10 is a substrate having an insulating surface, 11 is a first electrode, and 12 is a first insulating film.
[0040]
First, a conductive film is formed on a substrate 10 and patterned to form a first electrode 11 made of a metal or an alloy. Typically, it is formed of an alloy of one or more selected from aluminum (Al), tungsten (W), molybdenum (Mo), tantalum (Ta), and titanium (Ti), or an alloy with silicon. it can. Alternatively, a stack of several conductive films may be used as the first electrode. The first electrode 11 has a thickness of 150 to 400 nm.
[0041]
The first electrode 11 is a scanning line connected to a gate electrode to be formed later. Note that the first electrode 11 can also function as a light-shielding layer that protects an active layer formed later from light. Here, a quartz substrate is used as the substrate 10, and a stacked structure of a polysilicon film containing phosphorus (thickness: 50 nm) and a tungsten silicide (W-Si) film (thickness: 100 nm) is used as the first electrode 11. The polysilicon film protects the substrate from contamination from tungsten silicide.
[0042]
Next, a first insulating film 12 (an insulating film such as a silicon oxide film, a silicon nitride film, or a silicon oxynitride film) covering the first electrode 11 is formed with a thickness of 100 to 1000 nm (typically 300 to 500 nm). I do. Here, a first insulating film A (12a) made of a silicon oxide film with a thickness of 100 nm using a CVD method and a first insulating film B (12b) made of a silicon oxide film with a thickness of 280 nm using a LPCVD method are used. Laminate. (Fig. 1 (A))
[0043]
Next, since the surface of the first insulating film 12 has unevenness due to the first electrode 11 formed earlier, the first insulating film 12 is subjected to a planarization process. (FIG. 1B) When the first insulating film is formed by laminating a plurality of insulating films, only the uppermost insulating film may be polished on the first electrode 11, or the lower layer may be polished. May be polished so that the insulating film is exposed.
[0044]
As the planarization treatment, a known technique for improving flatness, for example, a polishing step called chemical-mechanical polishing (hereinafter, referred to as CMP) may be used. In the case of using CMP, as the CMP polishing agent (slurry) for the first insulating film 12, for example, a material in which fumed silica particles obtained by thermally decomposing silicon chloride gas are dispersed in a KOH-added aqueous solution may be used. . The first insulating film is removed by about 0.1 to 0.5 μm by CMP to planarize the surface. Note that the surface of the first insulating film does not necessarily need to be polished. The level difference of the unevenness on the surface of the flattened first insulating film is preferably 5 nm or less, and more preferably 1 nm or less. With the improvement in flatness, the thickness of a first insulating film used as a gate insulating film formed later can be reduced, so that the mobility of the TFT can be improved. In addition, when a TFT is manufactured by improving flatness, off-state current can be reduced.
[0045]
Next, in order to remove impurities such as K (potassium) used in the CMP, the surface of the first insulating film is washed with an etchant containing hydrofluoric acid, and then a semiconductor film having a crystal structure (thickness: 10 to 100 nm) is removed. Form.
[0046]
Although a semiconductor film having a crystalline structure can be formed by an LPCVD method or the like, it is preferable to form a semiconductor film having an amorphous structure and then perform crystallization treatment. As the semiconductor film having an amorphous structure, a semiconductor material containing silicon as a main component is used, and typically, an amorphous silicon film or an amorphous silicon germanium film is used. It is formed by a method or a sputtering method.
[0047]
Here, in order to obtain a semiconductor film having a crystal structure, the laser processing apparatus shown in FIG. 5 is used to arrange the semiconductor layers shown in FIG. 6, and crystallization is performed by a scanning method shown in FIG.
[0048]
The illustrated laser processing apparatus includes a solid-state laser 51 capable of continuous oscillation or pulse oscillation, a lens 52 such as a collimator lens or a cylindrical lens for condensing a laser beam, a fixed mirror 53 that changes the optical path of the laser beam, and a laser beam. It comprises a galvano mirror 54 that scans radially in a two-dimensional direction, and a movable mirror 55 that receives the laser beam from the galvanomirror 54 and directs the laser beam to the irradiated surface of the mounting table 56. By crossing the optical axes of the galvanometer mirror 54 and the movable mirror 55 and rotating the mirrors in the illustrated θ direction, the laser beam can be scanned over the entire surface of the substrate 57 placed on the mounting table 56. The movable mirror 55 can also correct the beam shape on the irradiated surface by correcting the optical path difference as an fθ mirror. The laser processing apparatus shown in FIG. 5 can scan a laser beam in one axial direction of a substrate 57 placed on a mounting table 56 by a galvanometer mirror 54 and a movable mirror 55. Further, the laser processing apparatus shown in FIG. 5 can scan the laser beam simultaneously in two axial directions (X and Y directions) by adding a half mirror 58, a fixed mirror 59, a galvano mirror 60, and a movable mirror 61. With such a configuration, the processing time can be reduced. The galvanometer mirrors 54 and 60 may be replaced with polygon mirrors.
[0049]
Preferred as lasers are solid state lasers, YAG, YVO ₄ , YLF, YAl ₅ O ₁₂ A laser using a crystal obtained by doping Nd, Tm, and Ho into such a crystal is applied. The fundamental wave of the oscillation wavelength varies depending on the material to be doped, but oscillates at a wavelength of 1 μm to 2 μm. For crystallization of a semiconductor film having an amorphous structure, it is preferable to use the second to fourth harmonics of the oscillation wavelength in order to selectively absorb a laser beam in the semiconductor film. Typically, Nd: YVO ₄ A second harmonic (532 nm) or a third harmonic (355 nm) of a laser (a fundamental wave of 1064 nm) is applied. Continuous oscillation YVO with output 10W ₄ The laser light emitted from the laser is converted by a nonlinear optical element to obtain these harmonics. In addition, YVO ₄ There is also a method of emitting a harmonic by putting a crystal and a nonlinear optical element. Then, the laser light is preferably shaped into a rectangular or elliptical laser beam on the irradiation surface by an optical system, and the laser beam is irradiated on the object to be processed. The energy density at this time is 0.01 to 100 MW / cm ² Degree (preferably 0.1 to 10 MW / cm ² )is necessary. Then, irradiation is performed by moving the semiconductor film relatively to the laser light at a speed of about 0.5 to 2000 cm / s. Note that it is preferable to irradiate the surface of the semiconductor film obliquely so that the incident light and the reflected light on the back surface of the substrate do not interfere with each other. Therefore, it is desirable that the change in the reflectivity of the laser beam be within an angle of 5% or less.
[0050]
In addition, a gas laser such as an argon laser, a krypton laser, and an excimer laser can be used.
[0051]
The oscillation may be either pulse oscillation or continuous oscillation.However, in order to obtain a crystal grain having a large grain size by continuously growing a semiconductor film while maintaining a molten state of the semiconductor film, select a continuous oscillation mode. Is desirable.
[0052]
In the case where a TFT is formed from a semiconductor film having a crystal structure by being crystallized on a substrate by laser annealing, high field-effect mobility can be obtained by aligning the crystal growth direction with the carrier movement direction. That is, the field effect mobility can be substantially increased by making the crystal growth direction coincide with the channel length direction. When a continuous oscillation laser beam is applied to a semiconductor film having an amorphous structure for crystallization, the solid-liquid interface is maintained and continuous crystal growth can be performed in the scanning direction of the laser beam. is there. The direction in which the laser beam is scanned is not limited to one direction, and reciprocating scanning may be performed.
[0053]
FIG. 6 shows the relationship between the substrate 62 on which the TFT is formed later and the irradiation direction of the laser beam in detail. On the substrate 62 on which a TFT is to be formed later, a region where the pixel portion 63 and the drive circuit portions 64 and 65 are formed is indicated by a dotted line. Here, at the stage of crystallization, the semiconductor film having an amorphous structure is patterned as shown in FIG. 6 to form islands, and then crystallized by irradiation with laser light, and then patterned again. The shape is indicated by a dotted line. Thus, the semiconductor film 13 in FIG. 1C is formed.
[0054]
For example, the drive circuit portion 64 is a region where a scanning line drive circuit is formed, and a partially enlarged view 77 (a region surrounded by a chain line) shows a semiconductor region 74 of the TFT and a scanning direction of the laser beam 71. The semiconductor region 74 can have any shape, but in any case, the channel length direction is aligned with the scanning direction of the laser beam (the direction of the arrow in the figure). The drive circuit portion 65 extending in a direction intersecting with the drive circuit portion 64 is a region for forming a data line drive circuit, and matches the arrangement of the semiconductor regions 75 with the scanning direction of the laser beam 72 (enlarged view 78). ). The same applies to the pixel portion 63, and the laser beam 73 is scanned in the channel length direction with the arrangement of the semiconductor regions 76 aligned as shown in an enlarged view 79. Further, an insulating film may be formed before irradiation with a laser beam.
[0055]
Note that, without patterning, crystallization by laser light may be performed in a state where a semiconductor film having an amorphous structure is formed over the entire surface of the substrate. When a semiconductor film having an amorphous structure is formed on the entire surface, a semiconductor region for forming a TFT can be specified by an alignment marker or the like formed on an edge of the substrate.
[0056]
With reference to FIG. 7, a description will be given of a state of a process of crystallizing a semiconductor film having an amorphous structure over the entire surface of a substrate and forming an active layer of a TFT from the formed semiconductor film having a crystalline structure. FIG. 7 (1 -B) is a cross-sectional view, in which a first electrode 87 is formed over an insulating film 82 provided over a substrate 81 and over first insulating films 86 a and 86 b covering the first electrode. A semiconductor film 83 having an amorphous structure is formed. Note that when a glass substrate is used as the substrate 81, the insulating film 82 is an insulating film provided to prevent impurities such as alkali metals from diffusing from the substrate into the semiconductor film. Crystallization is performed by irradiation with the laser beam 80, so that a semiconductor film 84 having a crystal structure can be formed. The laser beam is obtained using the laser processing device shown in FIG. As shown in FIG. 7 (1 -A), the laser beam 80 scans according to the assumed position of the semiconductor region 85 of the TFT. The beam shape can be arbitrary, such as rectangular, linear, elliptical. When used for crystallization of a semiconductor film having an amorphous structure, the beam shape is preferably elliptical. Since the energy intensity of the laser beam condensed by the optical system is not always constant at the center and the end, it is desirable that the semiconductor region 85 does not reach the end of the beam.
[0057]
The scanning of the laser beam is not limited to scanning in one direction, but may be reciprocating scanning. In that case, it is also possible to change the laser energy density for each scan and to grow the crystal stepwise. In addition, it is possible to simultaneously perform a dehydration process that is often required when crystallizing amorphous silicon. First, scanning is performed at a low energy density, and after releasing hydrogen, the energy density is increased and the second scanning is performed. May be used to complete the crystallization.
[0058]
In such a laser beam irradiation method, a crystal having a large grain size can be grown by irradiating a continuous oscillation laser beam. Of course, it is necessary to appropriately set detailed parameters such as the scanning speed and energy density of the laser beam, but this can be realized by setting the scanning speed to 10 to 80 cm / sec. The crystal growth rate after melting-solidification using a pulsed laser is also said to be 1 m / sec. Growth becomes possible, and a large grain size of the crystal can be realized.
[0059]
Thereafter, as shown in FIG. 7 (2-A) and FIG. 7 (2-B) which is a cross-sectional view thereof, the formed crystalline semiconductor film is etched to form a semiconductor region 89 divided into islands. . After that, if necessary, a wiring, an interlayer insulating film, and the like may be formed to form an element.
[0060]
Note that when an EL module is manufactured, a plurality of TFTs having different functions are provided in a pixel portion. For example, even when a driving TFT for controlling a current flowing through an EL element and a switching TFT connected to a pixel electrode are provided, the channel length directions of all the TFTs are set to the same direction and coincide with the scanning direction of the laser beam. It is desirable to make it.
[0061]
In addition, the present invention is not limited to the above-described crystallization method using laser light, other laser crystallization methods, crystallization techniques using nickel as a metal element to promote crystallization of silicon, solid phase growth method, and the like. May be used in combination as appropriate.
[0062]
After the semiconductor film 13 is obtained by crystallization of the laser light, the surface of the semiconductor film is then washed with an etchant containing hydrofluoric acid to remove an oxide film or impurities. A second insulating film 14 to be formed is formed. (FIG. 1C) The surface cleaning and the formation of the second insulating film 14 are desirably performed continuously without exposure to the air.
[0063]
Next, a contact hole reaching the first electrode 11 is formed. Here, a mask made of a resist is formed using a known photolithography method, and selective etching is performed to form a contact hole. When removing the resist mask with buffered hydrofluoric acid (HF), impurities such as Na on the surface of the second insulating film 14 are removed simultaneously with the resist. (Fig. 1 (D))
[0064]
Next, a second electrode 15 that is electrically connected to the first electrode 11 through the contact hole is formed. When the first electrode 11 and the second electrode 15 are electrically connected, the closer the dielectric constants of the first insulating film 12 and the second insulating film 14 are, the more the field effect mobility and the The threshold coefficient can be reduced and the on-current can be increased.
[0065]
Next, an impurity element (P, As, or the like) which imparts n-type to the semiconductor, such as phosphorus, is added as appropriate to form an impurity region 13b serving as a source or drain region. The semiconductor film has a channel formation region 13a and an impurity region 13b sandwiching the channel formation region 13a. After adding phosphorus, heat treatment, intense light irradiation, or laser light irradiation is performed to activate the impurity elements. In addition, plasma damage to the second insulating film (gate insulating film) and plasma damage to the interface between the second insulating film (gate insulating film) and the semiconductor layer can be recovered simultaneously with the activation. In particular, it is very effective to activate the impurity element by irradiating the second harmonic of the YAG laser from the front surface or the back surface in an atmosphere at room temperature to 300 ° C. The YAG laser is a preferable activation means because of its low maintenance.
[0066]
In the subsequent steps, a third insulating film 16 is formed, hydrogenation is performed, a contact hole reaching the impurity region 13b is formed, and a wiring 17 serving as a source electrode or a drain electrode is formed to complete a TFT. (FIG. 1 (E))
[0067]
Further, in a portion where the first electrode 11 and the channel forming region 13a overlap, the thickness of the first insulating film 12 when the film thickness is uniform, the second electrode 15 and the channel forming region 13a. When the thickness of the second insulating film 14 is uniform in a portion where the second insulating film 14 overlaps, the closer the film thickness is, the smaller the field-effect mobility and the subthreshold coefficient and the larger the on-current. be able to. Assuming that the thickness of the first insulating film in the portion overlapping with the first electrode 11 is d1 and the thickness of the second insulating film in the portion overlapping with the second electrode 15 is d2, | d1-d2 | / d1 ≦ 0.1, and it is desirable to satisfy | d1−d2 | /d2≦0.1. More preferably, | d1−d2 | /d1≦0.05, and it is better to satisfy | d1−d2 | /d2≦0.05.
[0068]
Most preferably, in a state where the first electrode 11 and the second electrode 15 are not electrically connected, the threshold value of the thin film transistor when a ground voltage is applied to the first electrode 11, The first electrode 11 and the second electrode 15 are electrically connected after the threshold value of the thin film transistor when a ground voltage is applied to the electrode 15 is made substantially the same. By doing so, the field-effect mobility and the subthreshold coefficient can be made smaller, and the on-current can be made larger.
[0069]
With such a structure, channels (dual channels) can be formed above and below the semiconductor film, and the characteristics of the TFT can be improved.
[0070]
Further, a wiring for transmitting various signals or power can be formed simultaneously with the first electrode 11. Further, when combined with planarization treatment by CMP, there is no effect on a semiconductor film or the like formed thereover. In addition, high-density wiring can be realized by multilayer wiring.
[0071]
In addition, in the cross-sectional view on the left in FIG. 1E, a cross-sectional view along AA ′ is shown in a cross-sectional view on the right. Here, an example is shown in which the first electrode 11 and the second electrode 15 are directly connected, but a common voltage may be applied to one of the electrodes. By applying a common voltage to the first electrode, variation in threshold value can be suppressed and off-state current can be suppressed as compared with the case where one electrode is provided.
[0072]
There are known TFTs such as a top gate type (planar type) and a bottom gate type (inverted stagger type) depending on the arrangement of a semiconductor film, a gate insulating film, and a gate electrode. In any case, it is necessary to reduce the thickness of the semiconductor film in order to reduce the subthreshold coefficient. When a semiconductor film obtained by crystallizing an amorphous semiconductor film as used in a TFT is applied, the amorphous semiconductor film becomes thinner and the crystallinity deteriorates, and the effect of purely thinning the film is obtained. I can't. However, the first electrode and the second electrode are electrically connected, and the thickness of the semiconductor film is substantially reduced by overlapping the two electrodes above and below the semiconductor film as shown in FIG. In the same manner as described above, depletion is quickly caused with the application of a voltage, the field-effect mobility and the subthreshold coefficient can be reduced, and the on-current can be increased.
[0073]
Further, the present invention is not limited to the TFT structure of FIG. 1E. If necessary, a lightly doped drain (LDD) having an LDD region between a channel formation region and a drain region (or a source region) is provided. ) It is good also as a structure. In this structure, a region to which an impurity element is added at a low concentration is provided between a channel formation region and a source or drain region formed by adding an impurity element at a high concentration. This region is referred to as an LDD region. Calling. Further, a so-called GOLD (Gate-drain Overlapped LDD) structure in which an LDD region is overlapped with a gate electrode with a gate insulating film interposed therebetween may be used.
[0074]
Although the description has been made using the n-channel TFT here, it goes without saying that a p-channel TFT can be formed by using a p-type impurity element instead of the n-type impurity element.
[0075]
(Embodiment 2)
Here, an example in which a TFT is manufactured in a procedure different from that in Embodiment Mode 1 is shown in FIGS.
[0076]
2 (A) is the same as FIG. 1 (A), FIG. 2 (B) is the same as FIG. 1 (B), and is obtained according to Embodiment 1 up to the state of FIG. 2 (B). Just fine.
[0077]
After the state shown in FIG. 2B is obtained, a second insulating film 28 is formed. As the second insulating film 28, an insulating film containing silicon as a main component may be used. Next, a semiconductor film 23 is provided on the second insulating film 28 in the same procedure as in the first embodiment.
[0078]
Next, the surface of the semiconductor film is washed with an etchant containing hydrofluoric acid to remove an oxide film or impurities, and then a third insulating film 24 mainly containing silicon to be a gate insulating film is formed. (FIG. 2C) It is desirable that the surface cleaning and the formation of the second insulating film 24 be performed continuously without exposure to the air.
[0079]
Next, a contact hole reaching the first electrode 21 is formed. Here, a mask made of a resist is formed using a known photolithography method, and selective etching is performed to form a contact hole. When removing the resist mask with buffered hydrofluoric acid (HF), impurities such as Na on the surface of the third insulating film 24 are removed simultaneously with the resist. (FIG. 2 (D))
[0080]
Next, a second electrode 25 electrically connected to the first electrode 21 through the contact hole is formed. When the first electrode 21 and the second electrode 25 are electrically connected, the closer the dielectric constants of the second insulating film 22, the second insulating film 28, and the third insulating film 24 are, the closer they are. In addition, the field-effect mobility and the subthreshold coefficient can be reduced, and the on-current can be increased.
[0081]
Next, an impurity element imparting n-type to the semiconductor (P, As, or the like), here, phosphorus is added as appropriate to form an impurity region 23b to be a source or drain region. The semiconductor film has a channel formation region 23a and an impurity region 23b sandwiching the channel formation region 23a. After phosphorus is added, heat treatment, intense light irradiation, or laser light irradiation is performed to activate the impurity elements.
[0082]
In the subsequent steps, a fourth insulating film 26 is formed, hydrogenated, a contact hole reaching the impurity region 23b is formed, and a wiring 27 serving as a source electrode or a drain electrode is formed to complete a TFT. (FIG. 2 (E))
[0083]
Note that in the cross-sectional view on the left side in FIG. 2E, the cross-sectional view along AA ′ is shown in the right-side cross-sectional view.
[0084]
(Embodiment 3)
Here, an example in which a TFT is manufactured in a procedure different from that in Embodiment Mode 1 is shown in FIGS.
[0085]
3 (A) is the same as FIG. 1 (A), FIG. 3 (B) is the same as FIG. 1 (B), and FIG. 3 (C) is the same as FIG. 1 (C). 3 (C) may be obtained according to the first embodiment.
[0086]
After the state shown in FIG. 3C is obtained, the surface of the second insulating film (gate insulating film) 34 is washed, and then a second electrode 35 serving as a gate electrode is formed. Next, an impurity element which imparts n-type to the semiconductor (P, As, or the like), here, phosphorus is appropriately added to form an impurity region 33b to be a source or drain region. After the addition, heat treatment, intense light irradiation, or laser light irradiation is performed to activate the impurity elements. Next, a third insulating film 36 is formed to cover the second electrode 35, and hydrogenation is performed. (FIG. 3 (D))
[0087]
Next, a contact hole reaching the impurity region 33b, a contact hole reaching the first electrode 31, and a contact hole reaching the second electrode are formed. These contact holes may be formed simultaneously or separately. A wiring 37 serving as a source electrode or a drain electrode and a wiring 39 connecting the first electrode 31 and the second electrode 35 are formed to complete a TFT. (FIG. 3E) Further, the wiring 37 and the wiring 39 may be formed of the same material or may be formed separately.
[0088]
Note that in the cross-sectional view on the left side in FIG. 3E, the cross-sectional view along AA ′ is shown in the cross-sectional view on the right side.
[0089]
(Embodiment 4)
Here, an example in which a TFT is manufactured in a procedure different from that in Embodiment Mode 2 is shown in FIGS.
[0090]
4 (A) is the same as FIG. 2 (A), FIG. 4 (B) is the same as FIG. 2 (B), and FIG. 4 (C) is the same as FIG. 2 (C). 2B may be obtained in accordance with the first and second embodiments.
[0091]
After the state shown in FIG. 4C is obtained, the surface of the third insulating film (gate insulating film) 44 is washed, and then a second electrode 45 serving as a gate electrode is formed. Next, an impurity element (P, As, or the like) which imparts n-type to the semiconductor, such as phosphorus, is added as appropriate to form an impurity region 43b serving as a source or drain region. After the addition, heat treatment, intense light irradiation, or laser light irradiation is performed to activate the impurity elements. Next, a fourth insulating film 46 is formed to cover the second electrode 45, and hydrogenation is performed. (FIG. 4 (D))
[0092]
Next, a contact hole reaching the impurity region 43b, a contact hole reaching the first electrode 41, and a contact hole reaching the second electrode are formed. These contact holes may be formed simultaneously or separately. A wiring 47 serving as a source or drain electrode and a wiring 49 connecting the first electrode 41 and the second electrode 45 are formed to complete a TFT. (FIG. 4E) Further, the wiring 47 and the wiring 49 may be formed of the same material or may be formed separately.
[0093]
Note that in the cross-sectional view on the left side in FIG. 4E, a cross-sectional view taken along line AA ′ is shown in a cross-sectional view on the right side.
[0094]
(Embodiment 5)
Here, an example of a specific circuit configuration in the EL module is shown in FIGS.
[0095]
In FIG. 25A, reference numeral 620 denotes a pixel portion, and a plurality of pixels 621 are formed in a matrix. Reference numeral 622 denotes a signal line driving circuit, and 623 denotes a scanning line driving circuit.
[0096]
Note that in FIG. 25A, the signal line driver circuit 622 and the scan line driver circuit 623 are formed over the same substrate as the pixel portion 620; however, the present invention is not limited to this structure. The signal line driver circuit 622 and the scan line driver circuit 623 may be partly formed over a substrate different from the pixel portion 620, and may be connected to the pixel portion 620 via a connector such as an FPC. In FIG. 25A, the signal line driver circuit 622 and the scan line driver circuit 623 are provided one by one; however, the present invention is not limited to this structure. The number of the signal line driving circuits 622 and the number of the scanning line driving circuits 623 can be arbitrarily set by a designer.
[0097]
Note that in this specification, connection means electrical connection.
[0098]
In FIG. 25A, the pixel portion 620 includes signal lines S1 to Sx, power supply lines V1 to Vx, scanning lines G1 to Gy, a common potential (Vcom), or an arbitrary voltage (Vcom). _Y ) Is applied. Note that the number of signal lines and the number of power supply lines are not always the same. In addition to these wirings, another different wiring may be provided.
[0099]
The power supply lines V1 to Vx are maintained at a predetermined potential. Note that FIG. 25A illustrates the structure of a light-emitting device that displays a monochrome image; however, the present invention may be a light-emitting device that displays a color image. In that case, the heights of the potentials of the power supply lines V1 to Vx do not need to be all the same, and may be changed for each corresponding color.
[0100]
Further, the common potential (Vcom) or an arbitrary voltage (V _Y ) Is also connected to the constant current circuit 622d of the signal line drive circuit 622.
[0101]
FIG. 25B is a block diagram illustrating an example of a detailed structure of the signal line driver circuit 622 illustrated in FIG. 622a is a shift register, 622b is a storage circuit A, 622c is a storage circuit B, and 622d is a constant current circuit.
[0102]
The clock signal CLK and the start pulse signal SP are input to the shift register 622a. A digital video signal (Digital Video Signals) is input to the storage circuit A 622b, and a latch signal (Latch Signals) is input to the storage circuit B 622c. The constant signal current Ic output from the constant current circuit 622d is input to the signal line.
[0103]
A timing signal is generated by inputting the clock signal CLK and the start pulse signal SP from a predetermined wiring to the shift register 622a. The timing signal is input to each of the plurality of latches A (LATA_1 to LATA_x) included in the storage circuit A 622b. At this time, the timing signal generated in the shift register 622a may be buffer-amplified by a buffer or the like, and then input to the plurality of latches A (LATA_1 to LATA_x) included in the storage circuit A 622b.
[0104]
When a timing signal is input to the storage circuit A 622b, a 1-bit digital video signal input to a video signal line is sequentially written to each of the plurality of latches A (LATA_1 to LATA_x) in synchronization with the timing signal. Is retained.
[0105]
Note that here, when a digital video signal is taken into the storage circuit A 622b, the digital video signal is sequentially input to the plurality of latches A (LATA_1 to LATA_x) included in the storage circuit A 622b, but the present invention is limited to this configuration. Not done. The latches of the plurality of stages included in the storage circuit A 622b may be divided into several groups, and a so-called division drive in which digital video signals are input simultaneously in parallel for each group may be performed. The number of groups at this time is called a division number. For example, when the latch is divided into groups for every four stages, it is referred to as divided drive in four divisions.
[0106]
The time until the writing of the digital video signal to the latches of all the stages of the storage circuit A 622b is completed is called a line period. Actually, the line period may include a period obtained by adding a horizontal retrace period to the line period.
[0107]
When one line period ends, a latch signal (Latch Signal) is supplied to a plurality of latches B (LATB_1 to LATB_x) included in the storage circuit B 622c through a latch signal line. At this moment, the digital video signals held in the plurality of latches A (LATA_1 to LATA_x) included in the storage circuit A 622b are simultaneously written and held in the plurality of latches B (LATB_1 to LATB_x) included in the storage circuit B 622c. .
[0108]
Based on the timing signal from the shift register 622a, the next one bit of the digital video signal is sequentially written to the storage circuit A 622b which has finished sending the digital video signal to the storage circuit B 622c.
[0109]
During the second line period, the digital video signal written and stored in the storage circuit B 622c is input to the constant current circuit 622d.
[0110]
FIG. 27A shows a more detailed configuration of the current setting circuit C1. The current setting circuits C2 to Cx have the same configuration. FIG. 27B shows an equivalent circuit of SW and Inb in FIG. In FIG. 27B, wiring for forming a channel (dual channel) above and below a semiconductor film is directly connected to a gate electrode, and Vx = V _Y However, some or all of the wirings may be set to the common voltage (Vcom) or may be set to the ground. This makes it possible to suppress the variation in the threshold value and the off-state current as compared with the case where the number of the gate electrodes is one.
[0111]
The current setting circuit C1 has a constant current source 631, four transmission gates SW1 to SW4, and two inverters Inb1 and Inb2. Note that the polarity of the transistor 630 of the constant current source 631 is the same as the polarity of the transistors Tr1 and Tr2 of the pixel.
[0112]
Switching of SW1 to SW4 is controlled by a digital video signal output from LATB_1 included in the storage circuit B 622c. Note that the digital video signals input to SW1 and SW3 and the digital video signals input to SW2 and SW4 are inverted by Inb1 and Inb2. Therefore, when SW1 and SW3 are on, SW2 and SW4 are off, and when SW1 and SW3 are off, SW2 and SW4 are on.
[0113]
When SW1 and SW3 are on, a current Ic having a predetermined value other than 0 is input from the constant current source 631 to the signal line S1 via SW1 and SW3.
[0114]
Conversely, when SW2 and SW4 are on, current Ic from constant current source 631 is dropped to ground via SW2. The power supply potentials of the power supply lines V1 to Vx are supplied to the signal line S1 via SW4, and IcＩ0.
[0115]
Referring to FIG. 25B again, the above operation is simultaneously performed in all the current setting circuits (C1 to Cx) included in constant current circuit 622d within one line period. Therefore, the value of the signal current Ic input to all the signal lines is selected by the digital video signal.
[0116]
Next, a configuration of the scanning line driver circuit is described.
[0117]
Each of the scanning line driving circuits has a shift register and a buffer. In some cases, a level shifter may be provided.
[0118]
In the scan line driver circuit, a timing signal is generated by inputting the clock CLK and the start pulse signal SP to the shift register. The generated timing signal is buffer-amplified in a buffer and supplied to a corresponding scan line.
[0119]
The gate of the transistor of one line of pixels is connected to the scanning line. Since the transistors of the pixels for one line must be turned on all at once, a buffer capable of flowing a large current is used.
[0120]
Note that, instead of the shift register, another circuit that can select a scanning line, such as a decoder circuit, may be used.
[0121]
Note that the voltage of each scanning line may be controlled by a plurality of scanning line driving circuits respectively corresponding to each scanning line, or the voltage of some scanning lines or all the scanning lines may be controlled by one scanning line driving circuit. It may be controlled.
[0122]
Note that the signal line driver circuit and the scanning line driver circuit for driving the light emitting device of the present invention are not limited to the structure shown here.
[0123]
FIG. 26 illustrates an example of a detailed configuration of the pixel 621 illustrated in FIG. The pixel 21 illustrated in FIG. 26 includes a signal line Si (one of S1 to Sx), a scanning line Gj (one of G1 to Gy), a power supply line Vi (one of V1 to Vx), And a common voltage (Vcom) or an arbitrary voltage (V _Y ) Is applied.
[0124]
The pixel 621 includes a transistor Tr1 (first driving transistor or first transistor), a transistor Tr2 (second driving transistor or second transistor), and a transistor Tr3 (third driving transistor or third transistor). , A transistor Tr4 (first switching transistor or fourth transistor), a transistor Tr5 (second switching transistor or fifth transistor), a light-emitting element 624 containing an organic compound, and a storage capacitor 625. With the pixel configuration illustrated in FIG. 26, the magnitude of current flowing to the light-emitting element can be controlled without being affected by the characteristics of the TFT. In addition, by employing the pixel configuration shown in FIG. 26, a variation in luminance of a light emitting element between pixels due to a difference in TFT characteristics can be further suppressed, and an afterimage is hardly visually recognized. An apparatus can be provided.
[0125]
These transistors (Tr1, Tr2, Tr3, Tr4, Tr5) all have a common voltage (Vcom) or an arbitrary voltage (Vcom). _Y A channel (dual channel) is formed above and below the semiconductor film by the wiring to which is applied. This makes it possible to suppress the variation in the threshold value and the off-state current as compared with the case where the number of the gate electrodes is one. Here, all wirings are directly connected to the gate electrode, and Vx = V _Y However, some or all of the wirings may be set to the common voltage (Vcom) or may be set to the ground.
[0126]
The gate electrodes of the transistor Tr4 and the transistor Tr5 are both connected to the scanning line Gj.
[0127]
One of a source region and a drain region of the transistor Tr4 is connected to the signal line Si, and the other is connected to the drain region of the transistor Tr1. One of a source region and a drain region of the transistor Tr5 is connected to the signal line Si, and the other is connected to the gate electrode of the transistor Tr3.
[0128]
The gate electrodes of the transistor Tr1 and the transistor Tr2 are connected to each other. The source regions of the transistor Tr1 and the transistor Tr2 are both connected to the power supply line Vi.
[0129]
In the transistor Tr2, the gate electrode and the drain region are connected, and the drain region is connected to the source region of the transistor Tr3.
[0130]
The drain region of the transistor Tr3 is connected to a pixel electrode included in the light-emitting element 624. The light-emitting element 624 including an organic compound has an anode and a cathode. In this specification, the cathode is referred to as a counter electrode when the anode is used as a pixel electrode, and the anode is referred to as a counter electrode when the cathode is used as a pixel electrode. Call.
[0131]
The potential of the power supply line Vi (power supply potential) is maintained at a constant height. Also, the potential of the counter electrode is kept at a constant height.
[0132]
Note that the transistor Tr4 and the transistor Tr5 may be either an n-channel transistor or a p-channel transistor. However, the polarities of the transistor Tr4 and the transistor Tr5 are the same.
[0133]
The transistors Tr1, Tr2, and Tr3 may be either n-channel transistors or p-channel transistors. However, the polarities of the transistors Tr1, Tr2 and Tr3 are the same. When the anode is used as a pixel electrode and the cathode is used as a counter electrode, the transistors Tr1, Tr2, and Tr3 are p-channel transistors. Conversely, when the anode is used as a counter electrode and the cathode is used as a pixel electrode, the transistors Tr1, Tr2, and Tr3 are n-channel transistors.
[0134]
The storage capacitor 625 is formed between the gate electrode of the transistor Tr3 and the power supply line Vi. The storage capacitor 625 is provided to more reliably maintain a voltage (gate voltage) between the gate electrode and the source region of the transistor Tr3.
[0135]
In addition, a storage capacitor may be formed between the gate electrodes of the transistors Tr1 and Tr2 and the power supply line to more reliably maintain the gate voltages of the transistors Tr1 and Tr2.
[0136]
The channel length direction of only one of the TFT (Tr1 to Tr5) of the pixel portion and the TFT (SW1 to SW4, Inb1, Inb2) of the driving circuit is set to the same direction and coincides with the scanning direction of the laser beam. However, it is desirable that the channel length direction of all these TFTs be the same direction and coincide with the scanning direction of the laser beam.
[0137]
In addition, the present invention is not limited to the above-described crystallization method using laser light, other laser crystallization methods, crystallization techniques using nickel as a metal element to promote crystallization of silicon, solid phase growth method, and the like. May be used in combination as appropriate.
[0138]
This embodiment can be freely combined with any one of Embodiments 1 to 4.
[0139]
(Embodiment 6)
Here, an example in which a CPU and a memory are formed over a substrate having an insulating surface will be described with reference to FIGS.
[0140]
1001 is a central processing unit (called a CPU), 1002 is a control unit, 1003 is a calculation unit, 1004 is a storage unit (called a memory), 1005 is an input unit, and 1006 is an output unit (display unit etc.).
[0141]
The central processing unit 1001 is a combination of the arithmetic unit 1003 and the control unit 1002. The arithmetic unit 1003 performs arithmetic operations such as addition and subtraction, and logical operations such as AND, OR, and NOT. (logic unit, ALU), various registers for temporarily storing operation data and results, a counter for counting the number of input 1s, and the like. A circuit included in the arithmetic portion 1003, for example, an AND circuit, an OR circuit, a NOT circuit, a buffer circuit, a register circuit, or the like can be formed using a TFT. A semiconductor film that has been crystallized using the method described above may be manufactured as an active layer of a TFT. Also in the present embodiment, the channel length direction of the TFT constituting the calculation unit 1003 and the scanning direction of the laser beam are aligned.
[0142]
Further, the control unit 1002 executes a command stored in the storage unit 1004 and controls the entire operation. The control unit 1002 includes a program counter, an instruction register, and a control signal generation unit. The control unit 1002 can also be formed using a TFT, and a semiconductor film crystallized using continuous wave laser light may be manufactured as an active layer of the TFT. Also in the present embodiment, the channel length direction of the TFT constituting the control unit 1002 and the scanning direction of the laser beam are aligned.
[0143]
The storage unit 1004 is a place for storing data and instructions for performing calculations, and stores data and programs frequently executed by the CPU. The storage unit 1004 includes a main memory, an address register, and a data register. Further, a cache memory may be used in addition to the main memory. These memories may be formed of SRAM, DRAM, flash memory, or the like. In the case where the storage portion 1004 is also formed using a TFT, a semiconductor film crystallized using continuous wave laser light can be manufactured as an active layer of the TFT. Also in the present embodiment, the channel length direction of the TFT forming the storage unit 1004 and the scanning direction of the laser beam are aligned.
[0144]
The input unit 1005 is a device that takes in data and programs from the outside. The output unit 1006 is a device for displaying a result, typically a display device.
[0145]
By aligning the channel length direction of the TFT with the scanning direction of the laser beam, a CPU with less variation can be formed on the insulating substrate. Further, the CPU and the display portion can be formed over the same substrate. Also in the display unit, it is preferable that the channel length direction of the plurality of TFTs arranged in each pixel and the scanning direction of the laser beam are aligned.
[0146]
Further, the circuit design and the manufacturing process become complicated, but the CPU, the display portion, and the memory can be formed on the same substrate.
[0147]
According to the present invention, a semiconductor device with less variation in electric characteristics over an insulating substrate can be completed.
[0148]
This embodiment can be freely combined with any one of Embodiments 1 to 5. For example, the display portion provided with the TFT, the pixel structure, or the EL element described in Embodiments 1 to 5 and the CPU can be manufactured over the same substrate.
[0149]
The present invention having the above structure will be described in more detail with reference to a specific example applied to a semiconductor device typified by an active matrix light-emitting device in the following embodiments.
[0150]
(Example)
[Example 1]
A manufacturing process of the semiconductor device of the present invention will be described. Here, a method for manufacturing a TFT in a pixel portion is described in detail. In this embodiment, the TFT (switching TFT) used as a switching element has a common voltage (Vcom) or an arbitrary voltage Vx applied to the first electrode, and controls a current flowing through the organic light emitting element (TFT). Driving TFT) shows an example in which the first electrode and the second electrode are connected. Although this embodiment describes only a method for manufacturing a TFT in a pixel portion, a TFT for a driver circuit can be manufactured at the same time.
[0151]
8 to 11 used in the description of this embodiment are cross-sectional views for explaining a manufacturing process thereof. FIGS. 12 to 14 show top views corresponding to the manufacturing steps, and are described using common reference numerals for convenience of description. I do.
[0152]
In FIG. 8A, a substrate of any material can be used as long as it has an insulating surface and can withstand a processing temperature in a later step. Typically, a glass substrate, a quartz substrate, a ceramic substrate, or the like can be used. Alternatively, a silicon substrate, a metal substrate, or a stainless steel substrate on which an insulating film is formed may be used. Further, a plastic substrate having heat resistance enough to withstand the processing temperature of this embodiment may be used.
[0153]
On the insulating surface of the substrate 101, a first wiring 105 and first electrodes 103, 104, and 106 are formed. The first wiring and the first electrode are formed of one or more conductive materials selected from Al, W, Mo, Ti, and Ta. In this embodiment, W is used, but a stack of W on TaN may be used as the first wiring and the first electrode.
[0154]
After forming the first wiring 105 and the first electrodes 103, 104, and 106, a first insulating film 102 is formed. In this embodiment, the first insulating film 102 is formed by laminating two insulating films (a first insulating film A (102a) and a first insulating film B (102b)). The first insulating film A (102a) is formed using a silicon oxynitride film with a thickness of 10 to 50 nm. The first insulating film B (102b) is formed with a thickness of 0.5 to 1 μm using a silicon oxide film or a silicon oxynitride film.
[0155]
FIG. 12A is a top view of the pixel portion in FIG. A cross-sectional view along AA ′, BB ′, CC ′, and DD ′ corresponds to FIG. Note that the first electrodes 103 and 104 are part of the common wiring 200. The first electrode 106 is a part of the first wiring 105.
[0156]
The surface of the first insulating film 102 has unevenness due to the first wiring and the first electrode formed earlier. Preferably, it is desirable to flatten the unevenness. CMP is used as a flattening method. As the CMP polishing agent (slurry) for the first insulating film 102, for example, a material in which fumed silica particles obtained by thermally decomposing silicon chloride gas are dispersed in an aqueous KOH solution may be used. The first insulating film is removed by about 0.1 to 0.5 μm by CMP to planarize the surface.
[0157]
Thus, a planarized first insulating film 108 is formed as shown in FIG. 8B, and a semiconductor layer is formed thereover. The semiconductor layer is formed using a semiconductor having a crystal structure. This is obtained by crystallizing the amorphous semiconductor layer formed over the first insulating film 108. After the amorphous semiconductor layer is deposited, it is crystallized by heat treatment or laser light irradiation. The material of the amorphous semiconductor layer is not limited, but is preferably silicon or silicon germanium (Si _1-x Ge _x 0 <x <1, typically x = 0.001 to 0.05).
[0158]
In this embodiment, a semiconductor film having a crystal structure is formed by the method described in Embodiment Mode 1 using the laser processing apparatus shown in FIG. The semiconductor layers are arranged as described in Embodiment Mode 1, and the channel length direction of the semiconductor layer and the scanning direction of the laser light are made to coincide with each other.
[0159]
After that, the semiconductor layer is divided into islands by etching, and semiconductor films 109 to 111 are formed as illustrated in FIG.
[0160]
FIG. 12B shows a top view in FIG. 8C. A cross-sectional view along AA ', BB', CC ', and DD' corresponds to FIG. Note that FIG. 12B shows the laser beam and the direction in which the laser beam was scanned (the direction of the arrow in the figure).
[0161]
The first electrodes 103 and 104 overlap with the semiconductor film 109 with the planarized first insulating film 108 interposed therebetween. Further, the first electrode 106 overlaps with the semiconductor film 110 with the first insulating film 108 interposed therebetween. Note that the semiconductor film 111 is a semiconductor film for forming a capacitor, and overlaps with the first wiring 105 with the first insulating film 108 interposed therebetween.
[0162]
Next, a second insulating film 112 which covers the semiconductor films 109 to 111 is formed. The second insulating film 112 is formed using an insulator containing silicon by a plasma CVD method or a sputtering method. Its thickness is 40 to 150 nm.
[0163]
Then, a contact hole 113 is formed in the first insulating film 108 and the second insulating film 112, and a part of the first wiring 105 is exposed (FIG. 8D).
[0164]
Next, as illustrated in FIG. 9A, a conductive film is formed over the second insulating film 112 to form a second gate electrode and a second wiring. In the present invention, the second gate electrode is formed by stacking two or more conductive films. The first conductive film 120 formed over the second insulating film 112 is formed using nitride of a high melting point metal such as molybdenum or tungsten, and the second conductive film 121 formed thereon is formed with a high melting point metal or aluminum or It is formed of a low-resistance metal such as copper or polysilicon. Specifically, one or more nitrides selected from W, Mo, Ta, and Ti are selected as the first conductive film, and W, Mo, Ta, Ti, Al, and Cu are selected as the second conductive film. One or more selected alloys or n-type polycrystalline silicon is used. For example, the first conductive film 120 may be formed using TaN, and the second conductive film 121 may be formed using W. In the case where the second gate electrode and the second wiring are formed of a three-layer conductive film, the first layer may be Mo, the second layer may be Al, and the third layer may be TiN. The first layer may be W, the second layer may be Al, and the third layer may be TiN. By forming the wiring in multiple layers, the thickness of the wiring itself increases, so that the wiring resistance can be suppressed.
[0165]
Next, as shown in FIG. 9B, a first etching process is performed on the first conductive film 120 and the second conductive film 121 using a mask 122. By the first etching process, first-shaped electrodes 123 to 129 having tapered ends are formed (consisting of first conductive films 123a to 129a and second conductive films 123b to 129b). In the portion of the second insulating film 112 that is not covered with the electrodes 123 to 129 of the first shape, the surface is etched and thinned by about 20 to 50 nm.
[0166]
The first doping treatment is performed by an ion implantation method or an ion doping method of implanting ions without mass separation. Doping is performed using the first shape electrodes 124, 125, 126, and 129 as masks to form first-concentration one-conductivity-type impurity regions 151 to 153 in the semiconductor films 109 to 111. The first concentration is 1 × 10 ²⁰ ~ 1.5 × 10 ²¹ / Cm ³ And
[0167]
Next, a second etching process is performed as shown in FIG. 9C without removing the resist mask. In this etching treatment, the second conductive film is anisotropically etched to form electrodes 134 to 140 having second shapes (consisting of the first conductive films 134a to 140a and the second conductive films 134b to 140b). . The electrodes 134 to 140 of the second shape are formed such that the width thereof is reduced by this etching process, and the ends thereof are located inside the first concentration one conductivity type impurity regions 151 to 153 (second impurity regions). I do. As shown in the next step, the length of the LDD is determined by the receding width. The second shape electrodes 134 to 140 function as second electrodes.
[0168]
FIG. 13A is a top view of FIG. 9C. FIG. 13A is a cross-sectional view taken along AA ′, BB ′, CC ′, and DD ′. The electrodes 135 and 136 of the second shape are part of the electrodes 138 and 139 functioning as gate wirings. The electrodes 135 and 136 having the second shape and the first electrodes 103 and 104 overlap with each other with the first insulating film 108, the semiconductor film 109, and the second insulating film 112 interposed therebetween. The second-shaped electrode 140 and the first electrode 106 overlap with the first insulating film 108, the semiconductor film 110, and the second insulating film 112 therebetween.
[0169]
Further, the second shape electrode 140 is a part of the electrode 137 functioning as a second wiring. The second wiring 137 overlaps with the first wiring 105 with the second insulating film 112, the semiconductor film 111, and the first insulating film 108 interposed therebetween. The second wiring 137 is connected to the first wiring 105 via the contact hole 113. Further, the electrode 134 functions as a source wiring.
[0170]
Then, in this state, one-conductivity-type impurity is subjected to a second doping treatment to add one-conductivity-type impurity to the semiconductor films 109 to 111 (FIG. 9C). One conductivity type impurity regions (first impurity regions) 155, 156, 158, 159, 161, 162, 164, 165, 168, 169, 171, 172, 175, 176 of the second concentration formed by this doping process. Is formed. The first impurity regions 156, 158, 162, 164, 169, 171 and 175 overlap with the first conductive films 135a, 136a, 137a and 140a forming the electrodes 135, 136, 137 and 140 of the second shape. Formed in a self-aligned manner. Since the impurity added by the ion doping method is added by passing through the first conductive films 135a, 136a, 137a, and 140a, the number of ions reaching the semiconductor film is reduced and the concentration is necessarily low. Its concentration is 1 × 10 ¹⁷ ~ 1 × 10 ¹⁹ / Cm ³ It becomes. In addition, the first impurity regions 155, 159, 161, 165, 168, 172, and 176 form first conductive films 135a, 136a, 137a, and 140a that form the electrodes 135, 136, 137, and 140 of the second shape. It is formed in a self-aligned manner so as not to overlap with.
[0171]
In addition, by the second doping process, the channel formation regions 157, 163, 170, and 174 and the second impurity regions 154, 160, and 166 having a higher impurity concentration than the first-concentration one-conductivity-type impurity regions 151 to 153. , 167, 173, and 177 are formed.
[0172]
Next, as shown in FIG. 10A, a mask 143 made of a resist is formed, and a third doping process is performed. By this third doping process, third impurity regions 144 to 150 having a conductivity type opposite to the one conductivity type of the third concentration are formed in the semiconductor film 110. The third impurity region is divided into regions 146 and 148 that overlap the second shape electrode 140 and regions 144, 145, 149, and 150 that do not overlap. ²⁰ ~ 5 × 10 ²¹ / Cm ³ The impurity element is added in a concentration range of.
[0173]
Through the steps described above, regions in which impurities for controlling valence electrons are added to the respective semiconductor films are formed. The first electrodes 103, 104, and 106 and the second-shaped electrodes 135, 136, and 140 function as gate electrodes at positions overlapping the semiconductor film.
[0174]
After that, a step of activating the impurity element added to each semiconductor film is performed. This activation is performed by using a gas heating type instantaneous thermal annealing method. The heat treatment is performed in a nitrogen atmosphere at a temperature of 400 to 700 ° C, typically 450 to 500 ° C. Alternatively, a laser annealing method using the second harmonic (532 nm) of a YAG laser can be applied. In order to perform activation by laser light irradiation, the semiconductor film is irradiated with this light using the second harmonic (532 nm) of a YAG laser. Of course, not only the laser light but also the RTA method using a lamp light source is the same, and the semiconductor film is heated by radiation of the lamp light source from both sides or one side of the substrate.
[0175]
Thereafter, as shown in FIG. 11B, a passivation film 180 made of silicon nitride is formed to a thickness of 50 to 100 nm by a plasma CVD method, and a heat treatment at 410 ° C. is performed using a clean oven, and The hydrogen is released from the semiconductor film.
[0176]
Next, a third insulating film 181 made of an organic insulating material is formed over the passivation film 180. The reason for using the organic insulating material is to flatten the surface of the third insulating film 181. In order to obtain a more complete flat surface, it is desirable to flatten this surface by a CMP method. When the CMP method is used in combination, a silicon oxide film formed by a plasma CVD method, SOG (Spin on Glass), PSG, or the like formed by a coating method can be used for the third insulating film. Note that the passivation film 180 may be regarded as a part of the third insulating film 181.
[0177]
Next, as shown in FIG. 10C, contact holes are formed in the second insulating film 112, the passivation film 180, and the third insulating film 181, and wirings 182 to 186 are formed. This wiring is formed by stacking a titanium film and an aluminum film.
[0178]
FIG. 13B shows a top view in FIG. 10C. A cross-sectional view along AA ', BB', CC ', and DD' corresponds to FIG.
[0179]
The wiring 182 is connected to the source wiring 134 and the second impurity region 154. The wiring 183 is connected to the second impurity region 154 and the first wiring 137. The wiring 184 is connected to the gate wirings 138 and 139. The wiring 185 functions as a power supply line and is connected to the third impurity region 167 and the second impurity region 177. The wiring 186 is connected to the third impurity region 173.
[0180]
In the above steps, when the one conductivity type impurity region is n-type and the impurity region opposite to the one conductivity type is p-type, the n-channel TFT 202 serving as a switching TFT and the p-channel TFT 203 serving as a driving TFT are formed. It is formed. In this embodiment, an n-channel TFT is used for the switching TFT and a p-channel TFT is used for the driving TFT. However, the present invention is not limited to this configuration. The switching TFT and the driving TFT may be p-channel TFTs or n-channel TFTs. However, when the anode of the EL element is used as a pixel electrode, the driving TFT is preferably a p-channel TFT, and when the cathode of the EL element is used as a pixel electrode, the driving TFT is an n-channel TFT. desirable.
[0181]
Next, as shown in FIG. 11, a transparent conductive film containing indium tin oxide as a main component is formed to a thickness of 60 to 120 nm on the surface of the flattened third insulating film 181. After that, the transparent conductive film is etched to form a pixel electrode (third electrode) 188 connected to the wiring 186. FIG. 14 shows a top view immediately after the pixel electrode 188 of FIG. 11 is formed. FIG. 11 is a cross-sectional view taken along AA ′, BB ′, CC ′, and DD ′.
[0182]
In the n-channel TFT 202, the first impurity regions 156, 158, 162, and 164 function as LDDs, and the second impurity regions 164 and 166 function as source or drain regions. The n-channel type TFT 202 has a form in which two TFTs are connected in series with the second impurity region 160 inserted. The length of the LDD in the channel length direction is 0.5 to 2.5 μm, preferably 1.5 μm. The configuration of such an LDD is intended mainly to prevent TFT deterioration due to the hot carrier effect. In the p-channel TFT 203, the third impurity regions 167 and 163 function as source or drain regions.
[0183]
In the present embodiment, the common voltage is applied to the first electrodes 103 and 104 by constantly applying a constant voltage (common voltage) to the common wiring 200. This constant voltage is smaller than the threshold value in the case of the n-channel TFT, and is larger than the threshold value in the case of the p-channel TFT. By applying a common voltage to the first electrode, variation in threshold value can be suppressed and off-state current can be suppressed as compared with the case where one electrode is provided. The above structure is useful for a TFT formed as a switching element in a pixel portion of a semiconductor device, since reduction of off-state current is more important than increase of on-state current.
[0184]
Further, in this embodiment, in the driving TFT 203, by forming the pair of electrodes 106 and 140 electrically connected to each other by inserting the semiconductor film, the thickness of the semiconductor film is substantially reduced to half, and the gate voltage is reduced. Depletion progresses rapidly with the application, so that the field effect mobility can be increased and the subthreshold coefficient can be reduced. As a result, the driving voltage can be reduced by using the TFT having this structure as the driving TFT. Further, the current driving capability is improved, and the size (particularly, channel width) of the TFT can be reduced. Therefore, the integration density can be improved.
[0185]
Further, a capacitance is formed in a portion where the first wiring 105, the first insulating film 108, and the semiconductor film 111 overlap with each other. Further, a capacitance is formed in a portion where the second wiring 137, the second insulating film 112, and the semiconductor film 111 overlap with each other.
[0186]
Next, as shown in FIG. 11, a partition layer 190 covering the n-channel TFT 202 and the p-channel TFT 203 is formed over the third insulating film 181. Since it is difficult to perform wet processing (processing such as etching with a chemical solution or washing with water) on the organic compound layer and the cathode, the organic compound layer and the cathode are formed of a photosensitive resin material on the third insulating film in accordance with the position of the pixel electrode 188. A partition layer 190 is provided. The partition layer 190 is formed using an organic resin material such as polyimide, polyamide, polyimide amide, or acrylic. This partition layer 190 is formed so as to cover the edge of the pixel electrode. The end of the partition layer 190 is formed so as to have a taper angle of 45 to 60 degrees.
[0187]
The active matrix driving type light emitting device shown here is configured by arranging organic light emitting elements in a matrix. The organic light emitting device 195 includes an anode, a cathode, and an organic compound layer formed therebetween. The pixel electrode 188 becomes an anode when formed of a transparent conductive film. The organic compound layer 192 is formed using a combination of a hole-transport material having a relatively high hole mobility, an electron-transport material, and a light-emitting material. They may be formed in layers, or may be formed by mixing.
[0188]
The organic compound material is formed as a thin film layer having a total thickness of about 100 nm. Therefore, it is necessary to improve the flatness of the surface of ITO formed as the anode. When the flatness is poor, the cathode is short-circuited with the cathode formed on the organic compound layer in the worst case. As another means for preventing this, a method of forming an insulating film having a thickness of 1 to 5 nm can be adopted. As the insulating film, polyimide, polyimide amide, polyamide, acrylic, or the like can be used. The counter electrode (fourth electrode) 193 can be used as a cathode by being formed using a material such as an alkali metal or an alkaline earth metal such as MgAg or LiF.
[0189]
For the counter electrode 193, a material containing magnesium (Mg), lithium (Li), or calcium (Ca) having a small work function is used. Preferably, an electrode made of MgAg (a material in which Mg and Ag are mixed at a ratio of Mg: Ag = 10: 1) may be used. Other examples include a MgAgAl electrode, a LiAl electrode, and a LiFAl electrode. Further, as an upper layer, an insulating film 194 composed of a single layer selected from silicon nitride, an aluminum nitride oxide film represented by AlNxOy, an aluminum oxide film, or a DLC film, or a lamination thereof is 2 to 30 nm, preferably 5 to 10 nm. Formed with a thickness of The DLC film can be formed by a plasma CVD method, and can be formed to cover the edge of the partition layer 190 with good coverage even at a temperature of 100 ° C. or lower. The internal stress of the DLC film can be reduced by mixing a small amount of argon and can be used as a protective film. Then, the DLC film includes oxygen, CO, CO ₂ , H ₂ Since the gas barrier property of O or the like is high, it is suitable as the insulating film 194 used as a barrier film.
[0190]
In this embodiment, the source wiring and the gate wiring are formed at the same time, and thereafter, the wiring for supplying the drain current of the driving TFT to the pixel electrode and the power supply line are formed at the same time. The greater the thickness of the wiring, the greater the step created by the wiring. When the level difference becomes large, the possibility of disconnection of a wiring manufactured in a later step or deterioration of element characteristics is increased. Therefore, it is desirable that the thickness of the wiring be thinner as the wiring formed in the previous step. Since the power supply line is a wiring for supplying a current flowing to the organic light emitting element, it is desirable to increase the film thickness and reduce the resistance. In the light emitting device of this embodiment, since the power supply line is formed after the source wiring and the gate wiring are formed, the thickness of the power supply line can be further increased, and the resistance can be reduced.
[0191]
Further, in this embodiment, the source wiring is formed under the third insulating film at the same time as the gate wiring, and the pixel electrode is formed on the third insulating film. The source wiring and the pixel electrode can be overlapped without being directly connected. Therefore, the light emitting area of the organic light emitting device can be further increased.
[0192]
In this embodiment, a common voltage is applied to the first electrode of the switching TFT 202, and the driving TFT 203 is connected to the first electrode and the second electrode. However, the present invention is not limited to this configuration. The first electrode and the second electrode may be connected in the switching TFT 202, or a common voltage may be applied to the first electrode in the driving TFT 203.
[0193]
In the light emitting device of this embodiment, the switching TFT has a double gate structure (a structure including an active layer having two channel formation regions connected in series). Not limited. The switching TFT may have a single gate structure or a multi-gate structure such as a triple gate structure (a structure including an active layer having two or more channel forming regions connected in series). . Also, the driving TFT has a multi-gate structure (a structure including an active layer having two or more channel formation regions connected in series) such as a double gate structure and a triple gate structure instead of a single gate structure. May be.
[0194]
Further, in this embodiment, all the channel length directions of regions (referred to as channel forming regions) functioning as channels of a plurality of thin film transistors arranged in a pixel are arranged in the same direction, and scanning is performed in the same direction as the channel length direction. Since laser light irradiation is performed, high field-effect mobility can be obtained by aligning the crystal growth direction with the carrier movement direction.
[0195]
After the airtightness is improved by processing such as packaging, a connector (flexible printed circuit: FPC) for connecting the terminals routed from the elements or circuits formed on the substrate to the external signal terminals is attached to the product. Complete.
[0196]
A circuit diagram of the thin film transistor of this embodiment will be described with reference to FIG. Here, only a p-channel type TFT is typically shown. In the case of an n-channel TFT, the direction of the arrow is opposite to that of the p-channel TFT. FIG. 18A is a circuit diagram of a general thin film transistor having only one electrode. FIG. 18B shows a thin film transistor of this embodiment in which two electrodes sandwiching a semiconductor film are provided, and a constant voltage (common voltage Vcom or an arbitrary voltage Vx) is applied to one of the electrodes. FIG. FIG. 18C is a circuit diagram of a thin film transistor of this embodiment in which two electrodes sandwiching a semiconductor film are provided, and the two electrodes are electrically connected to each other.
[0197]
This embodiment can be freely combined with Embodiment Modes 1 to 6.
[0198]
[Example 2]
In this embodiment, a structure of a pixel of the light emitting device of the present invention which is different from that in Embodiment 1 will be described.
[0199]
FIG. 15 shows a top view of a pixel of the light emitting device of this embodiment. FIG. 16 is a cross-sectional view taken along AA ′, BB ′, and CC ′ in FIG. Note that, in FIG. 15, a partition layer, an organic light-emitting layer, a cathode, and a protective film, which are manufactured in a process after formation of a pixel electrode, are omitted for easy understanding of a pixel configuration.
[0200]
Reference numeral 301 denotes a switching TFT. In this embodiment, an n-channel TFT is used. A driving TFT 302 is a p-channel TFT in this embodiment. Note that the switching TFT and the driving TFT may be n-channel TFTs or p-channel TFTs.
[0201]
The switching TFT 301 includes first electrodes 306 and 307, a first insulating film 350 in contact with the first electrodes 306 and 307, a semiconductor film 303 in contact with the first insulating film 350, and a semiconductor film. There is a second insulating film 351 in contact with 303 and second electrodes 308 and 309 in contact with the second insulating film 351.
[0202]
One of a source region and a drain region 304 and 305 included in the semiconductor film 303 is connected to a source wiring 311 through a wiring 310, and the other is connected to a second wiring 313 through a wiring 312. The second wiring 313 is connected to the first wiring 314 via a contact hole.
[0203]
The first electrodes 306 and 307 overlap with the second electrodes 308 and 309 with the first insulating film 350, the semiconductor film 303, and the second insulating film 351 interposed therebetween.
[0204]
The driving TFT 302 includes a first electrode 321, a first insulating film 350 in contact with the first electrode 321, a semiconductor film 322 in contact with the first insulating film 350, and a semiconductor film 322. A second insulating film 351 and a second electrode 320 which is in contact with the second insulating film 351.
[0205]
The first electrode 321 is a part of the first wiring 314, and the second electrode 320 is a part of the second wiring 313.
[0206]
One of a source region and a drain region 323 and 324 included in the semiconductor film 322 is connected to a power supply line 326 through a wiring 325, and the other is connected to a pixel electrode 328 through a wiring 327.
[0207]
The first electrode 321 overlaps with the second electrode 320 with the first insulating film 350, the semiconductor film 322, and the second insulating film 351 interposed therebetween.
[0208]
In a portion where the power supply line 326 and the first wiring 314 overlap with the first insulating film 350 and the second insulating film 351 interposed therebetween, a storage capacitor is formed.
[0209]
330 is a common wiring to which a constant voltage is applied. The wiring 332 has second electrodes 308 and 309 in part, and is connected to the gate wiring 331 through contact holes formed in the first insulating film 350 and the second insulating film 351. .
[0210]
In this embodiment, the switching TFT 301 applies the common voltage to the first electrode even in the TFTs in the same pixel. By applying a common voltage to the first electrode, variation in threshold value can be suppressed and off-state current can be suppressed as compared with the case where one electrode is provided.
[0211]
In addition, the driving TFT 302 that allows a larger current to flow than the switching TFT electrically connects the first electrode and the second electrode. By applying the same voltage to the first electrode and the second electrode, the depletion layer spreads quickly as in the case where the thickness of the semiconductor film is substantially reduced, so that the subthreshold coefficient can be reduced. In addition, the field effect mobility can be further improved. Therefore, the ON current can be increased as compared with the case where the number of electrodes is one. Therefore, the driving voltage can be reduced by using a TFT having this structure in a driving circuit. Further, since the ON current can be increased, the size (particularly, channel width) of the TFT can be reduced. Therefore, the integration density can be improved.
[0212]
Note that the present invention is not limited to this configuration. The first electrode and the second electrode may be connected in the switching TFT, or a common voltage may be applied to the first electrode in the driving TFT.
[0213]
In the light emitting device of this embodiment, the switching TFT has a double gate structure (a structure including an active layer having two channel formation regions connected in series). Not limited. The switching TFT may have a single gate structure or a multi-gate structure such as a triple gate structure (a structure including an active layer having two or more channel forming regions connected in series). . Also, the driving TFT has a multi-gate structure (a structure including an active layer having two or more channel formation regions connected in series) such as a double gate structure and a triple gate structure instead of a single gate structure. May be.
[0214]
In this embodiment, the source wiring and the power supply line are formed at the same time, and thereafter, the wiring for supplying the drain current of the driving TFT to the pixel electrode and the gate wiring are formed at the same time. Since the source wiring and the power supply line are formed below the third insulating film 370 and the pixel electrodes are formed on the third insulating film, the source wiring and the power supply line can be formed without providing a new insulating film. The pixel electrodes can be overlapped without being directly connected. Therefore, the light emitting area of the organic light emitting device can be further increased.
[0215]
Further, in this embodiment, all the channel length directions of regions (referred to as channel forming regions) functioning as channels of a plurality of thin film transistors arranged in a pixel are arranged in the same direction, and scanning is performed in the same direction as the channel length direction. Since laser light irradiation is performed, high field-effect mobility can be obtained by aligning the crystal growth direction with the carrier movement direction.
[0216]
This embodiment can be freely combined with Embodiment Modes 1 to 6.
[0217]
[Example 3]
In the present embodiment, a circuit configuration of a semiconductor device corresponding to the first embodiment will be described. Although the switching TFT of the first embodiment has a double gate structure, here, for simplification, an equivalent circuit is shown with the switching TFT having a single gate structure.
[0218]
FIG. 17 shows a block diagram of a light emitting device of the present invention. FIG. 17 illustrates an example of a driving circuit of a light-emitting device that displays an image using a digital video signal. The light-emitting device illustrated in FIG. 17 includes a data line driver circuit 800, a scan line driver circuit 801, and a pixel portion 802.
[0219]
In the pixel portion 802, a plurality of source wirings, a plurality of gate wirings, and a plurality of power supply lines are formed, and a region surrounded by the source wiring, the gate wiring, and the power supply line corresponds to a pixel. Note that FIG. 17 representatively shows only a pixel having one source wiring 807, one gate wiring 809, and one power supply line 808 among a plurality of pixels. Each pixel includes a switching TFT 803 serving as a switching element, a driving TFT 804, a storage capacitor 805, and an organic light emitting element 806.
[0220]
The gate electrode of the switching TFT 803 is connected to a gate wiring 809. One of a source region and a drain region of the switching TFT 803 is connected to the source wiring 807, and the other is connected to the gate electrode of the driving TFT 804.
[0221]
One of a source region and a drain region of the driving TFT 804 is connected to the power supply line 808, and the other is connected to the organic light emitting element 806. A storage capacitor 805 is formed by the gate electrode of the driving TFT 804 and the power supply line 808.
[0222]
The data line driving circuit 800 includes a shift register 810, a first latch 811, and a second latch 812. The shift register 810 is supplied with a clock signal (S-CLK) and a start pulse signal (S-SP) for a data line driver circuit. The first latch 811 is provided with a latch signal (Latch signals) and a video signal (Video signals) for determining a latch timing.
[0223]
When the clock signal (S-CLK) and the start pulse signal (S-SP) are input to the shift register 810, a sampling signal that determines the timing of sampling the video signal is generated and input to the first latch 811.
[0224]
Note that the sampling signal from the shift register 810 may be buffer-amplified by a buffer or the like and then input to the first latch 811. The wiring to which the sampling signal is input has a large load capacitance (parasitic capacitance) because many circuits or circuit elements are connected thereto. This buffer is effective to prevent "dulling" of the rise or fall of the timing signal caused by the large load capacitance.
[0225]
The first latch 811 has a plurality of stages of latches. In the first latch 811, the input video signal is sampled in synchronization with the input sampling signal, and is sequentially stored in the latch of each stage.
[0226]
The time until the writing of the video signal to the latches of all the stages of the first latch 811 is completed is called a line period. Actually, the line period may include a period obtained by adding a horizontal retrace period to the line period.
[0227]
When one line period ends, a latch signal is input to the second latch 812. At this moment, the video signal written and held in the first latch 811 is simultaneously sent to the second latch 812, and written and held in the latches of all the stages of the second latch 812.
[0228]
Based on the sampling signal from the shift register 810, the video signal is sequentially written to the first latch 811 which has finished sending the video signal to the second latch 812.
[0229]
During this second line period, the video signal written and held in the second latch 812 is input to the source line.
[0230]
On the other hand, the scanning line driver circuit includes a shift register 821 and a buffer 822. The shift register 821 is supplied with a clock signal (G-CLK) and a start pulse signal (G-SP) for a scan line driver circuit.
[0231]
When a clock signal (G-CLK) and a start pulse signal (G-SP) are input to the shift register 821, a selection signal for determining a timing of selecting a gate wiring is generated and input to the buffer 822. The selection signal input to the buffer 822 is buffer-amplified and input to the gate wiring 809.
[0232]
When the gate wiring 809 is selected, the switching TFT 803 whose gate electrode is connected to the selected gate wiring 809 is turned on. Then, the video signal input to the source wiring is input to the gate electrode of the driving TFT 804 via the switching TFT 803 which is turned on.
[0233]
The switching of the driving TFT 804 is controlled based on information of 1 or 0 included in the video signal input to the gate electrode. When the driving TFT 804 is on, the potential of the power supply line is applied to the pixel electrode of the organic light emitting element 806, and the organic light emitting element 806 emits light. When the driving TFT 804 is off, the potential of the power supply line is not applied to the pixel electrode of the organic light emitting element 806, and the organic light emitting element 806 does not emit light.
[0234]
In a circuit included in the data line driver circuit 800 and the scan line driver circuit 801 in the light-emitting device illustrated in FIG. 17, a first electrode and a second electrode of a TFT are electrically connected. By applying the same voltage to the first electrode and the second electrode, the depletion layer spreads quickly as in the case where the thickness of the semiconductor film is substantially reduced, so that the subthreshold coefficient can be reduced. In addition, the field effect mobility can be further improved. Therefore, the ON current can be increased as compared with the case where the number of electrodes is one. Therefore, the driving voltage can be reduced. Further, since the ON current can be increased, the size (particularly, channel width) of the TFT can be reduced. Therefore, the integration density can be improved.
[0235]
In the pixel portion 802, a common voltage (Vcom) is applied to one of the first electrode and the second electrode of the switching TFT 803 used as a switching element. Alternatively, a voltage Vx at one of the first electrode and the second electrode may be applied. This makes it possible to suppress the variation of the threshold value and the off-state current as compared with the case where the number of electrodes is one.
[0236]
A driving TFT 804 for supplying a current to the organic light emitting element 806 electrically connects the first electrode and the second electrode. Thereby, the ON current can be increased as compared with the case where the number of electrodes is one. Note that the driving TFT is not limited to this configuration. A common voltage (Vcom) is applied to one of the first electrode and the second electrode without electrically connecting the first electrode and the second electrode. May be applied. Further, a thin film transistor having a general configuration having only one electrode may be provided.
[0237]
[Example 4]
In this embodiment, an example of a pixel structure different from that of the first embodiment will be described with reference to FIGS. The first embodiment is an example in which two TFTs (a driving TFT and a switching TFT) are used for a pixel. In the present embodiment, three TFTs (a driving TFT, a switching TFT, and an erasing TFT) are used for a pixel. This is an example used.
[0238]
FIG. 19A shows a detailed top structure of the pixel portion of the light emitting device of this embodiment, and FIG. 19B shows a circuit diagram thereof. FIGS. 19A and 19B use the same reference numerals and may be referred to each other.
[0239]
19, a switching TFT 900 provided on a substrate is formed using the switching (n-channel type) TFT 202 of FIG. Therefore, the description of the structure and the manufacturing method may be referred to the description of the switching (n-channel) TFT 202, and thus the description is omitted here. Further, a wiring denoted by 902 is a first gate electrode arranged below the semiconductor layer, and is connected to a common voltage (Vcom). The second gate electrode 901 (901a, 901b) disposed above the semiconductor layer is a gate wiring of the switching TFT 900.
[0240]
Although a double gate structure in which two channel formation regions are formed in this embodiment, a single gate structure in which one channel formation region is formed or a triple gate structure in which three channel formation regions are formed may be used.
[0241]
The source of the switching TFT 900 is connected to the source wiring 903, and the drain is connected to the drain wiring 904. Further, the drain wiring 904 is electrically connected to the second gate electrode 906 of the driving TFT 905. In the driving TFT 905, a first gate electrode disposed below a semiconductor layer is connected to a second gate electrode 906.
[0242]
Note that the driving TFT 905 is formed using the driving (p-channel type) TFT 203 in FIG. Therefore, for the description of the structure and the manufacturing method, the description of the driving (p-channel) TFT 203 may be referred to, and the description is omitted here. In this embodiment, a single gate structure is used, but a double gate structure or a triple gate structure may be used.
[0243]
The source of the current controlling TFT 905 is electrically connected to the current supply line 907, and the drain is electrically connected to the drain wiring 908. Further, the drain wiring 908 is electrically connected to a cathode 909 shown by a dotted line.
[0244]
A wiring (first gate electrode) denoted by 910 is a gate wiring electrically connected to the third gate electrode 912 of the erasing TFT 911. Although a connection portion is not shown, a first gate electrode 910 provided below the semiconductor layer is connected to a third gate electrode 912. Note that the source of the erasing TFT 911 is electrically connected to the current supply line 907, and the drain is electrically connected to the drain wiring 904.
[0245]
The erasing TFT 911 is formed in the same manner as the switching (n-channel type) TFT 202 in FIG. Therefore, for the description of the structure, the description of the switching (n-channel type) TFT 202 may be referred to.
[0246]
In this embodiment, a single gate structure is used, but a double gate structure or a triple gate structure may be used.
[0247]
Further, a storage capacitor (capacitor) is formed in a region 913. The capacitor 913 is formed between the semiconductor film 914 electrically connected to the current supply line 907, an insulating film (not shown) in the same layer as the gate insulating film, and the second gate electrode 906. Further, a capacitor formed by the gate electrode 906, the same layer (not shown) as the first interlayer insulating film, and the current supply line 907 can be used as a storage capacitor.
[0248]
Note that the light-emitting element 915 illustrated in the circuit diagram of FIG. 19B includes an anode 909, an organic compound layer (not illustrated) formed over the anode 909, and a cathode (not illustrated) formed over the organic compound layer. ). In the present invention, the anode 909 is connected to the source region or the drain region of the driving TFT 905.
[0249]
A counter potential is applied to the cathode of the light-emitting element 915. The power supply potential is applied to the current supply line V. The potential difference between the counter potential and the power supply potential is always kept at such a level that the light emitting element emits light when the power supply potential is applied to the anode. The power supply potential and the counter potential are provided to the light emitting device of the present invention by a power supply provided by an external IC or the like. Note that a power supply for providing a counter potential is particularly referred to as a counter power supply 916 in this specification.
[0250]
FIG. 20 corresponding to FIG. 19 shows the arrangement of the semiconductor layer of the pixel, the laser beam when the pixel is irradiated with laser light, and the direction in which the laser beam was scanned (the direction of the arrow in the figure). This makes it possible to obtain high field-effect mobility by aligning the crystal growth direction with the carrier movement direction.
[0251]
In this embodiment, an example in which the present invention is applied to a pixel using three TFTs has been described. However, it is needless to say that the present invention can be applied to a pixel using four or more TFTs.
[0252]
This embodiment can be freely combined with Embodiment Modes 1 to 6.
[0253]
[Example 5]
Example 1 In this example, characteristics of a TFT according to the present invention when the first electrode and the second electrode are electrically connected to each other will be described.
[0254]
FIG. 21A is a cross-sectional view of a TFT in which a first electrode and a second electrode of the present invention are electrically connected. For comparison, FIG. 21B is a cross-sectional view of a TFT having only one electrode. FIG. 22 shows the relationship between the gate voltage and the drain current obtained by simulation in the TFTs shown in FIGS. 21A and 21B.
[0255]
The TFT illustrated in FIG. 21A includes a first electrode 2801, a first insulating film 2802 in contact with the first electrode 2801, a semiconductor film 2808 in contact with the first insulating film 2802, and a semiconductor film 2808. The semiconductor device includes a second insulating film 2806 in contact with the second insulating film 2806 and a second electrode 2807 in contact with the second insulating film. The semiconductor film 2808 includes a channel formation region 2803, a first impurity region 2804 in contact with the channel formation region 2803, and a second impurity region 2805 in contact with the first impurity region 2804.
[0256]
The first electrode 2801 and the second electrode 2807 overlap with the channel formation region 2803 interposed therebetween. The same voltage is applied to the first electrode 2801 and the second electrode 2807.
[0257]
The first insulating film 2802 and the second insulating film 2806 are formed using silicon oxide. The first electrode and the second electrode are formed of Al. The channel length is 7 μm, the channel width is 4 μm, the thickness of the first insulating film in the portion where the first gate electrode and the channel formation region overlap is 110 μm, and the portion where the second gate electrode and the channel formation region overlap. The thickness of the second insulating film is 110 μm. The thickness of the channel formation region is 50 nm, and the length of the first impurity region in the channel length direction is 1.5 μm.
[0258]
In addition, 1 × 10 ¹⁷ / Cm ³ Is doped, and the first impurity region has 3 × 10 ¹⁷ / Cm ³ Is doped with an impurity imparting n-type, and 5 × 10 ¹⁹ / Cm ³ The impurity imparting n-type is doped.
[0259]
The TFT illustrated in FIG. 21B includes a first insulating film 2902, a second insulating film 2906, and a second electrode 2907 which is in contact with the second insulating film. The semiconductor film 2908 includes a channel formation region 2903, a first impurity region 2904 in contact with the channel formation region 2903, and a second impurity region 2905 in contact with the first impurity region 2904.
[0260]
The second electrode 2907 overlaps with the channel formation region 2903.
[0261]
The first insulating film 2902 and the second insulating film 2906 are formed using silicon oxide. The second electrode is formed of Al. The channel length is 7 μm, the channel width is 4 μm, and the thickness of the second insulating film in a portion where the second gate electrode and the channel formation region overlap is 110 μm. The thickness of the channel formation region is 50 nm, and the length of the first impurity region in the channel length direction is 1.5 μm.
[0262]
Further, 1 × 10 ¹⁷ / Cm ³ Is doped, and the first impurity region has 3 × 10 ¹⁷ / Cm ³ Is doped with an impurity imparting n-type, and 5 × 10 ¹⁹ / Cm ³ The impurity imparting n-type is doped.
[0263]
In FIG. 22, the horizontal axis represents the gate voltage, and the vertical axis represents the drain current. The value of the drain current with respect to the gate voltage of the TFT in FIG. 21A is indicated by a solid line, and the value of the drain current with respect to the gate voltage of the TFT in FIG. 21B is indicated by a broken line.
[0264]
From FIG. 22, the mobility of the TFT is 139 cm in FIG. ² / V · s and an S value of 0.118 V / dec. In FIG. 21B, the mobility of the TFT is 86.3 cm. ² / V · s and an S value of 0.160 V / dec. For this reason, when the first electrode and the second electrode are provided and the second electrode is electrically connected, the mobility increases and the S value decreases as compared with the case where only one electrode is provided. .
[0265]
[Example 6]
In Example 1, an example in which a semiconductor film having a crystal structure was formed by the method described in Embodiment 1 using the laser processing apparatus illustrated in FIG. 5 was described. An example of a second laser light irradiation treatment for reducing unevenness (also referred to as a ridge) on the surface of a semiconductor film formed by laser light and improving flatness will be described.
[0266]
After the semiconductor film is irradiated with the first laser light in an atmosphere containing oxygen to be crystallized, the oxide film formed by the irradiation with the first laser light is removed, and thereafter, the semiconductor film does not contain oxygen (or By performing irradiation with the second laser light (higher in energy density than irradiation with the first laser light) in an atmosphere in which the amount of oxygen is reduced, the flatness of the semiconductor film can be improved. Irradiation of the second laser light may be performed in an inert atmosphere (for example, nitrogen or argon) or in a vacuum.
[0267]
Specifically, the laser irradiation treatment (the treatment with the apparatus shown in FIG. 5) described in Example 1 is performed in an atmosphere containing oxygen to form a semiconductor film having a crystal structure, and then the oxide film on the surface is removed. The semiconductor film may be removed and subjected to a second laser irradiation treatment (treatment with the apparatus shown in FIG. 5) in a nitrogen atmosphere to planarize the surface of the semiconductor film. Even when the second laser irradiation process is performed, it is desirable that the laser beam be scanned in the same direction as the channel length direction.
[0268]
As the second laser light, a gas laser such as an excimer laser, an Ar laser, a Kr laser, a YAG laser, a YVO ₄ Laser, YLF laser, YAlO ₃ A solid-state laser such as a laser, a glass laser, a ruby laser, an Alexandrite laser, a Ti: sapphire laser, or a semiconductor laser may be used. Examples of the solid-state laser include YAG, YVO doped with Cr, Nd, Er, Ho, Ce, Co, Ti, or Tm. ₄ , YLF, YAlO ₃ A laser using a crystal such as the above can be used. The mode of laser oscillation may be any of continuous oscillation and pulse oscillation, and the shape of the laser beam may be any of linear, rectangular, circular, and elliptical. The wavelength to be used may be any of the fundamental wave, the second harmonic, and the third harmonic, and may be appropriately selected. Further, the scanning method may be any of a vertical direction, a horizontal direction, and an oblique direction, and may be reciprocated.
[0269]
Further, in the present embodiment, an example in which the first laser light and the second laser light are used by using the laser irradiation processing apparatus shown in FIG. 5 is shown. Light emitted from the laser irradiation processing apparatus shown in FIG. 5 may be used, and light emitted from the excimer laser irradiation processing apparatus may be used as the second laser light. Alternatively, light emitted from the excimer laser irradiation processing device may be used as the first laser light, and light emitted from the laser irradiation processing device shown in FIG. 5 may be used as the second laser light.
[0270]
The structure of the present embodiment is not particularly limited, and may be combined with another semiconductor film flattening means in addition to the flattening of the semiconductor film by the second laser beam. For example, etching (typically, dry etching) using an etchant solution or a reaction gas, heat treatment at a high temperature (900 to 1200 ° C.) in a reducing atmosphere (typically, hydrogen), and treatment for chemically and mechanically polishing. (Typically, CMP) or the like.
[0271]
By the technique of flattening by irradiating a plurality of laser beams described in this embodiment, flattening is further performed, and a first insulating film used as a gate insulating film to be formed later can be thinned. Mobility can be improved. In addition, when a TFT is manufactured due to improved flatness, off-state current can be reduced.
[0272]
This embodiment can be freely combined with any one of Embodiment Modes 1 to 6 and Embodiments 1 to 5.
[0273]
[Example 7]
The EL module formed according to the present invention can be used for, for example, a display portion to complete various electronic devices. That is, all the electronic devices incorporating the EL module are completed. In addition, by implementing the present invention, a CPU and the like can be manufactured over the same substrate at the same time as the display portion, and further, the size of the device can be reduced and the manufacturing cost can be reduced.
[0274]
Examples of such electronic devices include a video camera, a digital camera, a head-mounted display (goggle-type display), a car navigation, a car stereo, a personal computer, a portable information terminal (a mobile computer, a mobile phone, an electronic book, or the like). . Examples of these are shown in FIGS.
[0275]
FIG. 23A illustrates a personal computer, which includes a main body 2001, an image input portion 2002, a display portion 2003, a keyboard 2004, and the like. Further, a CPU included in the computer can be formed over an insulating substrate, and can be manufactured over the same substrate as the display portion 2003 formed over the insulating substrate.
[0276]
FIG. 23B illustrates a video camera, which includes a main body 2101, a display portion 2102, an audio input portion 2103, operation switches 2104, a battery 2105, an image receiving portion 2106, and the like.
[0277]
FIG. 23C illustrates a mobile computer (mobile computer), which includes a main body 2201, a camera unit 2202, an image receiving unit 2203, operation switches 2204, a display unit 2205, and the like. Further, a CPU included in the computer can be formed over an insulating substrate, and can be manufactured over the same substrate as the display portion 2205 formed over the insulating substrate.
[0278]
FIG. 23D illustrates a goggle-type display, which includes a main body 2301, a display portion 2302, an arm portion 2303, and the like.
[0279]
FIG. 23E illustrates a player using a recording medium on which a program is recorded (hereinafter, referred to as a recording medium), and includes a main body 2401, a display portion 2402, a speaker portion 2403, a recording medium 2404, operation switches 2405, and the like. The player can use a DVD (Digital Versatile Disc), a CD, or the like as a recording medium, and can enjoy music, movies, games, and the Internet.
[0280]
FIG. 23F illustrates a digital camera, which includes a main body 2501, a display portion 2502, an eyepiece portion 2503, operation switches 2504, an image receiving portion (not shown), and the like.
[0281]
FIG. 24A illustrates a mobile phone, which includes a main body 2901, an audio output portion 2902, an audio input portion 2903, a display portion 2904, operation switches 2905, an antenna 2906, an image input portion (CCD, image sensor, etc.) 2907, and the like. In addition, a CPU included in the computer can be formed over an insulating substrate, and can be manufactured over the same substrate as the display portion 2904 formed over the insulating substrate, so that a mobile phone with a built-in CPU can be completed.
[0282]
FIG. 24B illustrates a portable book (e-book) including a main body 3001, display portions 3002 and 3003, a storage medium 3004, operation switches 3005, an antenna 3006, and the like.
[0283]
FIG. 24C illustrates a display, which includes a main body 3101, a support 3102, a display portion 3103, and the like.
[0284]
Incidentally, the display shown in FIG. 24C is of a small, medium or large size, for example, a screen size of 5 to 20 inches. In addition, in order to form a display portion having such a size, it is preferable to use a substrate having a side of 1 m and mass-produce it by performing multi-paneling.
[0285]
As described above, the applicable range of the present invention is extremely wide, and the present invention can be applied to manufacturing methods of electronic devices in all fields. Further, the electronic device of this embodiment can be freely combined with any one of Embodiment Modes 1 to 6 and Embodiments 1 to 6.
[0286]
Example 8
In this embodiment, an example in which an electrophoretic display device is used as the display unit described in Embodiment 7 will be described. Typically, the present invention is applied to the display portion 3002 or the display portion 3003 of a portable book (electronic book) shown in FIG.
[0287]
Electrophoretic display devices (electrophoretic displays) are also called electronic paper, and have the same readability as paper, lower power consumption than other display devices, and the ability to be thin and light. ing.
[0288]
The electrophoretic display may be in various forms, and is formed by dispersing a plurality of microcapsules including first particles having a positive charge and second particles having a negative charge in a solvent or a solute. In addition, by applying an electric field to the microcapsules, the particles in the microcapsules are moved in opposite directions, and only the color of the particles gathered on one side is displayed. Note that the first particles or the second particles contain a dye and do not move in the absence of an electric field. The color of the first particles and the color of the second particles are different (including colorless).
[0289]
Thus, an electrophoretic display is a display that utilizes a so-called dielectrophoretic effect in which a substance having a high dielectric constant moves to a high electric field region. The electrophoretic display does not require a polarizing plate and a counter substrate required for the liquid crystal display device, and the thickness and weight are reduced by half.
[0290]
A solution in which the above microcapsules are dispersed in a solvent is referred to as electronic ink. This electronic ink can be printed on a surface of glass, plastic, cloth, paper, or the like. In addition, color display is possible by using particles having a color filter or a dye.
[0291]
In addition, an active matrix type display device is completed by arranging a plurality of the microcapsules so as to be sandwiched between two electrodes on an active matrix substrate, and display can be performed by applying an electric field to the microcapsules. it can.
[0292]
For example, the present invention can be applied to an active matrix substrate in which the thin film transistors connected to one electrode of a pixel are arranged in the same channel length direction. Alternatively, high field-effect mobility may be obtained by irradiating a laser beam that scans in the same direction as the channel length direction and aligning the crystal growth direction with the carrier movement direction.
[0293]
Note that the first particles and the second particles in the microcapsules are a conductor material, an insulator material, a semiconductor material, a magnetic material, a liquid crystal material, a ferroelectric material, an electroluminescent material, an electrochromic material, and a magnetophoretic material. One kind of material selected from the materials, or a composite material thereof may be used.
[0294]
This embodiment can be freely combined with any of Embodiment Mode 1, Embodiment 1, and Embodiment 7.
[0295]
[Example 9]
Here, an example of a top view of a pixel corresponding to the circuit diagram (FIG. 26) described in Embodiment 5 will be described with reference to FIGS.
[0296]
One pixel includes a transistor Tr1 (first driving transistor or first transistor), a transistor Tr2 (second driving transistor or second transistor), a transistor Tr3 (third driving transistor or third transistor), The transistor includes at least a transistor Tr4 (first switching transistor or fourth transistor), a transistor Tr5 (second switching transistor or fifth transistor), a light-emitting element, and a storage capacitor. Note that these TFTs (Tr1 to Tr5) can be obtained according to Embodiment Mode 1 or Example 1.
[0297]
Further, as shown in FIG. 26 which is an equivalent circuit of FIG. 28, all of the transistors Tr1 to Tr5 have wirings (including 777) for forming a channel (dual channel) above and below the semiconductor film directly with the gate electrode. Connected. That is, the semiconductor film is sandwiched between two gate electrodes. This makes it possible to suppress the variation in the threshold value and the off-state current as compared with the case where the number of the gate electrodes is one.
[0298]
The transistor Tr4 has a gate electrode 775 which is a part of the scanning line 774, and the gate electrode 775 is also connected to the gate electrode 720 of the transistor Tr5. Further, one of the impurity regions of the semiconductor layer of the transistor Tr4 is connected to the connection wiring 742 functioning as the signal line Si, and the other is connected to the connection wiring 771.
[0299]
The transistor Tr1 has a gate electrode 776, and the gate electrode 776 is also connected to the gate electrode 722 of the transistor Tr2. Further, one of the impurity regions of the semiconductor layer of the transistor Tr1 is connected to the connection wiring 771, and the other is connected to the connection wiring 743 functioning as the power supply line Vi.
[0300]
The connection wiring 743 is connected to a common impurity region of the transistor Tr2 and the transistor Tr3 and to a gate electrode 722 of the transistor Tr2.
[0301]
Reference numeral 770 denotes a storage capacitor, which includes a semiconductor layer 772, a gate insulating film 706, and a capacitor wiring 773. The impurity region included in the semiconductor layer 772 is connected to a connection wiring 747 functioning as a power supply line.
[0302]
Further, the pixel electrode 748 is formed in contact with the connection wiring 746 so as to be electrically connected to the drain region of the transistor Tr3.
[0303]
FIG. 29 is a diagram showing a state immediately after a semiconductor layer to be an active layer of each transistor is formed. The semiconductor layer of each transistor is arranged in one direction. By arranging the semiconductor layers in the same direction and setting the channel length direction and the scanning direction of the laser beam to be the same, the crystal growth direction and the carrier moving direction are aligned to obtain high field effect mobility. FIG. 29 also shows a laser beam 778 and a laser scanning direction 779.
[0304]
This embodiment can be freely combined with any one of Embodiment Modes 1 to 6 and Embodiments 1 to 8.
[0305]
[Example 10]
In this embodiment, a structure of a driving circuit (a signal line driving circuit and a scanning line driving circuit) included in a light emitting device of the present invention driven by an analog driving method will be described.
[0306]
FIG. 30A is a block diagram of the signal line driver circuit 401 of this embodiment. Reference numeral 402 denotes a shift register, 403 denotes a buffer, 404 denotes a sampling circuit, and 405 denotes a current conversion circuit. Here, wiring for forming a channel (dual channel) above and below the semiconductor film is directly connected to the gate electrode, and Vx = V _Y And a switch (SW) and an inverter (Inb) shown in FIG. Although an example using SW or Inb shown in FIG. 27B is shown here, a part or all of the wirings may be set to a common voltage (Vcom) or a ground.
[0307]
A clock signal (CLK) and a start pulse signal (SP) are input to the shift register 402. When a clock signal (CLK) and a start pulse signal (SP) are input to the shift register 402, a timing signal is generated.
[0308]
The generated timing signal is amplified or buffer-amplified in the buffer 403 and input to the sampling circuit 404. In the buffer 403, wiring for forming a channel (dual channel) may be provided above and below the semiconductor film. In addition, a region (referred to as a channel formation region) functioning as a channel of a plurality of thin film transistors provided in the buffer 403 is arranged in the same channel length direction, and irradiation with laser light that scans in the same direction as the channel length direction is performed. Then, a high field effect mobility may be obtained by aligning the crystal growth direction and the carrier movement direction. Note that a level shifter may be provided instead of the buffer to amplify the timing signal. Further, both a buffer and a level shifter may be provided.
[0309]
FIG. 30B illustrates a specific structure of the sampling circuit 404 and the current conversion circuit 405. Note that the sampling circuit 404 is connected to the buffer 403 at a terminal 410.
[0310]
The sampling circuit 404 is provided with a plurality of switches 411. An analog video signal is input to the sampling circuit 404 from the video signal line 406, and the switch 411 samples the analog video signal in synchronization with the timing signal, and inputs the sampled analog video signal to the current conversion circuit 405 in the subsequent stage. Note that in FIG. 30B, only the current conversion circuit connected to one of the switches 411 included in the sampling circuit 404 is shown as the current conversion circuit 405; however, FIG. It is assumed that the current conversion circuit 405 shown in FIG.
[0311]
In this embodiment, only one transistor is used for the switch 411. However, the switch 411 may be any switch that can sample an analog video signal in synchronization with a timing signal, and is not limited to the configuration of this embodiment.
[0312]
The sampled analog video signal is input to a current output circuit 412 included in the current conversion circuit 405. The current output circuit 412 outputs a current (signal current) having a value corresponding to the voltage of the input video signal. Although a current output circuit is formed using an amplifier and a transistor in FIG. 30, the present invention is not limited to this structure, and a circuit that can output a current having a value corresponding to the voltage of an input signal is used. I just want it.
[0313]
The signal current is input to a reset circuit 417 included in the current conversion circuit 405. The reset circuit 417 has two analog switches 413 and 414, an inverter 416, and a power supply 415.
[0314]
The reset signal (Res) is input to the analog switch 414, and the reset signal (Res) inverted by the inverter 416 is input to the analog switch 413. The analog switch 413 and the analog switch 414 operate in synchronization with the inverted reset signal and the reset signal, respectively, and when one is on, one is off.
[0315]
When the analog switch 413 is on, a signal current is input to a corresponding signal line. Conversely, when the analog switch 414 is on, the voltage of the power supply 415 is applied to the signal line, and the signal line is reset. Note that the voltage of the power supply 415 is desirably substantially the same as the voltage of the power supply line provided in the pixel. The closer the current flowing to the signal line is to 0 when the signal line is reset, the better. .
[0316]
It is desirable that the signal line be reset during the flyback period. However, if it is out of the period during which the image is displayed, it can be reset to a period other than the flyback period as needed.
[0317]
Note that instead of the shift register, another circuit such as a decoder circuit which can select a signal line may be used.
[0318]
Next, a configuration of the scanning line driver circuit is described.
[0319]
Each of the scanning line driving circuits has a shift register and a buffer. In some cases, a level shifter may be provided.
[0320]
In the scan line driver circuit, a timing signal is generated by inputting the clock CLK and the start pulse signal SP to the shift register. The generated timing signal is buffer-amplified in a buffer and supplied to a corresponding scan line.
[0321]
The gate of the transistor of one line of pixels is connected to the scanning line. Since the transistors of the pixels for one line must be turned on all at once, a buffer capable of flowing a large current is used.
[0322]
Note that, instead of the shift register, another circuit that can select a scanning line, such as a decoder circuit, may be used.
[0323]
Note that the voltage of each scanning line may be controlled by a plurality of scanning line driving circuits respectively corresponding to each scanning line, or the voltage of some scanning lines or all the scanning lines may be controlled by one scanning line driving circuit. It may be controlled.
[0324]
The signal line driver circuit and the scanning line driver circuit for driving the light emitting device of the present invention are not limited to the structure shown in this embodiment. The structure of this embodiment can be implemented by being freely combined with any of the structures described in Embodiment Modes 1 to 6, Example 8, and Example 9.
[0325]
[Example 11]
This embodiment shows a configuration of a current input type pixel which is different from that of Embodiment 5 in FIG.
[0326]
The pixel illustrated in FIG. 31A includes TFTs 511, 512, 513, and 514 having channels (dual channels) above and below a semiconductor film between a first gate electrode and a second gate electrode; a storage capacitor 515; A light-emitting element 516. These TFTs 511, 512, 513, and 514 can be obtained according to Embodiment Mode 5 or Example 1. In addition, as described in Embodiment Mode 5, the laser beam scanning in the same direction as the channel length direction of the regions functioning as the channels of the TFTs 511, 512, 513, and 514 is arranged in the same direction. Irradiation and aligning the crystal growth direction and the carrier movement direction can provide high field-effect mobility.
[0327]
The TFT 511 has a gate connected to the terminal 518, one of a source and a drain connected to the current source 517, and the other connected to the drain of the TFT 513. The TFT 512 has a gate connected to the terminal 519, one of a source and a drain connected to the drain of the TFT 513, and the other connected to the gate of the TFT 513. The gates of the TFTs 513 and 14 are connected to each other, and the sources are both connected to the terminal 520. The drain of the TFT 514 is connected to the anode of the light emitting element 516, and the cathode of the light emitting element 516 is connected to the terminal 521. The storage capacitor 515 is provided to hold a voltage between the gate and the source of the TFTs 513 and 514. A predetermined voltage is applied to each of the terminals 520 and 521 from a power supply, and has a voltage difference therebetween.
[0328]
After the TFTs 511 and 512 are turned on by the voltage applied to the terminals 518 and 519, the drain current of the TFT 513 is controlled by the current source 517. Here, the TFT 513 operates in the saturation region because the gate and the drain are connected, and the drain current is I = μC ₀ W / L (V _GS -V _TH ) ² / 2. Note that V _GS Is the gate voltage, μ is the mobility, C ₀ Is the gate capacitance per unit area, W / L is the ratio of the channel width W to the channel length L of the channel formation region, V _TH Is a threshold, and I is a drain current.
[0329]
In the above equation, μ, C ₀ , W / L, V _TH Are all fixed values determined by individual transistors. From the above equation, the drain current of the TFT 513 is equal to the gate voltage V _GS It can be seen that it changes according to. Therefore, according to the above equation, the gate voltage V has a value corresponding to the drain current. _GS Is generated in the TFT 513.
[0330]
At this time, since the gates and sources of the TFTs 513 and 514 are connected to each other, the gate voltage of the TFT 514 is maintained at the same level as the gate voltage of the TFT 513.
[0331]
Therefore, the drain currents of the TFT 513 and the TFT 514 are in a proportional relationship. In particular, μ, C ₀ , W / L, V _TH Are the same, the drain currents of the TFT 513 and the TFT 514 become the same. The drain current flowing through the TFT 514 is supplied to the light-emitting element 516, and the light-emitting element 516 emits light with a luminance corresponding to the magnitude of the drain current.
[0332]
Then, even after the TFTs 511 and 512 are turned off by the voltage applied to the terminals 518 and 519, the light-emitting element 516 continues to emit light as long as the gate voltage of the TFT 514 is held by the holding capacitor 515.
[0333]
As described above, the pixel illustrated in FIG. 31A includes a unit that converts a current supplied to the pixel into a voltage and holds the voltage, and a unit that supplies a current having a magnitude corresponding to the held voltage to the light emitting element. And A pixel configured to convert a current supplied to the pixel into a voltage and holding the converted voltage; a driving unit configured to flow a current having a magnitude corresponding to the held voltage to the light emitting element; And The current supplied to the pixel is converted into a voltage in the conversion unit, and the voltage is provided to the driving unit. The driving unit supplies a current having a magnitude corresponding to the applied voltage to the light emitting element.
[0334]
Specifically, in FIG. 31A, the TFT 512, the TFT 513, and the storage capacitor 515 correspond to a unit that converts a supplied current into a voltage and holds the voltage. Further, the TFT 514 corresponds to a unit for flowing a current of a magnitude corresponding to the voltage held in the light emitting element.
[0335]
FIG. 31B shows another pixel structure.
[0336]
The pixel illustrated in FIG. 31B includes a TFT 531, 532, 533, 534 having a channel (dual channel) above and below a semiconductor film between a first gate electrode and a second gate electrode; a storage capacitor 535; A light-emitting element 536. These TFTs 531, 532, 533, and 534 can be obtained according to Embodiment Mode 1 or Example 1. In addition, as described in Embodiment Mode 1, the channel length directions of the regions functioning as the channels of these TFTs 531, 532, 533, and 534 are arranged in the same direction, and the laser beam that scans in the same direction as the channel length direction Irradiation and aligning the crystal growth direction and the carrier movement direction can provide high field-effect mobility.
[0337]
The TFT 531 has a gate connected to the terminal 538, one of a source and a drain connected to the current source 537, and the other connected to the source of the TFT 533. The TFT 534 has a gate connected to the terminal 538, one of a source and a drain connected to the gate of the TFT 533, and the other connected to the drain of the TFT 533. The TFT 532 has a gate connected to the terminal 539, a source and a drain, one connected to the terminal 540, and the other connected to the source of the TFT 533. The drain of the TFT 534 is connected to the anode of the light emitting element 536, and the cathode of the light emitting element 536 is connected to the terminal 541. The storage capacitor 535 is provided to hold a voltage between the gate and the source of the TFT 533. A predetermined voltage is applied to each of the terminals 540 and 541 from a power supply, and has a voltage difference therebetween.
[0338]
After the TFT 531 and 534 are turned on by the voltage applied to the terminal 538 and the TFT 532 is turned off by the voltage applied to the terminal 539, the drain current of the TFT 533 is controlled by the current source 537. Here, the TFT 533 operates in a saturation region because the gate and the drain are connected, and the drain current is represented by the above equation. From the above equation, the drain current of the TFT 533 is equal to the gate voltage V _GS It can be seen that it changes according to. Therefore, according to the above, the gate voltage V corresponding to the drain current _GS Is generated in the TFT 533.
[0339]
The drain current flowing through the TFT 533 is supplied to the light-emitting element 536, and the light-emitting element 536 emits light at a luminance corresponding to the magnitude of the drain current.
[0340]
Then, after the TFTs 531 and 534 are turned off by the voltage applied to the terminal 538, the TFT 532 is turned on by the voltage applied to the terminal 539. At this time, as long as the gate voltage of the TFT 533 is held by the holding capacitor 535, the light-emitting element 536 continues to emit light at the same luminance as when the TFTs 531 and 534 were on.
[0341]
As described above, the pixel shown in FIG. 31B has a means for converting a current supplied to the pixel into a voltage, holding the voltage, and flowing a current having a magnitude corresponding to the held voltage to the light-emitting element. are doing. That is, in the case of the pixel shown in FIG. 31B, the function of the two units provided in FIG. 31A is covered by one unit. In FIG. 31B, the function of the conversion unit and the function of the drive unit are covered by one unit. That is, the current supplied to the pixel is converted into a voltage by the means that is the conversion unit and the driving unit, and then a current having a magnitude corresponding to the voltage is supplied to the light emitting element.
[0342]
Specifically, in FIG. 31B, the TFT 533, the TFT 534, and the storage capacitor 535 convert the supplied current into a voltage, hold the converted current, and supply a current having a magnitude corresponding to the held voltage to the light-emitting element. Is equivalent to
[0343]
In the pixels shown in FIGS. 31A and 31B described above, the magnitude of the current flowing through the light emitting element is controlled by the current source even if characteristics such as the threshold value and the on-current of the TFT vary from pixel to pixel. Variations in the luminance of the light emitting element between pixels can be prevented.
[0344]
In general, a light-emitting element emits light while maintaining a constant voltage between the electrodes, and emits light while maintaining a constant current between the electrodes. A decrease in luminance can be suppressed. Therefore, in the case of the current input type pixels illustrated in FIGS. 31A and 31B, the current flowing through the light emitting element can always be maintained at a desired value without being affected by the deterioration of the organic light emitting material. Accordingly, a decrease in luminance due to deterioration of the light emitting element can be suppressed.
[0345]
Further, the luminance of the light emitting element is proportional to the magnitude of the current flowing through the organic light emitting layer. Even if the temperature of the organic light emitting layer is affected by the outside air temperature, the heat generated by the light emitting panel itself, etc., the current flowing through the light emitting element can be kept constant in the current input type light emitting device, so that the luminance of the light emitting element changes. Can be suppressed, and current consumption can be prevented from increasing with an increase in temperature.
[0346]
In FIGS. 31A and 31B, the first gate electrode is directly connected to the second gate electrode, and Vx = V _Y However, some or all of the wirings may be set to the common voltage (Vcom) or may be set to the ground.
[0347]
The structure of this embodiment can be implemented by being freely combined with the structures described in Embodiment Modes 1 to 6 and Embodiments 1 to 10.
[0348]
【The invention's effect】
According to the invention, the channel length directions of regions (referred to as channel forming regions) functioning as channels of a plurality of thin film transistors arranged in a pixel are all arranged in the same direction, and laser light scanning in the same direction as the channel length direction is performed. Since irradiation is performed, high field-effect mobility can be obtained by aligning the crystal growth direction with the carrier movement direction.
[0349]
Further, according to the present invention, the characteristics of the TFT can be improved (specifically, the increase of the ON current and the reduction of the OFF current), and the variation in the characteristics of each TFT can be reduced. In particular, in a pixel, an ON current (I) of a TFT which is electrically connected to an EL element and supplies a current to the EL element. _on ) Can be reduced.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view illustrating a manufacturing process of a TFT. (Embodiment 1)
FIG. 2 is a cross-sectional view illustrating a manufacturing process of a TFT. (Embodiment 2)
FIG. 3 is a cross-sectional view illustrating a manufacturing process of a TFT. (Embodiment 3)
FIG. 4 is a cross-sectional view illustrating a manufacturing process of a TFT. (Embodiment 4)
FIG. 5 is a perspective view illustrating a laser processing apparatus. (Embodiment 1)
FIG. 6 is a top view illustrating an arrangement of semiconductor layers and a scanning direction of laser light. (Embodiment 1)
FIG. 7 is a cross-sectional view illustrating an arrangement of semiconductor layers and a scanning direction of laser light. (Embodiment 1)
FIG. 8 is a cross-sectional view illustrating a manufacturing process of a light-emitting device. (Example 1)
FIG. 9 is a cross-sectional view illustrating a manufacturing process of a light-emitting device. (Example 1)
FIG. 10 is a cross-sectional view illustrating a manufacturing process of a light-emitting device. (Example 1)
FIG. 11 is a cross-sectional view illustrating a manufacturing process of a light-emitting device. (Example 1)
FIG. 12 is a top view illustrating a manufacturing process of a light-emitting device. (Example 1)
FIG. 13 is a top view illustrating a manufacturing process of a light-emitting device. (Example 1)
FIG. 14 is a top view of a pixel of a light-emitting device. (Example 1)
FIG. 15 is a top view of a pixel of a light-emitting device. (Example 2)
FIG. 16 is a cross-sectional view of a pixel of a light-emitting device. (Example 2)
FIG. 17 is an equivalent circuit diagram of a light-emitting device. (Example 3)
FIG. 18 is an equivalent circuit diagram of a TFT of the present invention.
FIG. 19 is a top view of a pixel of a light-emitting device. (Example 4)
20A and 20B are a top view and a circuit diagram illustrating an arrangement of a semiconductor layer and a scanning direction of laser light. (Example 4)
FIG. 21 is a diagram showing a structure of a TFT used in a simulation. (Example 5)
FIG. 22 is a diagram showing characteristics of a TFT obtained by simulation. (Example 5)
FIG. 23 illustrates an example of an electronic device.
FIG. 24 illustrates an example of an electronic device.
FIG. 25 is an equivalent circuit diagram of a light-emitting device. (Embodiment 5)
FIG. 26 is an equivalent circuit diagram of a pixel. (Embodiment 5)
FIG. 27 is an equivalent circuit diagram of a current setting circuit. (Embodiment 5)
FIG. 28 is a top view of a pixel of a light-emitting device. (Example 9)
FIG. 29 is a top view illustrating an arrangement of semiconductor layers and a scanning direction of laser light. (Example 9)
FIG. 30 is a detailed diagram of a signal line driving circuit in an analog driving method (Embodiment 10).
FIG. 31 is an equivalent circuit diagram of a pixel. (Example 11)
FIG. 32 is a block diagram showing Embodiment 6;

Claims (4)

A semiconductor device having a plurality of thin film transistors over a substrate having an insulating surface,
A central processing unit including a control unit and a calculation unit on the substrate, the central processing unit including at least a first thin film transistor and a second thin film transistor, and a channel length of the first thin film transistor; A semiconductor device, wherein a direction and a channel length direction of the second thin film transistor are the same. A semiconductor device having a plurality of thin film transistors over a substrate having an insulating surface,
A central processing unit including a control unit and a calculation unit on the substrate, and a storage unit, wherein the storage unit includes at least a first thin film transistor and a second thin film transistor; A semiconductor device, wherein a channel length direction of the thin film transistor is the same as a channel length direction of the second thin film transistor. 3. The semiconductor device according to claim 1, wherein the channel length direction is the same as a scanning direction of a laser beam applied to a semiconductor layer of the thin film transistor. The semiconductor device according to claim 1, wherein the semiconductor device is a video camera, a digital camera, a display, a car navigation, a personal computer, or a personal digital assistant.

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