JP2004103695A - Thin aluminum alloy film for flat panel display, and sputtering target for forming thin aluminum alloy film - Google Patents

Thin aluminum alloy film for flat panel display, and sputtering target for forming thin aluminum alloy film Download PDF

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JP2004103695A
JP2004103695A JP2002261138A JP2002261138A JP2004103695A JP 2004103695 A JP2004103695 A JP 2004103695A JP 2002261138 A JP2002261138 A JP 2002261138A JP 2002261138 A JP2002261138 A JP 2002261138A JP 2004103695 A JP2004103695 A JP 2004103695A
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based alloy
thin film
film
alloy thin
alloy film
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JP4009165B2 (en
Inventor
Junichi Nakai
中井 淳一
Toshihiro Kugimiya
釘宮 敏洋
Yasushi Goto
後藤 裕史
Katsufumi Fuku
富久 勝文
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Kobe Steel Ltd
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Kobe Steel Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a thin Al based alloy film for use in the interconnect of an FPD in which electric resistivity can be reduced even in a low process temperature region while exhibiting excellent hillock tolerance and etching characteristics and can be used suitably as the interconnect/electrode for an LCD, and to provide a sputtering target for forming the thin Al alloy film. <P>SOLUTION: A low electric resistivity and more excellent hillock tolerance can be attained by selecting Si and Fe, or the like, as additional ingredients of the thin Al based alloy film and specifying the contents thereof appropriately. A thin Al based alloy film possessing these characteristics can be formed using a sputtering target satisfying the composition of these chemical components. <P>COPYRIGHT: (C)2004,JPO

Description

【0001】
【発明の属する技術分野】
本発明は、フラットパネルディスプレイ(液晶ディスプレイやプラズマディスプレイ,ELディスプレイ等)の配線膜または電極膜を構成するAl基合金薄膜に関し、特に薄膜トランジスタ型液晶ディスプレイに使用される電極膜等として好適な半導体デバイス電極用膜等や、これらを組み込んだ液晶パネル素子、更には当該薄膜を形成するためのスパッタリングターゲットに関するものである。
【0002】
【従来の技術】
半導体デバイスの一つである液晶ディスプレイ(以下、「LCD」という)は、従来の表示機器であるブラウン管を使用したものよりも薄型化,軽量化や低消費電力化を図ることができ、しかも高解像度が得られるという利点があることから、最近では表示機器として主流となってきている。斯かるLCDには、画素スイッチとなる薄膜トランジスタ(以下、「TFT」という)が組み込まれたTFT液晶が主に用いられる。
【0003】
このTFTの一部として使用される薄膜状の電極およびこれに連なる配線を構成するAl基合金薄膜には、低電気抵抗率の他にも様々な特性が要求される。
【0004】
例えば、LCDの製造段階における絶縁膜の成膜工程等では200〜400℃程度の熱履歴を受ける必要があるが、この際、薄膜の耐熱性が乏しい場合には、基板と薄膜との熱膨張係数の違いに起因する圧縮応力が駆動力となって突起物(ヒロック)が発生し、配線間で短絡や断線を引き起こす原因となる。従って、TFTの電極には、低電気抵抗率に加えて、優れたヒロック耐性も必要となる。
【0005】
従来、Al基合金の低電気抵抗率を達成するために、前記の熱履歴を利用して添加元素を析出させて固溶状態にある元素を減少せしめることによって、電気抵抗率を低減するような合金が検討されている。
【0006】
LCD配線膜等に用いられるAl合金としては、特許文献1や特許文献2に開示されている様な、Alに希土類金属や遷移金属を添加したAl合金を挙げることができる。特に特許文献1で提案されたAl−Nd合金は、低電気抵抗率のみならずヒロック耐性やボイド耐性,更には耐食性をも満足することから、広く実用化されている。
【0007】
しかしながら、近年、TFT液晶の高画質化や高精細化に伴いAl薄膜電極用配線の更なる低電気抵抗率化が求められており、また、素子のサイズを縮小する必要があるためにその熱ダメージを低減すべく、プロセス温度の低下(250℃未満)やプロセス時間の短縮化が求められる。従って、より低い温度での熱履歴でも低電気抵抗率が得られる様な合金が切望されている。例えば、特許文献1に記載されているAl−Nd合金の例では、充分な低電気抵抗率が得られるのはプロセス温度が300℃以上の場合であるが、200℃程度という低温のプロセス温度においても電気抵抗率が10μΩcm以下、更に300℃程度では6μΩcm以下という優れた低電気抵抗率を享有するAl合金配線膜材料が求められている。
【0008】
また、特許文献3には、Si,Cu,Zn,Mg,Mn,Zr,Fe,Mo,Tiを1種以上含むAl基合金が記載されている。しかし、FeとSiを複合添加することについては全く示唆も認識もされておらず、また、電気抵抗率等について一切の実験が為されておらず勿論データも記載されていない。
【特許文献1】
特許第2733006号公報
【特許文献2】
特許第2727967号公報
【特許文献3】
特開平8−179250号公報(請求項2等)
【0009】
【発明が解決しようとする課題】
本発明はこのような事情に着目して為されてものであって、その目的は、従来のAl基合金が有する上記問題点を解決し得る高機能の新規Al基合金薄膜、即ち、250℃未満という低プロセス温度域での熱履歴であっても電気抵抗率の低減が可能であると共に、従来のLCD配線・電極材料(Al−Nd合金など)と同様に耐熱性に優れていてヒロック等が生じ難く、また、耐食性や膜の密着性およびドライエッチング・ウェットエッチング特性(所定パターンへの加工性)に優れ、LCD用配線・電極等として好適に使用し得るAl基合金薄膜を提供し、更に当該Al合金薄膜を利用する素子、更には該薄膜を形成するためのスパッタリングターゲットを提供することにある。
【0010】
【課題を解決するための手段】
本発明者らは、上記課題を解決するために、Alに種々の元素を添加したAl合金スパッタリングターゲットを製造し、これらターゲットを使用したスパッタリング法により種々の化学成分組成を有するAl合金薄膜を形成し、夫々の組成を有する薄膜についてそのヒロック耐性,電気抵抗率およびエッチング特性などの諸特性を評価した。
【0011】
その結果、Fe,Co,Ndからなる群より選択される少なくとも1種とSiの複合添加がこれら諸特性の向上に有効であり、当該Al基合金薄膜は、FPD用配線・電極(LCD等でのゲートバスライン或いはソースバスライン用の薄膜配線、またはアクティブマトリックス型LCD等のスイッチング素子分での配線・電極など)の材料として優れた特性を享有することを見出し、本発明を完成するに至った。更に、FeとSiを複合添加したAl基合金は、ドライエッチング特性にも優れており、より高精細なパネルに適していることを見出した。
【0012】
即ち、本発明に係るAl基合金薄膜は、フラットパネルディスプレイの配線膜または電極膜を構成するAl基合金薄膜であって、Fe,Co,Ndからなる群より選択される少なくとも1種(「M」)およびSiを含有することを特徴とする。
【0013】
このAl基合金薄膜としては、Mの含有量が総量で0.1〜3%であり、Siの含有量が0.5〜3%であるものが好ましく、中でもMとしてのFe含有量が0.1〜3%であり、Siの含有量が0.5〜3%であるものは特に好ましい。また、MとSiの原子%比(M/Si)は0.15≦M/Si≦3とすることが好適である。
【0014】
上記Al基合金薄膜は、半導体デバイス電極用膜または半導体デバイス配線用膜や、フラットパネルディスプレイ用反射膜または反射電極膜として利用できる。また、これら電極用膜等や反射膜等は、液晶パネル素子に利用できる。
【0015】
更に、本発明に係るスパッタリングターゲットは、上記のAl基合金薄膜の化学成分組成を満足することを特徴とする。
【0016】
【発明の実施の形態】
本発明に係るAl基合金薄膜が有する最大の特徴は、低プロセス温度域における熱履歴を採用したFPD製造工程でも低電気抵抗率である上に、ヒロック耐性およびドライエッチング特性に優れている点にある。即ち、従来技術では250〜400℃程度の熱履歴により低電気抵抗率を得ていたが、本発明のAl基合金薄膜は250℃未満の熱履歴でも低電気抵抗率という優れた特性を享有することができる。
【0017】
以下に、斯かる特徴を発揮する本発明の実施形態、及びその効果について説明する。
【0018】
本発明のAl基合金薄膜は、Fe,Co,Ndからなる群より選択される少なくとも1種およびSiを含有すること必須要件とする。その理由は以下の通りである。
【0019】
Al基合金の熱履歴による低電気抵抗率化は、
(1)成膜時に過飽和に固溶していた添加元素の析出、および
(2)結晶粒成長による粒径の粗大化、
という膜組織の変化によってもたらされ、このうち特に(1)の固溶元素の析出(固溶状態にある元素の総固容量の低減)の影響が大きいことが知られている。従って、250℃未満という低いプロセス温度で低電気抵抗率化を実現するためには、低温度で速やかに固溶元素を析出させる必要がある。
【0020】
一方、ヒロックは、150〜180℃近傍で局所的に発生する。即ち、LCD用ガラス等の熱膨張率が低い基板上に形成されたAl合金薄膜は、温度の上昇と共に熱膨張率差に起因する大きな圧縮応力を受けるが、150〜180℃という低い温度域ではAl原子の体拡散(粒内拡散)速度が低いために、主に粒界拡散によってAl原子の輸送が生じる。その結果、ヒロックは粒界の三重点などで局所的に大きなサイズで発生することとなる。一方、200℃以上の場合には、Al原子の体拡散速度も上昇して移動度が増加するためにヒロックの発生サイトが広がって細かなサイズのヒロックが多数形成され、更に300℃以上では再結晶や塑性変形によって膜全体で応力緩和が生じるためにヒロックは殆ど発生しない。従って、低いプロセス温度(250℃未満)でヒロックの発生を抑制するには、粒界拡散によるAl原子の輸送を防止すべく、局所的なヒロックが発生する150〜180℃近傍で一定量以上の固溶元素が結晶粒内で固溶状態を維持することが必要となる。
【0021】
以上の通り、低いプロセス温度においてもAl基合金の低電気抵抗率化と共に優れたヒロック耐性を達成するためには、低温度で速やかに添加元素由来の化合物を析出させると共に、150〜180℃で一定以上の固溶元素を確保しなければならないという相矛盾する2つの性質を満たさなければならないことになり、技術的に困難である。
【0022】
そこで、本発明者らは、低い温度で析出し易いと同時に比較的ヒロック耐性に優れるFe,Co,Ndを添加元素として採用することとした。
【0023】
また、本発明者らは、Al基合金の低電気抵抗率化のためには結晶粒径を粗大化させることが良いという上記従来の知見に拘わらず、低プロセス温度を採用しFe,Co,Ndを添加せしめる場合には却って結晶粒の成長を抑制した方が低電気抵抗率を達成できることを新たに見出した。
【0024】
即ち、添加元素の析出は固溶した原子が粒界まで拡散する体拡散の過程と粒界を通じて粒界三重点などに凝集する過程があるが、200℃近傍という低温域では特に体拡散速度が律速となる。従って、固溶元素の粒界までの拡散距離を低下させる、つまり結晶粒成長を抑制し粒径を低減すれば添加元素は速やかに析出することとなり、固溶元素を原因とする電気抵抗率の上昇を防止することができる。
【0025】
Al基合金ではFe,Co,Ndの析出が220〜250℃において生じ、それに伴って結晶粒も成長することから、150℃以下の温度で速やかに粒界に析出して結晶粒の成長を抑制し、且つAlに対して殆ど固溶せず粒内に残留して電気抵抗率を増大させない様な元素を添加すれば、更なる低電気抵抗率を達成することができる。
【0026】
本発明者らは、斯かる観点から検討を行なった結果、Siが添加元素として非常に効果的であることを見出した。つまり、Fe,Co,Ndからなる群より選択される少なくとも1種およびSiを複合添加したAl基合金は、Siが有する結晶粒の成長抑制効果によりその析出温度域で極めて速やかに添加元素の析出が完了し、その結果、200℃の低温においても10μΩcm以下の低電気抵抗率が実現できる。特にAl−Fe−Si合金においては、Fe元素の析出が促進される結果、220〜250℃の温度域で微細なヒロックが発生して局所的なヒロックの発生が抑制されるため、優れたヒロック耐性を達成することができる。
【0027】
M(Fe,Co,Ndからなる群より選択される少なくとも1種)の含有量は、0.1〜3%が好ましい。0.1%未満ではヒロック耐性に効果がなく、一方、3%を超えると電気抵抗率の低減が困難となるからである。更に好ましい含有量は、0.5%以上2%以下である。また、MとしてはFeを含有するものが好ましい。上述した様に、Al−Fe−Si合金はヒロック耐性が非常に優れているからである。
【0028】
Siの含有量は、0.5〜3%が好ましい。0.5%未満では結晶粒の成長抑制効果が低く、一方、3%を超えると電気抵抗率の低減が困難となるからである。
【0029】
Siの含有量はMの含有量の増加と共に増加することが望ましい。Mの含有量に比してSi含有量が少ない場合には、Mが充分析出する前に結晶粒の成長が起こるためであり、また、Mに比して過剰に添加した場合には、結晶粒の成長抑制効果が飽和する上に、過剰なSiが低電気抵抗率化やドライエッチング特性を阻害するからである。従ってMとSiの比は過小或いは過大となることなく、0.15≦M/Si≦3であることが好ましい。
【0030】
本発明のAl基合金は、Al,M,Si以外にも不可避化合物を含有する場合があるが、当該合金も本発明の範囲に含まれる。
【0031】
ここで、「%」(原子%)は公知の方法により測定できるが、例えばICP発光分光分析法を使用することができる。
【0032】
ドライエッチングを行なう場合には、Si含有量を0.5〜2%とし、Ndおよび/またはCoが添加されるときはその量を0.1〜0.5%とすることが好ましい。この場合にSi含有量の好ましい上限を2%としたのは、成膜中に取り込まれる酸素やドライエッチング時の微量な酸素など不可避的に含まれる酸素によってSiが一部SiOとなることから、斯かる残留物の発生を抑制するためである。また、NdとCoでは、酸素の有無に関わらず添加量に比例して残留物が発生するため、その好ましい上限を0.5%とした。尚、FeはSi等に比べて酸化物を形成し難いため、ドライエッチングを行なう場合に関する特別な限定は必要とされない。
【0033】
本発明のAl基合金薄膜は以上の様に構成されており、低温度の熱履歴を経るのみであっても低電気抵抗率を達成でき、且つヒロック耐性やエッチング特性に優れている。従って、本発明のAl基合金薄膜は、フラットパネルディスプレイに使用される半導体デバイスの電極用膜や配線用膜、フラットパネルディスプレイ用反射膜または反射電極膜などに利用することができる。また、これら電極用膜や反射膜を用いた液晶パネル素子は、非常に有用性が高い。
【0034】
また、本発明のAl基合金薄膜は、同様の化学成分組成を満足するスパッタリングターゲットにより被覆できるため、当該スパッタリングターゲットも同様に有用性が高い。尚、当該スパッタリングターゲットの製造に用いる原料或いは製造時の雰囲気を原因としてターゲット中に不可避的に混入する不純物は、成膜状態に悪影響を及ぼすことから、Cを0.01wt%以下、Oを0.04wt%以下、Nを0.01wt%以下、Cuを0.005wt%以下に抑えることが好ましい。
【0035】
更に、本発明のAl基合金薄膜は、少なくとも片面に積層膜が積層されていてもよい。当該積層膜の例としては、例えば片面にMo/Al合金、他面にMoを積層するといった両面積層配線にして、TFT−LCDにおけるゲート電極若しくはソース電極やドレイン電極に用いることを挙げることができる。この場合、Mo積層膜等の膜厚は50〜200nm程度が好ましい。尚、当該積層膜についても特にその成膜法を限定するものではなく、Al基合金薄膜の形成と同様に、スパッタリング法や真空蒸着法、イオンプレーティング法、CVD法等によって蒸着形成することも可能である。
【0036】
【実施例】
以下に、実施例を挙げて本発明を具体的に説明するが、本発明はもとより下記実施例によって制限を受けるものではなく、前後記の趣旨に適合し得る範囲で適当に変更を加えて実施することも可能であり、それらは何れも本発明の技術的範囲に含まれる。
【0037】
(実施例1)
スプレイフォーミング法によって、FeおよびSiを所定量含有するAl合金よりなるスパッタリングターゲット(溶製Al−Fe−Si合金スパッタリングターゲット)を製造した。
【0038】
このスパッタリングターゲットを用い、DCマグネトロンスパッタリング法によって直径6インチ,厚さ0.5mmの無アルカリガラス(コーニング社製1737ガラス)上に堆積した厚さ200nmのCVDシリコン酸化膜上に厚さ300nmのAl薄膜合金(Al−Fe−Si合金薄膜)を蒸着して形成した。
【0039】
前記Al合金薄膜は、下表1に示す範囲内で夫々の含有量を変化させた。膜中の添加元素量は、ICP発光分光分析法を用いて測定した。
【0040】
(実施例2)
FeをNdに変更した他は上記実施例1と同様の方法によって、Al−Nd−Si合金薄膜を形成した。
【0041】
(実施例3)
FeをCoに変更した他は上記実施例1と同様の方法によって、Al−Co−Si合金薄膜を形成した。
【0042】
(比較例1)
上記実施例1と同様の方法によってAl−Fe系,Al−Si系,Al−Nd系,Al−Co系,Al−Ti系,Al−Ti−Si系の合金薄膜を形成した。
【0043】
(試験例1)
合金薄膜の電気抵抗率測定用サンプルを以下の手順で作製した。上記実施例および比較例にて作成した薄膜表面上にg線のフォトリソグラフィーによってポジ型フォトレジスト(ノボラック系樹脂:東京応化工業製のTSMR−8900,厚さ1.0μm)を線幅10μmのストライプ状に形成した。そしてウェットエッチングにより線幅100μm,線長10mmの電気抵抗率測定用パターン状に加工した。ウェットエッチにはHPO:HNO:HO=75:5:20の混合液を用いた。これに熱履歴を与えるため、前記エッチング処理後に、ホットウォール方式の熱処理炉を用いて、上記薄膜に200℃または300℃において60分保持する真空熱処理(真空度:2.0×10−6Torr以下)を行なった。
【0044】
(試験例2)ヒロック耐性の測定
上記電気抵抗率測定用サンプルの作製法と同様の方法で線幅10μmのストライプパターン形状に加工した後、300℃において60分保持する真空熱処理(真空度:2.0×10−6Torr以下)を行なった。
【0045】
次に、ストライプパターン表面部分およびパターンの横断面部分(サイド部)に発生するヒロック(半球状の突起物)数を、200倍の光学顕微鏡の視野内で測定し、ヒロック密度(単位面積当たりのヒロック数)を求めた。
【0046】
ヒロック耐性の判定基準は、ヒロック密度が1.0×10−7個/m未満の場合を○,(1.0〜50)×10−7個/mの場合を△,50×10−7個/mを超える場合を×とした。
【0047】
(試験例3)ドライエッチング性の評価
エッチング装置はTCP(Transfer Coupled Plasma)タイプを使用し、平板上の誘導窓を介して13.56MHzの高周波電力を導入した。プロセスガスはCl/BClを使用した。
【0048】
エッチング条件は、Cl/BCl=120/60sccm,アンテナに印加する電力を500W,基板バイアスを40W,プロセス圧力を13mTorr,基板温度をサセプタの温度とし、20℃とした。
【0049】
ドライエッチング性の評価は、1万倍のSEM観察像中で、残渣がない場合を○,一部に島状の残渣がある場合を△,全面に連続した残さがある場合を×とした。
【0050】
(結果と考察)
実施例1〜3および比較例1の結果を、下表1に示す。
【0051】
【表1】

Figure 2004103695
【0052】
当該結果によれば、本発明のAl基合金であるAl−Fe−Si系,Al−Nd−Si系,Al−Co−Si系の何れも(実施例1〜3)、Siを添加しない比較例に比して、200℃および300℃における電気抵抗率が明らかに低減されている。これは、Siが有する結晶粒の成長抑制効果によると考えられる。また、Al−Fe−Si系で比較すると、Fe/Siの値が小さいほど(Si量が相対的に多い程)電気抵抗率を低減できる傾向があることが分かる。
【0053】
また、Feを含むAl基合金では、Al−Fe二元系でヒロック耐性が△であるのに対し、単独ではヒロック耐性に効果のないSiを複合添加することによって、ヒロック耐性を向上できることが見出された。これは、Si添加によってより速やかにFeの析出が起こった結果、200〜300℃の温度域で表面全体に亘る微細なヒロックが発生し、局所的なヒロックの発生が抑制されたことに起因すると考えられる。
【0054】
ドライエッチング性に関しては複合添加による影響は少なく、夫々の添加元素の影響がそのまま複合添加時にも反映されていることが分かる。
【0055】
【発明の効果】
本発明のAl基合金薄膜は、低プロセス温度での熱履歴においても低電気抵抗率を達成でき、その上ヒロック耐性やエッチング特性にも非常に優れている。従って、本発明のAl基合金薄膜をフラットパネルディスプレイの配線膜や電極膜として利用すれば、高画質で高精細の液晶を得ることができることから、産業上極めて有用である。
【0056】
また、当該Al基合金薄膜の化学成分組成を満足するスパッタリングターゲットは、フラットパネルディスプレイの配線等に本発明に係るAl基合金薄膜を被覆できることから、同様に産業上の有用性が非常に高い。[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to an Al-based alloy thin film constituting a wiring film or an electrode film of a flat panel display (a liquid crystal display, a plasma display, an EL display, etc.), and particularly to a semiconductor device suitable as an electrode film used for a thin film transistor type liquid crystal display. The present invention relates to an electrode film and the like, a liquid crystal panel element incorporating the same, and a sputtering target for forming the thin film.
[0002]
[Prior art]
A liquid crystal display (hereinafter, referred to as an “LCD”), which is one of the semiconductor devices, can be made thinner, lighter, and consume less power than a conventional display device using a cathode ray tube. Recently, it has become mainstream as a display device because of the advantage of obtaining a resolution. In such an LCD, a TFT liquid crystal in which a thin film transistor (hereinafter, referred to as “TFT”) serving as a pixel switch is incorporated is mainly used.
[0003]
A thin-film electrode used as a part of the TFT and an Al-based alloy thin film constituting a wiring connected to the thin-film electrode are required to have various characteristics in addition to low electric resistivity.
[0004]
For example, it is necessary to receive a thermal history of about 200 to 400 ° C. in a process of forming an insulating film in an LCD manufacturing stage, and if the heat resistance of the thin film is poor, the thermal expansion of the substrate and the thin film may occur. The compressive stress resulting from the difference in the coefficients serves as a driving force to generate protrusions (hillocks), which may cause a short circuit or disconnection between wirings. Therefore, the TFT electrode needs to have excellent hillock resistance in addition to low electric resistivity.
[0005]
Conventionally, in order to achieve a low electrical resistivity of an Al-based alloy, by reducing the elements in a solid solution state by precipitating additional elements using the above-mentioned thermal history, such as reducing the electrical resistivity. Alloys are being considered.
[0006]
Examples of the Al alloy used for the LCD wiring film and the like include an Al alloy obtained by adding a rare earth metal or a transition metal to Al, as disclosed in Patent Documents 1 and 2. In particular, the Al-Nd alloy proposed in Patent Literature 1 is widely used because it satisfies not only low electric resistivity but also hillock resistance, void resistance, and corrosion resistance.
[0007]
However, in recent years, further reduction in the electrical resistivity of the wiring for the Al thin-film electrode has been required in accordance with the improvement in image quality and definition of the TFT liquid crystal. In order to reduce the damage, it is required to lower the process temperature (less than 250 ° C.) and to shorten the process time. Therefore, an alloy that can obtain a low electric resistivity even at a heat history at a lower temperature has been desired. For example, in the example of the Al-Nd alloy described in Patent Literature 1, a sufficiently low electric resistivity is obtained when the process temperature is 300 ° C. or higher, but at a low process temperature of about 200 ° C. Also, there is a demand for an Al alloy wiring film material having an excellent low electric resistivity of 10 μΩcm or less at an electric resistivity of 6 μΩcm or less at about 300 ° C.
[0008]
Patent Literature 3 discloses an Al-based alloy containing at least one of Si, Cu, Zn, Mg, Mn, Zr, Fe, Mo, and Ti. However, there is no suggestion or recognition of the complex addition of Fe and Si, and no experiment has been performed on the electrical resistivity and the like, and no data is described.
[Patent Document 1]
Japanese Patent No. 2733006 [Patent Document 2]
Japanese Patent No. 2,727,967 [Patent Document 3]
JP-A-8-179250 (Claim 2 etc.)
[0009]
[Problems to be solved by the invention]
The present invention has been made in view of such circumstances, and a purpose thereof is to provide a novel high-performance Al-based alloy thin film capable of solving the above-mentioned problems of the conventional Al-based alloy, that is, 250 ° C. It is possible to reduce the electrical resistivity even if the thermal history is in a low process temperature range of less than, and it is excellent in heat resistance like the conventional LCD wiring and electrode materials (such as Al-Nd alloy) and has hillocks etc. To provide an Al-based alloy thin film which is hardly generated, has excellent corrosion resistance, film adhesion, dry etching / wet etching characteristics (workability into a predetermined pattern), and can be suitably used as a wiring and an electrode for LCD, It is still another object of the present invention to provide an element using the Al alloy thin film and a sputtering target for forming the thin film.
[0010]
[Means for Solving the Problems]
In order to solve the above problems, the present inventors have produced Al alloy sputtering targets in which various elements are added to Al, and formed Al alloy thin films having various chemical component compositions by sputtering using these targets. Then, various characteristics such as hillock resistance, electric resistivity and etching characteristics of the thin films having the respective compositions were evaluated.
[0011]
As a result, the composite addition of at least one selected from the group consisting of Fe, Co, and Nd with Si is effective in improving these characteristics, and the Al-based alloy thin film is used for wiring and electrodes for FPD (LCD and the like). The present invention has been found to have excellent characteristics as a material for a thin film wiring for a gate bus line or a source bus line, or a wiring / electrode for a switching element such as an active matrix type LCD, and the present invention has been completed. Was. Further, they have found that an Al-based alloy to which Fe and Si are added in combination has excellent dry etching characteristics and is suitable for a panel with higher definition.
[0012]
That is, the Al-based alloy thin film according to the present invention is an Al-based alloy thin film constituting a wiring film or an electrode film of a flat panel display, and is at least one type selected from the group consisting of Fe, Co, and Nd (“M )) And Si.
[0013]
The Al-based alloy thin film preferably has a total content of M of 0.1 to 3% and a content of Si of 0.5 to 3%. It is particularly preferred that the content of Si is 0.1 to 3% and the content of Si is 0.5 to 3%. Further, it is preferable that the atomic percentage ratio of M to Si (M / Si) is 0.15 ≦ M / Si ≦ 3.
[0014]
The Al-based alloy thin film can be used as a film for a semiconductor device electrode or a film for a semiconductor device wiring, or a reflective film or a reflective electrode film for a flat panel display. In addition, these electrode films and the like and reflection films and the like can be used for liquid crystal panel elements.
[0015]
Furthermore, a sputtering target according to the present invention is characterized by satisfying the chemical composition of the Al-based alloy thin film.
[0016]
BEST MODE FOR CARRYING OUT THE INVENTION
The most significant feature of the Al-based alloy thin film according to the present invention is that it has a low electric resistivity even in an FPD manufacturing process employing a thermal history in a low process temperature range, and has excellent hillock resistance and dry etching characteristics. is there. That is, in the prior art, a low electric resistivity was obtained by a heat history of about 250 to 400 ° C., but the Al-based alloy thin film of the present invention has an excellent characteristic of a low electric resistivity even at a heat history of less than 250 ° C. be able to.
[0017]
Hereinafter, embodiments of the present invention exhibiting such characteristics and effects thereof will be described.
[0018]
It is an essential requirement that the Al-based alloy thin film of the present invention contains at least one selected from the group consisting of Fe, Co, and Nd and Si. The reason is as follows.
[0019]
Low electrical resistivity due to the thermal history of Al-based alloy
(1) precipitation of an additive element that was dissolved in supersaturation during film formation, and (2) coarsening of the grain size due to crystal grain growth,
It is known that the effect of (1) precipitation of the solid solution element (reduction of the total solid capacity of the element in the solid solution state) is particularly large. Therefore, in order to realize a low electrical resistivity at a low process temperature of less than 250 ° C., it is necessary to rapidly precipitate a solid solution element at a low temperature.
[0020]
Hillocks, on the other hand, occur locally at around 150-180 ° C. That is, an Al alloy thin film formed on a substrate having a low coefficient of thermal expansion such as LCD glass receives a large compressive stress due to a difference in coefficient of thermal expansion with an increase in temperature, but in a low temperature range of 150 to 180 ° C. Since the body diffusion (intragranular diffusion) rate of Al atoms is low, the transport of Al atoms occurs mainly by grain boundary diffusion. As a result, hillocks are locally generated with a large size at the triple point of the grain boundary. On the other hand, when the temperature is higher than 200 ° C., the body diffusion rate of Al atoms also increases and the mobility increases, so that the hillock generation sites are widened and a large number of fine hillocks are formed. Hillocks hardly occur because stress relaxation occurs in the entire film due to crystallization or plastic deformation. Therefore, in order to suppress the generation of hillocks at a low process temperature (less than 250 ° C.), in order to prevent the transport of Al atoms due to grain boundary diffusion, a certain amount or more around 150 to 180 ° C. where local hillocks are generated. It is necessary for the solid solution element to maintain a solid solution state in the crystal grain.
[0021]
As described above, in order to achieve excellent hillock resistance with low electric resistivity of the Al-based alloy even at a low process temperature, a compound derived from the added element is quickly precipitated at a low temperature, and at 150 to 180 ° C. It is technically difficult to meet two contradictory properties that a certain amount of solid solution element must be secured.
[0022]
Therefore, the present inventors have adopted Fe, Co, and Nd, which easily precipitate at a low temperature and have relatively high hillock resistance, as an additive element.
[0023]
In addition, the present inventors have adopted a low process temperature and have adopted Fe, Co, It has been newly found that when Nd is added, a lower electric resistivity can be achieved by suppressing the growth of crystal grains.
[0024]
That is, the precipitation of the additional element includes a process of body diffusion in which atoms of the solid solution diffuse to the grain boundary and a process of aggregation at the triple point of the grain boundary through the grain boundary. It is rate-limiting. Therefore, if the diffusion distance of the solid solution element to the grain boundary is reduced, that is, if the crystal grain growth is suppressed and the particle size is reduced, the added element will be rapidly precipitated, and the electric resistivity due to the solid solution element will be reduced. Ascent can be prevented.
[0025]
In an Al-based alloy, precipitation of Fe, Co, and Nd occurs at 220 to 250 ° C., and the crystal grains also grow with the precipitation. Further, by adding an element which hardly forms a solid solution with Al and remains in the grains and does not increase the electric resistivity, a further lower electric resistivity can be achieved.
[0026]
The present inventors have conducted studies from such a viewpoint and found that Si is extremely effective as an additive element. That is, the Al-based alloy to which Si is added in combination with at least one selected from the group consisting of Fe, Co, and Nd is extremely rapidly deposited in the deposition temperature range due to the effect of suppressing the growth of crystal grains of Si. As a result, a low electric resistivity of 10 μΩcm or less can be realized even at a low temperature of 200 ° C. In particular, in the Al—Fe—Si alloy, the precipitation of the Fe element is promoted, so that fine hillocks are generated in a temperature range of 220 to 250 ° C. and local hillocks are prevented from being generated. Resistance can be achieved.
[0027]
The content of M (at least one selected from the group consisting of Fe, Co, and Nd) is preferably 0.1 to 3%. If it is less than 0.1%, there is no effect on hillock resistance, while if it exceeds 3%, it becomes difficult to reduce the electrical resistivity. A more preferable content is 0.5% or more and 2% or less. Further, M preferably contains Fe. As described above, the Al-Fe-Si alloy has extremely high hillock resistance.
[0028]
The content of Si is preferably 0.5 to 3%. If it is less than 0.5%, the effect of suppressing the growth of crystal grains is low, while if it exceeds 3%, it becomes difficult to reduce the electrical resistivity.
[0029]
Desirably, the content of Si increases with an increase in the content of M. This is because, when the Si content is smaller than the M content, the crystal grains grow before M is sufficiently precipitated. This is because the effect of suppressing the growth of grains is saturated, and excess Si impairs the reduction in electrical resistivity and the dry etching characteristics. Therefore, it is preferable that the ratio of M to Si does not become too small or too large and 0.15 ≦ M / Si ≦ 3.
[0030]
The Al-based alloy of the present invention may contain unavoidable compounds other than Al, M, and Si in some cases, but such alloys are also included in the scope of the present invention.
[0031]
Here, “%” (atomic%) can be measured by a known method, and for example, ICP emission spectroscopy can be used.
[0032]
When dry etching is performed, the Si content is preferably set to 0.5 to 2%, and when Nd and / or Co is added, the content is preferably set to 0.1 to 0.5%. In this case, the preferable upper limit of the Si content is set to 2% because Si is partially converted into SiO 2 by oxygen unavoidably included such as oxygen taken in during film formation or a trace amount of oxygen during dry etching. This is to suppress the generation of such a residue. Further, in Nd and Co, a residue is generated in proportion to the amount of addition regardless of the presence or absence of oxygen. Therefore, the preferable upper limit is set to 0.5%. Note that Fe is less likely to form an oxide than Si or the like, and thus no special limitation is required in the case of performing dry etching.
[0033]
The Al-based alloy thin film of the present invention is configured as described above, and can achieve a low electrical resistivity even though it has only undergone a low-temperature heat history, and is excellent in hillock resistance and etching characteristics. Therefore, the Al-based alloy thin film of the present invention can be used for an electrode film and a wiring film of a semiconductor device used for a flat panel display, a reflection film or a reflection electrode film for a flat panel display, and the like. Liquid crystal panel elements using these electrode films and reflective films are very useful.
[0034]
Further, since the Al-based alloy thin film of the present invention can be coated with a sputtering target satisfying the same chemical composition, the sputtering target is also highly useful. Note that impurities unavoidably mixed into the target due to the raw materials used for manufacturing the sputtering target or the atmosphere during the manufacturing adversely affect the film formation state. It is preferable to suppress the content of N to 0.04 wt% or less, N to 0.01 wt% or less, and Cu to 0.005 wt% or less.
[0035]
Further, the Al-based alloy thin film of the present invention may have a laminated film laminated on at least one surface. As an example of the laminated film, a double-sided laminated wiring in which, for example, a Mo / Al alloy is laminated on one surface and Mo is laminated on the other surface can be used as a gate electrode or a source electrode or a drain electrode in a TFT-LCD. . In this case, the thickness of the Mo laminated film or the like is preferably about 50 to 200 nm. It is to be noted that the method for forming the laminated film is not particularly limited, and may be formed by a sputtering method, a vacuum evaporation method, an ion plating method, a CVD method, or the like, similarly to the formation of the Al-based alloy thin film. It is possible.
[0036]
【Example】
Hereinafter, the present invention will be described specifically with reference to Examples. However, the present invention is not limited to the following Examples, and the present invention may be practiced with appropriate changes within a range that can conform to the spirit of the preceding and following examples. It is also possible to do so, and all of them are included in the technical scope of the present invention.
[0037]
(Example 1)
A sputtering target made of an Al alloy containing predetermined amounts of Fe and Si (melted Al-Fe-Si alloy sputtering target) was manufactured by a spray forming method.
[0038]
Using this sputtering target, 300 nm thick Al on a 200 nm thick CVD silicon oxide film deposited on non-alkali glass (1737 glass manufactured by Corning) having a diameter of 6 inches and a thickness of 0.5 mm by DC magnetron sputtering. A thin film alloy (Al-Fe-Si alloy thin film) was formed by vapor deposition.
[0039]
The content of each of the Al alloy thin films was changed within the range shown in Table 1 below. The amount of the added element in the film was measured using ICP emission spectroscopy.
[0040]
(Example 2)
An Al-Nd-Si alloy thin film was formed in the same manner as in Example 1 except that Fe was changed to Nd.
[0041]
(Example 3)
An Al-Co-Si alloy thin film was formed in the same manner as in Example 1 except that Fe was changed to Co.
[0042]
(Comparative Example 1)
Al-Fe-based, Al-Si-based, Al-Nd-based, Al-Co-based, Al-Ti-based, and Al-Ti-Si-based alloy thin films were formed in the same manner as in Example 1 above.
[0043]
(Test Example 1)
A sample for measuring the electrical resistivity of the alloy thin film was prepared in the following procedure. A positive photoresist (novolak resin: TSMR-8900, manufactured by Tokyo Ohka Kogyo Co., Ltd., thickness 1.0 μm) was stripped on the surface of the thin film prepared in each of the above Examples and Comparative Examples by photolithography with a line width of 10 μm. It was formed in a shape. Then, it was processed into a pattern for measuring electrical resistivity having a line width of 100 μm and a line length of 10 mm by wet etching. For wet etching, a mixed solution of H 3 PO 4 : HNO 3 : H 2 O = 75: 5: 20 was used. In order to provide a thermal history to the thin film, after the etching process, the thin film is held at 200 ° C. or 300 ° C. for 60 minutes by a vacuum heat treatment (degree of vacuum: 2.0 × 10 −6 Torr) using a hot wall type heat treatment furnace. The following was performed.
[0044]
(Test Example 2) Measurement of Hillock Resistance After processing into a stripe pattern shape having a line width of 10 μm in the same manner as the method for producing the above-described sample for measuring electric resistivity, vacuum heat treatment (degree of vacuum: 2) maintained at 300 ° C. for 60 minutes 2.0 × 10 −6 Torr or less).
[0045]
Next, the number of hillocks (hemispherical projections) generated in the surface portion of the stripe pattern and the cross section (side portion) of the pattern was measured in a visual field of a 200-fold optical microscope, and the hillock density (per unit area) was measured. Hillock number).
[0046]
The criteria for the hillock resistance were as follows: ○ when the hillock density was less than 1.0 × 10 −7 / m 2 , Δ when (1.0 to 50) × 10 −7 / m 2 , and 50 × 10 A case exceeding −7 pieces / m 2 was evaluated as x.
[0047]
(Test Example 3) Evaluation of dry etching property The etching apparatus used was a TCP (Transfer Coupled Plasma) type, and high frequency power of 13.56 MHz was introduced through an induction window on a flat plate. The process gas used was Cl 2 / BCl 3 .
[0048]
The etching conditions were Cl 2 / BCl 3 = 120/60 sccm, power applied to the antenna was 500 W, substrate bias was 40 W, process pressure was 13 mTorr, substrate temperature was susceptor temperature, and 20 ° C.
[0049]
In the evaluation of the dry etching property, in a 10,000 times SEM observation image, ○ indicates that there was no residue, Δ indicates that a part of the island-like residue was present, and X indicates that a continuous residue was present on the entire surface.
[0050]
(Results and discussion)
The results of Examples 1 to 3 and Comparative Example 1 are shown in Table 1 below.
[0051]
[Table 1]
Figure 2004103695
[0052]
According to the results, all of the Al-based alloys of the present invention, Al-Fe-Si-based, Al-Nd-Si-based, and Al-Co-Si-based (Examples 1 to 3) were compared without adding Si. Compared with the example, the electrical resistivity at 200 ° C. and 300 ° C. is clearly reduced. This is considered to be due to the effect of suppressing the growth of crystal grains of Si. In addition, a comparison of the Al—Fe—Si system shows that the smaller the value of Fe / Si (the larger the amount of Si), the lower the electrical resistivity tends to be.
[0053]
In the case of an Al-based alloy containing Fe, the hillock resistance was Δ in the Al-Fe binary system. However, it was found that the hillock resistance can be improved by adding Si, which has no effect on the hillock resistance alone, in combination. Was issued. This is due to the fact that as a result of the precipitation of Fe occurring more quickly by the addition of Si, fine hillocks were generated over the entire surface in a temperature range of 200 to 300 ° C., and the generation of local hillocks was suppressed. Conceivable.
[0054]
It can be seen that the effect of the addition of the composite is small on the dry etching property, and that the influence of each additive element is directly reflected upon the addition of the composite.
[0055]
【The invention's effect】
The Al-based alloy thin film of the present invention can achieve a low electric resistivity even in a thermal history at a low process temperature, and is also extremely excellent in hillock resistance and etching characteristics. Therefore, if the Al-based alloy thin film of the present invention is used as a wiring film or an electrode film of a flat panel display, a liquid crystal with high image quality and high definition can be obtained, which is extremely useful in industry.
[0056]
Also, a sputtering target satisfying the chemical composition of the Al-based alloy thin film can coat the wiring of a flat panel display or the like with the Al-based alloy thin film according to the present invention, and thus has extremely high industrial utility.

Claims (8)

フラットパネルディスプレイの配線膜または電極膜を構成するAl基合金薄膜であって、Fe,Co,Ndからなる群より選択される少なくとも1種(以下、「M」という場合がある)およびSiを含有することを特徴とするAl基合金薄膜。An Al-based alloy thin film constituting a wiring film or an electrode film of a flat panel display, containing at least one type (hereinafter, may be referred to as “M”) selected from the group consisting of Fe, Co, and Nd and Si. An Al-based alloy thin film characterized in that: Mの含有量が総量で0.1〜3原子%(以下、単に「%」とする)であり、Siの含有量が0.5〜3%である請求項1に記載のAl基合金薄膜。The Al-based alloy thin film according to claim 1, wherein a total content of M is 0.1 to 3 atomic% (hereinafter, simply referred to as "%"), and a content of Si is 0.5 to 3%. . MとしてのFe含有量が0.1〜3%であり、Siの含有量が0.5〜3%である請求項1に記載のAl基合金薄膜。The Al-based alloy thin film according to claim 1, wherein the content of Fe as M is 0.1 to 3%, and the content of Si is 0.5 to 3%. MとSiの原子%比(M/Si)が0.15≦M/Si≦3である請求項1〜3のいずれかに記載のAl基合金薄膜。The Al-based alloy thin film according to any one of claims 1 to 3, wherein an atomic percentage ratio of M to Si (M / Si) is 0.15 ≦ M / Si ≦ 3. 請求項1〜4のいずれかに記載のAl基合金薄膜で構成されている半導体デバイス電極用膜または半導体デバイス配線用膜。A film for a semiconductor device electrode or a film for a semiconductor device wiring, comprising the Al-based alloy thin film according to claim 1. 請求項1〜4のいずれかに記載のAl基合金薄膜で構成されているフラットパネルディスプレイ用反射膜または反射電極膜。A reflective film or reflective electrode film for a flat panel display, comprising the Al-based alloy thin film according to claim 1. 請求項5または6に記載の電極用膜、配線用膜、反射膜および/または反射電極膜を有する液晶パネル素子。A liquid crystal panel element comprising the electrode film, the wiring film, the reflection film and / or the reflection electrode film according to claim 5. 請求項1〜4のいずれかに記載のAl基合金薄膜の化学成分組成を満足することを特徴とするスパッタリングターゲット。A sputtering target, which satisfies the chemical composition of the Al-based alloy thin film according to claim 1.
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