JP2004072217A5 - - Google Patents
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- JP2004072217A5 JP2004072217A5 JP2002225691A JP2002225691A JP2004072217A5 JP 2004072217 A5 JP2004072217 A5 JP 2004072217A5 JP 2002225691 A JP2002225691 A JP 2002225691A JP 2002225691 A JP2002225691 A JP 2002225691A JP 2004072217 A5 JP2004072217 A5 JP 2004072217A5
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- Prior art keywords
- data
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- unread
- buffer memory
- clock
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Claims (11)
受信手段からの受信データを順次蓄積してゆくとともに、読出しクロックに応答して、一番古いデータから順次連続して読出しを行なうバッファメモリと、
前記バッファメモリの未読データ量を算出する未読データ量算出手段と、
前記未読データ量算出手段からの出力に基づき、未読データ量が最初に前記予め定める量に達するまでは前記読出しクロックの出力を禁止し、達したのちは前記読出しクロックの出力を許可して前記バッファメモリからのデータの読出しを行なう読出し制御手段と、
前記未読データ量算出手段の出力を時間的に平滑化する平滑化手段と、
前記平滑化手段からの出力に基づき、前記読出しクロックの周波数を変化させるクロック周波数変更手段と、
前記読出しクロックに同期して、前記バッファメモリから読出されたデータの再生処理を行なう再生手段とを含むことを特徴とするデータ再生装置。In the device that plays back the received data,
A buffer memory that sequentially stores the received data from the receiving means and sequentially reads out the oldest data in response to a read clock;
Unread data amount calculating means for calculating an unread data amount in the buffer memory;
Based on the output from the unread data amount calculation means, the output of the read clock is prohibited until the amount of unread data first reaches the predetermined amount, and after that, the output of the read clock is permitted and the buffer is output. Read control means for reading data from the memory;
Smoothing means for smoothing the output of the unread data amount calculating means temporally;
Clock frequency changing means for changing the frequency of the read clock based on the output from the smoothing means;
And a reproducing means for reproducing the data read from the buffer memory in synchronization with the read clock.
受信手段からの受信データを順次蓄積してゆくとともに、読出しクロックに応答して、一番古いデータから順次連続して読出しを行なうバッファメモリと、
前記バッファメモリの未読データ量を算出する未読データ量算出手段と、
前記未読データ量算出手段からの出力に基づき、未読データ量が最初に前記予め定める量に達するまでは前記読出しクロックの出力を禁止し、達したのちは前記読出しクロックの出力を許可して前記バッファメモリからのデータの読出しを行なう読出し制御手段と、
前記未読データ量算出手段の出力を時間的に平滑化する平滑化手段と、
前記平滑化手段からの出力に基づき、前記読出しクロックの周波数を変化させるクロック周波数変更手段と、
前記読出しクロックに同期して、前記バッファメモリから読出されたデータの再生処理を行なう再生手段とを含むことを特徴とするデータ再生装置。 In an apparatus for receiving and reproducing data transmitted after being encoded and packetized ,
A buffer memory that sequentially stores the received data from the receiving means and sequentially reads out the oldest data in response to a read clock;
Unread data amount calculating means for calculating an unread data amount in the buffer memory;
Based on the output from the unread data amount calculation means, the output of the read clock is prohibited until the amount of unread data reaches the predetermined amount for the first time, and after that, the output of the read clock is permitted and the buffer is output. Read control means for reading data from the memory;
Smoothing means for smoothing the output of the unread data amount calculating means temporally;
Clock frequency changing means for changing the frequency of the read clock based on the output from the smoothing means;
And a reproducing means for reproducing the data read from the buffer memory in synchronization with the read clock.
前記未読データ量算出手段は、前記未読データ量が予め定める値以上であるか否かを表す1ビットのフラグ信号を出力し、前記クロック周波数変更手段は、前記1ビットのフラグ信号出力に基づき、周波数を上昇すべき電圧と下降すべき電圧とを切換えて前記平滑化手段へ出力することを特徴とする請求項1または2記載のデータ再生装置。The clock signal source for creating the read clock comprises a voltage controlled oscillator,
The unread data amount calculating means outputs a 1-bit flag signal indicating whether or not the unread data amount is a predetermined value or more, and the clock frequency changing means is based on the 1-bit flag signal output, 3. A data reproducing apparatus according to claim 1, wherein a voltage to be increased and a voltage to be decreased are switched and output to the smoothing means .
前記クロック周波数変更手段は、前記未読データ量算出手段の出力データに対応したアナログ電圧を出力することを特徴とする請求項1または2記載のデータ再生装置。The clock signal source for creating the read clock comprises a voltage controlled oscillator,
3. The data reproducing apparatus according to claim 1, wherein the clock frequency changing unit outputs an analog voltage corresponding to the output data of the unread data amount calculating unit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2002225691A JP2004072217A (en) | 2002-08-02 | 2002-08-02 | Data reproducing apparatus |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2002225691A JP2004072217A (en) | 2002-08-02 | 2002-08-02 | Data reproducing apparatus |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2004072217A JP2004072217A (en) | 2004-03-04 |
JP2004072217A5 true JP2004072217A5 (en) | 2005-10-20 |
Family
ID=32013251
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2002225691A Pending JP2004072217A (en) | 2002-08-02 | 2002-08-02 | Data reproducing apparatus |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2004072217A (en) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4452136B2 (en) | 2004-03-30 | 2010-04-21 | 株式会社日立製作所 | Data synchronized playback device and terminal device |
JP4681400B2 (en) * | 2005-09-08 | 2011-05-11 | 株式会社日立国際電気 | Communications system |
JP4657978B2 (en) * | 2006-05-18 | 2011-03-23 | 日本電信電話株式会社 | Method for estimating bit rate synchronized with transmission bit rate, method for generating synchronous clock, and data receiving apparatus |
JP5223427B2 (en) * | 2008-04-09 | 2013-06-26 | 日本電気株式会社 | Clock synchronization system |
JP5388223B2 (en) * | 2010-08-04 | 2014-01-15 | Necエンジニアリング株式会社 | Optical transmission equipment |
-
2002
- 2002-08-02 JP JP2002225691A patent/JP2004072217A/en active Pending
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