JP2004039903A - Alignmark, mask, semiconductor device, and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an alignmark that does not cause pattern error, a mask provided with the alignmark, a semiconductor device, and its manufacturing method. <P>SOLUTION: The manufacturing method includes a step for depositing a film to be treated on a wafer, a step where a photoresist film is applied onto the film and it is exposed and developed to form a resist pattern on the film, and a step where the resist pattern is used as a mask to wet-etch the film. The resist pattern is provided with a alignmark mark pattern that is provided with line patterns 1 to 4 and retaining patterns 11 to 14 that are arranged on both ends of the line pattern and has a width L not to cause pattern error even when wet etching is applied. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to an alignment mark, a mask, a semiconductor device, and a method of manufacturing the same, and more particularly to an alignment mark that does not cause pattern skipping, a mask including the same, a semiconductor device, and a method of manufacturing the same.
[0002]
[Prior art]
An alignment mark used for manufacturing a semiconductor device includes an auto alignment target mark. The auto-alignment target mark is a target mark on the wafer surface on which the wafer and the mask are superimposed, optically scanned together with the mark on the mask surface, and an optical signal is detected and aligned. The auto alignment target mark is mainly used in a rough alignment step such as an ion implantation step.
[0003]
FIG. 5A is a plan view showing a conventional auto-alignment target mark, and FIG. 5B is a cross-sectional view of the auto-alignment target mark shown in FIG. It is.
[0004]
As shown in FIG. 5B, a target mark on the wafer surface is formed on the wafer 107, and a mark on the mask surface is formed below the mask.
[0005]
As shown in FIG. 5A, the target mark on the wafer surface has a first set of parallel parallel line patterns 101 and 102 having a slanted planar shape, and a flat surface opposite to the first set of parallel line patterns. The target mark is arranged on a scribe line of a wafer, the second set of parallel line patterns 103 and 104 having a convex shape having an inclined shape. The marks on the mask surface include a first line pattern 105 disposed on a center line between the first set of parallel line patterns and a second line pattern 106 disposed on a center line between the second set of parallel line patterns. And these line patterns are made of chrome patterns.
[0006]
6A to 6C are cross-sectional views illustrating a method for manufacturing a target mark on a wafer surface.
First, as shown in FIG. 6A, a film to be processed (a film to be subjected to wet etching) 109 is deposited on the entire surface of the wafer 107. Next, a photoresist film is applied on the film to be processed 109, and the photoresist film is exposed and developed, whereby a resist pattern 110 is formed on the film to be processed. This resist pattern 110 has the same planar shape as the first set of parallel line patterns 101 and 102 and the second set of parallel line patterns 103 and 104 shown in FIG.
[0007]
Thereafter, as shown in FIG. 6B, the film to be processed 109 is wet-etched using the resist pattern 110 as a mask. As a result, the film to be processed 109 is etched, a first set of parallel line patterns 101 and 102 and a second set of parallel line patterns 103 and 104 are formed on the wafer 107, and a target mark on the wafer surface is formed. You. Next, as shown in FIG. 6C, the resist pattern 110 is peeled off.
[0008]
Next, a film to be processed (a film to be subjected to wet etching) (not shown) is deposited on the entire surface of the wafer 107. Next, a photoresist film is applied on the film to be processed.
[0009]
Next, the wafer and the mask are overlapped using the above-mentioned auto alignment target mark. The method of superposition will be described.
As shown in FIG. 5B, a mask 108 is overlaid on the wafer 107. The auto alignment target mark is provided at a plurality of positions on a scribe line of each of a wafer and a mask.
[0010]
Next, an auto alignment target mark is detected. In this detection method, a laser beam from a laser light source (not shown) disposed above the mask 108 is transmitted through the mask to irradiate both the wafer 107 and the mask 108, and an arrow 111 shown in FIG. The laser light is scanned in the direction of, and the reflected light is detected by an optical signal detector (not shown). From the detected optical signals, the marks 105 and 106 on the mask surface are arranged at the centers of the target marks 101, 102 and 103, 104 on the wafer surface (that is, the state shown in FIG. 5A). As described above), the wafer stage (not shown) is automatically moved and adjusted. In this way, the wafer and the mask are overlaid.
[0011]
Next, by exposing and developing the photoresist film using the mask 108, a resist pattern (not shown) is formed on the film to be processed. Thereafter, the film to be processed is wet-etched using the resist pattern as a mask. Thereby, the film to be processed is etched.
[0012]
[Problems to be solved by the invention]
By the way, in the conventional auto alignment target mark described above, when the processing target film 109 is wet-etched using the resist pattern 110 as a mask in the step shown in FIG. 6B, the width of the target mark on the wafer surface is reduced as shown in FIG. ), The resist pattern 110 may be peeled off from the film to be processed during wet etching, causing a pattern jump (the resist pattern 110 indicated by a dotted line in FIG. 6B has a pattern jump). part). The resist pattern that has been peeled off by causing a pattern jump as described above may be attached to another chip area. This pasted resist pattern acts as a mask, and as a result, there is a problem that a defective chip is formed.
[0013]
The present invention has been made in view of the above circumstances, and an object of the present invention is to provide an alignment mark that does not cause a pattern jump, a mask having the alignment mark, a semiconductor device, and a method of manufacturing the same.
[0014]
[Means for Solving the Problems]
In order to solve the above problems, the alignment mark according to the present invention is an alignment mark formed on a wafer or a mask,
Line pattern,
Holding patterns arranged at both ends of this line pattern,
With
The pressing pattern is characterized in that the pressing pattern has a width that does not cause pattern jump even when dry etching in which wet etching or side etching is performed.
[0015]
In the alignment mark according to the present invention, the width of the pressing pattern is preferably 5.0 μm or more.
[0016]
In the alignment mark according to the present invention, the alignment mark may be arranged on a scribe line of the wafer.
[0017]
The alignment mask according to the present invention includes a line pattern,
A pressing pattern having a width which is arranged at both ends of this line pattern and does not cause pattern jump even when performing dry etching in which wet etching or side etching is performed,
The alignment mark provided with is provided.
[0018]
In the alignment mask according to the present invention, it is preferable that the width of the pressing pattern is 5.0 μm or more.
[0019]
In the alignment mask according to the present invention, the alignment mark may be arranged at a position corresponding to a scribe line of the wafer.
[0020]
A semiconductor device according to the present invention is characterized in that it is manufactured using a mask according to any one of claims 4 to 6 through a step of superimposing a wafer and a mask using alignment marks.
[0021]
A method of manufacturing a semiconductor device according to the present invention is characterized in that a semiconductor device is manufactured through a step of superimposing a wafer and a mask with an alignment mark using the mask according to any one of claims 4 to 6. I do.
[0022]
A method for manufacturing a semiconductor device according to the present invention includes the steps of: depositing a film to be processed on a wafer;
Applying a photoresist film on the film to be processed, exposing and developing the photoresist film, thereby forming a resist pattern on the film to be processed;
A step of performing wet etching or side etching on the film to be processed by using the resist pattern as a mask,
With
The resist pattern is a line pattern and a registration mark pattern having a width which is disposed at both ends of the line pattern and has a width which does not cause pattern jump even when dry etching is performed by wet etching or side etching. It is characterized by having.
[0023]
According to the method of manufacturing a semiconductor device, a pressing pattern is formed at both ends of the line pattern, and the pressing pattern has a width that does not cause a pattern jump even when performing wet etching or dry etching in which side etching is performed. For this reason, when performing dry etching in which wet etching or side etching is performed on the film to be processed using the resist pattern as a mask, it is possible to prevent the resist pattern from peeling off from the film to be processed and causing a pattern jump.
[0024]
In the method for manufacturing a semiconductor device according to the present invention, it is preferable that the width of the pressing pattern is not less than 5.0 μm.
[0025]
In the method of manufacturing a semiconductor device according to the present invention, the alignment mark pattern may be arranged on a scribe line of a wafer.
[0026]
A method for manufacturing a semiconductor device according to the present invention includes the steps of: depositing a film to be processed on a wafer;
Applying a photoresist film on the film to be processed, exposing and developing the photoresist film, thereby forming a resist pattern on the film to be processed;
A step of performing wet etching or side etching on the film to be processed by using the resist pattern as a mask,
A step of overlaying the alignment mark and mask formed on the wafer by the step of performing the dry etching,
With
The resist pattern includes a first line pattern and a first pressing pattern which is disposed at both ends of the first line pattern and has a width which does not cause a pattern jump even when performing wet etching or side-etched dry etching. It has a pattern of 1 alignment mark,
The mask includes a second line pattern and a second pressing pattern which is disposed at both ends of the second line pattern and has a width which does not cause a pattern jump even when performing wet etching or side-etched dry etching. Characterized by having a matching mark of
[0027]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1A is a plan view showing an auto alignment target mark according to a first embodiment of the present invention, and FIG. 1B is a plan view showing the auto alignment target mark shown in FIG. It is sectional drawing cut | disconnected in the optical scanning direction.
As shown in FIG. 1B, a target mark on the wafer surface is formed on the wafer 7, and a mark on the mask surface is formed below the mask 8.
[0028]
As shown in FIG. 1A, the target mark on the wafer surface includes a first set of parallel line patterns 1 and 2 having a convex inclined plane shape and holding patterns 11 and 12 formed at both ends thereof. This target is composed of a second set of parallel line patterns 3 and 4 having a convex shape inclined to the opposite side to the first set of parallel line patterns and pressing patterns 13 and 14 formed at both ends thereof. The mark is arranged on the scribe line of the wafer. The width L of each of the pressing patterns 11 to 14 is such that the pattern does not jump even when wet etching is performed. The thickness that does not cause pattern skipping varies depending on etching conditions such as an etching rate, but is preferably, for example, 5.0 μm or more.
[0029]
The marks on the mask surface are composed of a first line pattern 5 disposed on the center line between the first set of parallel line patterns and pressing patterns (not shown) formed at both ends thereof, and a second set of parallel lines. It comprises a second line pattern 6 disposed on the center line between the patterns and a pressing pattern (not shown) formed at both ends thereof, and these line patterns are formed of a chrome pattern formed on a glass substrate. Things. The width of the pressing pattern is such that the pattern does not jump even when wet etching is performed. The thickness that does not cause pattern skipping varies depending on etching conditions such as an etching rate, but is preferably, for example, 5.0 μm or more.
[0030]
2A to 2C are cross-sectional views illustrating a method for manufacturing a target mark on a wafer surface.
First, as shown in FIG. 2A, a film to be processed (a film to be subjected to wet etching) 9 is deposited on the entire surface of the wafer 7. Next, a photoresist film is applied on the film to be processed 9, and the photoresist film is exposed and developed to form a resist pattern 10 on the film to be processed. The resist pattern 10 has a first set of parallel line patterns 1 and 2 and pressing patterns 11 and 12 and a second set of parallel line patterns 3 and 4 and pressing patterns 13 and 14 shown in FIG. The same is true.
[0031]
Thereafter, as shown in FIG. 2B, the film 9 to be processed is wet-etched using the resist pattern 10 as a mask. As a result, the film 9 to be processed is etched, and the first set of parallel line patterns 1, 2 and the pressing patterns 11, 12 at both ends thereof and the second set of parallel line patterns 3, 4 are formed on the wafer 7. Are formed, and target marks on the wafer surface are formed. Next, as shown in FIG. 2C, the resist pattern 10 is peeled off.
[0032]
Next, a film to be processed (a film to be subjected to wet etching) (not shown) is deposited on the entire surface of the wafer 7. Next, a photoresist film is applied on the film to be processed.
[0033]
Next, the wafer and the mask are overlapped using the above-mentioned auto alignment target mark. The method of superposition will be described.
As shown in FIG. 1B, a mask 8 is overlaid on the wafer 7. The auto alignment target mark is provided at a plurality of positions on a scribe line of each of a wafer and a mask.
[0034]
Next, an auto alignment target mark is detected. In this detection method, a laser light from a laser light source (not shown) arranged above the mask 8 is transmitted through the mask and is applied to both the wafer 7 and the mask 8, and an arrow 21 shown in FIG. The laser light is scanned in the direction of, and the reflected light is detected by an optical signal detector (not shown). From the detected optical signals, the marks 5 and 6 on the mask surface are positioned at the centers of the target marks 1, 2, 3 and 4 on the wafer surface (that is, the state shown in FIG. 1A). 2), a wafer stage (not shown) is automatically moved and adjusted. In this way, the wafer and the mask are overlaid.
[0035]
Next, by exposing and developing the photoresist film using the mask 8, a resist pattern (not shown) is formed on the film to be processed. Thereafter, the film to be processed is wet-etched using the resist pattern as a mask. Thereby, the film to be processed is etched.
[0036]
According to the first embodiment, the pressing patterns 11 to 14 are formed at both ends of the parallel line pattern, and the pressing patterns have such a thickness that the pattern does not jump even when wet etching is performed. Therefore, in the process shown in FIG. 2B, when the processing target film 9 is wet-etched using the resist pattern 10 as a mask, it is possible to prevent the resist pattern 10 from peeling off from the processing target film and causing a pattern jump. Further, when detecting the auto alignment target mark, the parallel line patterns 1 to 4 for scanning with the laser beam are formed as thin as the conventional one, so that the same detection method as in the prior art can be used.
[0037]
FIG. 3A is a plan view showing an auto alignment target mark according to the second embodiment of the present invention, and FIG. 3B is a plan view showing the auto alignment target mark shown in FIG. It is sectional drawing cut | disconnected in the optical scanning direction.
As shown in FIG. 3B, a target mark on the wafer surface is formed on the wafer 7, and a mark on the mask surface is formed below the mask 8.
[0038]
As shown in FIG. 3 (a), the target mark on the wafer surface is composed of a convex first line pattern 35 having an inclined planar shape and pressing patterns 41 and 42 formed at both ends thereof. It comprises a convex second line pattern 36 whose plane shape is inclined to the opposite side and pressing patterns 43 and 44 formed at both ends thereof, and the target mark is arranged on a scribe line of the wafer. The width L of each of the pressing patterns 41 to 44 is such that the pattern does not jump even when wet etching is performed. The thickness that does not cause pattern skipping varies depending on etching conditions such as an etching rate, but is preferably, for example, 5.0 μm or more.
[0039]
The marks on the mask surface are composed of a first set of parallel line patterns 31 and 32 arranged in parallel on both sides of the first line pattern 35 and pressing patterns (not shown) formed on both ends thereof, and a second line pattern. 36, a second set of parallel line patterns 33 and 34 arranged in parallel on both sides of the substrate 36 and pressing patterns (not shown) formed at both ends thereof. These line patterns are formed on a glass substrate. It consists of a chrome pattern. The width of the pressing pattern is such that the pattern does not jump even when wet etching is performed. The thickness that does not cause pattern skipping varies depending on etching conditions such as an etching rate, but is preferably, for example, 5.0 μm or more.
[0040]
FIGS. 4A to 4C are cross-sectional views illustrating a method for manufacturing a target mark on a wafer surface.
First, as shown in FIG. 4A, a film to be processed (a film to be subjected to wet etching) 9 is deposited on the entire surface of the wafer 7. Next, a photoresist film is applied on the film to be processed 9, and the photoresist film is exposed and developed to form a resist pattern 40 on the film to be processed. The resist pattern 40 has the same planar shape as the first line pattern 35 and the pressing patterns 41 and 42 and the second line pattern 36 and the pressing patterns 43 and 44 shown in FIG.
[0041]
Thereafter, as shown in FIG. 4B, the film 9 to be processed is wet-etched using the resist pattern 40 as a mask. As a result, the film 9 to be processed is etched, and the first line pattern 35 and the pressing patterns 41 and 42 at both ends thereof and the second line pattern 36 and the pressing patterns 43 and 44 at both ends thereof are formed on the wafer 7. A target mark on the wafer surface is formed. Next, as shown in FIG. 4C, the resist pattern 40 is peeled off.
[0042]
Next, a film to be processed (a film to be subjected to wet etching) (not shown) is deposited on the entire surface of the wafer 7. Next, a photoresist film is applied on the film to be processed.
[0043]
Next, the wafer and the mask are overlapped using the above-mentioned auto alignment target mark. The method of superposition will be described.
As shown in FIG. 3B, a mask 8 is overlaid on the wafer 7. The auto alignment target mark is provided at a plurality of positions on a scribe line of each of a wafer and a mask.
[0044]
Next, an auto alignment target mark is detected. In this detection method, a laser light from a laser light source (not shown) disposed above the mask 8 is transmitted through the mask and is applied to both the wafer 7 and the mask 8, and an arrow 51 shown in FIG. The laser light is scanned in the direction of, and the reflected light is detected by an optical signal detector (not shown). From the detected optical signals, the target marks 35 and 36 on the wafer surface are positioned at the centers of the marks 31, 32, 33, and 34 on the mask surface (that is, the state shown in FIG. 3A). 2), a wafer stage (not shown) is automatically moved and adjusted. In this way, the wafer and the mask are overlaid.
[0045]
Next, by exposing and developing the photoresist film using the mask 8, a resist pattern (not shown) is formed on the film to be processed. Thereafter, the film to be processed is wet-etched using the resist pattern as a mask. Thereby, the film to be processed is etched.
[0046]
In the second embodiment, the same effects as in the first embodiment can be obtained.
That is, pressing patterns 41 to 44 are formed at both ends of the line pattern, and the pressing pattern has a thickness that does not cause a pattern jump even when wet etching is performed. Therefore, in the step shown in FIG. 4B, when the film 9 to be processed is wet-etched using the resist pattern 40 as a mask, it is possible to prevent the resist pattern 40 from peeling off from the film to be processed and causing a pattern jump.
[0047]
The present invention is not limited to the above embodiment, but can be implemented with various modifications. For example, in the above embodiment, the present invention is applied to the auto alignment target mark. However, the present invention is not limited to this, and is an alignment mark used in a photolithography process, which is thin enough to cause a pattern jump. The present invention can be applied to other alignment marks made of a pattern, for example, the present invention can be applied to a box mark, a laser step alignment mark, and the like.
[0048]
Further, in the above embodiment, the present invention is applied to the alignment mark used in the wet etching step, but the present invention is applied to the alignment mark used in the dry etching step (a dry etching step such as side etching). It is also possible.
[0049]
In the first embodiment, the holding pattern 11 and the holding pattern 13 and the holding pattern 12 and the holding pattern 14 are separated from each other. However, the holding pattern 11 and the holding pattern 13 can be connected. It is also possible to connect the holding pattern 12 and the holding pattern 14. This is the same for the second embodiment.
[0050]
Further, in the first embodiment, the planar shape of the pressing patterns 11 to 14 is quadrangular, but the planar shape of the pressing pattern may be another shape (for example, elliptical, circular, triangular, etc.). It is. This is the same for the second embodiment.
[0051]
【The invention's effect】
As described above, according to the present invention, a pressing pattern is formed at both ends of a line pattern, and the pressing pattern has a width that does not cause a pattern jump even when performing wet etching or dry etching in which side etching is performed. Therefore, it is possible to provide an alignment mark that does not cause a pattern jump, a mask including the alignment mark, a semiconductor device, and a method of manufacturing the same.
[Brief description of the drawings]
FIG. 1A is a plan view showing an auto-alignment target mark according to a first embodiment of the present invention, and FIG. 1B is an optical scanning of the auto-alignment target mark shown in FIG. It is sectional drawing cut | disconnected in the direction which performs.
FIGS. 2A to 2C are cross-sectional views illustrating a method of manufacturing a target mark on a wafer surface.
FIG. 3A is a plan view showing an auto alignment target mark according to a second embodiment of the present invention, and FIG. 3B is an optical scanning of the auto alignment target mark shown in FIG. It is sectional drawing cut | disconnected in the direction which performs.
FIGS. 4A to 4C are cross-sectional views illustrating a method of manufacturing a target mark on a wafer surface.
FIG. 5A is a plan view showing a conventional auto-alignment target mark, and FIG. 5B is a cross-sectional view of the auto-alignment target mark shown in FIG. .
FIGS. 6A to 6C are cross-sectional views illustrating a method of manufacturing a target mark on a wafer surface.
[Explanation of symbols]
1, 2, 31, 32, 101, 102 ... first set of parallel line patterns 3, 4, 33, 34, 103, 104 ... second set of parallel line patterns 5, 35, 105 ... first line pattern 6, 36, 106 second line pattern 7, 107 wafer 8, 108 mask 9, 109 processed film 10, 40, 110 resist pattern 11 to 14, 41 to 44 pressing pattern 21, 51, 111 arrow

Claims (12)

An alignment mark formed on a wafer or a mask,
Line pattern,
Holding patterns arranged at both ends of this line pattern,
With
The alignment mark is characterized in that the pressing pattern has a width that does not cause a pattern jump even when wet etching or dry etching in which side etching is performed. The alignment mark according to claim 1, wherein the width of the pressing pattern is 5.0 μm or more. The alignment mark according to claim 1, wherein the alignment mark is arranged on a scribe line of a wafer. Line pattern,
A holding pattern having a width which is arranged at both ends of the line pattern and does not cause pattern jump even when performing wet etching or side-etched dry etching,
A mask comprising an alignment mark comprising: The mask according to claim 4, wherein the width of the pressing pattern is 5.0 μm or more. The mask according to claim 4, wherein the alignment mark is arranged at a position corresponding to a scribe line of the wafer. A semiconductor device manufactured using the mask according to any one of claims 4 to 6 through a step of superimposing a wafer and a mask using alignment marks. A method for manufacturing a semiconductor device, comprising: using the mask according to any one of claims 4 to 6 to perform a step of superimposing a wafer and a mask using alignment marks. Depositing a film to be processed on the wafer;
Applying a photoresist film on the film to be processed, exposing and developing the photoresist film, thereby forming a resist pattern on the film to be processed;
A step of performing wet etching or side etching on the film to be processed using the resist pattern as a mask,
With
The resist pattern is a line pattern and a registration mark pattern having a width which is disposed at both ends of the line pattern and has a width which does not cause pattern jump even when dry etching is performed by wet etching or side etching. A method for manufacturing a semiconductor device, comprising: The method according to claim 9, wherein the width of the pressing pattern is 5.0 μm or more. The method according to claim 9, wherein the alignment mark pattern is arranged on a scribe line of a wafer. Depositing a film to be processed on the wafer;
Applying a photoresist film on the film to be processed, exposing and developing the photoresist film, thereby forming a resist pattern on the film to be processed;
A step of performing wet etching or side etching on the film to be processed using the resist pattern as a mask,
A step of overlaying the alignment mark and mask formed on the wafer by the step of performing the dry etching,
With
The resist pattern includes a first line pattern and a first pressing pattern which is disposed at both ends of the first line pattern and has a width which does not cause a pattern jump even when performing wet etching or side-etched dry etching. It has a pattern of 1 alignment mark
The mask includes a second line pattern and a second pressing pattern which is disposed at both ends of the second line pattern and has a width which does not cause a pattern jump even when performing wet etching or side-etched dry etching. A method for manufacturing a semiconductor device, comprising:

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