JP2004021610A - Task managing device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To accelerate the processing speed of saving and return in a register when system call or interruption is caused during task management processing, especially, task execution. <P>SOLUTION: When system call or interruption is generated during task execution, only the contents of a register which is being used by the task among a plurality of registers owned by a CPU are saved(pushed) in the stack of the task which is being executed (S1). Afterwards, request processing such as system call or the decision of the next execution task is executed (S2 to S9), and then the contents of the register to be used for the task to be executed the next are loaded from the stack of the task to be executed the next to the corresponding register of the CPU (S5, S8). Thus, only the contents of not all the registers but the register to be used are saved/loaded so that the processing quantity can be reduced, and the high speed operation of processing can be achieved. Also, a push instruction and a pop instruction wherein the number of clocks required for processing is smaller than that of a data moving instruction are used, so that the processing speed can be accelated. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a task management device, a task management method, and a task management program, and more particularly to a task management device, a task management method, and a task management program that speed up processing when a system call or an interrupt occurs during task execution. About.
[0002]
[Prior art]
FIG. 5 shows an outline of a conventional task management process executed by a computer. In this figure, a CPU 7 and a memory (RAM) 15, which are parts of a computer, are shown.
[0003]
In a computer on which a plurality of tasks (jobs, threads) are executed, task management is executed and the tasks are managed.
[0004]
In this task management, a task control block (TCB: Task Control Block) is provided in the memory 15 for each task, and information indicating the state of the task is stored in the TCB. The TCB is provided with an area for storing all registers of the CPU 7 (the program counter 8, the stack pointer 8, the general-purpose register group 10, and the like) in addition to the task ID, the program start address, and the like. FIG. 5 illustrates TCBs 31 and 33 of two tasks A and B, respectively.
[0005]
In addition, a stack area generally provided in the memory 15 is divided for each task, and FIG. 5 illustrates a stack 32 for the task A and a stack 34 for the task B.
[0006]
Here, in the conventional task management, when a task A is executed by the CPU 7 and an interrupt (for example, a timer interrupt, a data reception interrupt, or the like) or a system call occurs from the task A, the CPU 7 causes all of its registers to operate. The data of the program counter 8, the stack pointer 9, the general-purpose register group 10 and the like are stored (saved) in the TCB 31 of the task A, and thereafter, interrupt processing and system call processing are executed.
[0007]
Further, in the conventional task management, when switching from task A to task B occurs due to task scheduling after interrupt processing or system call processing, the CPU 7 is stored in the TCB 33 of the switched task B. The contents (data, addresses, etc.) of all the registers have been loaded into the corresponding registers (program counter 8, stack pointer 9, general-purpose register group 10, etc.) of the CPU 7.
[0008]
[Problems to be solved by the invention]
As described above, in the conventional task management, since all the registers of the CPU 7 are saved and loaded, it takes a lot of time to switch tasks. Also, since the area to be saved is the TCB of each task, the instructions for saving and loading data require a move instruction requiring a large number of clocks (for example, an assembly language "MOV" instruction). Also required a lot of time to switch tasks.
[0009]
For this reason, there is a problem in that a program that requires real-time properties (for example, a program for high-speed traffic control, air traffic control, etc.) has a delay in processing and cannot realize real-time processing.
[0010]
SUMMARY OF THE INVENTION An object of the present invention is to speed up task management processing, particularly, register saving and restoring processing when a system call or interrupt occurs during task execution.
[0011]
[Means for Solving the Problems]
In order to achieve the above object, a task management device according to the present invention is a task management device that manages tasks executed by a processing device having a plurality of registers. When a system call or an interrupt occurs during the execution of a task, a register saving means for storing only the contents of a register used by the task among the plurality of registers in the storage means; And register return means for returning the contents of the register saved by the register save means to a corresponding register among the plurality of registers when the execution of the task is started. .
[0012]
A task management method according to the present invention is a method for managing a task executed by a computer having a processing device having a plurality of registers and a memory, wherein when a system call or an interrupt occurs during execution of the task, the plurality of registers are managed. Only the contents of the registers used by the task are stored in the storage unit, and when the execution of the task is started after the processing of the system call or the interrupt, the contents of the registers stored in the storage unit are stored. , And returning to the corresponding register among the plurality of registers.
[0013]
A task management program according to the present invention causes a computer that executes a task to execute the task management method.
[0014]
Here, the processing device having a plurality of registers may be any of a CPU, a microcomputer, a microprocessor, and the like.
[0015]
According to the present invention, when a system call or an interrupt occurs during the execution of a task, only the contents of the register used by the task among the plurality of registers of the processing unit that executes the task are stored (evacuated) in the storage unit. You. Therefore, the processing amount required for storage is reduced and the processing speed can be improved as compared with the conventional case where all the contents of a plurality of registers are stored.
[0016]
In one embodiment of the present invention, when the system call occurs, the register saving means stores only the contents of a register used by the task among the plurality of registers in the storage means, When the interrupt occurs, all the contents of the plurality of registers or all the contents of the registers except the stack pointer are stored in the storage means.
[0017]
Preferably, the storage means is a push-down stack, and the processing device is configured to store, as an instruction set, a push instruction for storing the contents of the register in the push-down stack and the push instruction stored in the push-down stack. A pop instruction for returning the contents of the register to the register. The register saving means saves the contents of the register by causing the processing device to execute the push instruction. Executes the pop instruction to restore the contents of the register to the register.
[0018]
The push instruction and the pop instruction can be executed with a smaller number of clocks than a data movement instruction (for example, “MOV” in assembler language). Therefore, this can also improve the processing speed.
[0019]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings, but this is merely an example and does not limit the technical scope of the present invention.
[0020]
FIG. 1 is a functional block diagram showing a configuration of a task management device 1 according to one embodiment of the present invention. The task management device 1 includes a register saving unit 2, a request processing unit 3, an execution task determining unit 4, a TCB updating unit 5, a register returning unit 6, and a storage unit 20. The storage unit 20 includes a stack (pushdown stack) 21.
[0021]
When a system call or an interrupt occurs during execution of a task, the register saving unit 2 stores the contents of a predetermined register (described later) of a processing device (CPU, microcomputer, microprocessor, etc.) of the computer executing the task. The data (address, address, etc.) is stored (save, pushed) in the stack 21 of the storage unit 20. The request processing unit 3 executes a system call or an interrupt process after the register contents are saved in the stack 21 by the register saving unit 2.
[0022]
The execution task determination unit 4 determines (selects) a task to be executed next after the processing of the system call or the interrupt by the request processing unit 3. The task executed before the system call or the interrupt may be selected again, or another task may need to be executed by the system call or the interrupt, and this different task may be selected. When another task is selected, the execution task determination unit 4 executes task switching.
[0023]
When the task switching is performed by the execution task determining unit 4, the TCB updating unit 5 is executed after the task control block (TCB: Task Control Block) of the task executed before the task switching and after the task switching. Update the contents of the TCB for the task. When task switching is not performed, the TCB updating unit 5 does not execute this updating process.
[0024]
The register return unit 6 stores (loads and pops) the contents of the predetermined register for the task determined by the execution task determination unit 4 from the stack 21 to the corresponding register of the processing device of the computer that executes the task. Thereafter, the task determined by the execution task determination unit 4 is executed.
[0025]
The task management device 1 is provided, for example, in a computer that executes a task, and can be realized by a program (task management program) as a part of an operating system (OS) of the computer. FIG. 2 shows a part of a configuration of a computer 100 in which the task management device 1 is implemented as a task management program.
[0026]
The computer 100 is a general computer, and includes a CPU 7, a memory (RAM) 15, a ROM (not shown), and the like. The CPU 7, the memory 15, the ROM (not shown), and the like are connected by a system bus (not shown), and the CPU 7 can read data from the memory 15 and the ROM and write data to the memory 15.
[0027]
The CPU 7 has registers such as a register group 10 for temporarily storing data to be processed and addresses, a program counter (PC) 8, and a stack pointer (SP) 9, in addition to an arithmetic unit (ALU) not shown. . The register group 10 has n general-purpose registers (n is an integer of 2 or more). An interrupt signal line (not shown) is input to the CPU 7. The interrupt includes a timer interrupt, an external data reception interrupt (for example, a data reception interrupt from a serial port), and the like.
[0028]
The memory 15 is provided with a task control block (TCB: Task Control Block) for storing information indicating the status of each task and a stack area (push-down stack area) for each task. In FIG. And B, respectively, the areas of TCBs 11 and 13 and stacks 12 and 14 are shown.
[0029]
The stacks 12 and 14 show the stack 21 of FIG. 1 in detail. The tasks A, B, etc. may be, for example, tasks of a program that requires real-time properties (for example, programs for high-speed traffic control, aircraft control, etc.) or tasks of a program that does not require real-time properties. You may.
[0030]
The TCB 11 has various data items such as a task ID, a program start address, a stack start address, a current stack address, a stack size, a priority, a stop cause, and a task state. The TCB 13 has the same data item. In the following, each data item will be described by taking the TCB 11 of the task A as an example, but the following contents are similarly applied to the TCB 13 of the task B and the TCB of another task (not shown).
[0031]
“Task ID” is identification information for uniquely identifying task A from other tasks. The “program start address” is a head address of a storage device (ROM (not shown) or memory 15) in which the program of the task A is stored.
[0032]
“Stack top address” is the top address of the stack 12 of task A. The “current stack address” is a current stack address of the stack 12 of the task A, that is, an address of a memory cell where data is stored when a next push (PUSH) instruction is executed. “Stack size” is the size (for example, the number of bytes) of the stack area allocated to task A.
[0033]
The “priority” is the priority of the task A, and the “stop cause” is the cause of the stop of the task A when the task A has stopped. The cause of this stop is a system call, interrupt, or termination. The “task state” is the current state of the task A, for example, one of RUN, READY, and WAIT.
[0034]
Note that, unlike the TCB of FIG. 4 described in the section of the related art, the storage areas of the registers (PC8, register group 10) other than SP9 are not provided in the TCBs 11 and 13.
[0035]
The memory 15 is also provided with a work area or the like (not shown) in which data or the like being processed is temporarily stored. The OS program including the task management program may be stored in a ROM (not shown), or may be read from the ROM or a hard disk and stored in the memory 15.
[0036]
FIG. 3 is a flowchart showing the flow of processing of the task management device 1 (task management program) in the computer 100. This flowchart also shows the detailed processing of the functional blocks in FIG.
[0037]
First, before describing the processing of the flowchart, prerequisites of the present embodiment will be described. A task program such as tasks A and B and a processing program for a system call (processing request to the OS) are executed after their source program (source code) is described in a predetermined high-level language (for example, C language, C ++ language, etc.). It is assumed that the object program (object code, machine language program) has been compiled by a compiler (for example, a C language or C ++ language compiler). On the other hand, it is assumed that the interrupt processing program is described in assembler language and has been converted to an object program.
[0038]
The compiler generally limits the registers used in the compiled object program to predetermined ones, and does not use all the registers of the CPU 7 in the object program. That is, the registers used in the object program are not all registers of the CPU 7 but some registers. For example, among the registers A1 to An of the register group 10, the registers A1 to Ai (i is an integer smaller than n) are used in the object program.
[0039]
Therefore, when a system call or interrupt processing occurs during the execution of a task and it is necessary to temporarily save the contents of the register that stores the processing data and address of the task, it is limited by the compiler, not all the registers. The task processing status can be saved only by saving the contents of the specified register. Then, the task processing can be resumed only by returning the contents of the predetermined register to the corresponding register of the CPU 7 again. Which register is the predetermined register can be known by checking the compiler.
[0040]
Thus, in the present embodiment, when a system call or an interrupt occurs during execution of a task, only the contents of a predetermined register limited by the compiler (hereinafter, simply referred to as “predetermined register”) are saved and restored. I will make it. As a result, the amount of processing required for saving and restoring is reduced, and the processing can be sped up as compared with the conventional processing that saves and restores the contents of all registers.
[0041]
Since the interrupt processing program is described in the assembler language, it is assumed that various registers are used by the writing user and are not constant. However, even in such a case, there is no problem because the processing data and the address of the task are stored as described above.
[0042]
Further, in the present embodiment, the areas of the memory 15 where the registers (except for the SP9) are temporarily saved are not the TCBs 11 and 13 as in the conventional case but the stacks 12 and 14. A push instruction (PUSH) for writing register contents to the stacks 12 and 14 and a pop instruction (POP) for reading register contents from the stacks 12 and 14 are instructions for writing and reading register contents to and from the TCBs 11 and 13 (for example, The processing is performed with a smaller number of clocks than the movement instruction “MOV”). Therefore, the saving process and the restoring process can be completed with a smaller number of clocks than in the related art by setting the save destination of the register contents to the stack, which can also speed up the process.
[0043]
Hereinafter, the processing of the flowchart in FIG. 3 will be described in detail based on such a premise.
[0044]
First, when a system call or an interrupt occurs during execution, the task management device 1 (the CPU 7 executing the task management program) saves (pushes) the contents of a predetermined register onto the stack of the task being executed (S1). .
[0045]
For example, when a system call or an interrupt occurs during the execution of task A, the contents of registers A1 to Ai of PC 8 and register group 10 are saved as predetermined registers in stack 12 of task A. Thus, the task management device 1 updates the current stack address of the TCB 11 of the task A.
[0046]
Subsequently, the task management device 1 processes a system call or an interrupt request (S2), and after the processing, determines a task to be executed next (S3).
[0047]
If the task is not switched due to the task determination and the task that has been executed is continuously executed (“none” in S4), the task management device 1 determines whether the task has been executed so far. The contents of the predetermined register are loaded (popped) from the stack into the corresponding register of the CPU 7 (S5). In this load processing, the address of the stack from which the contents of the predetermined register should be read is indicated by the current stack address of the TCB. After the loading, the task management device 1 updates the current stack address of the TCB.
[0048]
For example, if the task that has been executed is task A, the contents of PC8 and registers A1 to Ai are loaded into PC8 and registers A1 to Ai of CPU 7 from the current stack address of stack 12 of task A, respectively. You. After that, the current stack address of the TCB 11 of the task A is updated, and the execution of the task A is continued.
[0049]
On the other hand, when the task switching is performed and another task is executed (“Yes” in S4), the task management device 1 sets the TCB of the task executed before the switching and the task TCB of the task executed after the switching. The TCB is updated (S6, S7).
[0050]
For example, when the task B is executed by task switching after the execution of the task A, a system call or an interrupt is written as the cause of the stop of the TCB 11 of the task A, "WAIT" is written in the task state, and the task B is written. "RUN" is written in the task status of the TCB 13 in the "."
[0051]
Thereafter, the task management device 1 reads out the cause of the previous stop of the task executed after the switching from the cause of the stop of the TCB, and determines whether the cause of the stop is a system call, an interrupt, or an end (S9).
[0052]
For example, when the task B is executed by the task switching, the cause of the stop of the TCB 13 of the task B is examined.
[0053]
If the cause of the stop is a system call or an interrupt, the contents of the predetermined register saved at the previous stop are stored in the stack, so the task management device 1 loads these contents into the predetermined register. (S8). On the other hand, if the cause of the termination is termination, there is no need to save the contents of the predetermined register at the time of the stop, and therefore, the contents of the predetermined register are not stored in the stack. , Does not perform load processing. Then, the task after the switch is executed.
[0054]
Such processing is repeated each time a system call or an interrupt occurs during execution of each task.
[0055]
The register saved at the time of a system call and the register saved at the time of an interrupt can be made different. For example, at the time of a system call, the above-mentioned predetermined register can be saved, and at the time of an interrupt, all the registers except SP9 can be saved.
[0056]
FIG. 4 is a flowchart showing a processing flow of the task management device (task management program) 1 when a register to be saved at the time of a system call is different from a register to be saved at the time of an interrupt. The same processes as those in the flowchart of FIG. 3 are denoted by the same reference numerals, and detailed description thereof will be omitted.
[0057]
When a system call or an interrupt occurs during the execution of a task, the task management device 1 determines whether the activation cause is a system call or an interrupt (S11).
[0058]
If the activation cause is a system call, the task management device 1 executes the process of step S1. If the activation cause is an interrupt, the task management device 1 places all registers (PC8 except for SP9) in the stack of the task being executed. And the contents of the registers A1 to An) are saved (S12).
[0059]
Subsequently, the task management device 1 executes the processing of steps S2 to S4. If the task switching is not performed in step S4 (“none” in S4), the same determination as in step S11 is performed on the activation cause. (S13).
[0060]
If the activation cause is a system call, the task management device 1 executes the processing of step S5. If the activation cause is an interrupt, the task management device 1 deletes the SP from the stack of the task that was being executed before the interrupt occurred. The contents of all the registers except for them are loaded into the corresponding registers of the CPU 7 (S14). After that, the task that was being executed is executed again.
[0061]
On the other hand, if the task switching is performed in step S4 (“Yes” in S4), the task management device 1 executes the processing in steps S6 and S7, and then determines the previous stop cause of the switched task by TCB. (S15).
[0062]
When the cause of the stop is a system call ("system call" in S15), the task management device 1 executes the process of step S8 (the process of loading the contents of a predetermined register into a predetermined register). If the cause of the interruption is an interrupt ("interrupt" in S15), the task management device 1 saves the contents of the saved registers since the contents of all registers except SP9 are saved on the stack at the time of the interruption. The data is loaded into the corresponding register of the CPU 7 (S16).
[0063]
On the other hand, if the cause of the termination is termination (“termination” in S15), the register contents are not saved, so that the register contents are not loaded. Then, the task after the switch is executed.
[0064]
Such processing is repeated each time a system call or an interrupt occurs during execution of each task.
[0065]
According to the process shown in the flowchart of FIG. 4, the number of processes required for saving and restoring the registers is reduced as compared with the related art, so that the process can be sped up. Further, since the register is saved to the stack, the processing speed is also improved.
[0066]
Note that, when an interrupt occurs, all registers except for SP9 are saved and then restored. However, saving and restoring processes including SP9 may be executed.
[0067]
【The invention's effect】
According to the present invention, the amount of processing required for task management, particularly the amount of processing required for saving and restoring the contents of registers is reduced, so that the task management processing can be sped up. Further, by using a push instruction and a pop instruction as instructions for executing the save processing and the restore processing of the contents of the register, respectively, the processing is executed with a small number of clocks, whereby the processing can be sped up.
[Brief description of the drawings]
FIG. 1 is a functional block diagram showing a configuration of a task management device according to an embodiment of the present invention.
FIG. 2 shows a part of a configuration of a computer in which a task management device according to an embodiment of the present invention is implemented as a task management program and is mounted.
FIG. 3 is a flowchart showing a processing flow of a task management device (task management program) in the computer.
FIG. 4 is a flowchart showing a processing flow of a task management device (task management program) in the computer.
FIG. 5 shows an outline of a conventional task management process executed on a computer.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Task management device 2 Register saving unit 6 Register returning unit 20 Storage unit 21 Stack 7 CPU
8 Program counter 9 Stack pointer 10 Register group 15 Memory 11, 13 Task control block 12, 14 Task stack

Claims (5)

In a task management device that manages tasks executed by a processing device having a plurality of registers,
Storage means for storing the contents of the register;
When a system call or an interrupt occurs during execution of the task, register saving means for storing only the contents of the register used by the task among the plurality of registers in the storage means;
Register return means for returning the contents of the register saved by the register save means to a corresponding register among the plurality of registers when execution of the task is started after processing of the system call or interrupt;
A task management device comprising: In claim 1,
The register saving means stores only the contents of the registers used by the task in the storage means when the system call occurs, and stores the contents of the registers when the interrupt occurs. Storing all the contents of the plurality of registers or all the contents of the registers except the stack pointer in the storage means;
A task management device, characterized in that: In claim 1 or 2,
The storage means is a push-down stack,
The processing device has, as an instruction set, a push instruction for storing the contents of the register in the push-down stack, and a pop instruction for returning the contents of the register stored in the push-down stack to the register.
The register saving means saves the contents of the register by causing the processing device to execute the push instruction,
The register returning means causes the processing device to execute the pop instruction, thereby returning the contents of the register to the register.
A task management device, characterized in that: In a method for managing a task executed by a computer having a processing device having a plurality of registers and a memory,
When a system call or an interrupt occurs during execution of the task, only the contents of the registers used by the task among the plurality of registers are stored in the storage unit,
When the execution of the task is started after the processing of the system call or the interrupt, the content of the register stored in the storage unit is returned to a corresponding register among the plurality of registers.
A task management method characterized in that: On the computer that executes the task,
When a system call or an interrupt occurs during the execution of the task, a procedure of storing only the contents of registers used by the task in a memory of the computer among a plurality of registers of the processing unit of the computer;
Returning the contents of the register stored in the memory to the corresponding register among the plurality of registers of the processing device when the execution of the task is started after the processing of the system call or the interrupt;
A task management program for running

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