JP2003504740A - モノリシック安全保護モジュールにおける敏感な情報の処理の安全保護方法、および関連する安全保護モジュール - Google Patents
モノリシック安全保護モジュールにおける敏感な情報の処理の安全保護方法、および関連する安全保護モジュールInfo
- Publication number
- JP2003504740A JP2003504740A JP2001508794A JP2001508794A JP2003504740A JP 2003504740 A JP2003504740 A JP 2003504740A JP 2001508794 A JP2001508794 A JP 2001508794A JP 2001508794 A JP2001508794 A JP 2001508794A JP 2003504740 A JP2003504740 A JP 2003504740A
- Authority
- JP
- Japan
- Prior art keywords
- security
- information
- data
- information processing
- processing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06Q—INFORMATION AND COMMUNICATION TECHNOLOGY [ICT] SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES; SYSTEMS OR METHODS SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES, NOT OTHERWISE PROVIDED FOR
- G06Q20/00—Payment architectures, schemes or protocols
- G06Q20/38—Payment protocols; Details thereof
- G06Q20/382—Payment protocols; Details thereof insuring higher security of transaction
- G06Q20/3829—Payment protocols; Details thereof insuring higher security of transaction involving key management
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/50—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
- G06F21/52—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems during program execution, e.g. stack integrity ; Preventing unwanted data erasure; Buffer overflow
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
- G06F21/75—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by inhibiting the analysis of circuitry or operation
- G06F21/755—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by inhibiting the analysis of circuitry or operation with measures against power attack
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06Q—INFORMATION AND COMMUNICATION TECHNOLOGY [ICT] SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES; SYSTEMS OR METHODS SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES, NOT OTHERWISE PROVIDED FOR
- G06Q20/00—Payment architectures, schemes or protocols
- G06Q20/30—Payment architectures, schemes or protocols characterised by the use of specific devices or networks
- G06Q20/36—Payment architectures, schemes or protocols characterised by the use of specific devices or networks using electronic wallets or electronic money safes
- G06Q20/367—Payment architectures, schemes or protocols characterised by the use of specific devices or networks using electronic wallets or electronic money safes involving electronic purses or money safes
- G06Q20/3672—Payment architectures, schemes or protocols characterised by the use of specific devices or networks using electronic wallets or electronic money safes involving electronic purses or money safes initialising or reloading thereof
Landscapes
- Engineering & Computer Science (AREA)
- Business, Economics & Management (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Security & Cryptography (AREA)
- Accounting & Taxation (AREA)
- General Physics & Mathematics (AREA)
- Finance (AREA)
- Software Systems (AREA)
- Computer Hardware Design (AREA)
- General Engineering & Computer Science (AREA)
- Strategic Management (AREA)
- General Business, Economics & Management (AREA)
- Computer Networks & Wireless Communication (AREA)
- Mathematical Physics (AREA)
- Storage Device Security (AREA)
- Detection And Correction Of Errors (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR9908409A FR2795838B1 (fr) | 1999-06-30 | 1999-06-30 | Procede de securisation du traitement d'une information sensible dans un module de securite monolithique, et module de securite associe |
| FR99/08409 | 1999-06-30 | ||
| PCT/FR2000/001814 WO2001003084A1 (fr) | 1999-06-30 | 2000-06-29 | Procede de securisation du traitement d'une information sensible dans un module de securite monolithique, et module de securite associe |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2003504740A true JP2003504740A (ja) | 2003-02-04 |
| JP2003504740A5 JP2003504740A5 (enExample) | 2006-01-05 |
Family
ID=9547522
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2001508794A Pending JP2003504740A (ja) | 1999-06-30 | 2000-06-29 | モノリシック安全保護モジュールにおける敏感な情報の処理の安全保護方法、および関連する安全保護モジュール |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US7330979B1 (enExample) |
| EP (1) | EP1108249B1 (enExample) |
| JP (1) | JP2003504740A (enExample) |
| KR (1) | KR100710817B1 (enExample) |
| DE (1) | DE60044893D1 (enExample) |
| FR (1) | FR2795838B1 (enExample) |
| WO (1) | WO2001003084A1 (enExample) |
Families Citing this family (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1603088A1 (fr) * | 2004-06-03 | 2005-12-07 | Nagracard S.A. | Composant pour module de sécurité |
| US7516902B2 (en) | 2004-11-19 | 2009-04-14 | Proton World International N.V. | Protection of a microcontroller |
| EP1943604A1 (en) * | 2005-10-24 | 2008-07-16 | Nxp B.V. | Semiconductor device and method for preventing attacks on the semiconductor device |
| GB0601849D0 (en) * | 2006-01-30 | 2006-03-08 | Ttp Communications Ltd | Method of maintaining software integrity |
| US8010585B2 (en) | 2006-02-10 | 2011-08-30 | Stmicroelectronics S.A. | Checking the integrity of programs or the sequencing of a state machine |
| WO2008084016A1 (fr) * | 2007-01-05 | 2008-07-17 | Proton World International N.V. | Protection d'informations contenues dans un circuit electronique |
| JP4882006B2 (ja) * | 2007-01-05 | 2012-02-22 | プロトン ワールド インターナショナル エヌ.ヴィ. | 電子回路のリソースへのアクセス制限 |
| US9036414B2 (en) * | 2007-01-05 | 2015-05-19 | Proton World International N.V. | Temporary locking of an electronic circuit to protect data contained in the electronic circuit |
| US20080208760A1 (en) * | 2007-02-26 | 2008-08-28 | 14 Commerce Inc. | Method and system for verifying an electronic transaction |
| US7783876B2 (en) * | 2007-05-01 | 2010-08-24 | Hewlett-Packard Development Company, L.P. | Comparing characteristics prior to booting devices |
| JP2009105279A (ja) * | 2007-10-24 | 2009-05-14 | Fujitsu Microelectronics Ltd | 半導体装置の製造方法及び半導体装置 |
| FR2924262B1 (fr) | 2007-11-26 | 2009-12-11 | Sagem Securite | Procede de masquage de passage en fin de vie d'un dispositif electronique et dispositif comportant un module de controle correspondant |
| FR2934396B1 (fr) * | 2008-07-24 | 2010-09-17 | Oberthur Technologies | Procede de traitement conditionnel de donnees protege contre les attaques par generation de fautes et dispositif associe |
| US8719957B2 (en) | 2011-04-29 | 2014-05-06 | Altera Corporation | Systems and methods for detecting and mitigating programmable logic device tampering |
Family Cites Families (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2461301A1 (fr) | 1978-04-25 | 1981-01-30 | Cii Honeywell Bull | Microprocesseur autoprogrammable |
| US4281216A (en) * | 1979-04-02 | 1981-07-28 | Motorola Inc. | Key management for encryption/decryption systems |
| JP2557838B2 (ja) * | 1986-02-18 | 1996-11-27 | 株式会社東芝 | Icカ−ド |
| JP2514954B2 (ja) * | 1987-03-13 | 1996-07-10 | 三菱電機株式会社 | Icカ−ド |
| JPH04141794A (ja) * | 1990-10-03 | 1992-05-15 | Mitsubishi Electric Corp | Icカード |
| FR2668274B1 (fr) | 1990-10-19 | 1992-12-31 | Gemplus Card Int | Circuit integre a securite d'acces amelioree. |
| US5649090A (en) * | 1991-05-31 | 1997-07-15 | Bull Hn Information Systems Inc. | Fault tolerant multiprocessor computer system |
| GB2258063B (en) * | 1991-07-26 | 1995-07-05 | Research Machines Plc | Monitoring execution of a computer program to provide profile analysis |
| US5313618A (en) * | 1992-09-03 | 1994-05-17 | Metalink Corp. | Shared bus in-circuit emulator system and method |
| US5644354A (en) * | 1992-10-09 | 1997-07-01 | Prevue Interactive, Inc. | Interactive video system |
| US5442704A (en) * | 1994-01-14 | 1995-08-15 | Bull Nh Information Systems Inc. | Secure memory card with programmed controlled security access control |
| FR2720173B1 (fr) * | 1994-05-20 | 1996-08-14 | Sgs Thomson Microelectronics | Circuit intégré comprenant des moyens pour arrêter l'exécution d'un programme d'instructions quand une combinaison de points d'arrêt est vérifiée. |
| JP3461234B2 (ja) * | 1996-01-22 | 2003-10-27 | 株式会社東芝 | データ保護回路 |
| US5978865A (en) * | 1997-02-04 | 1999-11-02 | Advanced Micro Devices, Inc. | System for performing DMA transfers where an interrupt request signal is generated based on the value of the last of a plurality of data bits transmitted |
| FR2764716B1 (fr) * | 1997-06-13 | 2001-08-17 | Bull Cp8 | Procede de modification de sequences de code et dispositif associe |
| JP3815022B2 (ja) * | 1998-02-09 | 2006-08-30 | 富士ゼロックス株式会社 | 利用資格検証装置および方法、ならびに、利用資格検証システム |
-
1999
- 1999-06-30 FR FR9908409A patent/FR2795838B1/fr not_active Expired - Fee Related
-
2000
- 2000-06-29 KR KR1020017002643A patent/KR100710817B1/ko not_active Expired - Lifetime
- 2000-06-29 DE DE60044893T patent/DE60044893D1/de not_active Expired - Lifetime
- 2000-06-29 WO PCT/FR2000/001814 patent/WO2001003084A1/fr not_active Ceased
- 2000-06-29 EP EP00946036A patent/EP1108249B1/fr not_active Expired - Lifetime
- 2000-06-29 US US09/763,868 patent/US7330979B1/en not_active Expired - Lifetime
- 2000-06-29 JP JP2001508794A patent/JP2003504740A/ja active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| EP1108249B1 (fr) | 2010-09-01 |
| DE60044893D1 (de) | 2010-10-14 |
| KR20010074881A (ko) | 2001-08-09 |
| WO2001003084A1 (fr) | 2001-01-11 |
| EP1108249A1 (fr) | 2001-06-20 |
| US7330979B1 (en) | 2008-02-12 |
| FR2795838A1 (fr) | 2001-01-05 |
| KR100710817B1 (ko) | 2007-04-24 |
| FR2795838B1 (fr) | 2001-08-31 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A131 | Notification of reasons for refusal |
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| A911 | Transfer to examiner for re-examination before appeal (zenchi) |
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