JP2003502844A - Method for manufacturing semiconductor device - Google Patents

Abstract

Abstract: A method of manufacturing a semiconductor device, comprising growing at least one tapered epitaxial layer on a support surface by chemical beam epitaxy, wherein the plane of the taper slopes to the support surface.

Description

Detailed Description of the Invention

The present invention relates to a method of manufacturing a semiconductor device having a tapered epitaxial layer.

Optoelectronic systems include optical fibers and optoelectronic semiconductor devices such as lasers, amplifiers, modulators, detectors, and switches. The size and shape of the optical modes maintained by an optical fiber differ significantly from the size and shape of the optical modes of optoelectronic semiconductor devices, and as a result, when optical radiation is coupled between such devices and the fiber. , Resulting in mode mismatch and large optical loss.

One technique for reducing such optical losses involves the use of microlenses provided between the optoelectronic semiconductor device and the optical fiber. The microlens changes the size of the output of the optical mode by the optoelectronic semiconductor device or the optical fiber, but does not change the shape of the optical mode. Another technique involves the use of an optical mode conversion waveguide provided between the optoelectronic semiconductor device and the optical fiber. Both of these techniques require very high alignment tolerances, so that the alignment of each component can make up the largest portion of the total cost of an optoelectronic system.

A third technique for reducing coupling loss is the use of optoelectronic semiconductor devices with output waveguides that have a two-dimensional tapered thickness profile between the active portion of the device and the output facets. including. This taper of the output waveguide is relatively small (0) from the active portion of the optoelectronic semiconductor device, sometimes highly asymmetric.
． It allows the 5 μm to 2.0 μm) optical mode to be closely matched to the larger (6 μm to 10 μm) circular symmetric optical mode maintained by the optical fiber.

The lateral tapering of the output waveguides of optoelectronic semiconductor devices, ie in the plane parallel to the substrate surface, can be achieved using known semiconductor processing techniques such as photolithography and chemical etching. This is done after the epitaxial growth of the wafer from which the device is made. Tapering the core layer of the waveguide in a plane perpendicular to the plane in which the epitaxial layer is grown is more difficult and involves managing the core layer thickness during wafer growth.

The method currently used to produce vertically tapered, flared semiconductor optical waveguides is described by Moerman in “IEEE Journal of
Selected Topics in Quantum Electroni
cs ”, Vol. 3, No. 6, pages 1308 to 1320, and can be classified under the following three main headings.

Etching and regrowth techniques In these techniques, the epitaxial growth of the wafer is stopped after the deposition of the core layer of the waveguide. The wafer is then removed from the wafer growth apparatus and the core layer is etched to create the required taper profile. The wafer is then reloaded into the growth apparatus and an upper waveguiding layer is grown over the etched core layer. These techniques have the following disadvantages. First, the whole process is complicated,
take time. Second, removing the partially grown wafer from the growth apparatus,
And, the etching of the waveguide core layer leads to contamination of the waveguide, increasing optical loss and lowering the yield. Third, these methods are very reproducible.
In one such method, known as immersion etching, it is not possible to treat the entire surface of the wafer.

Impurity Induced Disordering This is a technique for producing vertically tapered waveguides where the core layer starts with a waveguide having a uniform thickness. This technique is limited to cases where the first uniform waveguide must have a core layer consisting of multiple quantum well regions. Zinc diffuses into the waveguide through the upper waveguiding layer and penetrates the core layer to a depth that varies according to the lateral position, ie, the position in the plane of the epitaxial layer. Where zinc is diffused, the index of refraction of the core layer is reduced to that of the waveguide layer, creating a vertical taper of the waveguide. This technique is less reproducible and the resulting waveguide has large optical losses in the regions where zinc diffusion has occurred. There are also restrictions on the material systems that can be used.

Epitaxial Techniques There are several techniques by which the tapered core layer and the upper waveguide layer of the waveguide can be grown in a single step. For example, molecular beam epitaxy (Molecu
The temperature gradient introduced by the Lar Beam Epitaxy (MBE) into the plane of the wafer consisting of the substrate and the lower waveguiding layer during the growth of the core layer can be used to control the thickness of this layer. In this technique, it is very difficult to control the compositional homogeneity of the ternary compound and the quaternary compound over the temperature gradient, and a material having a low melting point or a material requiring a high growth temperature is suitable for the growth temperature. The range may be narrow. This places a limit on the temperature gradient that can be adopted.

Another epitaxial technique is known as “growth-on-a-ridge”. Ridges of varying width can be created on the wafer including the substrate and lower waveguide layer by standard etching methods. Metal-organic vapor phase epitaxy (metal-organic vapor phase epitaxy)
, MOVPE), the growth rate of the remaining waveguide layer increases as the width of the ridge narrows, creating a tapered waveguide. This technique involves complex and time consuming wafer processing prior to epitaxial growth of the core and top waveguide layers.

Yet another epitaxial technique is shadow mask MOVPE growth using a dielectric mask. In this technique, a patterned dielectric mask is deposited on the wafer. During MOVPE epitaxial growth, deposition occurs through the shadow mask window. The lateral thickness of the layer deposited under the shadow mask can be controlled by varying the lateral dimensions of the window, the mask to substrate distance, and the reaction pressure. This technique includes an additional growth step of growing the dielectric mask and additional processing steps to remove it. This also includes processing steps for patterning the mask, which may involve considerable delay and leave contamination on the surface. Although mechanical shadow masks can be used in place of dielectric masks, MOVPE growth leads to compositional non-uniformity within the tapered layer due to unequal reaction gas diffusion dimensions of MOVPE growth. Is inevitable. this is,
This leads to a non-uniform index of refraction within the tapered layer which adversely affects the waveguiding of light within this layer. Similarly, exposing the wafer to the atmosphere during mask insertion and removal is
This may result in wafer contamination. As a further disadvantage, the deposition of material on the mask itself requires cleaning and replacement of the mask.

It is an object of the present invention to provide an alternative process of manufacturing a semiconductor optical slab waveguide.

The present invention provides that the at least one tapered epitaxial layer comprises a taper in a plane that is tilted with respect to the support surface to provide chemical beam epitaxy (Chem).
A method of manufacturing a semiconductor device comprising the step of growing at least one tapered epitaxial layer on a supporting surface, characterized in that the semiconductor device is grown by means of an optical beam epitaxy (CBE).

The invention makes it possible to fabricate a waveguide containing a continuously tapered core layer in a plane perpendicular to the plane of the substrate on which the waveguide is fabricated. MOVPE
In a tapered waveguide grown by, the thickness of the core layer first increases before it is tapered towards the thin portion of the core. This has a detrimental effect on the waveguiding properties and the optical loss of the waveguide, which is prevented in the process.
Furthermore, the compositional non-uniformity present in the tapered region of the waveguide created by MOVPE growth is prevented due to the lack of vapor phase reaction in CBE growth. The method allows to prevent uncontrolled changes in thickness and refractive index during epitaxial growth, which can adversely affect the waveguide properties of the waveguide or increase its optical loss. To

The invention also provides that at least one tapered epitaxial layer is grown with a taper in a plane perpendicular to the support surface using a mechanical shadow mask and a single epitaxial growth step. Also provided is a method of manufacturing a semiconductor device, the method including:

Since the tapered layer is produced entirely by epitaxial growth, the process is relatively simple and fast, allowing relatively inexpensive production on an industrial scale. The method prevents contamination associated with treating the layer to obtain a layer that is tapered in a plane perpendicular to the support surface. Since there is no polycrystalline growth on the shadow mask during epitaxial growth, the shadow mask used in this process retains its resolution during the process and can be reused in subsequent growth runs without cleaning. . This is in contrast to MBE growth, where a large amount of polycrystalline growth occurs on the shadow mask, resulting in unwanted shadow effects.

The invention further provides a method of manufacturing a semiconductor device, characterized in that the at least one tapered epitaxial layer is grown in the same growth step as the at least one untapered epitaxial layer. provide.

The method provides improvements in the speed of making such devices, as well as in the yield and quality of such devices.

When the present process is adopted to manufacture aluminum gallium arsenide (AlGaAs) and gallium arsenide (GaAs) waveguides, triethylgallium (TEGa) or triisopropylgallium (TIPG) is used as a source of gallium.
It is preferred to use a), the alane ethyldimethylamine adduct (EDMAAl) as the source of aluminum and the pyrolysed arsine as the source of arsenic. Growth is preferably carried out at temperatures in the range of 500 to 600 ° C. in order to reduce impurities in the grown crystals and thereby improve the optical properties of the resulting device.

Indium phosphide (InP) and indium gallium arsenide phosphide (InGaAs
For P) -based waveguides, the process preferably uses trimethylindium (TMIn), trimethylgallium (TMGa), arsine, and phosphine as sources of indium, gallium, arsenic, and phosphorus, respectively.

In order that the invention may be more fully understood, embodiments of the invention are now described, by way of example only, with reference to the accompanying drawings.

Referring to FIG. 1, a portion of a vertical cross section through a gallium arsenide (GaAs) substrate wafer 10 is shown. Substrate 10 is prepared for epitaxial growth according to standard procedures well known to those skilled in semiconductor device manufacturing. The substrate 10 is mounted on a molybdenum holder (not shown). The mounted substrate 10 is mounted on a chemical beam epitaxy (CBE) apparatus (not shown), and then an ultra high vacuum (U) is used.
Ltra-High Vacuum, UHV). This is then
It is mounted in the growth chamber of a CBE device under UHV conditions to maintain a stable surface and prevent roughening, while under the overpressure of arsenic to prevent oxide deposition on the surface, about 650 Heated to ℃. The preferred source is then used to reduce the unintentional contamination of impurities during CBE growth by raising the temperature of the substrate 10 to a growth temperature in the range of 400 ° C. to 700 ° C., typically 540 ° C. Is set. Referring to FIG. 2, the following layers are deposited sequentially by CBE uniformly over the surface of substrate 10 in the following order.

2. 0.5 μm layer 11 of GaAs, 3. AlGaAs with a mole fraction of aluminum of 0.05 ± 0.005.
5 μm layer 12, 0.4 μ of AlGaAs with an aluminum mole fraction of 0.3 ± 0.03
m layer 13 and 1.8 μm layer 14 of GaAs.

During CBE growth of layers 11-14, the CBE reaction pressure is kept below 10 ⁻³ Torr to prevent vapor phase reactions and the substrate 10 is spun at 60 revolutions per minute.
Layer 11 is a buffer layer that separates the waveguide layer from the substrate 10. Layers 12 and 13 form the lower waveguide layer in the completed waveguide. The thickness of layer 14 is equal to the thickness of the thin area of the tapered core layer in the finished waveguide. Board 10
And layers 11 to 14 constitute a partially grown wafer 28. Following the deposition of layer 14, the flow of arsine is stopped and the temperature of wafer 28 is reduced to 200 ° C. to prevent its upper surface from becoming rough.

Referring now to FIG. 3, a silicon dioxide coated silicon shadow mask 22 (showing the edges) having a series of holes, such as 23, is used for tantalum in a molybdenum carrier (not shown). It is loaded in close contact with the spacer 20. The shadow mask 22 and the spacer 20 are mounted in the growth chamber of the CBE apparatus under the UHV state and fixed by a clamp at a predetermined position. Spacer 20 is 100 μm
At a distance of .epsilon., The shadow mask 22 is separated from the exposed surface of layer 14. The flow of arsine is initiated and the temperature of the wafer 28 is adjusted to the original growth temperature (540) for the shadow mask 22 to compensate for the increase in the surface temperature of the wafer 28 as a result of reducing heat loss from the shadow mask 22. ℃) to the growth temperature. next,
CBE growth resumes. The environmental conditions within the CBE apparatus are such that CBE growth is now performed on the chemically relevant surface (ie layer 14) rather than on the improper surface (ie surface of mask 22). is there. A 4 μm layer 16 of GaAs is grown over layer 14 through the holes in shadow mask 22. Mask 22
In regions such as 29 near the edges of the pores of, the growth rate is reduced, so that the completed layer 16 will have 0 in region 29 over a lateral distance of about 1000 μm.
Has a thickness profile that tapers smoothly from 1 to 4 μm. Layers 14 and 16 form a uniform core layer 18 having tapered regions such as 15. A taper profile such as 15 is believed to be dominated by the angle at which the chemical beam reaches the wafer 28 during epitaxial growth. The length of taper 15 can be controlled by varying the thickness of spacer 20 and the angle at which the chemical beam reaches wafer 28. This is because the profile of the taper is dominated by the shape of the holes in the shadow mask and the gas phase reaction, so that the length of the taper can be limited by the diffusion distance of molecules onto the surface at a given temperature,
In contrast to MOVPE shadow mask growth.

The growth of layer 16 is terminated by stopping the flow of the Group III containing species into the growth chamber of the CBE apparatus. The temperature of the wafer 30 is lowered to 200 ° C.
The supply of arsine to the device is stopped. Spacer 20 and shadow mask 22
Are removed under UHV conditions. Then, the flow of arsine is started and the temperature of the wafer 30 is returned to about 540 ° C. Next, CBE growth is restarted. Referring to FIG. 4, AlGaAs having an aluminum mole fraction of 0.2 ± 0.02.
A 1.2 .mu.m thick layer 24 is deposited on the upper surface of layer 18 to form the upper waveguiding layer. A 0.1 μm cap layer 26 of GaAs is uniformly deposited over the upper waveguiding layer 24. Here, the epitaxial growth is completed and the completed wafer 3
1 is removed from the CBE device.

Next, the waveguide is laterally tapered by photolithography and reactive ion etching to create a laterally tapered ridge waveguide, ie, the plane of the surface of the substrate 10. Taper in a plane parallel to. Accurate photolithography is achieved using minimum length tapered alignment features deposited through shadow mask 22. The completed device is a two-dimensionally tapered passive ridge waveguide containing a core region that converts the size of the internally guided optical modes.

The CBE apparatus includes a stainless steel growth chamber having a rotatable heated substrate assembly, a gas inlet manifold, a stainless steel storage chamber for storage of substrate and shadow mask, mounting substrate and shadow mask, and It includes a stainless steel load lock chamber for removal and a transfer mechanism for transferring the substrate and shadow mask between the chambers. The CBE device also includes a vacuum pump to maintain the UHV condition inside each chamber of the device. During epitaxial growth, group III and group V chemical beams impinge on the surface of substrate 10 at 45 °.

Referring to FIG. 5, during the epitaxial growth, the substrate 10, in the CBE apparatus,
Shown is a vertical cross-sectional view of the mechanical device 50 used to hold the spacer 20 and the shadow mask 22. The substrate 10 is mounted on a molybdenum carrier 52 and secured in place by two tantalum springs 54. The substrate 10 has a large flat portion that lies rigidly against the flat surface 56 of the carrier 52. The carrier 52 includes a heater assembly 5 with three pins such as 60.
It is attached to 8. Spacer 20 and shadow mask 22 are molybdenum holders 6 mounted on device 50 over substrate 10 by three pins such as 64.
Mounted on 2, the spacer 20 makes contact with the substrate 10 around its edges. A clamping ring 66 with three springs 68 is mounted over the shadow mask 20 over the three pins to ensure contact between the spacer 20 and the substrate 10. The device 50 minimizes rotational error between the substrate 10 and the shadow mask 22 and provides accurate alignment.

Referring to FIG. 6, a vertical cross-sectional view of shadow mask 22 is shown. The mask 22 is manufactured from a silicon wafer having a thickness of 450 μm and a diameter of 75 mm. The <111> plane of this silicon wafer was formed by standard photolithography and chemical etching procedures with respect to the plane of the silicon wafer by 54.
Etched to make a series of holes, such as 23 with beveled sides such as 90 that are beveled at 7 °. The remaining silicon 92 is covered with a thermal oxide film 91. CB
Due to the E growth chemistry, there is no polycrystalline growth on the shadow mask 22 during the epitaxial growth of layer 16. This is because in CBE growth, decomposition of the metal-containing alkyl does not occur on the oxide film surface 91 of the mask 22 over a wide temperature range. FIG. 7 is a plan view of the shadow mask 22, and similarly,
The positions of the holes 23 and the substrate 10 are shown. Shadow mask 22 includes holes 40 for the entry of springs 54 and flat surface 56. The mask 22 also has holes 41 that allow it to be attached to a molybdenum carrier 62.

In another embodiment of the present invention, the process is such that the waveguiding layer comprises indium gallium arsenide phosphide (InGaAsP) and the tapered core layer comprises indium phosphide (InP).
It can be used to make tapered waveguides made of InP). Such a waveguide can be used to guide and reshape optical modes with wavelengths of about 1.3 μm or 1.5 μm. In yet another embodiment of the invention, the process uses indium arsenide (In) for radiation having a wavelength between 1 μm and 8 μm.
As), gallium antimony (GaSb), or indium antimony (I
nSb) can be used to fabricate vertically tapered waveguides with core layers.

The process of the present invention can also be used to fabricate other semiconductor devices incorporating at least one tapered layer in a single epitaxial growth step. FIG. 8 shows an optoelectronic semiconductor modulator 100 that can be manufactured by this process.
Shows the structure of. The modulator 100 is manufactured as follows. n-type Ga
The As substrate wafer 110 is prepared, loaded and mounted on the CBE apparatus as described above. The following epitaxial layers are then deposited by CBE on wafer 1
10 is continuously deposited.

0.5 μm layer 1 of n-type GaAs with a doping concentration of 10 ¹⁸ cm ⁻³
12, 3.5 μm layer 114 of n-type AlGaAs with a molar fraction of aluminum of 0.05 ± 0.005 and a doping concentration of 10 ¹⁸ cm ⁻³ , a molar fraction of aluminum of 0.3 ± 0.03 And a 0.3 μm layer 116 of n-type AlGaAs having a doping concentration of 10 ¹⁸ cm ⁻³ , an aluminum mole fraction of 0.3 ± 0.03, and an n having a doping concentration of 10 ¹⁷ cm ^−3. The thickness of the 0.1 μm layers 118, 120 of the type AlGaAs is increased from 1.8 μm to 5.8 μm over a lateral distance of about 1000 μm and is formed using spacers and shadow masks as described above. Undoped GaAs with tapered region 126
Layer 120, a 1.2 μm layer 122 of undoped AlGaAs having an aluminum mole fraction of 0.2 ± 0.02, and a 0.1 μm cap layer 124 of undoped GaAs.

[Brief description of drawings]

FIG. 1 shows the principle steps of a process according to the invention for producing a semiconductor optical waveguide with a two-dimensionally tapered core layer.

FIG. 2 shows the principle steps of the process according to the invention for producing a semiconductor optical waveguide with a two-dimensionally tapered core layer.

FIG. 3 shows the principle steps of the process according to the invention for producing a semiconductor optical waveguide with a two-dimensionally tapered core layer.

FIG. 4 shows the principle steps of the process according to the invention for producing a semiconductor optical waveguide with a two-dimensionally tapered core layer.

[Figure 5]   FIG. 6 is a vertical cross-sectional view of a mechanical device used during the fabrication of a waveguide.

[Figure 6]   It is a vertical sectional view of a shadow mask used for this process.

[Figure 7]   It is a top view of a shadow mask.

FIG. 8 shows the structure of an optoelectronic semiconductor modulator, which can also be made by the process of the present invention and has a two-dimensionally tapered core layer.

[Procedure for Amendment] Submission for translation of Article 34 Amendment of Patent Cooperation Treaty

[Submission date] April 11, 2001 (2001.4.11)

[Procedure Amendment 1]

[Document name to be amended] Statement

[Correction target item name] Full text

[Correction method] Change

[Contents of correction]

Title: Method for manufacturing semiconductor device

[Claims]

Detailed Description of the Invention

The present invention relates to a method of manufacturing a semiconductor device having a tapered epitaxial layer.

Optoelectronic systems include optical fibers and optoelectronic semiconductor devices such as lasers, amplifiers, modulators, detectors, and switches. The size and shape of the optical modes maintained by an optical fiber differ significantly from the size and shape of the optical modes of optoelectronic semiconductor devices, and as a result, when optical radiation is coupled between such devices and the fiber. , Resulting in mode mismatch and large optical loss.

One technique for reducing such optical losses involves the use of microlenses provided between the optoelectronic semiconductor device and the optical fiber. The microlens changes the size of the output of the optical mode by the optoelectronic semiconductor device or the optical fiber, but does not change the shape of the optical mode. Another technique involves the use of an optical mode conversion waveguide provided between the optoelectronic semiconductor device and the optical fiber. Both of these techniques require very high alignment tolerances, so that the alignment of each component can make up the largest portion of the total cost of an optoelectronic system.

A third technique for reducing coupling loss is the use of optoelectronic semiconductor devices with output waveguides that have a two-dimensional tapered thickness profile between the active portion of the device and the output facets. including. This taper of the output waveguide is relatively small (0) from the active portion of the optoelectronic semiconductor device, sometimes highly asymmetric.
． It allows the 5 μm to 2.0 μm) optical mode to be closely matched to the larger (6 μm to 10 μm) circular symmetric optical mode maintained by the optical fiber.

The lateral tapering of the output waveguides of optoelectronic semiconductor devices, ie in the plane parallel to the substrate surface, can be achieved using known semiconductor processing techniques such as photolithography and chemical etching. This is done after the epitaxial growth of the wafer from which the device is made. Tapering the core layer of the waveguide in a plane perpendicular to the plane in which the epitaxial layer is grown is more difficult and involves managing the core layer thickness during wafer growth.

The method currently used to produce vertically tapered, flared semiconductor optical waveguides is described by Moerman in “IEEE Journal of
Selected Topics in Quantum Electroni
cs ”, Vol. 3, No. 6, pages 1308 to 1320, and can be classified under the following three main headings.

Etching and regrowth techniques In these techniques, the epitaxial growth of the wafer is stopped after the deposition of the core layer of the waveguide. The wafer is then removed from the wafer growth apparatus and the core layer is etched to create the required taper profile. The wafer is then reloaded into the growth apparatus and an upper waveguiding layer is grown over the etched core layer. These techniques have the following disadvantages. First, the whole process is complicated,
take time. Second, removing the partially grown wafer from the growth apparatus,
And, the etching of the waveguide core layer leads to contamination of the waveguide, increasing optical loss and lowering the yield. Third, these methods are very reproducible.
In one such method, known as immersion etching, it is not possible to treat the entire surface of the wafer.

Impurity Induced Disordering This is a technique for producing vertically tapered waveguides where the core layer starts with a waveguide having a uniform thickness. This technique is limited to cases where the first uniform waveguide must have a core layer consisting of multiple quantum well regions. Zinc diffuses into the waveguide through the upper waveguiding layer and penetrates the core layer to a depth that varies according to the lateral position, ie, the position in the plane of the epitaxial layer. Where zinc is diffused, the index of refraction of the core layer is reduced to that of the waveguide layer, creating a vertical taper of the waveguide. This technique is less reproducible and the resulting waveguide has large optical losses in the regions where zinc diffusion has occurred. There are also restrictions on the material systems that can be used.

Epitaxial Techniques There are several techniques by which the tapered core layer and the upper waveguide layer of the waveguide can be grown in a single step. For example, molecular beam epitaxy (Molecu
The temperature gradient introduced by the Lar Beam Epitaxy (MBE) into the plane of the wafer consisting of the substrate and the lower waveguiding layer during the growth of the core layer can be used to control the thickness of this layer. In this technique, it is very difficult to control the compositional homogeneity of the ternary compound and the quaternary compound over the temperature gradient, and a material having a low melting point or a material requiring a high growth temperature is suitable for the growth temperature. The range may be narrow. This places a limit on the temperature gradient that can be adopted.

Another epitaxial technique is known as “growth-on-a-ridge”. Ridges of varying width can be created on the wafer including the substrate and lower waveguide layer by standard etching methods. Metal-organic vapor phase epitaxy (metal-organic vapor phase epitaxy)
, MOVPE), the growth rate of the remaining waveguide layer increases as the width of the ridge narrows, creating a tapered waveguide. This technique involves complex and time consuming wafer processing prior to epitaxial growth of the core and top waveguide layers.

Yet another epitaxial technique is shadow mask MOVPE growth using a dielectric mask. In this technique, a patterned dielectric mask is deposited on the wafer. During MOVPE epitaxial growth, deposition occurs through the shadow mask window. The lateral thickness of the layer deposited under the shadow mask can be controlled by varying the lateral dimensions of the window, the mask to substrate distance, and the reaction pressure. This technique includes an additional growth step of growing the dielectric mask and additional processing steps to remove it. This also includes processing steps for patterning the mask, which may involve considerable delay and leave contamination on the surface. Although mechanical shadow masks can be used in place of dielectric masks, MOVPE growth leads to compositional non-uniformity within the tapered layer due to unequal reaction gas diffusion dimensions of MOVPE growth. Is inevitable. this is,
This leads to a non-uniform index of refraction within the tapered layer which adversely affects the waveguiding of light within this layer. Similarly, exposing the wafer to the atmosphere during mask insertion and removal is
This may result in wafer contamination. As a further disadvantage, the deposition of material on the mask itself requires cleaning and replacement of the mask.

US Pat. No. 4,855,255 discloses, among other things, chemical beam epitaxy (Che
Disclosed is a method of growing a tapered epitaxial layer by means of a chemical beam epitaxy. The method involves the generation of a thermal gradient across the surface of the substrate on which the tapered layer is grown to spatially control the rate at which epitaxial growth occurs at various locations on the substrate.

It is an object of the present invention to provide an alternative process of manufacturing a semiconductor optical slab waveguide.

According to one aspect of the invention, the method comprises growing a tapered epitaxial layer on a support surface in a single epitaxial growth step by chemical beam epitaxy, the plane of the taper being substantially relative to the support surface. A method of manufacturing a semiconductor device that is vertically vertical, characterized in that a mechanical shadow mask is used to grow a tapered epitaxial layer.

The invention makes it possible to fabricate a waveguide containing a continuously tapered core layer in a plane perpendicular to the plane of the substrate on which the waveguide is fabricated. MOVPE
In a tapered waveguide grown by, the thickness of the core layer first increases before it is tapered towards the thin portion of the core. This has a detrimental effect on the waveguide properties and the optical loss of the waveguide, but is prevented in this process. Furthermore, the compositional non-uniformity present in the tapered region of the waveguide created by MOVPE growth is prevented due to the lack of vapor phase reaction in CBE growth. The method allows to prevent uncontrolled changes in thickness and refractive index during epitaxial growth, which can adversely affect the waveguide properties of the waveguide or increase its optical loss. To

The tapered epitaxial layer can be grown in the same growth steps as the untapered epitaxial layer. This allows the manufacture of wafers for devices with both tapered and untapered layers to occur without interrupting growth. This interruption of growth can lead to contamination and reduce device performance. Such wafer fabrication is relatively simple and fast, and allows relatively inexpensive production on an industrial scale.

The mechanical shadow mask preferably has an oxide coating that does not cause deposition at the temperatures used for growth by chemical beam epitaxy. The shadow mask used in this method retains its resolution during epitaxial growth because there is no polycrystalline growth on the shadow mask during epitaxial growth and can be reused in subsequent growth runs without cleaning. it can. This is in contrast to MBE growth, where a large amount of polycrystalline growth occurs on the shadow mask, resulting in unwanted shadow effects.

The method can be used, for example, to manufacture semiconductor devices for directing radiation, such as optical waveguides.

For a more complete understanding of the invention, embodiments of the invention are described by way of example only with reference to the accompanying drawings.

Referring to FIG. 1, a portion of a vertical cross section through a gallium arsenide (GaAs) substrate wafer 10 is shown. Substrate 10 is prepared for epitaxial growth according to standard procedures well known to those skilled in semiconductor device manufacturing. The substrate 10 is mounted on a molybdenum holder (not shown). The mounted substrate 10 is mounted on a chemical beam epitaxy (CBE) apparatus (not shown), and then an ultra high vacuum (U) is used.
Ltra-High Vacuum, UHV). This is then
It is mounted in the growth chamber of a CBE device under UHV conditions to maintain a stable surface and prevent roughening, while under the overpressure of arsenic to prevent oxide deposition on the surface, about 650 Heated to ℃. The preferred source is then used to reduce the unintentional contamination of impurities during CBE growth by raising the temperature of the substrate 10 to a growth temperature in the range of 400 ° C. to 700 ° C., typically 540 ° C. Is set. Referring to FIG. 2, the following layers are deposited sequentially by CBE uniformly over the surface of substrate 10 in the following order.

2. GaAs 0.5 μm layer 11, AlGaAs with an aluminum mole fraction of 0.05 ± 0.005.
5 μm layer 12, 0.4 μ of AlGaAs with an aluminum mole fraction of 0.3 ± 0.03
m layer 13 and 1.8 μm layer 14 of GaAs.

During CBE growth of layers 11-14, the CBE reaction pressure is kept below 10 ⁻³ Torr to prevent vapor phase reactions and the substrate 10 is spun at 60 revolutions per minute.
Layer 11 is a buffer layer that separates the waveguide layer from the substrate 10. Layers 12 and 13 form the lower waveguide layer in the completed waveguide. The thickness of layer 14 is equal to the thickness of the thin area of the tapered core layer in the finished waveguide. Board 10
And layers 11 to 14 constitute a partially grown wafer 28. Following the deposition of layer 14, the flow of arsine is stopped and the temperature of wafer 28 is reduced to 200 ° C. to prevent its upper surface from becoming rough.

Referring now to FIG. 3, a silicon dioxide coated silicon shadow mask 22 (shown at the edges) having a series of holes, such as 23, is provided for tantalum in a molybdenum carrier (not shown). It is loaded in close contact with the spacer 20. The shadow mask 22 and the spacer 20 are mounted in the growth chamber of the CBE apparatus under the UHV state and fixed by a clamp at a predetermined position. Spacer 20 is 100 μm
At a distance of .epsilon., The shadow mask 22 is separated from the exposed surface of layer 14. The flow of arsine is initiated and the temperature of the wafer 28 is adjusted to the original growth temperature (540) for the shadow mask 22 to compensate for the increase in the surface temperature of the wafer 28 as a result of reducing heat loss from the shadow mask 22. ℃) to the growth temperature. next,
CBE growth resumes. The environmental conditions within the CBE apparatus are such that CBE growth is now performed on the chemically relevant surface (ie layer 14) rather than on the improper surface (ie surface of mask 22). is there. A 4 μm layer 16 of GaAs is grown over layer 14 through the holes in shadow mask 22. Mask 22
In regions such as 29 near the edges of the pores of, the growth rate is reduced, so that the completed layer 16 will have 0 in region 29 over a lateral distance of about 1000 μm.
Has a thickness profile that tapers smoothly from 1 to 4 μm. Layers 14 and 16 form a uniform core layer 18 having tapered regions such as 15. A taper profile such as 15 is believed to be dominated by the angle at which the chemical beam reaches the wafer 28 during epitaxial growth. The length of taper 15 can be controlled by varying the thickness of spacer 20 and the angle at which the chemical beam reaches wafer 28. This is because the profile of the taper is dominated by the shape of the holes in the shadow mask and the gas phase reaction, so that the length of the taper can be limited by the diffusion distance of molecules onto the surface at a given temperature,
In contrast to MOVPE shadow mask growth.

The growth of layer 16 is terminated by stopping the flow of the Group III containing species into the growth chamber of the CBE apparatus. The temperature of the wafer 30 is lowered to 200 ° C.
The supply of arsine to the device is stopped. Spacer 20 and shadow mask 22
Are removed under UHV conditions. Then, the flow of arsine is started and the temperature of the wafer 30 is returned to about 540 ° C. Next, CBE growth is restarted. Referring to FIG. 4, AlGaAs having an aluminum mole fraction of 0.2 ± 0.02.
A 1.2 .mu.m thick layer 24 is deposited on the upper surface of layer 18 to form the upper waveguiding layer. A 0.1 μm cap layer 26 of GaAs is uniformly deposited over the upper waveguiding layer 24. Here, the epitaxial growth is completed and the completed wafer 3
1 is removed from the CBE device.

Next, the waveguide is laterally tapered by photolithography and reactive ion etching to create a laterally tapered ridge waveguide, ie, the plane of the surface of the substrate 10. Taper in a plane parallel to. Accurate photolithography is achieved using minimum length tapered alignment features deposited through shadow mask 22. The completed device is a two-dimensionally tapered passive ridge waveguide containing a core region that converts the size of the internally guided optical modes.

The CBE apparatus includes a stainless steel growth chamber having a rotatable heated substrate assembly, a gas inlet manifold, a stainless steel storage chamber for storage of substrate and shadow mask, mounting substrate and shadow mask, and It includes a stainless steel load lock chamber for removal and a transfer mechanism for transferring the substrate and shadow mask between the chambers. The CBE device also includes a vacuum pump to maintain the UHV condition inside each chamber of the device. During epitaxial growth, group III and group V chemical beams impinge on the surface of substrate 10 at 45 °.

Referring to FIG. 5, during the epitaxial growth, the substrate 10, in the CBE apparatus,
Shown is a vertical cross-sectional view of the mechanical device 50 used to hold the spacer 20 and the shadow mask 22. The substrate 10 is mounted on a molybdenum carrier 52 and secured in place by two tantalum springs 54. The substrate 10 has a large flat portion that lies rigidly against the flat surface 56 of the carrier 52. The carrier 52 includes a heater assembly 5 with three pins such as 60.
It is attached to 8. Spacer 20 and shadow mask 22 are molybdenum holders 6 mounted on device 50 over substrate 10 by three pins such as 64.
Mounted on 2, the spacer 20 makes contact with the substrate 10 around its edges. A clamping ring 66 with three springs 68 is mounted over the shadow mask 20 over the three pins to ensure contact between the spacer 20 and the substrate 10. The device 50 minimizes rotational error between the substrate 10 and the shadow mask 22 and provides accurate alignment.

Referring to FIG. 6, a vertical cross-sectional view of shadow mask 22 is shown. The mask 22 is manufactured from a silicon wafer having a thickness of 450 μm and a diameter of 75 mm. The <111> plane of this silicon wafer was formed by standard photolithography and chemical etching procedures to a plane of 54.
Etched to make a series of holes, such as 23 with beveled sides such as 90 that are beveled at 7 °. The remaining silicon 92 is covered with a thermal oxide film 91. CB
Due to the E growth chemistry, there is no polycrystalline growth on the shadow mask 22 during the epitaxial growth of layer 16. This is because in CBE growth, decomposition of the metal-containing alkyl does not occur on the oxide film surface 91 of the mask 22 over a wide temperature range. FIG. 7 is a plan view of the shadow mask 22, and similarly,
The positions of the holes 23 and the substrate 10 are shown. Shadow mask 22 includes holes 40 for the entry of springs 54 and flat surface 56. The mask 22 also has holes 41 that allow it to be attached to a molybdenum carrier 62.

In another embodiment of the present invention, the process is such that the waveguiding layer comprises indium gallium arsenide phosphide (InGaAsP) and the tapered core layer comprises indium phosphide (InGaAsP).
It can be used to make tapered waveguides made of InP). Such a waveguide can be used to guide and reshape optical modes with wavelengths of about 1.3 μm or 1.5 μm. In yet another embodiment of the invention, the process uses indium arsenide (In) for radiation having a wavelength between 1 μm and 8 μm.
As), gallium antimony (GaSb), or indium antimony (I
nSb) can be used to fabricate vertically tapered waveguides with core layers.

The process of the present invention can also be used to fabricate other semiconductor devices incorporating at least one tapered layer in a single epitaxial growth step. FIG. 8 shows an optoelectronic semiconductor modulator 100 that can be manufactured by this process.
Shows the structure of. The modulator 100 is manufactured as follows. n-type Ga
The As substrate wafer 110 is prepared, loaded and mounted on the CBE apparatus as described above. The following epitaxial layers are then deposited on the wafer 1 by CBE in the following order:
10 is continuously deposited.

0.5 μm layer 1 of n-type GaAs with a doping concentration of 10 ¹⁸ cm ⁻³
12, 3.5 μm layer 114 of n-type AlGaAs with a molar fraction of aluminum of 0.05 ± 0.005 and a doping concentration of 10 ¹⁸ cm ⁻³ , a molar fraction of aluminum of 0.3 ± 0.03 And a 0.3 μm layer 116 of n-type AlGaAs having a doping concentration of 10 ¹⁸ cm ⁻³ , an aluminum mole fraction of 0.3 ± 0.03, and an n having a doping concentration of 10 ¹⁷ cm ^−3. The thickness of the 0.1 μm layers 118, 120 of the type AlGaAs is increased from 1.8 μm to 5.8 μm over a lateral distance of about 1000 μm and is formed using spacers and shadow masks as described above. Undoped GaAs with tapered region 126
Layer 120, a 1.2 μm layer 122 of undoped AlGaAs having an aluminum mole fraction of 0.2 ± 0.02, and a 0.1 μm cap layer 124 of undoped GaAs.

[Brief description of drawings]

FIG. 1 shows the principle steps of a process according to the invention for producing a semiconductor optical waveguide with a two-dimensionally tapered core layer.

FIG. 2 shows the principle steps of the process according to the invention for producing a semiconductor optical waveguide with a two-dimensionally tapered core layer.

FIG. 3 shows the principle steps of the process according to the invention for producing a semiconductor optical waveguide with a two-dimensionally tapered core layer.

FIG. 4 shows the principle steps of the process according to the invention for producing a semiconductor optical waveguide with a two-dimensionally tapered core layer.

[Figure 5]   FIG. 6 is a vertical cross-sectional view of a mechanical device used during the fabrication of a waveguide.

[Figure 6]   It is a vertical sectional view of a shadow mask used for this process.

[Figure 7]   It is a top view of a shadow mask.

FIG. 8 shows the structure of an optoelectronic semiconductor modulator, which can also be made by the process of the present invention and has a two-dimensionally tapered core layer.

─────────────────────────────────────────────────── ─── Continued front page    (81) Designated countries EP (AT, BE, CH, CY, DE, DK, ES, FI, FR, GB, GR, IE, I T, LU, MC, NL, PT, SE), OA (BF, BJ , CF, CG, CI, CM, GA, GN, GW, ML, MR, NE, SN, TD, TG), AP (GH, GM, K E, LS, MW, MZ, SD, SL, SZ, TZ, UG , ZW), EA (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM), AE, AG, AL, AM, AT, AU, AZ, BA, BB, BG, BR, BY, CA, C H, CN, CR, CU, CZ, DE, DK, DM, DZ , EE, ES, FI, GB, GD, GE, GH, GM, HR, HU, ID, IL, IN, IS, JP, KE, K G, KP, KR, KZ, LC, LK, LR, LS, LT , LU, LV, MA, MD, MG, MK, MN, MW, MX, MZ, NO, NZ, PL, PT, RO, RU, S D, SE, SG, SI, SK, SL, TJ, TM, TR , TT, TZ, UA, UG, US, UZ, VN, YU, ZA, ZW (72) Inventor Ballmer, Lichyard Stiletto             Worcestershire Doubler             Are 14.3 PS, mall bar             St. Andrew's Road, De             Lee Earl A Mall Burn (72) Inventor Ailing, Stephen Theraard             Worcestershire Doubler             Are 14.3 PS, mall bar             St. Andrew's Road, De             Lee Earl A Mall Burn (72) Inventor McLean, Jessica Owens             Worcestershire Doubler             Are 14.3 PS, mall bar             St. Andrew's Road, De             Lee Earl A Mall Burn (72) Inventor Heaton, Jiyoung Michael             Worcestershire Doubler             Are 14.3 PS, mall bar             St. Andrew's Road, De             Lee Earl A Mall Burn F term (reference) 2H047 KA03 KA13 LA23 PA05 PA06                       PA24 QA02 RA08 TA11 TA41                 5F045 AA05 AB09 AC07 AC08 AC09                       AD09 AD10 DB08 EM01 EM10

Claims (6)

[Claims] 1. At least one tapered surface on a supporting surface, characterized in that at least one tapered epitaxial layer is grown by chemical beam epitaxy and the taper in the plane is inclined with respect to the supporting surface. A method of manufacturing a semiconductor device, comprising growing an epitaxial layer. 2. The at least one tapered epitaxial layer is grown using a mechanical shadow mask and a single epitaxial growth step with the taper in the plane perpendicular to the support surface. , Claim 1
The method described in. 3. Method according to claim 2, characterized in that the at least one tapered epitaxial layer is grown in the same growth step as the at least one non-tapered epitaxial layer. 4. The mechanical shadow mask comprises a silicon wafer having etched holes and an oxide film coating on which deposition occurs at the temperatures used for chemical beam epitaxy growth. Method according to claim 2 or 3, characterized in that it is absent. 5. The method according to claim 1, wherein the semiconductor device is a device in which radiation is guided. 6. The method according to claim 5, wherein the semiconductor device is an optical waveguide.