JP2003333044A - Computer system - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a computer system which rebuilds topological information of nodes connected to an IEEE 1394 cable to reliably avoid the data failure, upon detection of the low signal of a system power off, or a link power status. <P>SOLUTION: The computer system having an IEEE 1394 interface has a physical layer IC (PHY) 10 comprising a system power detector 11 for detecting a system power, and a bus reset signal issuing unit 12 for issuing a short bus reset (SBR) signal to an IEEE 1394 cable. <P>COPYRIGHT: (C)2004,JPO

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention relates to IEEE (Ins
title of Electrical and
Electronics Engineers, In
c) Regarding a computer system having a 1394 interface, in particular, when the system power off or the low signal of the link power status is detected, the IEEE 139
The present invention relates to a computer system capable of reconstructing topology information of nodes connected to four cables.

[0002]

2. Description of the Related Art FIG. 4 is a diagram showing the configuration of an IC (Integrated Circuit) of each node in a computer system having a conventional IEEE 1394 interface. As shown in FIG. 4, the physical layer IC
Both the system power and the cable power are supplied to the (PHY) 110. As a result, even if the system power is turned off, it can operate as a repeater.

On the other hand, a CPU (Cent) which is an upper layer IC
Ral Processing Unit) 120, L
The INK layer IC 130 and the controller IC 140 operate only with system power.

FIG. 5 is a conceptual diagram showing topology information when each node is connected by an IEEE 1394 cable. In FIG. 5, each node PC (Perso
nal Computer 150, HDD (Hard)
Disc Drive 151, DVD-ROM (D
digital Versatile Disk-Rea
d Only Memory) 152, CD-R (Co
mpact Disk-Reader) 153, MO
(Magnet Optical disk) 154 and DVCR (Digital Video Camera)
a Recorder) 155 is connected by the IEEE 1394 cable 160, and the topology information indicating this state is constructed.

[0005]

However, in a conventional computer system having an IEEE 1394 interface, even if the system power of a node is turned off, the physical layer IC (PHY) of the node is operating, and therefore the topology is Does not change. For this reason, other nodes may not be able to detect that the node whose system power is off does not function, and may repeat unnecessary access to that node.

For example, in FIG. 5, even if the system power of the HDD 151 is turned off, since the PHY of the HDD 151 operates, the PC 150 cannot detect that the HDD 151 is turned off, and repeatedly accesses the HDD 151. Attempt to transfer data. This allows
There are cases where data is lost or the PC 150 hangs up.

In particular, if a failure occurs in another node during the transfer of system important data, if the data transfer to a normal node is immediately stopped, the data may be broken.

Therefore, an object of the present invention is to ensure the data corruption by reconstructing the topology information of the node connected to the IEEE 1394 cable when the system power off or the low signal of the link power status is detected. It is to provide a computer system that can be prevented.

[0009]

In order to solve the above problems, the computer system according to the first aspect of the present invention is
An IEEE 1394 interface and an IEEE connecting multiple nodes via the IEEE 1394 interface
In a computer system including a 1394 cable and physical layer ICs provided in a plurality of nodes, the physical layer IC includes a system power detection unit that detects system power, and a bus that issues a bus reset signal to the IEEE 1394 cable side. A reset signal issuing means, and the bus reset signal issuing means sends the IE signal from the bus reset signal issuing means to the IE in response to turning off of the system power detected by the system power detecting means.
By issuing a bus reset signal to the IEEE 1394 cable side, the topology information of a plurality of nodes is reconstructed, and when the bus reset signal is transferring data on the IEEE 1394 cable, the bus reset signal is issued after the end of the data transfer. Perform Short Bus Reset (SB
R) signal.

In order to solve the above problems, a computer system according to a second aspect of the present invention is IEEE139
In a computer system including four interfaces, an IEEE 1394 cable that connects a plurality of nodes via an IEEE 1394 interface, and a physical layer IC provided in the plurality of nodes, the physical layer IC is
LPS detecting means for detecting LPS from the link layer IC and bus reset signal issuing means for issuing a bus reset signal to the IEEE 1394 cable side are provided.
By issuing a bus reset signal from the bus reset signal issuing means to the IEEE 1394 cable side in response to the LPS low signal detected by the detecting means, the topology information of a plurality of nodes is reconstructed, and the bus reset signal is
When data is transferred on the IEEE 1394 cable, it is a short bus reset (SBR) signal for performing bus reset after the end of the data transfer.

By issuing a bus reset signal to the IEEE 1394 cable side in response to system power off or LPS low signal, the topology information of a plurality of nodes is reconstructed. As a result, a node that is not operating can be accurately detected, and data corruption and system hangup can be prevented.

In particular, the bus reset signal is IEEE13
When data is transferred on the 94 cable, the SBR signal is used to perform the bus reset after the end of the data transfer, so that the breakdown of the data can be surely prevented.

[0013]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of a computer system of the present invention will be described below with reference to the drawings.

FIG. 1 is a diagram showing a configuration of an IC (Integrated Circuit) of each node in a computer system having an IEEE 1394 interface of the present invention. Each node in the computer system of the present invention includes a physical layer IC (PHY) 10 and a CPU (Central Process) that is an upper layer IC.
ing unit) 20, a LINK layer IC 30, and a controller IC 40.

Here, the physical layer IC (PHY) 10 includes a system power detector 11 for detecting system power,
A bus reset signal issuing unit 12 for issuing a bus reset signal to the IEEE 1394 cable side is provided. Here, the bus reset signal is a short bus reset (SBR) signal that performs a bus reset after the end of the data transfer when the data is being transferred.

As shown in FIG. 1, a physical layer IC (PHY)
The system 10 is supplied with both system power and cable power. As a result, even if the system power is turned off, the physical layer IC (PHY) 10 can operate as a repeater.

On the other hand, the upper layer ICs such as the CPU 20 and LI
The NK layer IC 30 and the controller IC 40 operate only with system power.

FIG. 2 is a conceptual diagram showing topology information when each node is connected by the IEEE1394 cable. In FIG. 2, each node PC (Perso
nal Computer 50, HDD (Hard)
Disc Drive 51, DVD-ROM (Dig
ital Versatile Disk-ReadO
nly Memory) 52, CD-R (Compac
t Disk-Reader) 53, MO (Magne)
t Optical disk) 54 and DVCR (D
digital Video Camera Recorder
der) 55 is connected by the IEEE1394 cable 60, and the topology information indicating this state is constructed.

Here, for example, in FIG.
When the system power of 1 is turned off, the PH of HDD 51
The system power detection unit 11 provided in Y10 detects that the system power is off.

When the system power detected by the system power detection unit 11 is turned off, the bus reset signal issuing unit 12 issues a bus reset signal to the IEEE 1394 cable side. Here, the bus reset signal is I
This is a short bus reset (SBR) signal that performs a bus reset after the end of the data transfer when data is transferred on the EEE1394 cable 60.

As a result, for example, from the PC 50 to the DVD
-When data is being transferred to the ROM 52, the topology information of a plurality of nodes is reconstructed after the completion of the data transfer. Therefore, from the PC 50 to the DVD-ROM 52
The data transfer to is surely guaranteed, and no data corruption occurs. Any node may reconstruct the topology information. For example, here, PC50 is route (ROO
When the node becomes T) and the topology information is reconstructed, information is transmitted / received to / from each connected node.

At this time, since the system power of the HDD 51 is off, the HDD 51 cannot return the information, and the PC 50 compares the topology information with the information before the reconstruction and the HDD 51 is powered off. Can be detected. As a result, access to the HDD 51 is stopped.

Therefore, since the PC 50 detects that the HDD 51 is off, it does not repeat the access to the HDD 51 and stops the data transfer to the HDD 51. This prevents the PC 50 from hanging up.

FIG. 3 is a diagram showing the configuration of the IC of each node in the computer system having the IEEE 1394 interface of the present invention. Here, the physical layer IC
(PHY) 70 is a link from the LINK layer IC 30.
Power status (hereinafter also simply referred to as "LPS")
An LPS detection unit 13 that detects a signal and a bus reset signal issuing unit 12 that issues a bus reset signal to the IEEE 1394 cable side. Here, the bus reset signal is a short bus reset (SBR) signal that performs a bus reset after the end of the data transfer when data is transferred on the IEEE 1394 cable 60.

Here, for example, in FIG.
The LPS detection unit 13 provided in the PHY 70 of No. 1 has the LIN
When it is detected that the LPS signal from the K layer IC 30 is a “low (L)” signal for a predetermined time or more, this L
A short bus reset (SBR) signal is issued from the bus reset signal issuing unit 12 to the IEEE 1394 cable side in response to the "low (L)" signal of the LPS signal detected by the PS detection unit 13 for a predetermined time or longer.

As a result, after the data transfer is completed, the topology information of the plurality of nodes is reconstructed, and the same effect can be obtained by the same operation as described above.

[0027]

As described above, the IEEE13 of the present invention is used.
According to the computer system having the 94 interface, when the physical layer IC of each node detects a system power off or a low signal of the link power status, a short bus reset (SBR) signal is issued and the IEEE1
Since the topology information of the node connected to the 394 cable is reconstructed, it is possible to prevent unnecessary access to the faulty node and prevent data corruption and system hangup.

[Brief description of drawings]

FIG. 1 is a diagram showing an IC configuration of each node in a computer system having an IEEE 1394 interface of the present invention.

FIG. 2 is a conceptual diagram showing topology information when connecting each node with an IEEE 1394 cable according to the present invention.

FIG. 3 is a diagram showing an IC configuration of each node in a computer system having an IEEE 1394 interface of the present invention.

FIG. 4 is a diagram showing a configuration of an IC of each node in a computer system having a conventional IEEE 1394 interface.

FIG. 5 is a conceptual diagram showing topology information when each node is connected by a conventional IEEE 1394 cable.

[Explanation of symbols]

10,110 Physical layer IC (PHY) 11 System power detector 12 Bus reset signal issuing unit 13 Link power status (LPS) detector 20,120 CPU 30,130 LINK 40,140 controller 50,150 PC 51,151 HDD 52,152 DVD-ROM 53,153 CD-R 54,154 MO 55,155 DVCR 60,160 IEEE 1394 cable

Claims (2)

[Claims] 1. An IEEE 1394 interface, an IEEE 1394 cable for connecting a plurality of nodes via the IEEE 1394 interface, and a physical layer IC (Integral) provided in the plurality of nodes.
and a bus reset signal issuing means for issuing a bus reset signal to the IEEE 1394 cable side, the physical layer IC comprising: In response to turning off the system power detected by the system power detecting means, by issuing a bus reset signal from the bus reset signal issuing means to the IEEE 1394 cable side, the topology information of the plurality of nodes is reconstructed, The computer system, wherein the bus reset signal is a short bus reset (SBR) signal for performing a bus reset after the end of the data transfer when data is transferred on the IEEE 1394 cable. 2. A computer system comprising an IEEE 1394 interface, an IEEE 1394 cable for connecting a plurality of nodes via the IEEE 1394 interface, and a physical layer IC provided in the plurality of nodes, wherein the physical layer IC is An LPS detecting means for detecting a link power status (hereinafter, also simply referred to as “LPS”) from the link layer IC, and a bus reset signal issuing means for issuing a bus reset signal to the IEEE 1394 cable side, In response to the LPS low signal detected by the LPS detection means, the bus reset signal issuance means outputs the IEEE
By issuing a bus reset signal to the 1394 cable side, the topology information of the plurality of nodes is reconstructed, and when the bus reset signal is transferring data on the IEEE 1394 cable, after the end of the data transfer. A computer system characterized in that it is a short bus reset (SBR) signal for performing a bus reset.