JP2003332598A - Method for manufacturing semiconductor device - Google Patents

Method for manufacturing semiconductor device

Info

Publication number
JP2003332598A
JP2003332598A JP2002134266A JP2002134266A JP2003332598A JP 2003332598 A JP2003332598 A JP 2003332598A JP 2002134266 A JP2002134266 A JP 2002134266A JP 2002134266 A JP2002134266 A JP 2002134266A JP 2003332598 A JP2003332598 A JP 2003332598A
Authority
JP
Japan
Prior art keywords
semiconductor device
substrate
warp
manufacturing
cooling
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2002134266A
Other languages
Japanese (ja)
Other versions
JP4448644B2 (en
Inventor
Yoshiya Abiko
義哉 安彦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP2002134266A priority Critical patent/JP4448644B2/en
Publication of JP2003332598A publication Critical patent/JP2003332598A/en
Application granted granted Critical
Publication of JP4448644B2 publication Critical patent/JP4448644B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy

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  • Photovoltaic Devices (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device in which warp is suppressed. <P>SOLUTION: A semiconductor device composed of a semiconductor substrate and a metal film applied to at least one side thereof entirely or partially and having warp caused by a heat history during a manufacturing process is cooled and then heated thus reducing the warp. <P>COPYRIGHT: (C)2004,JPO

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、半導体装置の製造
方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device.

【0002】[0002]

【従来の技術】半導体基板と金属膜を有する半導体装置
は、温度変化を伴うプロセスにより製造されるため、常
温に戻したとき半導体基板(例えばシリコン基板)と金
属膜(例えば銀電極)との熱膨張係数の差に起因して、
反る現象が生じる。通常は昇温工程により半導体基板側
を凸にして半導体装置全体が反る。半導体基板側を凸に
して反った場合、平坦なカバーガラスを装着するモジュ
ール化工程の際にガラスと基板の間にスペースの発生、
ガラスと基板の間に挿入される接着剤の未広がりや気泡
の発生、更にモジュール用のサブストレートへの貼り付
けの際にも接着剤の未広がり、気泡の発生等の問題があ
り修繕作業時間がかなり必要であった。このため真空引
き装置や圧着装置等を用いて反った半導体装置を平坦に
して固定する必要がある。しかし、薄い半導体装置では
部分的な真空引きのために割れが発生したり変形したり
して、その制御が難しかった。また半導体装置を曲面に
沿って固定するモジュールのように半導体装置のサブス
トレート自体が反っている場合には例え半導体装置に反
りが無くても上記と同様な問題が生じる。このような反
りを除去する方法として、一旦−70℃以下に冷却した
後50℃以下の常温で乾燥保持する方法が提案されてい
る(特開2000−332274号公報)。これにより
半導体装置の反り量を大幅に減少させることができる。
2. Description of the Related Art Since a semiconductor device having a semiconductor substrate and a metal film is manufactured by a process involving a temperature change, when the temperature is returned to room temperature, the heat of the semiconductor substrate (eg silicon substrate) and the metal film (eg silver electrode) are increased. Due to the difference in expansion coefficient,
A warping phenomenon occurs. Usually, the entire semiconductor device is warped by making the semiconductor substrate side convex by the temperature rising process. When the semiconductor substrate side is convex and warped, a space is generated between the glass and the substrate during the modularization process of mounting a flat cover glass,
There is a problem that the adhesive inserted between the glass and the substrate does not spread and bubbles are generated, and also when it is attached to the substrate for the module, there is a problem that the adhesive does not spread and bubbles are generated. Was quite necessary. Therefore, it is necessary to flatten and fix the warped semiconductor device by using a vacuuming device, a pressure bonding device, or the like. However, it is difficult to control the thin semiconductor device because cracks are generated or deformed due to partial vacuum drawing. When the substrate itself of the semiconductor device is warped like a module for fixing the semiconductor device along a curved surface, even if the semiconductor device is not warped, the same problem as described above occurs. As a method for removing such a warp, a method has been proposed in which the material is once cooled to −70 ° C. or lower and then dried and held at a normal temperature of 50 ° C. or lower (JP 2000-332274 A). As a result, the amount of warpage of the semiconductor device can be significantly reduced.

【0003】[0003]

【発明が解決しようとする課題】しかし、上記方法では
作製条件によっては、初め反っていた方向と逆側、すな
わち金属膜側を凸にして反りが残ることがあることが判
明した。よって、残存する反りを除去することが望まれ
ていた。
However, according to the above-mentioned method, it has been found that depending on the manufacturing conditions, the side opposite to the direction in which it was initially warped, that is, the metal film side is made convex and warpage remains. Therefore, it has been desired to remove the remaining warp.

【0004】[0004]

【課題を解決するための手段】かくして本発明によれ
ば、半導体基板とその少なくとも一方の面の全面又は部
分的に金属膜を有し、かつその製造工程中の熱履歴によ
り反りを有する半導体装置を、冷却し、次いで加熱する
ことにより半導体装置の反りを減少させることを特徴と
する半導体装置の製造方法が提供される。
Thus, according to the present invention, a semiconductor device having a semiconductor substrate and a metal film on at least one surface thereof, wholly or partially, and having a warp due to thermal history during the manufacturing process thereof. There is provided a method for manufacturing a semiconductor device, characterized in that the warp of the semiconductor device is reduced by cooling and then heating.

【0005】[0005]

【発明の実施の形態】半導体基板/金属膜を有する構造
としては、例えば、 (1)半導体基板aの一方の面の一部にのみ金属膜bが
形成されている構造(図2(1)参照) (2)半導体基板aの一方の面の全面に金属膜bが形成
されている構造(図2(2)参照) (3)(2)の構造をもつ半導体基板aの他方の面の一
部あるいは全面に金属膜(c、d)が形成されている構
造(図2(3)−1と(3)−2) のいずれかの構造をもつ半導体装置に適用できる。本発
明で使用できる半導体基板としては、例えば、シリコン
基板、ゲルマニウム基板や、GaAs、InGaAs等
の化合物基板等が挙げられる。更に、半導体装置の用途
によっても異なるが、半導体基板の厚さは、50μm以
上200μm以下であることが好ましい。200μmよ
り厚い場合、基板の剛性により反りがほとんど生じない
ので好ましくない。
BEST MODE FOR CARRYING OUT THE INVENTION As a structure having a semiconductor substrate / metal film, for example, (1) a structure in which a metal film b is formed only on a part of one surface of a semiconductor substrate a (FIG. 2 (1)) (2) Structure in which the metal film b is formed on the entire surface of one surface of the semiconductor substrate a (see FIG. 2 (2)) (3) On the other surface of the semiconductor substrate a having the structure of (2) The present invention can be applied to a semiconductor device having a structure in which a metal film (c, d) is partially or entirely formed (FIG. 2 (3) -1 and (3) -2). Examples of the semiconductor substrate that can be used in the present invention include a silicon substrate, a germanium substrate, a compound substrate of GaAs, InGaAs, or the like. Furthermore, the thickness of the semiconductor substrate is preferably 50 μm or more and 200 μm or less, although it depends on the application of the semiconductor device. When the thickness is more than 200 μm, the rigidity of the substrate hardly causes warping, which is not preferable.

【0006】本発明で使用できる金属膜としては、半導
体基板との間に熱膨張係数の差があれば、特に限定され
ず、どのような種類の金属膜でも使用できる。具体的な
金属膜としては、銀、アルミニウム、銅、金、亜鉛、ス
ズ、チタン、タングステン、タンタル、モリブデン等の
高融点金属、ZnO、SnO2、ITO等の透明導電性
酸化物からなる膜、更にこれらを積層させた膜が挙げら
れる。また、半導体基板の両面に金属膜を有する場合で
も、金属膜の種類、面積等が異なることで、半導体装置
に反りを生じる場合にも本発明を適用することができ
る。金属膜の形成方法は、公知の方法、例えば蒸着法、
スパッタリング法、CVD法、レーザー堆積法等いずれ
の方法を用いてもよい。
The metal film that can be used in the present invention is not particularly limited as long as it has a difference in coefficient of thermal expansion from the semiconductor substrate, and any kind of metal film can be used. As a specific metal film, a film made of a refractory metal such as silver, aluminum, copper, gold, zinc, tin, titanium, tungsten, tantalum, or molybdenum, a transparent conductive oxide such as ZnO, SnO 2 , or ITO, Further, a film in which these are laminated can be given. Further, even when the semiconductor substrate has metal films on both sides, the present invention can be applied to the case where the semiconductor device is warped due to the difference in the type and area of the metal film. The method for forming the metal film is a known method, for example, a vapor deposition method,
Any method such as a sputtering method, a CVD method, or a laser deposition method may be used.

【0007】金属膜が形成された基板は、冷却され、次
いで加熱される。この冷却及び加熱を経ることで半導体
装置の反りを減少させることができる(図1参照)。基
板の冷却温度は、半導体装置の製造工程時の熱履歴によ
る反りを減少させることができさえすればどのような温
度でもよい。この冷却により基板の反りをおおまかに除
去することができる。−70℃以下への冷却方法として
は、液体窒素(沸点−195.8℃)、液体ヘリウム
(同−268.9℃)、液体ネオン(同−245.9
℃)、液体アルゴン(同−185.9℃)等に浸漬する
方法、液体に限らず−70℃以下の気体中に保持する、
あるいは吹き付ける方法、−70℃以下の固体、液体や
気体によって冷却された物体に接触させる方法等が挙げ
られる。冷却後、基板を乾燥させることが好ましい。乾
燥方法としては、乾燥窒素のような常温で安定に存在し
腐食性がなく乾燥している気体でパージされた乾燥槽に
静置する方法が挙げられる。
The substrate on which the metal film is formed is cooled and then heated. Warping of the semiconductor device can be reduced by passing through this cooling and heating (see FIG. 1). The cooling temperature of the substrate may be any temperature as long as it can reduce the warpage due to the thermal history during the manufacturing process of the semiconductor device. By this cooling, the warp of the substrate can be roughly removed. As a cooling method to −70 ° C. or lower, liquid nitrogen (boiling point −195.8 ° C.), liquid helium (same as −268.9 ° C.), liquid neon (same as −245.9).
℃), liquid argon (same as -185.9 ℃) and the like, a method of immersing in a gas of -70 ℃ or less, not limited to liquid,
Alternatively, a method of spraying, a method of bringing into contact with an object cooled by a solid, liquid or gas at -70 ° C or less, and the like can be mentioned. After cooling, it is preferable to dry the substrate. As a drying method, there is a method of leaving it in a drying tank purged with a gas such as dry nitrogen which is stable at room temperature and is not corrosive and is dry.

【0008】次に、基板は加熱される。この加熱によ
り、基板の反りを更に除去することができる。基板の加
熱温度は、50℃以上であることが好ましい。本発明の
方法は、冷却だけを行い加熱を行なわない方法に比べ
て、約80%以上反りを減少させることができる。その
ため、従来よりも平坦な半導体装置を得ることができる
と共に、反り量を調節すれば、所望の曲率を有する半導
体装置を得ることもできる。また、本発明の方法は、太
陽電池の製造方法に使用することが好ましい。
Next, the substrate is heated. By this heating, the warp of the substrate can be further removed. The heating temperature of the substrate is preferably 50 ° C. or higher. The method of the present invention can reduce the warpage by about 80% or more as compared with the method of only cooling and not heating. Therefore, it is possible to obtain a semiconductor device that is flatter than the conventional one, and also to obtain a semiconductor device having a desired curvature by adjusting the amount of warpage. Further, the method of the present invention is preferably used in a method for manufacturing a solar cell.

【0009】[0009]

【実施例】以下に半導体装置としてPN接合型単結晶シ
リコン太陽電池セルを挙げ、本発明を詳述する。なおこ
の実施例は本発明を限定するものではない。太陽電池セ
ル1は図4(i)の概略断面図のように半導体基板(シ
リコン基板)2の片方の表面に不純物を熱拡散させ作製
されたPN接合と、シリコン基板2の表面上で受光側に
櫛型の表面電極6、裏面側のほぼ全面にAgからなる裏
面電極7が形成されている。図3(a)〜図5(k)にP
N接合型単結晶シリコン太陽電池セルの製造工程を図示
する。製造工程は大きく5つに分けられる。
The present invention will be described in detail below with reference to a PN junction type single crystal silicon solar cell as a semiconductor device. It should be noted that this embodiment does not limit the present invention. As shown in the schematic cross-sectional view of FIG. 4 (i), the solar cell 1 has a PN junction formed by thermally diffusing impurities on one surface of a semiconductor substrate (silicon substrate) 2 and a light receiving side on the surface of the silicon substrate 2. A comb-shaped front surface electrode 6 and a back surface electrode 7 made of Ag are formed on almost the entire back surface side. P in FIGS. 3 (a) to 5 (k)
The manufacturing process of an N junction type single crystal silicon solar cell is illustrated. The manufacturing process is roughly divided into five.

【0010】第一工程(不純物拡散工程)ではシリコン
基板2の表面にP/N接合を形成するため不純物を熱拡
散させてN型の不純物拡散層3を形成する(図3
(a))。その後片面の不純物拡散層3をエッチングに
より取り除く(図3(b))。なお符号4は受光面を示
している。半導体基板の厚さは、特に限定されるもので
はないが、半導体基板は薄いほど反り易くなる。このた
め半導体基板が200μm以下の厚みとなったときに本
発明を適用する効果が大いに発揮される。この実施例で
は100μmの基板を使用した。
In the first step (impurity diffusion step), impurities are thermally diffused to form a P / N junction on the surface of the silicon substrate 2 to form an N-type impurity diffusion layer 3 (FIG. 3).
(A)). After that, the impurity diffusion layer 3 on one surface is removed by etching (FIG. 3B). Reference numeral 4 indicates a light receiving surface. The thickness of the semiconductor substrate is not particularly limited, but the thinner the semiconductor substrate, the more easily it is warped. Therefore, the effect of applying the present invention is greatly exerted when the semiconductor substrate has a thickness of 200 μm or less. In this example, a 100 μm substrate was used.

【0011】続く第二工程(電極形成工程)では不純物
拡散層3が残っている受光面4側にフォトレジストを使
用して電極パターン5を形成する(図3(c))。そこ
へ電極材料である銀を受光面4側に部分的に蒸着して表
面電極6を成膜し(図3(d))、その後電極パターン
5を剥離し不要な電極材料を取り除く(図4(e))。
次にパターニングしたシリコン基板2の裏側にほぼ全面
に電極材料を成膜する(図4(f))。なお表面電極6
と裏面電極7の成膜後には受光面側に反射防止膜8を成
膜しておくことが望ましい(図4(g))。最後にダイ
シング工程によって所定の形状にセルを切り出し太陽電
池セルは作製される(図4(h))。電極の厚さについ
ては特に限定されるものではないが、半導体基板同様、
厚さが変化すれば、反り量の変化も異なってくるのでこ
の場合にはそれぞれの処理時間・温度設定を変更するこ
とで対応すればよい。
In the subsequent second step (electrode forming step), an electrode pattern 5 is formed using a photoresist on the side of the light receiving surface 4 where the impurity diffusion layer 3 remains (FIG. 3C). Silver, which is an electrode material, is partially vapor-deposited on the light-receiving surface 4 side to form a surface electrode 6 (FIG. 3D), and then the electrode pattern 5 is peeled off to remove unnecessary electrode material (FIG. 4). (E)).
Next, an electrode material is deposited on the back surface of the patterned silicon substrate 2 on almost the entire surface (FIG. 4 (f)). The surface electrode 6
After the back electrode 7 is formed, it is desirable to form the antireflection film 8 on the light receiving surface side (FIG. 4G). Finally, a cell is cut into a predetermined shape by a dicing process to manufacture a solar cell (FIG. 4 (h)). The thickness of the electrode is not particularly limited, but like the semiconductor substrate,
If the thickness changes, the change in the amount of warp also changes. In this case, it is sufficient to deal with this by changing the respective processing time / temperature settings.

【0012】次の第三工程(冷却工程)でこの太陽電池
セルの反りを大まかに除去する(以下、図7も参照)。
反りを生じたシリコン基板2(図4(g))を液体窒素
(液温−196℃)に浸けることによりシリコン基板2
は約−90℃以下に冷却される。冷却後これを乾燥窒素
でパージされた乾燥槽に相当時間静置し常温乾燥させ
る。この状態では冷却によって反り量は大幅に減少する
が、今度は裏面電極7面に凸形に反りが残留し、反り量
のばらつきが大きい。
In the next third step (cooling step), the warp of the solar cell is roughly removed (see also FIG. 7 below).
By immersing the warped silicon substrate 2 (FIG. 4G) in liquid nitrogen (liquid temperature −196 ° C.)
Is cooled below about -90 ° C. After cooling, this is left to stand in a drying tank purged with dry nitrogen for a corresponding period of time and dried at room temperature. In this state, the amount of warpage is greatly reduced by cooling, but this time, the warpage remains in a convex shape on the surface of the back electrode 7, resulting in large variations in the amount of warpage.

【0013】第四工程(加熱工程)でこの太陽電池セル
の反りを更に小さくする。セルを治具に保持し50℃以
上のオーブンの中にセル本体が暖まるまで相当時間入れ
る。その後に常温で保持するとセルは再び受光面を凸に
して反り始める。100μmのシリコン基板を用いた時
のオーブン温度と反り量との関係を表したグラフ例を図
6に示す。このグラフから55℃近傍の加熱処理温度で
反り量が最も±0に近づくことがわかるが、この時の値
は基板や電極の厚さが変化すれば応力状態が変わるため
当然変化する。
In the fourth step (heating step), the warp of the solar cell is further reduced. Hold the cell in a jig and put it in an oven at 50 ° C or higher for a considerable time until the cell body warms up. After that, when the cell is kept at room temperature, the cell again makes the light receiving surface convex and begins to warp. FIG. 6 shows an example of a graph showing the relationship between the oven temperature and the amount of warpage when a 100 μm silicon substrate is used. From this graph, it can be seen that the amount of warpage comes closest to ± 0 at a heat treatment temperature near 55 ° C., but the value at this time naturally changes because the stress state changes as the thickness of the substrate or electrode changes.

【0014】50℃以上への加熱方法としてはオーブン
だけでなくホットプレート等の電気発熱器具、電磁波を
用いたIR加熱器、温水等の液体を用いた温浴、コンロ
等火力による加熱器具等の加熱方法を用いることも可能
である。すなわち太陽電池を損傷させることなく−70
℃以下に冷却、乾燥しかつ50℃以上に加熱することが
できれば反り除去は可能でありどのような方法であって
も構わない。製造プロセス中の半導体基板の冷却・加熱
による反り除去工程は反りが生じてからカバーガラス装
着用の支持板に固定されるまでの間であればどの製造工
程中であっても構わないが、より精確な反り量制御を必
要とする場合は温度が加えられる最終工程かその後に行
うのがよい。
As a heating method for heating to 50 ° C. or higher, not only an oven but also an electric heating device such as a hot plate, an IR heater using electromagnetic waves, a hot bath using a liquid such as hot water, a heating device using a heating power such as a stove, etc. It is also possible to use the method. That is, -70 without damaging the solar cell
The warp can be removed as long as it can be cooled to below ℃, dried and heated to above 50 ℃, and any method can be used. The warp removal step by cooling / heating the semiconductor substrate during the manufacturing process may be any manufacturing step as long as it is from the occurrence of the warp until it is fixed to the support plate for mounting the cover glass. When accurate warpage amount control is required, it is preferable to perform it in the final step where temperature is applied or after it.

【0015】最後の第五工程(カバーガラス装着工程)
では図5(j)に示されるように太陽電池セル保持時具
32に所定寸法に切り出された太陽電池セル1を受光面
4を上にして載せる。次に片面にシリコンからなる接着
剤10(例えばダウコーニング社製DC93−500)
を塗布したカバーガラス9をカバーガラス保持治具31
を用いて真空吸着する。続いてカバーガラス保持治具3
1を太陽電池セル1に近づけて行き、太陽電池セル1と
カバーガラス9が接触する直前にカバーガラス保持治具
31の真空状態を解除する。その後、カバーガラス9は
カバーガラス保持治具31から離れ、図5(k)に示さ
れるように太陽電池セル1の受光面4に接着され第五工
程が完了する。なお符号33は位置合わせ用ピンを示
す。
The final fifth step (cover glass mounting step)
Then, as shown in FIG. 5 (j), the solar cell 1 cut into a predetermined size is placed on the solar cell holding member 32 with the light receiving surface 4 facing upward. Next, an adhesive 10 made of silicon on one side (for example, DC93-500 manufactured by Dow Corning)
The cover glass 9 applied with the cover glass holding jig 31
Is used for vacuum adsorption. Next, the cover glass holding jig 3
1 is moved closer to the solar battery cell 1, and the vacuum state of the cover glass holding jig 31 is released immediately before the solar battery cell 1 and the cover glass 9 come into contact with each other. After that, the cover glass 9 is separated from the cover glass holding jig 31 and adhered to the light receiving surface 4 of the solar cell 1 as shown in FIG. 5 (k), and the fifth step is completed. The reference numeral 33 indicates a positioning pin.

【0016】ここで太陽電池セル1の反りが除去されて
いない場合には図8のように反りのない平坦なカバーガ
ラス49とセル受光面44との間に無駄な空隙50生じ
るためこれを埋めるためには接着剤の使用量を増やさな
くてはならない。反りが除去されていれば使用される接
着剤は少量で済み、接着剤10中への気泡混入も防止で
きかつ厚さ・重量ともより均一にすることができる。ま
た反った太陽電池セル本体41を固定するために付属し
ていた太陽電池セル保持治具32への真空装置は不要と
なる。一方、曲面に太陽電池セルを固定する場合には太
陽電池セルの反りを利用することもできる。このような
場合には先の冷却・加熱工程を上手く利用して所望の曲
率を持つ太陽電池セルをある曲率を持つサブストレート
へ固定することが可能である。
If the warp of the solar cell 1 is not removed, a useless gap 50 is formed between the flat cover glass 49 having no warp and the cell light receiving surface 44 as shown in FIG. In order to do so, the amount of adhesive used must be increased. If the warp is removed, a small amount of adhesive can be used, it is possible to prevent air bubbles from being mixed in the adhesive 10, and to make the thickness and weight more uniform. Further, the vacuum device for the solar battery cell holding jig 32, which is attached for fixing the warped solar battery cell body 41, is unnecessary. On the other hand, when fixing the solar battery cells to the curved surface, the warp of the solar battery cells can be used. In such a case, it is possible to fix the solar cell having a desired curvature to the substrate having a certain curvature by making good use of the above cooling / heating process.

【0017】実際の反り除去処理プロセス要領図を図7
に示す。このように本発明を用いた半導体装置の製造装
置は反りを除去する第三・第四工程は、半導体装置を保
持する保持部、−70℃以下に保持できる冷却部、常温
で半導体装置を乾燥させる乾燥部及び50℃以上に加熱
できる加熱部の4部から構成されている。半導体装置5
2を半導体装置搬送キャリア51にセットすることで一
度に大量に処理することができる。所定の形状にダイシ
ングが終わった後、半導体装置搬送キャリア51に半導
体装置52をセットし、冷却槽54(冷却媒体53とし
ては例えば液体窒素)に保持し−90℃前後まで冷却す
る。次に乾燥槽56へと搬送し乾燥気体等を吹き付け常
温で乾燥させる。更にこれを加熱槽57(例えばオーブ
ン)に入れ50℃以上に加熱保持し、その後常温で保持
し常温まで冷ます。なお符号55は乾燥部ふたを示す。
FIG. 7 shows an actual process diagram of the warp removal processing.
Shown in. As described above, in the semiconductor device manufacturing apparatus according to the present invention, the third and fourth steps for removing the warp include a holding unit for holding the semiconductor device, a cooling unit for holding the semiconductor device at -70 ° C. or below, and drying the semiconductor device at room temperature. It is composed of four parts: a drying part for heating and a heating part capable of heating to 50 ° C. or higher. Semiconductor device 5
By setting 2 in the semiconductor device transport carrier 51, it is possible to process a large amount at a time. After the dicing into a predetermined shape is completed, the semiconductor device 52 is set on the semiconductor device transport carrier 51, held in the cooling tank 54 (for example, liquid nitrogen as the cooling medium 53), and cooled to about -90 ° C. Next, it is conveyed to the drying tank 56 and sprayed with a drying gas or the like to be dried at room temperature. Further, this is put in a heating tank 57 (for example, an oven), heated and kept at 50 ° C. or higher, then kept at room temperature and cooled to room temperature. Reference numeral 55 indicates a drying unit lid.

【0018】この一連のプロセスは処理時間・処理温度
を制御し搬送部を加えることで自動化することもでき
る。この反り除去の物理的現象は、次のように説明され
る。冷却に伴って電極とシリコン基板との熱膨張係数の
違いから電極部の収縮力の方が大きくなり、界面に大き
な収縮力が生じる。冷却後この半導体装置を常温に戻す
際、この収縮力が膨張力に転じ熱膨張係数の大きい金属
部が半導体部より大きく膨張しようとするため、金属部
を凸にするような応力がかかる。この応力がある一定の
値を超えると界面付近の半導体、金属の両物質の結晶構
造が耐えられなくなり、部分的な構造の転移を起こし反
り量に変化が生じることとなる。加熱によって反りが半
導体部を凸面にして変化する場合は、この逆の現象が起
こっていると考えればよい。このように温度差を利用し
たこれら2つの現象をうまくバランスさせることで反り
を更に小さくすることができる。
This series of processes can be automated by controlling the processing time and the processing temperature and adding a transfer section. The physical phenomenon of this warp removal is explained as follows. Due to the difference in the coefficient of thermal expansion between the electrode and the silicon substrate, the contraction force of the electrode portion becomes larger with cooling, and a large contraction force is generated at the interface. When this semiconductor device is returned to room temperature after cooling, the contraction force is converted into an expansion force and the metal part having a large thermal expansion coefficient tends to expand more than the semiconductor part, so that stress that makes the metal part convex is applied. If this stress exceeds a certain value, the crystal structures of both the semiconductor and the metal in the vicinity of the interface cannot withstand, a partial structural transition occurs, and the amount of warpage changes. In the case where the warpage changes due to heating with the semiconductor portion being convex, it can be considered that the opposite phenomenon occurs. By properly balancing these two phenomena utilizing the temperature difference, the warp can be further reduced.

【0019】液体窒素に浸すような急冷を伴う反り除去
プロセスでは、徐々に常温に戻ってくる際に応力が持続
的に掛かり構造転移を起こす時間が十分に与えられるた
め、同じ温度変化を伴う場合においても反り量は冷却前
と比べてより大きく変化する。逆に常温以上に加熱する
場合についても、オーブン等で急加熱し徐々に常温に冷
ましてくると逆方向、すなわち半導体基板に対して凸方
向に持続的に応力がかかるため反り量が加熱前と比べて
大きく変化する。
In the warp removal process involving rapid cooling such as immersion in liquid nitrogen, when the temperature is gradually returned to room temperature, stress is continuously applied and sufficient time for structural transition is given, so that the same temperature change is involved. Even in the case of, the amount of warpage changes more than before cooling. On the other hand, even when heating above normal temperature, when it is rapidly heated in an oven or the like and gradually cooled to normal temperature, the amount of warpage is the same as before heating because stress is continuously applied in the opposite direction, that is, in the convex direction on the semiconductor substrate. It changes greatly compared to.

【0020】[0020]

【発明の効果】本方法によって反りを除去することで平
坦固定に必要な真空装置が不要になるためモジュール化
がより容易になる。また気泡等が入ることを防止できる
ため修繕時間が必要なく作業時間の大幅な短縮となる。
更に、反りのない平坦なカバーガラスやモジュールの基
板への装着の際にも、接着剤の原料の節約、軽量・薄型
化、気泡混入防止等の高均一化等のメリットがある。逆
に曲面へ半導体装置を固定する場合には、反り除去プロ
セスの加熱・冷却条件を的確に利用することで所望の曲
率に半導体装置の反りを制御し固定することができる。
EFFECTS OF THE INVENTION By removing the warp by this method, a vacuum device necessary for flat fixing is not required, which facilitates modularization. In addition, since it is possible to prevent bubbles and the like from entering, the repair time is not required and the working time is greatly shortened.
Further, even when the flat cover glass without warpage or the module is mounted on the substrate, there are advantages such as saving the raw material of the adhesive, reducing the weight and thickness, and making the air bubble mixed in highly uniform. On the contrary, when the semiconductor device is fixed to the curved surface, the warp of the semiconductor device can be controlled and fixed to a desired curvature by properly utilizing the heating / cooling conditions of the warp removal process.

【図面の簡単な説明】[Brief description of drawings]

【図1】半導体装置の反り変化を示す概略断面図であ
る。
FIG. 1 is a schematic cross-sectional view showing a change in warpage of a semiconductor device.

【図2】半導体基板/金属膜を有する半導体装置の構造
断面図である。
FIG. 2 is a structural cross-sectional view of a semiconductor device having a semiconductor substrate / metal film.

【図3】PN接合型単結晶シリコン太陽電池セルの概略
製造工程断面図である。
FIG. 3 is a schematic cross-sectional view of manufacturing steps of a PN junction type single crystal silicon solar cell.

【図4】PN接合型単結晶シリコン太陽電池セルの概略
製造工程断面図である。
FIG. 4 is a schematic cross-sectional view of manufacturing steps of a PN junction type single crystal silicon solar cell.

【図5】PN接合型単結晶シリコン太陽電池セルの概略
製造工程断面図である。
FIG. 5 is a schematic cross-sectional view of a manufacturing process of a PN junction type single crystal silicon solar cell.

【図6】液体窒素で冷却処理後の半導体装置の加熱処理
温度と反り量の関係を表わしたグラフである。
FIG. 6 is a graph showing a relationship between a heat treatment temperature and a warp amount of a semiconductor device after cooling treatment with liquid nitrogen.

【図7】本発明の反り除去プロセス要領図である。FIG. 7 is a diagram of a warp removal process according to the present invention.

【図8】従来の反りをもつ太陽電池セルのカバーガラス
装着後の概略断面図である。
FIG. 8 is a schematic cross-sectional view of a conventional solar cell having a warp after a cover glass is attached.

【符号の説明】[Explanation of symbols]

1:太陽電池セル 2:シリコン基板 3:不純物拡散層 4:受光面 5:電極パターン 6:表面電極 7:裏面電極 8:反射防止膜 9、49:カバーガラス 10:接着剤 31:カバーガラス保持治具 32:太陽電池セル保持治具 33:位置合わせ用ピン 41:太陽電池セル本体 44:セル受光面 50:空隙 51:半導体装置搬送キャリア 52:半導体装置 53:冷却媒体 54:冷却槽 55:乾燥部ふた 56:乾燥槽 57:加熱槽 a:半導体基板 b,c,d:金属膜 1: Solar cell 2: Silicon substrate 3: Impurity diffusion layer 4: Light receiving surface 5: Electrode pattern 6: Surface electrode 7: Back electrode 8: Antireflection film 9, 49: Cover glass 10: Adhesive 31: Cover glass holding jig 32: Solar cell holding jig 33: Positioning pin 41: Solar cell body 44: Cell light receiving surface 50: Void 51: Semiconductor device carrier 52: Semiconductor device 53: Cooling medium 54: Cooling tank 55: Drying part lid 56: Drying tank 57: heating tank a: Semiconductor substrate b, c, d: metal film

Claims (8)

【特許請求の範囲】[Claims] 【請求項1】 半導体基板とその少なくとも一方の面の
全面又は部分的に金属膜を有し、かつその製造工程中の
熱履歴により反りを有する半導体装置を、冷却し、次い
で加熱することにより半導体装置の反りを減少させるこ
とを特徴とする半導体装置の製造方法。
1. A semiconductor device having a semiconductor substrate and a metal film on all or a part of at least one surface thereof and having a warp due to thermal history during the manufacturing process of the semiconductor substrate is cooled and then heated. A method for manufacturing a semiconductor device, characterized in that the warpage of the device is reduced.
【請求項2】 冷却が、−70℃以下で保持することに
より行なわれる請求項1に記載の製造方法。
2. The manufacturing method according to claim 1, wherein the cooling is performed by holding at −70 ° C. or lower.
【請求項3】 冷却が、液体窒素、液体ヘリウム、液体
アルゴン及び液体ネオンから選択される冷却媒体を用い
て行なわれる請求項1又は2に記載の製造方法。
3. The method according to claim 1, wherein the cooling is performed using a cooling medium selected from liquid nitrogen, liquid helium, liquid argon and liquid neon.
【請求項4】 加熱が、50℃以上に保持することによ
り行なわれる請求項1〜3のいずれか1つに記載の製造
方法。
4. The manufacturing method according to claim 1, wherein heating is performed by holding at 50 ° C. or higher.
【請求項5】 半導体基板が、シリコン基板である請求
項1〜4のいずれか1つに記載の製造方法。
5. The manufacturing method according to claim 1, wherein the semiconductor substrate is a silicon substrate.
【請求項6】 半導体基板が、50μm以上200μm
以下の厚さを有する請求項1〜5のいずれか1つに記載
の製造方法。
6. The semiconductor substrate has a thickness of 50 μm or more and 200 μm or more.
The manufacturing method according to claim 1, which has the following thickness.
【請求項7】 半導体装置が、太陽電池セルである請求
項1〜6のいずれか1つに記載の製造方法。
7. The manufacturing method according to claim 1, wherein the semiconductor device is a solar battery cell.
【請求項8】 金属膜が、少なくともAgを含んでいる
請求項7に記載の製造方法。
8. The manufacturing method according to claim 7, wherein the metal film contains at least Ag.
JP2002134266A 2002-05-09 2002-05-09 Manufacturing method of semiconductor device Expired - Fee Related JP4448644B2 (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014041260A1 (en) * 2012-09-14 2014-03-20 Commissariat à l'Energie Atomique et aux Energies Alternatives Device and method for restoring silicon-based photovoltaic solar cells

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014041260A1 (en) * 2012-09-14 2014-03-20 Commissariat à l'Energie Atomique et aux Energies Alternatives Device and method for restoring silicon-based photovoltaic solar cells
FR2995727A1 (en) * 2012-09-14 2014-03-21 Commissariat Energie Atomique DEVICE AND METHOD FOR RESTORING SILICON-BASED PHOTOVOLTAIC CELLS
US9520528B2 (en) 2012-09-14 2016-12-13 Commissariat à l'Energie Atomique et aux Energies Alternatives Device and method for restoring silicon-based photovoltaic solar cells

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