JP2003324260A - Printed wiring board and manufacturing method therefor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To densify a printed wiring board by improving the connection reliability of a circuit component 3, related to a single-sided, double-sided or multilayer printed wiring board in which the circuit component 3 is buried, and a method for manufacturing it. <P>SOLUTION: An electrode 3a of the circuit component 3 is formed of an elementary substance of Ni, Cr or Ti, or an alloy of them. A through hole 2 or a counter boring part 9 is formed in a substrate 1 to form a burying part. A form thereof is so set that the circuit component 3 can be pressed therein. The surface of the electrode 3a is recessed from the surface of the substrate 1 by 10-50 μm. The electrode 3a is connected to a wiring pattern 6A1 formed of a copper layer 6A while adjoining the electrode 3a in the thickness direction of the substrate with the copper layer 6A. The copper layer 6A is the same copper layer that is formed on the surface of a through hole 4, a via hole 8 or an inner via hole 4A. <P>COPYRIGHT: (C)2004,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention comprises a double-sided wiring board or a multilayer wiring board in which circuit components are embedded, and an insulating layer and a pattern layer laminated on the single-sided or double-sided wiring board or the multilayer wiring board. The present invention relates to a so-called build-up board and manufacturing methods thereof, and particularly to improvement in connection reliability of circuit components and increase in density.

[0002]

2. Description of the Related Art In recent years, electronic devices have become smaller, more multifunctional, and faster, and in order to meet these demands, it is required to incorporate various high-density mounting technologies into printed wiring boards and their manufacturing methods. Came. As a measure to meet this demand, conventionally, a technique has been proposed in which a chip component or the like mounted on the front surface or the back surface of a printed wiring board is embedded inside the printed wiring board. By adopting this component embedding technology for the substrate, the component mounting density of the substrate is greatly improved, and the wiring length can be shortened.Therefore, high reliability of the substrate itself and high-speed signal transmission are expected. ing.

The component-embedded multilayer wiring board technology is
It is disclosed in Japanese Patent Application Laid-Open No. 6-120671 (hereinafter referred to as Publication 1) and Japanese Patent Application Laid-Open No. 2001-53447 (hereinafter referred to as Publication 2).

[0004] Japanese Laid-Open Patent Publication No. 2004-242242 discloses a technique of embedding a chip component in an inner layer of a wiring board, securing inter-layer conduction and connecting the embedded components in several steps using solder materials having different melting points. Has been done.

[0005] Further, in Japanese Patent Laid-Open No. 2-211, a chip component or the like is embedded in an inner layer of a wiring, an insulating layer is formed thereon, and plating is performed through a via hole provided by a laser, a drill or the like to secure and embed interlayer conduction. A technique for connecting between the parts is disclosed.

[0006]

DISCLOSURE OF THE INVENTION Problem to be Solved by the Invention
The invention disclosed in (1) requires a plurality of soldering steps corresponding to the solder joints. (B) The bonding conditions for mounting components on the front and back surfaces of the board and for soldering to another board such as a mother board are greatly restricted. (C) It is difficult to control the solder material to stabilize the melting temperature of the solder. (D) If the solder flux remains around the soldered portion or inside the soldered portion, swelling or rupture is likely to occur when the insulating layers are laminated to build up. (E) It is difficult to reduce the thickness of soldering,
If this is covered with a build-up insulating layer of about μm, its flatness cannot be ensured. There was a problem. Among them,
(C), (d), and (e) are problems related to the deterioration of reliability.

Further, in the invention disclosed in the publication 2, the connection method is plating and the reliability of the joint is improved, but (f) the via hole via the build-up insulating layer is formed on the electrode of the embedded component. At this time, since no consideration is given to maintaining the accuracy of the electrode position of the embedded component, there is a possibility that a joint failure may occur due to the position shift. The variation of this position is usually about 50 μm. (G) When a via hole is formed by a usual method such as laser or drill, the residual component of the insulating resin that hinders the plating property remains on the electrode surface of the embedded component and is removed by a desmear solution etc. However, this removing solution deteriorates the solder coated on the electrodes of the embedded component.

(H) When a via hole is formed by a chemical, this chemical deteriorates the solder coated on the electrode. Moreover, in this method of forming a via hole using a chemical solution, the via hole shape is not a straight shape but an inverse taper shape due to the chemical solution wrapping around. Therefore, the throwing power of the plating is deteriorated and there is a high possibility of a connection failure. (I) Lead or silver contained in the solder coated on the electrode of the component leaks into the electrolytic solution in which the substrate is immersed when the copper layer is formed by electrolytic plating, and the electrolytic solution is deteriorated and deteriorated.

(G) The connection to the embedded circuit component 30 must be made from the wiring pattern 60B in the outer layer of one step by the via holes 80 (see FIG. 6), and the electrodes 30 are provided at both ends in the longitudinal direction.
When the circuit component 30 having a is embedded in the core portion of the board in the longitudinal direction by providing a through hole, in order to connect this component, four layers (two front and back layers of the core multilayer board and the outside of the buildup layer) are connected. 2 layers) are required.

Further, even when the parts are laterally embedded in the counterbore, two layers (one layer on one side of the core multi-layer board and one layer on the outside of the buildup layer laminated there) are required, and high density is required. Not suitable for conversion. There was a problem. Among them, (f), (to), (h), and (ri) are problems particularly relating to the deterioration of reliability.

Therefore, the problem to be solved by the present invention is to solve the above-mentioned problems (a) to (n), and (a) dramatically improve the connection reliability of the embedded circuit parts. (B) Higher density by improving the accuracy of the embedded position of the circuit component. (C) Higher density by connecting the embedded circuit component and the wiring pattern with fewer layers. A printed wiring board and a method for manufacturing the same are provided.

[0012]

In order to solve the above problems, the present invention has the following constitution and method as means. That is, according to claim 1, the embedded portion formed by forming the through hole 2 or the spot facing portion 9 in the substrate 1, the circuit component 3 inserted or housed in the embedded portion, and the plating on at least one surface side of the substrate 1 Thus, the wiring pattern 6A including the copper layers 6A and 6B formed in a single layer or in a plurality of alternating layers with the insulating layer 7.
In the printed wiring board having 1, 6B1, a wiring pattern 6A composed of the electrode 3a and a copper layer 6A formed adjacent to the electrode 3a in the thickness direction of the substrate 1.
1 and 1 are connected by the copper layer 6A formed adjacently to each other.

According to a second aspect, the surface material of the electrode 3a is
The printed wiring board according to claim 1, wherein the printed wiring board is made of Ni, Cr or Ti alone or an alloy of Ni, Cr or Ti.

A third aspect of the present invention is the printed wiring board according to the first or second aspect, wherein the embedded portion has a shape having a press-fitting margin with respect to the circuit component 3.

A fourth aspect of the present invention is the printed wiring board according to the third aspect, wherein the press-fitting margin is 3 μm or more and 30 μm or less.

According to a fifth aspect of the present invention, the end face in the thickness direction of the substrate 1 of the electrode 3a is 10 μm in the thickness direction with respect to the side face of the substrate 1 of the wiring pattern 6A1 made of the adjacent copper layer 6A. The printed wiring board according to any one of claims 1 to 4, wherein the concave portion has a size of 50 μm or less.

According to a sixth aspect of the present invention, the substrate 1 or the insulating layer 7 is provided with any one of a through hole 4, an inner via hole and a via hole 8 having copper layers 6A and 6B formed by plating on the surface thereof. The printed wiring board according to any one of claims 1 to 5, wherein the copper layer 6A formed on the surface and the copper layer 6A formed adjacently are the same copper layer.

A seventh aspect of the present invention is the printed wiring board according to any one of the first to sixth aspects, wherein a resin 5 is filled in a space between the embedded portion and the circuit component 3. .

Further, the claim 8 is at least the substrate 1
A step of providing an embedded portion by the through hole 2 or the spot facing, an embedding step of mounting or housing the circuit component 3 in the embedded portion, and a copper layer 6A as a wiring pattern 6A1 on at least one surface side of the substrate 1, In a method for manufacturing a printed wiring board, which comprises a plating step of forming a single layer or an alternate multilayer with an insulating layer 7, the electrode 3a surface material of the circuit component 3 is Ni, Cr or Ti alone or Ni,
An alloy of Cr or Ti is used, and the plating step includes a step of forming a copper layer 6A adjacent to the electrode 3a in the thickness direction of the substrate 1 by connecting to the electrode 3a. It is a manufacturing method of a printed wiring board.

According to a ninth aspect, before the plating step,
9. The method of manufacturing a printed wiring board according to claim 8, further comprising the step of removing the unnecessary resin 5 after filling the resin 5 into the space between the embedded portion and the circuit component 3.

[0021]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described with reference to FIGS. 1 to 5 according to a preferred embodiment. Circuit components to be embedded in the printed wiring board of the present invention include resistors, capacitors, coils, diodes, transistors, and chip components of integrated circuits. The electrode surface of this circuit component is not a conventional solder coat containing lead or silver, but a circuit component formed of Ni, Cr or Ti alone or an alloy of Ni, Cr or Ti is used. There is. A preferred example of this alloy is Ni
There are Cr and TiN.

Ni, Cr, and Ti have excellent adhesion to copper plating, and electrodes formed of these simple substances or alloys thereof are desmear liquids that remove unnecessary resin components adhering to the electrodes. It does not deteriorate with a removing solution such as. Further, it does not contaminate the electrolytic solution that immerses the substrate to deteriorate and deteriorate it when the copper layer is formed by electrolytic plating. This feature dramatically improves connection reliability. From the viewpoint of environmental load, Ni is most preferable.

Printed wiring boards in which these circuit components are embedded include single-sided boards, double-sided boards and multilayer laminated boards, and
There is a so-called build-up board in which insulating layers and circuit pattern layers are alternately laminated on these surfaces to build up.
As the embedding form of the circuit component, there are (I) a form in which the through hole is embedded in the substrate, (II) a form in which a counterbore is formed and embedded, and (III) an applied form in which the through hole is formed and embedded. Detailed description will be given in order from a mode in which holes are provided and embedded.

(I) Forming Through Holes for Embedding The through hole for embedding is a case where circuit components are connected to both the front and back sides of a copper-clad laminate of a wiring board. In this case, first, a through hole is formed in the copper-clad laminate, and a circuit component is embedded therein. When the connection is made with the build-up layer in the build-up board, the through hole can be formed after the build-up and the circuit component can be embedded therein.

The method for manufacturing a printed wiring board according to this embodiment is described with reference to FIGS. 1 (a) to 1 (l) for each step, and
This will be described in (11). FIG. 1 is a schematic sectional view of a printed wiring board. (1) Formation of Through Hole (FIG. 1B) The through hole 2 is formed in the place where the circuit component 3 is embedded in the copper-clad laminate 1 that will be the substrate of the printed wiring board. This through hole 2
Is characterized in that the diameter of is set to a shape in which the circuit component 3 is press-fitted.

The features will be specifically described below. In the formation of the through hole 2, if a relatively large hole having a diameter of about several mm is required, it can be processed as a rectangular hole, but if the hole diameter is 1 mm or less, a circular hole is formed. It is realistic to drill the holes. The circuit component 3 is usually in the form of having electrodes at both ends in the longitudinal direction of a rectangular parallelepiped. As shown in FIG. 4A, when the diagonal length of the electrode surface is L1 and the hole diameter of the through hole is φA, L1− When φA is a positive number, it has a press-fitting margin, which is set to 3 μm or more and 30 μm or less.

The relationship between the dimension L1 and the hole diameter φA can be commonly set regardless of the physical properties of the prepreg of the substrate, the built-up insulating layer, and the size of the component. As a result, it is possible to open a large hole with a margin of 50μ.
The electrode 3a of the circuit component 3 with respect to the through hole 2 was about m
It is possible to almost eliminate the variation in the position. As described above, by ensuring the positional accuracy of the circuit component 3, it is possible to perform highly reliable bonding, and it is possible to reduce the processing margin of the through-hole 2 to achieve high density. Also,
In the step (1), the through hole 4 is also formed at the same time.

(2) Inserting the circuit component 3 into the through hole 2.
(FIG. 1C) (3) Filling the gap between the circuit component 3 and the through hole 2 with the resin 5. (FIG. 1D) (4) Removal of unnecessary resin 5. (FIG. 1E) In step (2), the circuit component 3 is inserted into the through hole 2 in such a direction that the electrodes 3a thereof correspond to the front and back of the substrate.
The difference between the outer dimension D1 between the electrodes 3a of the circuit component 3 and the thickness t1 of the substrate is set to a predetermined value Δt1, and a recess of Δt1 / 2 is formed from the substrate surface to the electrode surface of the circuit component 3. The feature is that the position in the press-fitting direction is set as described above.

Specifically, when t1-D1 = Δt1, the recess depth dimension Δt1 / 2 is 10 μm or more and 50 μm or more.
Set as follows. This is Δt1 / 2, as will be described later.
Is 10 μm or more so that the component electrode 3a is not shaved even if the unnecessary resin 5 is removed by buffing, and the resin remaining on the electrode surface and the recess is 50 μm or less that can be efficiently removed by a YAG laser or the like. Because, it is possible to improve productivity.

By filling the resin 5 in the step (3),
When the conductor layer is formed by plating, sputtering, vapor deposition or the like after the circuit component 3 is inserted, it is possible to prevent the conductor layer from being formed in this void and causing a short circuit between layers. Even if the resin is filled with the minimum amount of resin that can prevent short-circuiting between layers, excess resin may adhere to the substrate being manufactured.

Further, in the case where there is a treatment or a heat treatment in a vacuum apparatus in the subsequent step, it is extremely important to sufficiently inject the resin into the voids so that there are no voids in order to improve the treatment. In this case, however, there is a high possibility that extra resin will adhere to the substrate. Therefore, it is necessary to completely remove the excess resin component in the step (4).

Blasting and buffing are known as removing means on the substrate, but buffing is preferable because the flatness of the surface after removal is excellent. Further, the removal at the electrode 3a portion of the circuit component 3 is performed by the above-mentioned laser processing, which can ensure the reliability of the connection.

(5) Formation of copper layer 6 by plating (see FIG. 1)
(F)) A copper layer 6 is formed on the front and back surfaces of the substrate by electroless plating and electrolytic plating.
Form A. As a result, the electrode 3a of the circuit component 3 and the copper layer 6A are connected. In this way, since the copper layer 6 is directly laminated by plating without providing the insulating layer 7, the circuit component 3 can be connected only by the two front and back layers of the substrate.

(6) Filling resin 5 into through holes 4 (FIG. 1 (g)) (7) Forming pattern 6A1 on copper layer 6A (FIG. 1)
(H)) With the above, a double-sided wiring board in which the through holes 2 are provided and embedded is completed.

Further, in the case of a build-up substrate, (8) formation of insulating layer 7 (FIG. 1 (i)) (9) formation of via hole 8 (FIG. 1 (j)) (10) formation of copper layer 6B (FIG. 1 (k)) (11) Formation of Pattern 6B1 on Copper Layer 6B (FIG. 1)
It can be created by the step (l)). In this state, the through hole 4 is a so-called inner via hole 4A which is covered with the insulating layer and is not exposed to the outside.

Depending on the structure of the printed circuit board, after the step (8), an embedded portion is provided to embed a circuit component, and the electrode 3a and the wiring pattern 6B1 are connected to the via hole 8 in the same layer as the copper layer 6B. You can also The embedding part may be a through hole or a spot facing part described later, and in the case of the through hole, the steps (1) to (c) of FIG.
1A), (11B) and (11C).

(11A) Formation of insulating layer 7. (Fig. 5
(A)) In contrast to the step (8) (FIG. 1 (i)), the through hole 2 is not provided. (11B) Forming the through hole 2 and press-fitting the circuit component 3. (FIG. 5B) The press-fitting margin is the same as that described above, and the substrate 1 including the insulating layer 7 is used.
Is t4 and the dimension between the electrode surfaces is D4,
Δt4 = t4-D4, and with respect to the surface of the insulating layer 7,
The surface of the electrode 3a is (Δt4) / 2, and 10 μm or more 5
The recess should be 0 μm or less. (11C) Formation of copper layer 6B. (FIG. 5C) The copper layer 6B is formed by plating. At this time, the copper layer 6B
And the electrode 3a are connected, and at the same time, a copper layer is formed in the same layer on the surface of the via hole. After that, a wiring pattern is applied to the copper layer 6B.

Next, the form in which the counterbore 9 is provided and embedded will be described in detail. (II) Form in which the counterbore 9 is provided and embedded The case where the counterbore 9 is provided and embedded is a case where the circuit component 3 is connected to only one side of the copper-clad laminate (board) of the wiring board. In this case, first, the counterbore 9 is formed on the substrate, and the circuit component 3 is housed therein. The method of manufacturing a printed wiring board according to this embodiment is shown in each step of FIGS.
(12) to (22) will be described using (g). Figure 2
FIG. 3 is a schematic sectional view of a printed wiring board.

(12) Formation of Counterbore 9 (FIG. 2 (a)) The counterbore 9 is formed at the place where the circuit component 3 is embedded on the substrate. This counterbore 9 is characterized in that the circuit component 3 is press-fitted.

This characteristic will be specifically described. The opening of the counterbore 9 can be formed into a circular shape or an oval shape with a drill. Circuit component 3 to be embedded there
Is usually a rectangular parallelepiped and has electrodes 3a at both ends in the longitudinal direction, and therefore, the opening shape of the counterbore 9 is elliptic rather than circular so that the required area is small and the density can be increased. preferable.

As shown in FIG. 4 (b), the radius of one of the ellipses having the opening shape of the spot facing is B, the center is C, and the distance from the center C to the corner of the circuit component is Lb. When
When (Lb−B) × 2 is a positive number, it has a press-fitting margin, which is set to 3 μm or more and 30 μm or less. When the counterbore 9 has a circular opening shape, as shown in FIG. 4C, when the diameter is φA2 and the diagonal length of the circuit component 3 is L2, L2-φA2 is as described above. A positive number has a press-fitting margin, which is set to 3 μm or more and 30 μm or less. These are the press fits. The relationship between the dimension Lb and the diameter B or the diameter L2 and the diameter φA2 can be set in common regardless of the physical properties of the prepreg of the substrate, the built-up insulating layer, and the size of the component.

As a result, it is possible to almost eliminate the variation in the position of the electrode 3a of the circuit component 3 with respect to the spot facing portion 9, which has a large opening and is about 50 μm in the related art. In this way, by ensuring the positional accuracy of the circuit component 3, it is possible to perform highly reliable joining and to reduce the processing margin of the spot facing portion 9 to achieve high density. In the step (12), the through hole 4 is also formed at the same time.

(13) Storage of the circuit component 3 in the spot facing portion 9. (FIG. 2 (b)) (14) Filling the gap between the circuit component 3 and the spot facing 9 with the resin 5 (FIG. 2 (c)) (15) Removing the unnecessary resin 5 (FIG. 2 (d)) In the step (13), the circuit component 2 is housed in the spot facing portion 9 with its electrode 3a oriented parallel to the surface direction of the substrate. External dimensions D of the circuit component 3 in the embedding direction
The difference between 2 and the counterbore depth t2 is set to a predetermined value Δt2, and is set so as to have a recess of Δt2 from the substrate surface to the electrode of the circuit component.

Specifically, when t2-D2 = Δt2, the concave dimension Δt2 is set to 100 to 50 μm. As will be described later, Δt2 is 10 μm or more at which the component electrodes cannot be shaved even if the unnecessary resin is removed by buffing, and the resin remaining on the electrode surface and the recess is YAG.
This is because the productivity can be improved by setting the thickness to 50 μm or less that can be effectively removed by a laser or the like.

By filling the resin in the step (14),
When a conductor layer is formed by plating, sputtering, vapor deposition or the like after embedding a circuit component, it is possible to prevent a conductor layer from being formed in this void and causing a short circuit between layers. Even if the resin is filled with the minimum amount of resin that can prevent short-circuiting between layers, excess resin may adhere to the substrate being manufactured.

Further, in the case where there is a treatment or a heat treatment in a vacuum apparatus in the subsequent step, it is extremely important to sufficiently inject the resin into the voids so that there are no voids in order to improve those treatments. In this case, however, there is a high possibility that extra resin will adhere to the substrate. Therefore, step (15)
Therefore, it is necessary to completely remove the excess resin component.

Blasting and buffing are known as removing means on the substrate, but buffing is preferable because the flatness of the surface after removal is excellent. Further, the removal of the circuit component 3 at the electrode portion 3a is performed by the above-described laser processing, which can ensure the reliability of the connection.

(16) Formation of Copper Layer 6A by Plating (FIG. 2 (e)) The copper layer 6 is formed on the front and back surfaces of the substrate by electroless plating and electrolytic plating.
Form A. As a result, the electrode 3a of the circuit component 3 and the copper layer 6A are connected. Since the copper layer 6A is directly laminated by plating without providing the insulating layer 7 in this manner, the circuit component 3 can be connected by only one layer on the surface of the substrate.

(17) Filling resin 5a into through hole 4 (FIG. 2 (f)) (18) Forming pattern 6A1 on copper layer 6A (FIG. 2)
(G)) With the above, a double-sided wiring board in which the counterbore 9 is provided and embedded is completed.

Further, in the case of a build-up substrate, (19) formation of insulating layer 7 (FIG. 2 (h)) (20) formation of via hole 8 (FIG. 2 (i)) (21) formation of copper layer 6B (FIG. 2 (j)) (22) Formation of pattern 6B1 on copper layer 6B (FIG. 2)
It can be prepared by the step (k)). Next, an application mode in which the through hole 2 is provided and embedded will be described in detail.

(III) Application Forming with Through Hole 2 Provided and Embedded In this application form, in the above-mentioned form (I) providing the through hole 2 and embedding, the circuit component 3 has its electrode 3a on the substrate 1.
It is used when it is embedded so as to be parallel to and is connected to both the front and back of the substrate 1. A method of manufacturing a substrate plate according to this embodiment will be described with reference to FIG. 3A to FIG.
This will be described in 3) to (33). FIG. 3 is a schematic cross-sectional view of the printed wiring board.

(23) Formation of Through Hole 2 (FIG. 3A) The through hole 2 is formed in the board 1 at the place where the circuit component 3 is embedded. It is characterized in that the shape of the through hole 2 is set such that the circuit component is press-fitted therein.

This feature will be specifically described. This through hole 2 can be formed in a circular shape or an elliptical shape with a drill. Since the circuit component 3 to be embedded therein usually has electrodes 3a at both ends in the longitudinal direction of the rectangular parallelepiped, the shape of the opening of the through-hole 2 is smaller than that of the circle in the area occupied by the ellipse, and the density can be increased. It is possible because it is possible.

As described above, one radius of the ellipse having the opening shape shown in FIG. 4B is B, the center thereof is C, and the distance from the center C to the corner of the circuit component is Lb. When
When (Lb−B) × 2 is a positive number, it has a press-fitting margin, which is set to 3 μm or more and 30 μm or less. When the counterbore is circular and its diameter is φA2 and the diagonal length of the circuit component is L2, as described above, when L2-φA2 is a positive number, it has a press-fitting margin, which is 3 μm. More than 30
Set to less than μm.

This dimension Lb and diameter B or L2 and diameter φA
The relationship of 2 can be commonly set regardless of the physical properties of the prepreg of the substrate, the built-up insulating layer, and the size of the component. As a result, it is possible to substantially eliminate the variation in the position of the electrode 3a of the circuit component 3 with respect to the through hole 2, which has a large opening and is about 50 μm in the related art.

As described above, by ensuring the positional accuracy of the circuit component 3, highly reliable bonding becomes possible, and the through hole 2
It is possible to increase the density by reducing the processing margin. In the step (23), the through hole 4 is also formed at the same time.

(24) Storage of the circuit component 3 in the through hole 2.
(FIG. 3B) (25) Filling the gap between the circuit component 3 and the through hole 2 with the resin 5. (FIG. 3C) (26) Removal of unnecessary resin 5. (FIG. 3D) In the step (24), the circuit component 3 is housed in the through hole 2 with the electrodes 3a thereof aligned in the surface direction of the substrate 1.
The difference between the external dimension D3 of the circuit component 3 in the press-fitting direction and the thickness t3 of the substrate is set to a predetermined value Δt3, and the recess is Δt3 / 2 from the substrate surface to the electrode of the circuit component. It is characterized by setting the position.

Specifically, the recess depth dimension Δt3 / 2 when t3-D3 = Δt3 is set to 10 to 50 μm. As will be described later, this is because (Δt3) / 2 is 10 μm or more at which the component electrodes cannot be scraped off even if the unnecessary resin is removed by buffing, and the resin remaining on the electrode surface and the recess is YAG laser. 50 can be removed efficiently
This is because the productivity can be improved by setting the thickness to μm or less.

By filling the resin 5 in the step (25), it is possible to prevent the conductor layer from being formed in the void and short-circuiting between layers when the conductor layer is formed by plating, sputtering or vapor deposition after the circuit component 3 is embedded. . Even if the resin is filled with the minimum amount of resin that can prevent short-circuiting between layers, excess resin may adhere to the substrate being manufactured.

Further, in the subsequent step, when there is a treatment or heat treatment in a vacuum apparatus, it is extremely important to sufficiently inject the resin into the voids so that there are no voids in order to improve those treatments. In this case, however, there is a high possibility that extra resin will adhere to the substrate. Therefore, step (26)
Therefore, it is necessary to completely remove the excess resin component.

As described above, blasting and buffing are known as the removing means on the substrate 1. However, buffing is preferable because the flatness of the surface after removal is excellent. Further, the removal at the electrode 3a portion of the circuit component 3 is
The above-mentioned laser processing is carried out, so that the reliability of the connection can be secured.

(27) Formation of Copper Layer 6A by Plating (FIG. 3 (e)) Copper layer 6 is formed on the front and back surfaces of the substrate by electroless plating and electrolytic plating.
Form A. As a result, the electrode 3a of the circuit component 3 and the copper layer 6A are connected. Since the copper layer 6A is directly laminated on the electrode 3a by plating without providing the insulating layer 7 in this manner, the circuit component 3 can be connected only by the two front and back layers of the substrate 1.

(28) Filling resin 5a into through hole 4 (FIG. 3 (f)) (29) Forming pattern 6A1 on copper layer 6A (FIG. 3)
(G)) With the above, the printed wiring board of the applied mode in which the through holes 2 are provided and embedded is completed.

Further, when this is used as a build-up substrate as described above, (30) formation of the insulating layer 7 (see FIG. 3).
(H)) (31) Formation of via hole 8 (FIG. 3 (i)) (32) Formation of copper layer 6B (FIG. 3 (j)) (33) Formation of pattern 6B1 on copper layer 6B (FIG. 3)
It can be created by the step (k)).

In the configurations and methods described above, the substrate material and the thickness of the insulating layer are not limited. Epoxy resin, polyimide resin, B
T-resin or a material in which glass cloth is impregnated with T-resin can be used. Further, it may not be a copper-clad laminate, but may be a simple core substrate made of an insulating resin. Epoxy resin, polyimide resin, olefin resin, etc. can be used without restriction on the insulating material to be laminated, and these have flame retardant properties, roughening properties, adhesion to copper layers, mechanical properties and laser processability. For the purpose of improving, a material to which a dye, pigment or other additive is added can also be used.

The resin 5 filling the gap between the through hole 2 and the circuit component 3 is not limited either. Any material that is suitable for filling voids and does not impair the reliability of the printed wiring board may be used.
Now, the embodiment of the present invention is not limited to the above-mentioned configuration, and can be modified as follows, for example, within the scope not departing from the gist of the present invention.

For example, in embedding the circuit component 3,
The electrode 3a of the circuit component 3 embedded in the counterbore 9 is the substrate 1
When facing the front side of the circuit, or in the same case where there are three or more electrodes 3a such as a transistor or an integrated circuit, the press-fitting dimension between the circuit component 3 and the counterbore 9 is set to the dimension described above. Then, the voids are filled with the resin 5 or the excess resin is removed, and the depth of the recess between the electrode 3a of the circuit component 3 and the substrate surface is set to the above-mentioned predetermined dimensions Δt1 / 2, Δt2, Δt3.
By setting / 2 and Δt4 / 2, each electrode 3a of the circuit component 3 can be connected by a fine pattern.

Further, in the circuit component 3 having the electrodes 3a coated with solder, since the base of the solder coating is Ni plating, it is possible to remove the solder with a removing liquid and use it as the circuit components 3a of nickel plated electrodes. it can.

In this case, a methanesulfonic acid liquid can be used as the solder removing liquid, and a specific product example is "Melstrip HN-9" manufactured by Meltex Co., Ltd.
There is 80M ".

The inventors of the present invention have produced and evaluated many prototypes in the course of researching a printed wiring board in which various circuit components are embedded while devising it. Among them, the result of evaluation of the wiring board in which the resistance chip component is embedded, which is one of the examples, will be described in detail together with the comparative example.

A resistance chip component was prepared as the embedded circuit component 3. This circuit component 3 has a resistance value of 1 kΩ, an outer dimension of a rectangular parallelepiped of 0.600 × 0.300 × 0.300 mm, and has electrodes at both ends in the longitudinal direction, and the tolerance of the outer dimension is selected to be 1 μm. . For the surface of the electrode 3a, a solder coat treated product and a Ni plated product were prepared.

As the substrate 1 in which this circuit component 3 is embedded, a copper-bonded double-sided substrate using a glass cloth impregnated with an epoxy resin as its core material was prepared. Substrate thickness is
0.615mm, 0.620mm, 0.700mm based on 0.500mm including the copper layers on both sides
The thing of 0.720 mm was prepared. Then, a circular through hole 2 for embedding was formed at a predetermined position with a drill. (See Fig. 1 (b)) Adjust the diameter and rotation speed of the drill blade so that the hole diameter is 0.388.
mm, 0.401 mm, 0.420 mm, 0.423 m
The thing of m was produced.

On the other hand, a substrate 1 having a spot facing 9 was also produced. (See FIG. 2A) The counterbore 9 has a circular opening and a diameter of 0.
669 mm, 0.667 mm, 0.643 mm, 0.6
The thing of 31 mm was produced. Regarding the depth of the spot facing portion 9, first, a drill is formed into a predetermined shape, and thereafter, unnecessary resin is removed by a laser and the bottom surface of the spot facing portion is flattened. 0.305 mm, 0.
Those having a size of 310 mm, 0.350 mm, and 0.370 mm were manufactured.

However, since the thickness of the substrate 1 is not related to the recess depth between the electrode 3a and the substrate surface, the substrate thickness is 0.700 m.
m was used. These are used to perform the above-mentioned steps (2) to (7) for the substrate 1 having the through hole 2 formed therein, and the above-described steps (1) to the substrate 1 having the spot facing portion 9 formed therein.
After going through the steps according to 3) to (18), an epoxy resin was applied to the insulating layer 7 to a thickness of 50 μm to complete the test piece of the double-sided wiring board.

On these substrates 1, a portion where patterning or lamination of the insulating layer 7 was not performed was provided at a predetermined position, and a reference mark for position measurement was provided. Here, a portion where patterning and insulating layer 7 are not laminated is provided at a predetermined position on the substrate 1 to form a reference mark for position measurement.

The contents of these samples are summarized and shown in Table 1.

[Table 1] Among these specimens, Examples 1-4 and Comparative Examples 1, 3, 5
8 to 8 have resistance chip parts embedded in the through hole 2, and Examples 5 to 8 and Comparative Examples 2, 4, 9 to 12 have resistance chip parts embedded in the spot facing portion 9.

(Evaluation) With respect to these prototypes, the positional accuracy of the circuit component 3, the connectivity of the electrodes 3a, and the flatness of the surface of the insulating layer 7 were evaluated, and the evaluation method will be described.

Positional accuracy Each circuit part was preliminarily marked with a laser processing machine at the center of the portion visible from the outside, and the deviation from the predetermined position where the part was embedded on the substrate was measured. If the deviation was 5 μm or less, it was evaluated as good (same as ◯ or less).

Concerning Connectivity After the circuit component 3 was embedded, a copper layer 6A having a thickness of 30 μm was formed on the substrate 1 by plating, and then an annealing treatment at 200 ° C. for 2 hours was performed and patterning was performed. At this stage, the connection with the chip resistor by the wiring pattern 6A1 was evaluated by a hot oil test. The hot oil test consists of dipping the sample in oil at 260 ° C for 10 seconds and
This is performed 100 times, with one treatment being left for 0 seconds. Those that maintained the connection after conducting this test were considered good.

Regarding flatness, an epoxy resin of 50 μm was applied as the insulating layer 7. Here, the flatness of the insulating layer 7 was measured by a non-contact three-dimensional surface roughness meter, and the one having a step within 30 μm was regarded as good.

Table 2 shows the evaluation results of each sample.

[Table 2]

From the evaluation results, in Examples 1 to 8 according to the present invention, the positional accuracy of the embedded circuit component 3, the connection by patterning the component electrode 3a, and the flatness of the surface of the insulating layer 7 after buildup were all. It was good. On the other hand, in each comparative example, the following problems occurred.

In Comparative Examples 1 and 2, the circuit parts whose electrode surfaces were solder-coated were unusable as a printed wiring board due to the phenomenon that the plating layer swelled due to the annealing treatment after copper layer plating. .

In Comparative Examples 3 and 4, the circuit components and the holes are not filled with resin and the excess resin is not removed,
Similarly, a phenomenon that the plated layer swells due to the annealing treatment after the copper layer plating, and it cannot be used as a printed wiring board.

In Comparative Example 5, the substrate thickness is as thin as 0.615 mm and the recess depth dimension with the circuit component is as small as 7.5 μm in order to remove the excess resin after the resin is filled in the voids of the holes. In the polishing process, the electrode part of the circuit component was damaged and the connectivity was poor. Moreover, the damage also adversely affected the flatness of the laminated insulating layers. Therefore, it cannot be used as a printed wiring board.

In Comparative Example 6, the thickness of the substrate was as thick as 0.720 mm and the depth of the concave portion with the circuit component was as large as 60 μm. However, it was very difficult to remove the resin with a laser beam after buffing, and the resin could not be completely removed. Therefore, the connection between the copper layer and the electrode by the subsequent copper plating is also adversely affected, and the flatness of the insulating layer is also adversely affected. Therefore, it cannot be used as a printed wiring board.

In Comparative Example 7, the case where the press-fitting margin was 0 μm and the press-fitting was not performed, the precision of the embedding position of the circuit component was poor, and it could not be used as a printed wiring board.

The comparative example 8 having a large press-fitting margin of 35 μm could not be used as a printed wiring board because the circuit board had a large deformation due to the press-fitting of circuit components. It was considered that the accuracy of the embedded position of the circuit component was poor due to this deformation.

The counterbore depth of Comparative Example 9 is 0.305 mm.
If the depth of the concave portion with the circuit component is as small as 5 μm, the electrode of the circuit component will be damaged during the polishing process for removing the excess resin after the resin is filled into the hole voids, and the connectivity will be improved. Was bad. In addition, the damage adversely affects the flatness of the laminated insulating layers. Therefore, it cannot be used as a printed wiring board.

The counterbore depth of Comparative Example 10 is 0.370 m.
In the case where the depth of the groove is as deep as m and the depth of the recess with the circuit component is as large as 70 μm, much resin remains on the electrode of the circuit component after the resin is filled in the voids of the hole, and the resin removal by the laser beam after buffing is performed. It was very difficult and could not be completely removed. Therefore, the connection between the copper layer and the electrode by the subsequent copper plating is also adversely affected, and the flatness of the insulating layer is also adversely affected. Therefore, it cannot be used as a printed wiring board.

In Comparative Example 11, the press-fitting margin of the spot facing portion is 2 μm.
Those having a small value of m were inferior in the positional accuracy of the circuit components after embedding and could not be used as a printed wiring board.

In Comparative Example 12, the press-fitting margin of the spot facing portion is 40.
Those having a large value of μm cannot be used as a printed wiring board because the holes of the board are largely deformed by press fitting of circuit parts. It was considered that the accuracy of the embedded position of the circuit component was poor due to this deformation.

[0093]

As described above in detail, according to the present invention, since the embedded circuit components can be connected by plating instead of soldering, (a) soldering is not required a plurality of times. (B) The soldering conditions are not restricted. (C) There is no problem that solder material management is difficult. Even when the insulating layers are laminated to build up, (d) swelling or rupture due to the solder flux does not occur. (E) Since the plating thickness is thin, sufficient flatness of the buildup insulating layer can be ensured. Therefore, there is an effect that high reliability can be obtained.

Further, since the circuit component is press-fitted into the embedded portion to be inserted or housed and the press-fitting margin is 3 to 30 μm, (f) there is almost no variation in the position of the electrode, and the formation margin of the embedded portion can be reduced. Higher density is possible, and high reliability is obtained because no joint failure due to misalignment occurs. Further, the end face of the electrode in the thickness direction of the substrate is 10 μm or more and 50 μm in the thickness direction with respect to the side face of the substrate of the wiring pattern made of the copper layer formed adjacent to the electrode.
Since the concave portion has a depth of m or less, high reliability can be obtained without damaging the electrode and deteriorating the connectivity in the polishing step for removing the excess resin.

Moreover, since the electrode surface of the circuit component is formed of Ni, Cr or Ti alone or an alloy of Ni, Cr or Ti, (g) the electrode is deteriorated by the removing liquid for removing the residual component of the filling resin. Never. (H) Even if the via holes are formed by chemicals, the chemical solution does not deteriorate the electrodes. (I) Since lead and silver do not leak from the electrodes into the electrolytic solution in which the substrate is immersed when the copper layer is formed by electrolytic plating, the electrolytic solution is not altered or deteriorated. (G) Excellent adhesion to the copper layer. Therefore, high reliability can be obtained.

On the other hand, (L) the electrode of the circuit component and the wiring pattern made of the copper layer formed adjacent to the electrode in the thickness direction of the substrate are connected by plating with the adjacent copper layer formed. Therefore, in the case of embedding the through hole, the connection can be made in two layers of the front and back of the wiring board. Therefore, it is not necessary to connect four layers (two front and back layers of the wiring board and two outer layers of the buildup layer) by connecting via via holes from the outermost layer. In the case of counterbore embedding, it is possible to use only one layer on one side of the wiring board,
There is no need for two layers connected by via holes. This has the effect of increasing the density.

Due to the above items (a) to (l), (a) the connection reliability of the embedded circuit component is dramatically improved. (B) Higher density by improving the accuracy of the embedded position of the circuit component. (C) Higher density by connecting the embedded circuit component and the wiring pattern with a small number of layers. That is an extremely excellent effect.

[Brief description of drawings]

FIG. 1 is a schematic cross-sectional view showing a manufacturing process of an embodiment of a printed wiring board of the present invention.

FIG. 2 is a schematic cross-sectional view showing a manufacturing process of another embodiment of the printed wiring board of the present invention.

FIG. 3 is a schematic cross-sectional view showing the manufacturing process of another embodiment of the printed wiring board of the present invention.

FIG. 4 is a plan view illustrating a circuit component and an embedding portion of an embodiment of the printed wiring board according to the present invention.

FIG. 5 is a schematic cross-sectional view showing the manufacturing process of yet another embodiment of the printed wiring board of the present invention.

FIG. 6 is a schematic cross-sectional view showing an example of a conventional printed wiring board.

[Explanation of symbols]

1 board (same wiring board) 2 through holes 3 circuit parts 3a (Circuit parts) electrode 4 through holes 4A Inner beer hole 5,5a resin 6A, 6B Copper layer 6A1, 6B1 wiring pattern 7 Insulation layer 8 beer holes 9 spot facing L1, Lb, L2 length t1, t2, t3, t4 thickness φA, φA2 diameter B radius D1, D2, D3, D4 (in the embedding direction) dimensions Δt1, Δt2, Δt3, Δt4 depth

Continued front page    (72) Inventor Yoshiteru Matsubayashi             3-12 Moriya-cho, Kanagawa-ku, Yokohama-shi, Kanagawa             Local Victor Company of Japan, Ltd. F term (reference) 5E319 AA01 CC70 CD13 GG15                 5E336 AA07 AA08 BB01 BB02 BB03                       BC02 BC15 CC31 CC36 CC52                       CC53 CC56 CC57 CC58 EE20                       GG30

Claims (9)

[Claims] 1. A buried portion formed by forming a through hole or a spot facing portion in a substrate, a circuit component having an electrode on a surface, which is inserted into or housed in the buried portion, and at least one surface side of the substrate is plated by plating. A printed wiring board having a wiring pattern made of a copper layer formed in a single layer or a plurality of alternating layers with an insulating layer, wherein the electrode and a copper layer formed adjacent to the electrode in the thickness direction of the substrate. And a wiring pattern made of the same are connected by the copper layer formed adjacent to the printed wiring board. 2. The printed wiring board according to claim 1, wherein the surface material of the electrode is a simple substance of Ni, Cr or Ti or an alloy of Ni, Cr or Ti. 3. The embedding portion has a shape having a press-fitting margin with respect to the circuit component.
Alternatively, the printed wiring board according to claim 2. 4. The printed wiring board according to claim 3, wherein the press-fitting margin is 3 μm or more and 30 μm or less. 5. An end face of the electrode in the thickness direction of the substrate is a recess having a thickness direction distance of 10 μm or more and 50 μm or less with respect to the substrate side face of the wiring pattern formed of the adjacent copper layer. The printed wiring board according to claim 1, wherein the printed wiring board is a printed wiring board. 6. A through hole, an inner via hole, or a via hole having a copper layer formed by plating on the surface thereof is provided on the substrate or the insulating layer, and the copper layer formed on the surface of the hole is adjacent to the copper layer. The printed wiring board according to any one of claims 1 to 5, wherein the copper layer formed as described above is the same copper layer. 7. The printed wiring board according to claim 1, wherein a resin is filled in a gap between the embedded portion and the circuit component. 8. A step of at least providing an embedded portion by a through hole or a spot facing in the substrate, an embedding step of inserting or accommodating a circuit component having an electrode on the surface in the embedded portion, and at least one surface side of the substrate. A method for manufacturing a printed wiring board, comprising: a plating step of forming a copper layer as a wiring pattern in a single layer or in an alternate multi-layer with an insulating layer, wherein the surface material of the electrode is Ni, Cr or Ti alone. Or an alloy of Ni, Cr, or Ti, and the plating step includes a step of forming a copper layer adjacent to the electrode in the thickness direction of the substrate by connecting to the electrode. Wiring board manufacturing method. 9. The method according to claim 8, further comprising a step of removing unnecessary resin after filling a resin in a gap between the embedded portion and the circuit component before the plating step. Manufacturing method of printed wiring board.