JP2003324092A5 - - Google Patents
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- JP2003324092A5 JP2003324092A5 JP2002128944A JP2002128944A JP2003324092A5 JP 2003324092 A5 JP2003324092 A5 JP 2003324092A5 JP 2002128944 A JP2002128944 A JP 2002128944A JP 2002128944 A JP2002128944 A JP 2002128944A JP 2003324092 A5 JP2003324092 A5 JP 2003324092A5
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- Prior art keywords
- etching
- thin film
- etching rate
- processing method
- film thickness
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Claims (9)
前記薄膜の膜厚または膜厚分布を測定する工程と、
前記薄膜をエッチング処理する複数のエッチング処理装置のエッチングレートまたはエッチングレート均一性をそれぞれ算出する工程と、
前記測定結果及び算出結果に基づいてエッチング装置を選択する工程を備えることを特徴とする基板処理方法。 In a substrate processing method for etching a thin film formed on a substrate,
Measuring the film thickness or film thickness distribution of the thin film ;
Calculating an etching rate or etching rate uniformity of each of a plurality of etching processing apparatuses for etching the thin film ;
A substrate processing method comprising a step of selecting an etching apparatus based on the measurement result and the calculation result.
前記測定した膜厚分布及び算出したエッチングレート均一性をもとに前記膜厚分布に適合しないエッチングレート均一性を有するエッチング装置を除外する工程を含むことを特徴とする基板処理方法。The substrate processing method according to claim 1,
A substrate processing method comprising a step of excluding an etching apparatus having an etching rate uniformity that does not conform to the film thickness distribution based on the measured film thickness distribution and the calculated etching rate uniformity.
前記測定した膜厚及びエッチングレートをもとに前記膜厚に適合したエッチング装置を選択し選択したエッチング装置のエッチング時間を設定する工程を含むことを特徴とする基板処理方法。The substrate processing method according to claim 1,
A substrate processing method comprising a step of selecting an etching apparatus suitable for the film thickness based on the measured film thickness and etching rate and setting an etching time of the selected etching apparatus.
前記基板は半導体基板であることを特徴とする基板処理方法。In the substrate processing method in any one of Claims 1-3,
A substrate processing method, wherein the substrate is a semiconductor substrate.
前記薄膜の膜厚を測定する工程と、
前記薄膜を形成した半導体基板をエッチング処理するエッチング処理装置のエッチングレートを算出する工程と、
前記測定した膜厚及び算出されたエッチングレートをもとに前記膜厚に適合したエッチング時間を設定する工程とからなることを特徴とする半導体処理方法。In a semiconductor processing method of forming a thin film on a semiconductor substrate, applying a resist on the formed thin film, exposing and developing, and etching the thin film using the exposed and developed resist.
Measuring the thickness of the thin film;
Calculating an etching rate of an etching processing apparatus for etching the semiconductor substrate on which the thin film is formed;
And a step of setting an etching time suitable for the film thickness based on the measured film thickness and the calculated etching rate.
前記エッチング装置によりエッチングされた前記半導体基板のエッチングレート均一性及びエッチングレートを測定する工程と、
前記エッチング装置の前記半導体基板をエッチングした後におけるエッチングレート及びエッチングレート均一性を算出する工程とを備えることを特徴とする半導体処理方法。In the semiconductor substrate processing method of Claim 5,
Measuring etching rate uniformity and etching rate of the semiconductor substrate etched by the etching apparatus;
And a step of calculating an etching rate and etching rate uniformity after etching the semiconductor substrate of the etching apparatus.
前記測定されたエッチングレート均一性及びエッチングレートを前記算出工程にフィードバックする工程を備えることを特徴とする半導体処理方法。The semiconductor processing method according to claim 6.
A semiconductor processing method comprising a step of feeding back the measured etching rate uniformity and etching rate to the calculating step.
前記薄膜の膜厚分布を測定する手段と、
前記薄膜を形成した半導体基板をエッチング処理する複数のエッチング処理装置のエッチングレート均一性をそれぞれ算出する手段と、
前記測定した膜厚分布及びエッチングレート均一性をともに前記膜厚分布に適合したエッチングレート均一性を有するエッチング装置を選択する手段とを備えたことを特徴とする半導体処理装置。 In a semiconductor processing apparatus for forming a thin film on a semiconductor substrate, applying a resist on the formed thin film, exposing and developing, and further etching the thin film using the exposed and developed resist.
Means for measuring the film thickness distribution of the thin film;
Means for respectively calculating the etching rate uniformity of a plurality of etching processing apparatuses for etching the semiconductor substrate on which the thin film is formed;
A semiconductor processing apparatus comprising: means for selecting an etching apparatus having an etching rate uniformity that matches both the measured film thickness distribution and the etching rate uniformity .
予め測定した前記薄膜の膜厚及びエッチングレートをもとに前記膜厚に適合したエッチング時間を設定する手段を備えることを特徴とする半導体処理装置。The semiconductor processing apparatus according to claim 8.
A semiconductor processing apparatus comprising: means for setting an etching time suitable for the film thickness based on the film thickness and etching rate of the thin film measured in advance.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2002128944A JP2003324092A (en) | 2002-04-30 | 2002-04-30 | Method and device for processing semiconductor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2002128944A JP2003324092A (en) | 2002-04-30 | 2002-04-30 | Method and device for processing semiconductor |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2003324092A JP2003324092A (en) | 2003-11-14 |
JP2003324092A5 true JP2003324092A5 (en) | 2005-08-25 |
Family
ID=29542533
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2002128944A Pending JP2003324092A (en) | 2002-04-30 | 2002-04-30 | Method and device for processing semiconductor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2003324092A (en) |
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2002
- 2002-04-30 JP JP2002128944A patent/JP2003324092A/en active Pending
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