JP2003316484A - System for supporting cpu development and protecting device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a system for supporting CPU development that can reliably prevent a CPU development supporting apparatus from being destructed due to a careless mistake of an operator. <P>SOLUTION: A relay 24 arranged on a board 12 of an ICE 11 side is connected so as to relay a power supply VB. When a power supply VICE is input into the ICE 11, the feeding of a power supply VB to a circuit board 17 is started. <P>COPYRIGHT: (C)2004,JPO

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention relates to C to be evaluated.
The circuit board on which the PU is mounted and the C
A CPU development support system including a CPU development support device electrically connected via a probe instead of a PU, and including an evaluation chip for emulating the operation of the CPU, and a CPU development support system used in the system. Protection device.

[0002]

FIG. 2 shows an example of a conventional configuration of an ICE (In Circuit Emulator) which is a CPU development support device. The ICE 1 includes an evaluation chip (evaluation chip, neither shown) that emulates the operation of a CPU (target) to be evaluated inside the main body 1a.
Then, a socket 3 is arranged in place of the CPU on the circuit board (target system) 2 on which the target CPU is mounted, and a pod (probe) 4 extended from the main body 1a is connected to the socket 3. Thus, the evaluation chip is electrically connected to the circuit board 2.

The ICE 1 is connected to a personal computer (personal computer) 5 which is a host machine. Then, the operator turns on the power of the circuit board 2 to download the program from the personal computer 5 to the evaluation chip side and execute the program step by step, or set a breakpoint in the program to execute a register or a register in the middle of execution. The program or the circuit board 2 can be debugged while confirming the state of the memory.

By the way, in the development support system using the ICE1 as described above, when the debugging work is started, in order to protect the ICE1, first, the power of the ICE1 side is turned on, and then the power supply of the circuit board 2 side. The instruction manual of the ICE1 or the like is instructed so as to comply with the procedure of turning on. That is, when the power of the circuit board 2 is turned on first, a voltage exceeding the withstand voltage may be applied to the IC (Integrated Circuit) on the ICE 1 side and the like, which may result in destruction.

However, at the beginning of debugging, even if the work is carried out while paying close attention to the above-mentioned procedure, if the debugging work is carried out for a long period of time, the attention will be distracted, and it will be disappointed. The power supply of the circuit board 2 may be turned on first (see FIG. 3). Even with such a careless mistake, if the ICE 1 is destroyed, the damage is extremely great.

The present invention has been made in view of the above circumstances, and an object thereof is to prevent CP by a careless mistake of an operator.
It is an object of the present invention to provide a CPU development support system capable of more reliably preventing the U development support device from being destroyed, and a protection device used in the system.

[0007]

According to the CPU development support system of the first aspect, the protection device is connected so as to relay the power supply for the circuit board supplied to the circuit board,
When the power supply for the support device is turned on to the U development support device, the circuit is closed to start supplying the power supply for the circuit board to the circuit board.

That is, unless the power supply for the assisting device is first turned on to the CPU development assisting device, the supply of the power for the circuit board to the circuit board is not started. Therefore, it is possible to eliminate a portion of the power-on sequence that requires manual work by the operator, so that it is possible to reliably prevent the circuit element and the like on the CPU development support device side from being destroyed by the careless mistake of the operator. .

According to the CPU development support system of the second aspect, the vehicle ECU is formed on the circuit board. That is, a circuit board power supply in a vehicle ECU (Electronic Control Unit) is generally generated based on a power supply voltage of a battery mounted in a vehicle. Therefore, EC for vehicles
In the initial state when the power is supplied to U, the steady voltage as the power supply for the circuit board is not fixed, and it is assumed that the voltage is higher.

Since the power source corresponding to the battery is used even in the debugging work using the CPU development support device, if the present invention is applied to such a configuration, the CPU development support device It is possible to surely reduce the possibility that the circuit element and the like will be destroyed.

[0011]

BEST MODE FOR CARRYING OUT THE INVENTION An embodiment in which the present invention is applied to a system for debugging a circuit board on which a vehicle ECU is mounted will be described below with reference to FIG. Figure 1
[Fig. 3] is a functional block diagram showing an overall electrical configuration. C
The board 12 built in the main body 11a of the ICE 11, which is the PU development support device, includes an evaluation chip 13 that emulates the operation of a CPU built in a single-chip microcomputer to be evaluated. Is installed. Evaluation chip 13 is RA
It has a built-in M13a.

The evaluation chip 13 is adapted to communicate with a personal computer 14 as a host machine via an ICE controller 15. The personal computer 14 and the ICE controller 15 are connected via parallel bus interfaces 14a and 15a such as PCMCIA. Control software for ICE, which is an application running on an operating system such as WINDOWS (registered trademark), is installed in the personal computer 14, and the control software is activated and executed as needed. Has become.

Further, the board 12 is equipped with an SRAM 16 for emulating a program ROM built in a microcomputer (not shown) to be evaluated.
A control program is downloaded from the personal computer 14 side to the SRAM 16 via the ICE controller 15, and the evaluation chip 13 reads the control program from the SRAM 16 when executing the emulation operation.

The circuit board 17 is a board on which a microcomputer to be evaluated is mounted and constitutes a vehicle ECU. And, in the part where the evaluation target microcomputer is mounted,
A socket (not shown) is mounted instead of the microcomputer. A user POD 19 (probe) arranged at the tip of an emulation cable (cable) 18 extending from the ICE main body 11a is connected to the socket, and the evaluation chip 13 includes the bidirectional buffer 30, the cable 18, and the user. The circuit board 17 is electrically connected via the POD 19.

A power source generator 20 is formed on the substrate 12. The power supply generation unit 20 is supplied with a commercial AC power supply of 100 V through a power supply switch 21, and the AC power supply is rectified and smoothed, and a DC / DC converter is used to step down the power supply VICE (power supply for supporting device). It is generated and supplied to each circuit portion of the substrate 12.

On the other hand, in the normal state shown by the broken line in FIG. 1, the power source VB (for example, 12 to 16 V) corresponding to the battery mounted on the vehicle is supplied to the circuit board 17 through the power switch 22. It is supposed to be done.
The power generation unit 23 mounted on the circuit board 17
Is configured to generate a power supply VT (circuit board power supply) of, for example, 5 V by lowering the power supply VB and supply it to each circuit component mounted on the circuit board 17.

The power supply VT is supplied to the bidirectional buffer 3 on the substrate 12 via the user POD 19 and the cable 18.
It is also applied to 0. This is, for example,
This is because the microcomputer mounted on the circuit board 17 has a function of performing some control by referring to the voltage level of the power supply VT.

The substrate 12 also includes a relay (protection device).
24 are mounted. The relay 24 is electrically connected in a form of being inserted in the supply path of the power source VB in the circuit board 17. That is, the power source VB is supplied to the circuit board 17 via the relay 24 on the board 12. The relay 24 is connected to the power switch 21.
Is closed, and when the power supply VICE is generated and output by the power generation unit 20, the contact 24C is closed.

Next, the operation of this embodiment will be described.
Before starting the debugging work of the circuit board 17 using the ICE 11, the worker first performs the work of changing the supply path of the power supply VB in the circuit board 17. That is, as described above, in the normal operation, the power source VB is the power switch 2
When 2 is closed, it is directly supplied to the circuit board 17. The power supply line between the power supply switch 22 and the power supply generation unit 23 forming this supply path is temporarily cut off, and the power supply switch 22 and the substrate 1
The operation of connecting the contact 24C on one side (a) of the relay 24 on 2 and connecting the power generation unit 23 to the other side (b) of the contact 24C is performed.

By performing the work in this way, the relay 24
In the state where the contact 24C is open, the power supply VB is not supplied to the circuit board 17 only by closing the power switch 22 on the circuit board 17 side. And the worker
When the power switch 21 on the ICE 11 side is closed, AC100V is supplied to the power generation unit 23 on the circuit board 17, and the power VICE is generated and output. Then, the contact 24C of the relay 24 is closed, so that the power source VB is supplied to the circuit board 17.

A power source V is supplied to the circuit board 17 via the relay 24.
When B is supplied, the power generation unit 23 supplies the power VB to the power V
T is step-down generated and supplied to each circuit component mounted on the circuit board 17.

As described above, according to this embodiment, the ICE1
The relay 24 arranged on the substrate 12 on the first side is connected so as to relay the power source VB, and is connected to the ICE 11 with the power source VIC.
When E is turned on, the circuit is closed and the supply of the power source VB to the circuit board 17 is started. Therefore, unless the power source VICE is turned on to the ICE 11 first, the supply of the power source VB to the circuit board 17 is not started. .

Here, in the configuration of FIG. 1, the relay 24
Assuming that the power switch 22 on the circuit board 17 side is first closed in the state where the power supply VB is not provided, the power supply VB is applied to the power supply generation unit 23, and the power supply VB is stepped down to the steady power supply VT. Before this is done, a voltage of a level close to the power supply VB is also applied to the bidirectional buffer 30 on the ICE 11 side.

If the voltage exceeds the absolute maximum rating or withstand voltage of the bidirectional buffer 30, the bidirectional buffer 30 may be destroyed, and the bidirectional buffer 30 may be destroyed.
EVA chip 1 that is electrically connected when the
3, the ICE controller 15, the SRAM 16, etc. may be destroyed in a chain.

In the case where the microcomputer (the evaluation chip 13 at the time of debugging) mounted on the circuit board 17 performs a part of the step-down generation processing of the power supply VT,
EVA chip 1 unless power is turned on to the ICE11 side
3 does not start the process. Therefore, as a result, the step-down of the power supply VB is not performed, and the power supply VB is the bidirectional buffer 3
Since it is continuously applied to 0, the possibility of destruction is extremely high.

Therefore, if the configuration of this embodiment is adopted, it is possible to eliminate the part of the power-on sequence in which the worker's manual work is involved.
Evaluation chip 13 and ICE controller 1 on the CE 11 side
5, It is possible to reliably prevent the SRAM 16 and the like from being destroyed.

Further, according to this embodiment, since the circuit board 17 is the vehicle ECU, it is possible to avoid application of a high voltage equivalent to the vehicle battery to the ICE 11 side, and the ICE 11 is destroyed. The possibility can be certainly reduced.

The present invention is not limited to the embodiments described above and shown in the drawings, but the following modifications or expansions are possible. The circuit board is not limited to the one that constitutes the ECU for the vehicle, but can be widely applied to any object on the circuit board side as long as it is a CPU development support system using the CPU development support device. Further, the voltage level of the power supply for the circuit board is not necessarily limited to the system in which the voltage level of the power supply for the support device may be higher. That is, even when the voltage levels of both are substantially equal, it is not preferable for the circuit element to continuously apply only the power supply for the circuit board to the CPU development support device side, and it may lead to destruction. Therefore, it can be effectively applied to such a case.

[Brief description of drawings]

FIG. 1 is a functional block diagram showing an entire electrical configuration, which is an embodiment in which the present invention is applied to a system for debugging a circuit board on which a vehicle ECU is mounted.

FIG. 2 is a diagram showing a conventional configuration example of an ICE.

FIG. 3 is a diagram illustrating a state in which the power source on the circuit board side is first turned on.

[Explanation of symbols]

Reference numeral 11 is an ICE (CPU development support device), 17 is a circuit board, and 24 is a relay (protection device).

Claims (3)

[Claims] 1. A circuit board on which a CPU to be evaluated is mounted, and an evaluation chip electrically connected to the circuit board via a probe instead of the CPU and emulating the operation of the CPU. In a CPU development support system including a CPU development support device, the CPU development support device is connected to relay the circuit board power supplied to the circuit board, and the CPU development support device supplies power to the CPU development support device. A CPU development support system comprising a protection device for starting the supply of the power supply for the circuit board to the circuit board by closing the circuit when is turned on. 2. The CPU development support system according to claim 1, wherein a vehicle ECU is formed on the circuit board. 3. A protection device used in the CPU development support system according to claim 1.