JP2003315831A - Production method of thin film transistor matrix device and production method of liquid crystal display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a production method of a TFT matrix type liquid crystal display device which prevents the irregularities of display on a screen caused when one total pattern which is regularly arranged by connecting the patterns by the use of plural sheets of exposure masks is formed. <P>SOLUTION: A resist film is formed on a film on a substrate having a first region, a second region and a third region placed between the first region and the second region, the film is patterned by the use of photolithography using a first exposure mask and a second exposure mask and the total patterned film is formed in such a manner that the boundary line between the patterned film relating to the first exposure mask and the patterned film relating to the second exposure mask is made rugged. Such a process above mentioned is applied at least for two different films and, thereby, at least two different layers 12, 20a and 20b are formed. <P>COPYRIGHT: (C)2004,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a TFT (thin film transistor) matrix device and a method for manufacturing a liquid crystal display device, and more particularly, to a pattern forming method for connecting patterns to form one overall pattern. The present invention relates to a manufacturing method of a used TFT matrix device and a manufacturing method of a liquid crystal display device.

[0002]

2. Description of the Related Art Conventionally, a TFT matrix type color liquid crystal display device has been widely used as a personal computer display or a wall-mounted television. Currently, there are many small screens due to the manufacturing yield of a TFT matrix for driving a liquid crystal, but attempts have been made to develop and commercialize the liquid crystal display in order to further spread the liquid crystal display in the future.

In order to manufacture this display device at low cost,
It is important to form a TFT matrix in a smaller number of steps and with a high yield, and a photolithography technique using a reticle (exposure mask) capable of simultaneously transferring a large number of patterns has become the mainstream. Usually, one reticle (referred to as one layer) is used for one patterning process.

However, as the screen becomes larger, the size of the substrate becomes larger, which makes it difficult to transfer the entire pattern of one layer at a time due to the structure of the exposure apparatus. Therefore, the entire pattern area of one layer is divided into a plurality of partial areas, and a plurality of reticles are created for each of the partial areas. When forming the entire pattern, the same resist film is shielded from light in other regions than the partial regions to be exposed, and the partial patterns are separately exposed to form the entire pattern. There is.

FIG. 22 shows a TFT formed on a glass substrate.
The matrix is shown. In FIG. 22, the number of pixels is simplified and shown, and the pixels driven by the TFTs are arranged in a matrix of 6 rows by 6 columns. A partial area 1 on the left side and a partial area 2 on the right side of the central boundary line indicated by the alternate long and short dash line are separately formed. A set of two reticles forming the partial regions 1 and 2 as shown in FIG. 23 is used for each layer. The boundary line is made to be a straight line for ease of digitizing.

[0006]

Problems to be Solved by the Invention FIGS. 24 (a) and 24 (b)
And T of the left partial area 1 and the right partial area 2 respectively.
The cross section of FT is shown. As shown in the figure, the source electrode 8
The a and drain electrodes 8b are each extended above the gate electrode 2 in consideration of alignment accuracy. Therefore, as shown in the equivalent circuit per pixel in FIG. 25A, the stray capacitance Cgs is generated due to the overlap between the source electrode 8a and the gate electrode 2. As a result, as shown in FIG. 25B, the charge flowing from the drain (D) to the source (S) due to the opening of the gate (G) is C after the gate is closed.
It flows out toward the gate bus line through gs, and the source voltage (VS), that is, the pixel potential is lowered. It is desirable to make Cgs as small as possible in order to suppress a decrease in pixel potential.

If the partial regions 1 and 2 are separately aligned, the overlapping width (ΔW) between the source electrode 8a and the gate electrode 2 is different between the left partial region 1 TFT and the right partial region 2 TFT. May come. in this case,
Since the Cgs of the TFTs of the partial regions 1 and 2 are different, a difference (ΔV) occurs in the source voltage (VS) between the partial regions 1 and 2, and as a result, as shown in FIG.
T) is produced. As a result, a difference in brightness occurs and display unevenness occurs.

The present invention was created in view of the problems of the above-mentioned conventional example, and in the case of forming one entire pattern regularly arranged by connecting the patterns using a plurality of exposure masks. An object of the present invention is to provide a method of manufacturing a TFT matrix liquid crystal display device capable of preventing display unevenness on a screen, and a method of manufacturing a TFT matrix device that operates the liquid crystal.

[0009]

In order to solve the above-mentioned problems, the present invention according to claim 1 relates to a method of manufacturing a thin film transistor matrix device, comprising: a first region, a second region, and the first region. A step of forming a photosensitive resist film on a substrate having a third area sandwiched between the second area and the second area; and exposing the photosensitive resist film using a first exposure mask, To form and form a plurality of latent images of the first pattern on the photosensitive resist film on the first region, and to form the first pattern on the photosensitive resist film on the third region. Forming an unexposed area having a width of at least one area and at least one latent image of the first pattern, and exposing the photosensitive resist film by using a second exposure mask, whereby the first 2 on the photosensitive resist film above the area 2 And arranging and forming the latent image of the first pattern, and forming the latent image of the first pattern in the unexposed region on the third region, and developing the photosensitive resist film. A step of visualizing the plurality of first patterns made of the photosensitive resist film, and a plurality of desired films made of the desired film using the first pattern made of the photosensitive resist film as a mask. Forming a second pattern in a regular arrangement, and applying the pattern forming step to at least two different films to form at least two different layers. The invention according to claim 2 relates to a method for manufacturing a thin film transistor matrix device according to claim 1, wherein the thin film transistor matrix device is a glass substrate. A transistor having a gate electrode, a first insulating film above the gate electrode, a semiconductor layer above the gate electrode, and source / drain electrodes connected to the semiconductor layers on both sides of the gate electrode; At least two different layers are the gate electrode and the source / drain electrodes,
A third aspect of the present invention relates to the method of manufacturing a thin film transistor matrix device according to any one of the first and second aspects, wherein one second pattern of the same exposure mask is provided in the third region, or The invention according to claim 4 relates to the method for manufacturing a thin film transistor matrix device according to any one of claims 1 to 3, wherein in the third region, A boundary line between the second pattern related to the first exposure mask and the second pattern related to the second exposure mask is uneven, and the invention according to claim 5 is characterized in that 5. The method of manufacturing a thin film transistor matrix device according to any one of 1 to 4, wherein in the third region, the first
The area where one or more second patterns related to the second exposure mask are continuously arranged and the area where one or more second patterns related to the second exposure mask are continuously arranged are The invention of claim 6 is characterized in that the two patterns are alternately arranged in a horizontal direction or a vertical direction.
According to a method of manufacturing a liquid crystal display device, the second insulating film covering the transistor after forming the transistor on the glass substrate by the method of manufacturing the thin film transistor matrix device according to any one of claims 1 to 5. 7. The method according to claim 7, further comprising: forming a pixel electrode electrically connected to one of the source / drain electrodes through an opening of the second insulating film. According to a sixth aspect of the present invention, in the method of manufacturing a liquid crystal display device according to the sixth aspect, the at least two different layers are the gate electrode, the source / drain electrodes, and the pixel electrode.

In the method of manufacturing the thin film transistor matrix device of the present invention, the photosensitivity of the third region sandwiched between the first region and the second region in which the latent image of the first pattern is regularly arranged and formed. First, the first exposure mask is used to form a latent image of the first pattern and an unexposed region having a width that allows the first pattern to be formed in the resist film. The method includes a pattern forming method in which the latent image of the first pattern is regularly arranged and formed in the second area, and the latent image of the first pattern is formed in the unexposed area.

That is, an unexposed area is formed in advance at a position where the first pattern should be lined up, and a latent image of the first pattern is formed therein later. Therefore, in the pattern joining portion (third region), the latent images of the first patterns relating to different exposure masks can be mixed and arranged without breaking the regularity.

Therefore, after that, the latent image of the first pattern is developed to form the first pattern made of the photosensitive resist film, and the second pattern is formed by using the first pattern as a mask, thereby joining the patterns. It is possible to mix and align patterns related to different exposure masks without breaking regularity in a part.

Further, in the method of manufacturing a thin film transistor matrix device of the present invention, at least two different layers are formed by applying the above pattern forming step to at least two different films. A thin film transistor matrix device includes a gate electrode on a glass substrate, a first insulating film on the gate electrode, a semiconductor layer on the gate electrode, and source / drain electrodes connected to the semiconductor layers on both sides of the gate electrode. And at least two different layers are a gate electrode and a source / drain electrode.

Therefore, gate electrodes relating to different exposure masks without breaking the regularity in the pattern connecting portion,
Also, the source / drain electrodes can be mixed and arranged side by side. The substrate includes a glass substrate, a silicon substrate, and the like, and a substrate in which an insulating film, a conductive film of an electrode material, and the like are formed over the glass substrate, the silicon substrate, and the like.

By the way, human visual ability is insensitive to the difference in optical luminance between two distant points, but when the points having the difference in optical luminance are grouped and adjacent to each other, the boundary is recognized. It has a very good ability to do. Therefore, in a liquid crystal display, when pixels having different luminances are lined up on a straight line, it can be easily recognized by human eyes as display unevenness. On the other hand, the human eye cannot separate and recognize red, green, and blue pixels that are about 1/10 to 2/10 mm apart, so that a portion with a brightness difference is within the same distance. It is possible to make the display unevenness unrecognizable by avoiding separation and regular arrangement in groups.

In the method of manufacturing the liquid crystal display device of the present invention, the gate electrode and the source / drain electrodes are formed by the same method as the method of manufacturing the thin film transistor matrix device of the present invention, or in addition to these, a pixel electrode is further formed. is doing. Therefore, the electrodes relating to different exposure masks can be mixed and arranged side by side without breaking the regularity in the joint portion of the patterns.

For example, the connected overall pattern is a line in which the boundary line between the electrodes of different exposure masks is uneven, for example, a path bent at a right angle.

Alternatively, the regions where the electrodes of different exposure masks are formed are alternately arranged in the vertical and horizontal directions.

Therefore, even when the positions of the electrodes are different from each other when the latent images of the electrode patterns are formed and Cgs is different in the regions where the electrodes of different exposure masks are formed, the connecting portions (the third regions) between the regions where the electrodes are formed are different from each other. In the area (1), the portions having the brightness difference due to the difference in Cgs are not aligned on a straight line, or the boundary between them becomes unclear. Therefore, the display unevenness is not recognized by the human eye.

In particular, when the size of the pattern formation region related to at least one of the different exposure masks is less than or equal to the macroscopic pattern resolution in the portion where the pattern formation regions are connected,
Further, the display unevenness is not effectively recognized by the human eye.

That is, for example, since the boundary lines of the patterns belonging to different exposure masks are uneven, it is assumed that the patterns related to different exposure masks are mixed and mixed at the portion where the patterns are connected. in this case,
Since the size of the pattern formation region for at least one of the different exposure masks is less than or equal to the pattern resolution by the naked eye, the human eye has a boundary between the pattern formation regions for the different exposure masks. It looks blurry. Therefore, when the connected pattern is applied to the TFT matrix device portion of the liquid crystal display device, even if a brightness difference occurs between pattern formation regions of different exposure masks, a clear boundary between them cannot be recognized. become unable.

This also applies to the case where the pattern forming regions of different exposure masks are alternately arranged in the vertical direction and the horizontal direction in the connecting portion of the entire pattern. That is, since the pattern formation regions of different exposure masks are mixed in the joining portion, even if the luminance difference occurs between the different pattern forming regions, the luminance difference in the joining portion is alleviated. For this reason, the brightness seems to gradually change, and the display unevenness is not recognized by the human eye.

[0023]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings.

(1) First to Third Embodiments FIG. 1 is a plan view showing a TFT (thin film transistor) matrix device according to an embodiment of the present invention. FIG. 15 is a partially enlarged plan view of the TFT matrix device, and FIG.
FIG. 3 is an enlarged plan view showing one pixel. FIG. 18B is a sectional view taken along the line I-I of FIG. 16 showing the details of the TFT portion in the pixel.

In FIG. 1, the number of TFTs is shown in a simplified manner. Pixels including one TFT are arranged in a matrix of 6 rows by 6 columns. The vertical and horizontal dimensions of one pixel are approximately 100 × 100 μm. If necessary, the size of one pixel can be changed.

As shown in FIGS. 1 and 15, a plurality of gate bus lines (GB) extend in the horizontal direction and a plurality of drain bus lines (DB) extend in the vertical direction. At the intersection of these bus lines, one TFT and a pixel electrode (PE) connected to the source region of the TFT are formed.

A gate terminal (GT) and a drain terminal (DT) are provided at the ends of the bus lines GB and DB, respectively.
Are formed.

Further, the common electrode (SCB) is formed in parallel with the gate bus line (GB) and across the central portion of the pixel electrode (PE), and is in contact with the pixel electrode (PE).

The entire pattern of the TFT matrix device of FIG. 1 is divided by the zigzag boundary line shown by the alternate long and short dash line. This boundary line is located in the center of the overall pattern,
The pattern forming region PFR1a on the left side of the boundary line and the pattern forming region PFR1b on the right side are formed by separate patterning steps.

FIG. 18B shows a detailed sectional structure of the TFT portion in the pixel of FIG. The TFT is an inverted stagger type.

As shown in FIG. 18B, the glass substrate 1
1. A gate electrode 12 is formed on the
And an insulating film 13 made of a silicon nitride film is formed. Further, on the insulating film 13, the gate electrode 12
A channel layer 14a made of an amorphous silicon (a-Si) film is formed to extend from above to both sides thereof.

An insulating film 15a made of a silicon nitride film is formed on the channel layer 14a above the gate electrode 12.
And the channel layer 14a on both sides of the gate electrode 12 is formed.
An opening is formed in each of the upper insulating films 15a. The channel layer 14a is formed through the opening in the source electrode 20a of two layers of the n + type a-Si film 16a and the metal film 17a and the drain of two layers of the n + type a-Si film 16b and the metal film 17b. It is in contact with the electrode 20b.

Source electrode 20a and drain electrode 20b
Is formed larger than the size of the opening in consideration of the alignment accuracy, extends to above the gate electrode 12, and the insulating film 1 is formed.
3, both ends of the gate electrode 12 are overlapped with each other with the channel layer 14a and the insulating film 15a interposed therebetween. Furthermore, the source electrode 2
0a and the drain electrode 20b are covered with an insulating film 21,
The pixel electrode 22 is in contact with the source electrode 20a through an opening formed in the insulating film 21.

In a liquid crystal display device using this TFT matrix, as well known, an alignment film 23 is further formed on the pixel electrode 22. Then, as shown in FIG. 19, a transparent common electrode 25 is provided separately from the glass substrate 11.
And the glass substrate 24 on which the alignment film 26 is formed are the liquid crystal 2
The glass substrates 11 and 24 are overlapped with each other, and the polarizing plates 29 and 30 are provided on the back surfaces of the glass substrates 11 and 24.

Although an inverted stagger type TFT matrix device has been described above as an application example of the present invention, the present invention is also applicable to the stagger type TFT matrix shown in FIG. In FIG. 21, the same reference numerals as those in FIG. 18 (b) denote the same parts as those in FIG. 18 (b).

Next, the reticle according to the first embodiment of the present invention used for manufacturing the above-mentioned TFT matrix device will be described.

FIG. 2 shows a set of two reticles (11a, 11b), (12a, 12b), from the first layer to the nth layer.
.. (1na, 1nb) is a plan view showing FIG. n layers of reticles (11a, 11b), (12a, 12b), ...
The TFT matrix pattern of FIG. 1 is formed by repeating patterning n times by (1na, 1nb). Note that the above layer is a set of reticles used in each patterning step for forming gate electrodes, source / drain electrodes, openings of an insulating film, and the like.

FIG. 2 shows the arrangement of pixel patterns on the first-layer reticles 11a and 11b as a representative of the first-layer to n-th layer reticles. As shown in FIG. 2, pattern formation regions PFR1a and PFR1b divided into two left and right partial regions are formed in the two reticles 11a and 11b of the first layer. The patterns on the first-layer reticles 11a and 11b are not actual patterns.
In order to make the explanation easy to understand, a pattern is shown in the case of assuming that the patterns from the first layer to the n-th layer are overlapped with each other in accordance with FIG.

Two reticles 11a and 11b of the first layer
Patterns having the same shape are arranged vertically and horizontally, and light-shielding regions (light-shielding films) SR1a and SR1b that are pattern non-formation regions are provided at the boundaries between the reticles 11a and 11b. The light-shielding regions SR1a and SR1b have a size of one pixel pattern in the horizontal direction (row direction) and a size of one or two pixel patterns in the vertical direction (column direction). .

In practice, each reticle 11a, 11
b pattern forming regions PFR1a, PFR1b and reticle 11
Although a light-shielding band is provided in a band-shaped region of about 1.5 mm between the edges of a and 11b, it is omitted for simplicity of explanation. This also applies to subsequent reticle drawings.

In this case, as shown in FIG. 3A, the photosensitive resist film 52 on the object to be patterned 51 is covered with a light shielding plate 53 on the half surface thereof and exposed to light, and then, in the pattern formation region PFR1a on the reticle 11a. Pattern is transferred to the photosensitive resist film 52 as a latent image. Then, when the latent image of the pattern in the pattern formation region PFR1b on the reticle 11b is formed by joining the latent image of the pattern of the reticle 11a that was previously transferred, as shown in FIG. The reticle 11a and the reticle 11b each have a boundary end BE.
One pixel pattern from 1a and BE1b should overlap each other. In this manner, except for the boundary portion BR1a of the reticle 11a, the remaining half surface of the photosensitive resist film 52 is covered with the light shielding plate 53 and exposed, and then the light shielding region SR1a of the reticle 11a is exposed.
The pattern formation region PFR1b of the other reticle 11b is transferred as a latent image to the unexposed region of the photosensitive resist film 52 corresponding to the reticle pattern formation region of the reticle previously transferred.
The latent image of PFR1a remains covered as it is with the light blocking area SR1b of the other reticle 11b. Note that the term "latent image" is omitted except when necessary in the description below.

As shown in FIG. 1, the overall pattern thus joined is an array of patterns belonging to the following reticles 11a and 11b for each row. That is,
From the top row, left 3 columns / right 3 columns, left 3 columns / right 3 columns, left 4 columns / right 2 columns, left 4 columns / right 2 columns, left 3 columns / right 3 columns, left 4
There are two columns / right column.

As described above, in the connected overall pattern, the boundary line between the pattern forming regions PFR1a and PFR1b is a line in which the corners are bent at right angles. Moreover, the width of the protrusions and recesses LR1 to LR4 in the column direction is 200
It is below μm, that is, below the pattern resolution by the naked eye. Here, the pattern resolution means the size of the pattern in which the contour of the pattern can be clearly recognized by the naked eye.

In the above, the division is made in the vertical direction, but it may be made in the horizontal direction. Also in this case, the light-shielding region, which is a pattern non-forming region, is provided at the boundary of each reticle so that the boundary between the pattern forming regions becomes a curved line that is bent at a corner at a right angle.

As described above, each pattern forming area PFR1a,
When the boundary between PFR1b is uneven,
A second embodiment is shown in FIG. 4 among other examples of pattern arrangement on the reticle, and a third embodiment is shown in FIG.

FIG. 4 shows a pattern on a reticle of an arbitrary layer, and this reticle is also divided into left and right parts in the same manner as in FIG. Each divided reticle 2
The pattern formation region PFR2 is formed at the boundary portion BR2a, BR2b between a and 2b.
a, PFR2b and pattern non-formation area (light shielding area SR2a, SR2
b) are arranged alternately in the vertical direction.

In this case, differently from FIG. 2, when the reticle 2a and the reticle 2a which have been transferred first and the boundary ends of the reticles 2a and 2b are transferred by superimposing only three individual pixel patterns on each other, The pattern forming area PFR2a of the transferred reticle 2a is covered with the light-shielding area SR2b of the reticle 2b and remains as it is, and the reticle 2 transferred earlier is used.
a pattern forming area PF of the reticle 2b on the light shielding area SR2a of a
R2b is transcribed.

In the overall pattern created in this way, the arrangement of patterns belonging to each reticle for each row is, in order from the top row, left 1 column / right 5 columns, left 1 column / right 5 columns, left 3
Columns / right 3 columns, left 3 columns / right 3 columns, left 2 columns / right 4 columns, left 4 columns / right 2 columns.

Further, FIG. 5 shows a pattern on a set of four reticles 3a to 3d of an arbitrary layer, and the entire pattern is divided into lower left upper and right upper four. The pattern forming regions PFR3a to PFR3a to
The PFR 3d and the light shielding regions SR3a to SR3d are arranged alternately.

In this case, the reticles 3a to 3d are superposed on each other by one pixel pattern from their boundary ends. That is, when the regions LR4 and LR5 and the regions VR4 and VR5 are overlapped with each other, the patterns of the patterns belonging to the reticles 3a to 3d are arranged in order from the upper row to the upper left 3 columns / upper right 3 columns,
Upper left 4 columns / upper right 2 columns, upper left 3 columns / upper right 3 columns, (lower left 1 column-upper left 1 column-lower left 1 column) / (lower right 1 column-upper right 1 column-lower right 1 column), lower left 4 column / There are 2 rows at the bottom right and 3 rows at the bottom left / 3 rows at the bottom right.

Next, FIGS. 17A to 17D and FIG.
A method of manufacturing a TFT matrix device and a method of manufacturing a liquid crystal display device using the reticle shown in FIG. 2 will be described with reference to FIGS.

17A to 17D, FIG. 18A,
16B is a cross-sectional view showing the manufacturing process of the TFT matrix device, and shows the location of the cross section along the line I-I of FIG. 16 according to the manufacturing process. Note that FIG.
18D, FIG. 18A, and FIG. 18B show only the patterning process using one reticle of the two divided reticles, but the other one is also shown in FIGS. 17A to 17D and FIG.
8 (a) and 8 (b), the drawings are omitted.

First, as shown in FIG. 17A, a refractory metal film is formed on the glass substrate 11. Subsequently, after forming a resist film (not shown), exposure is performed using the reticle 11a of FIG. 2 on which the first layer pattern is formed, and the pattern is transferred to the resist film.

Subsequently, the reticle 1 previously transferred using another reticle 11b paired with the reticle 11a.
1a and the reticle 11b are aligned from the boundary end thereof so as to overlap each other by one pixel pattern, and exposed.

Next, the resist film is developed to form a resist mask. The refractory metal film is etched according to the resist mask to form the gate electrode 12.

Next, after the gate electrode 12 is covered and the silicon nitride film 13, the a-Si film 14, and the silicon nitride film 15 are sequentially formed, as shown in FIG. 17B, the reticle of FIG. A resist mask is formed in the same manner as in FIG. 17A by the photolithography technique using the second layer reticles 12a and 12b. Then, the uppermost silicon nitride film 15 is etched by a dry etching technique according to the resist mask to leave the silicon nitride film 15a above the gate insulating film.

Next, as shown in FIG. 17C, the n + -type a-Si film 16 and the metal film 1 are formed on the silicon nitride film 15a and the a-Si film 14 exposed from the silicon nitride film 15a.
7 are sequentially formed. The glass substrate 11, the gate electrode 12, the silicon nitride film 13, the a-Si film 14, the silicon nitride film 15a and the n + type a-Si film 16 or a combination of these and the metal film 17 constitutes the substrate 101a. To do.

Next, as shown in FIG. 17D, after forming a resist film 18, exposure and development are performed in the same manner as in FIG. 17A using the reticle 19 of the third layer, FIG.
As shown in (a), a resist mask 18a is formed in the region where the source / drain electrodes are to be formed. At this time,
The region where the source / drain electrodes are to be formed is made larger than the size of the contact holes on both sides of the silicon nitride film 15a in consideration of the alignment accuracy, and extends above the gate electrode 12. As a result, the formed source / drain electrodes overlap both ends of the gate electrode 12.

Then, as shown in FIG. 18A, the metal film 17 and the n + type a are formed according to the resist mask 18a.
The -Si film 16 and the a-Si film 14 are sequentially etched. As a result, the channel layer 14a made of the a-Si film is formed.
A source electrode 20a and a drain electrode 20b that are in contact with the channel layer 14a are formed. Here, the source electrode 20a is composed of two layers of the metal film 17a and the n + type a-Si film 16a, and the drain electrode 20b is composed of two layers of the metal film 17b and the n + type a-Si film 16b.

Next, as shown in FIG. 18B, a silicon nitride film 21 is formed so as to cover the surface, and the TFT matrix device is completed.

When a TFT matrix type liquid crystal display device is produced, thereafter, an opening is formed in the silicon nitride film 21 on the source electrode 20a. Then, after forming an ITO film, a resist mask is formed in the same manner as in FIG. 17A by the photolithography technique using the fourth layer reticle. Then, the ITO film is etched by the dry etching technique using the resist mask to form the pixel electrode 22. Further, the alignment film 2 is formed on the pixel electrode 22.
3 is formed.

Then, as shown in FIG. 19, a transparent common electrode 25 and an alignment film 26 are formed on another glass substrate 24. Further, the glass substrate 24 and the glass substrate 1
1 and overlap each other to form a gap therebetween, and the liquid crystal 2 is placed in the gap.
Inject 7. If necessary, a color filter 28 can be interposed between the common electrode 25 and the alignment film 26.

Further, when the polarizing plates 29 and 30 are provided on the back surfaces of the glass substrates 11 and 24, the TFT matrix type liquid crystal display device is completed.

Of the above steps, instead of the steps described in FIGS. 17 (c) to 18 (a), FIG.
It is also possible to form the source / drain electrodes by the process using the lift-off method shown in (b). In this case, the substrate shown in FIG. 17B constitutes the substrate 101b.

That is, after the step of FIG.
As shown in (a), a resist film 18 is formed. Then, exposure is performed using the reticle 19 of the third layer and development is performed to form resist masks 18a and 18b having openings in regions where the source / drain electrodes are to be formed. Next, as shown in FIG. 20B, this resist mask 1
An n + type a-Si film 16 and a metal film 17 are formed in order from above 8a and 18b. Then, the resist mask 18a
Is removed, the resist mask 18 is lifted off.
The n + type a-Si film 16 and the metal film 17 on a and 18b are removed together with the resist masks 18a and 18b,
A channel layer 14a made of a -Si film and this channel layer 1
Source electrode 20a and drain electrode 20 that are in contact with 4a
b are formed.

As described above, in the reticles shown in FIGS. 2, 4 and 5 according to the above embodiment, the boundary portions (BR1a, BR1b), (BR2a, BR2) of two or four reticles are used.
b), (BR3a to BR3d) in light-shielded area (SR1a, SR1
b), (SR2a, SR2b), (SR3a to SR3d) and pattern forming areas (PFR1a, PFR1b), (PFR2a, PFR2b), (PFR3
a to PFR3d) are alternately arranged in either the vertical direction or the horizontal direction so as to complement each other. Therefore, when the pattern forming regions are connected by overlapping and transferring the boundary portions, the connected entire pattern becomes a line in which the boundary lines between different pattern forming regions are uneven.

That is, the patterns according to the present invention are connected by using these reticles.
When the entire pattern of the matrix device is formed, as shown in FIG. 1, the boundary lines between the pattern forming regions are uneven and are not aligned in a straight line.

Therefore, when the above-mentioned TFT matrix device is applied to the TFT matrix type liquid crystal display device according to the embodiment of the present invention, when transferring each pattern forming region as shown in FIGS. 24 (a) and 24 (b). Even when the alignment is deviated and Cgs is different in each pattern forming area, the portions having the brightness difference due to the difference in Cgs are not aligned on the straight line at the boundary between the pattern forming areas. Therefore, the display unevenness is not recognized by human eyes on the screen of the liquid crystal device, and as a result, the display unevenness of the liquid crystal device can be prevented.

In particular, the size of each light-shielding region on the reticle or at least one of the projections and recesses of the boundary line of each pattern formation region of the TFT matrix device is not more than the pattern resolution by the naked eye. When it is, the display unevenness is more effectively not recognized by the human eye.

That is, for example, as shown in FIG. 1, the pattern forming regions PF belonging to different reticles 11a and 11b.
Since the boundary line between R1a and PFR1b is uneven, as shown in FIG. 1, the pattern formation region PFR1a of one reticle 11a is formed.
The pattern forming region PFR1b of the other reticle 11b is interposed between the two. In this case, the pattern forming areas PFR1a, PFR1
Since at least one of the sizes b is equal to or smaller than the pattern resolution by the naked eye, the boundary between different pattern formation regions PFR1a and PFR1b appears blurred to the human eye. Therefore, the composite pattern is used as the TF of the liquid crystal display device.
When applied to the T-matrix device portion, even if a difference in brightness occurs between the different pattern formation regions PFR1a and PFR1b, it becomes impossible to recognize a clear boundary between them.

(2) Fourth Embodiment FIG. 6 is a plan view showing a TFT matrix device according to the fourth embodiment of the present invention. FIG. 7 is a plan view showing a set of two reticles 4a and 4b formed by dividing the entire TFT matrix pattern of FIG. 6 into two right and left parts and sharing pattern forming regions PFR4a and PFR4b.

These reticles 4a and 4b represent a set of arbitrary layers among a set of reticles of a plurality of layers for forming the entire TFT matrix pattern of FIG. The patterns on the reticles 4a and 4b do not show actual patterns, but show patterns on the assumption that a plurality of layers of patterns are overlapped with each other in accordance with FIG. 6 for easy understanding of the description.

One TFT is shown in FIG. 6 and FIG. 7 for the sake of explanation.
The number of pixels including is simplified, and the number of pixels is 12 rows vertically × 1 horizontally.
They are arranged in a matrix of two rows. The size of one pixel is determined by the required size of the entire display area, the total number of pixels, patterning accuracy, etc., but here it is approximately 100 × 100 μm. Note that the size of one pixel can be further reduced if necessary.

In the fourth embodiment, the difference from the first to third embodiments is that, as shown in FIG. 7, three pixel patterns of the individual reticle 4a, 4b are provided at the boundary portion BR4a. , BR4b, and the light shielding regions SR4a and SR4b and the pattern forming regions PFR4a and PFR4b are alternately arranged in the vertical and horizontal directions. That is, in the horizontal direction
Pattern forming area-light-shielding area or pattern forming area-
Light-shielding area-pattern forming area, or in the vertical direction light-shielding area-pattern forming area-light-shielding area-pattern forming area ... Or pattern forming area-light-shielding area-pattern forming area-light-shielding area. It is. The size of each of the light-shielding area and the pattern forming areas PFR4a and PFR4b corresponds to one pixel pattern.

When the boundary portion BR4a of another reticle 4b is superposed on the boundary portion BR4a of the reticle 4a previously transferred to the resist film in order to form the entire pattern, the uncovered area SR4a of the reticle 4a corresponding to the uncovered area SR4a. The pattern forming region PFR4b of the other reticle 4b is transferred to the exposure region, and the pattern forming region PFR4a of the reticle 4a is transferred to the other reticle 4b.
Is covered by the shield area SR4b. Therefore, the boundary portion BR4a
Except for the above, the pattern formation area PFR4a that was previously transferred is exposed and exposed, and the pattern formation area PFR4b of the reticle 4b is transferred as a latent image to a resist film and developed. The overall pattern of one layer aligned in the direction is obtained. Here, a portion where the boundary portion BR4a of the reticle 4a and the boundary portion BR4b of the other reticle 4b overlap each other is referred to as a joining portion JT4.

After that, by patterning all the layers in the same manner as above, the entire TFT matrix pattern as shown in FIG. 6 is obtained.

Whole TFT formed as described above
In the matrix pattern, different pattern forming regions PFR4a and PFR4b are alternately arranged in the vertical direction and the horizontal direction in the joining portion JT4.

Therefore, when the above-mentioned TFT matrix device is applied to the TFT matrix type liquid crystal display device according to the embodiment of the present invention, even if the alignment is deviated when transferring the pattern forming regions PFR4a and PFR4b, the connection is continued. In the matching portion JT4, areas having different luminance differences due to the difference in Cgs are mixed, so that the luminance becomes an intermediate luminance difference, and one luminance seems to gradually change to another luminance. For this reason,
Display unevenness is not recognized by human eyes on the screen of the liquid crystal device, and as a result, display unevenness of the liquid crystal display device can be suppressed.

In particular, the sizes of the individual light-shielding regions SR4a, SR4b on the reticles 4a, 4b, or the different reticles 4a, 4b in the joining portion JT4 of the TFT matrix device.
If the size of at least one of the pattern formation regions PFR4a and PFR4b belonging to the above is less than or equal to the pattern resolution by the naked eye, the display unevenness is more effectively not recognized by the human eye.

That is, as shown in FIG. 6, the reticle 4a
When the pattern forming area PFR4a of 1) and the pattern forming area PFR4b of the other reticle 4b are mixed, at least one of the pattern forming areas PFR4a and PFR4b has a size equal to or lower than the pattern resolution by the naked eye. The pattern formation area PFR4a and the pattern formation area
The border of PFR4b appears blurred. Therefore, when the entire connected TFT matrix pattern is applied to the TFT matrix device portion of the liquid crystal display device, even if a difference in luminance occurs between different pattern formation regions PFR4a and PFR4b, a clear boundary between them is recognized. You can't do it.

(3) Fifth Embodiment FIG. 8 is a plan view showing a TFT matrix device according to an embodiment of the present invention. FIG. 9 shows the entire TF of FIG.
Four reticles 5a obtained by dividing the T matrix pattern into four
It is a top view which shows ~ 5d.

The entire TFT matrix pattern is in the upper left,
It is divided into lower left, upper right, and lower right pattern formation regions PFR5a to PFR5d. These reticles 5a-5d are shown in FIG.
2 shows a set of arbitrary layers among a plurality of layers of reticles for forming the entire TFT matrix pattern of FIG. Note that the patterns on the reticles 5a to 5d do not show actual patterns, and are shown in FIG.
The pattern is shown on the assumption that the patterns of multiple layers are overlapped with each other.

One TFT is shown for the sake of explanation in both FIG. 8 and FIG.
The number of pixels including is simplified, and the number of pixels is 20 rows vertically × 2 pixels horizontally.
They are arranged in a matrix of 4 rows. The size of one pixel is approximately 50 × 50 μm.

Also in this case, as in the fourth embodiment, the range of three pixel patterns from the boundary end of each reticle 5a to 5d is the boundary portion BR5a to BR5d of the reticle 5a to 5d.
Has become. Light-shielding area at the borders BR5a to BR5d
SR5a to SR5d and pattern forming regions PFR5a to PFR5d are alternately arranged in the vertical and horizontal directions. However, in the case of the fifth embodiment, in the central portion where the four reticles 5a to 5d overlap, one of the four reticles 5a to 5d is formed with one of the pattern formation regions PFR5a to PFR5d, and the other three are formed.
Since any of the light shielding regions SR5a to SR5d is formed on the sheet, the regularity of the arrangement of the pattern forming region and the light shielding region is broken.

Further, the light-shielding regions SR5a to BR5a to BR5b
The size of SR5d and the pattern formation regions PFR5a to PFR5d correspond to one pixel pattern, respectively.

When the entire TFT matrix pattern is formed using the above reticles 5a to 5d, the reticle 5
Exposure is performed every a to 5d.

For example, first, the other portion is shielded from light, the resist film is exposed through the reticle 5a, and the pattern formation region PF is formed.
R5a is transferred to the resist film. The reticle 5a has two boundary portions BR5a on the right side and the lower side.

Then, the upper boundary portion BR5b of the two upper and right boundary portions BR5b of the reticle 5b is overlapped with the lower boundary portion BR5a of the reticle 5a which has been previously transferred. At this time, the pattern forming area PFR5b of another reticle 5b overlaps the unexposed area corresponding to the shield area SR5a of the reticle 5a,
Moreover, the shield area SR5b of the other reticle 5b overlaps the pattern formation area PFR5a of the reticle 5a. Subsequently, when the pattern formation region PFR5b is transferred onto the resist film by exposing the other portion to light and exposing it through the reticle 5b, the pattern formation regions PFR5a and PFR5b are connected and the pixel patterns are continuously arranged.

Next, the left boundary BR5c of the two lower and left boundary portions BR5c of the reticle 5c is overlapped with the right boundary portion BR5a of the reticle 5a which has been transferred first. At this time, the pattern forming area PFR5c of another reticle 5c overlaps the unexposed area corresponding to the shield area SR5a of the reticle 5a,
Moreover, the shield area SR5c of another reticle 5c overlaps the pattern formation area PFR5a of the reticle 5a. Subsequently, when the pattern forming region PFR5c is transferred to the resist film by exposing the other portion to light and exposing it through the reticle 5c, the pattern forming regions PFR5a, PFR5b and PFR5c are connected and the pixel patterns are continuously arranged.

Finally, the upper boundary portion BR5d of the upper and left boundary portions BR5d of the reticle 5d is overlapped with the lower boundary portion BR5c of the reticle 5c which has been previously transferred, and the reticle 5d The left-side boundary portion BR5d is overlaid on the right-side boundary portion BR5b of the reticle 5b previously transferred. At this time,
The pattern forming area PFR5d of another reticle 5d is formed in the unexposed area corresponding to the shield areas SR5c and SR5b of the reticles 5c and 5b.
Overlap, and the pattern forming areas PFR5c and PFR5b of the reticles 5c and 5b cover the shielding area SR5d of the other reticle 5d.
Overlap. Subsequently, the other portions are shielded from light, exposed through the reticle 5d, and the pattern formation region PFR5d is transferred to the resist film. Then, all the pattern formation regions PFR5a, PFR5
b, PFR5c and PFR5d are connected to each other to obtain an overall pattern of one layer in which individual patterns are continuously arranged in the vertical direction and the horizontal direction.

After that, by patterning all layers in the same manner as above, the entire TFT matrix pattern as shown in FIG. 8 is obtained.

As described above, according to the fifth embodiment, the entire TFT matrix pattern has different pattern formation regions PFR5a to PFR5a to BR5a to BR5d.
The PFRs 5d are alternately arranged in the vertical and horizontal directions.

Therefore, when the above-mentioned TFT matrix device is applied to the TFT matrix type liquid crystal display device according to the embodiment of the present invention, each pattern forming region PFR5a, PFR5b,
Misalignment occurs when transferring PFR5c and PFR5d, and Cg in each pattern forming area PFR5a, PFR5b, PFR5c and PFR5d.
Even when s is different, Cgs in the joint JT5
The difference in brightness due to the difference between the two is mixed. Therefore, display unevenness is not recognized by the human eye on the screen of the liquid crystal device.

In particular, the sizes of the individual light-shielding regions SR5a to SR5d on the reticles 5a to 5d, or the different reticles 5a to 5d at the joining portion JT5 of the TFT matrix device.
Forming regions PFR5a, PFR5b, PFR5c, PF belonging to
If at least one of R5d is less than or equal to the pattern resolution by the naked eye, the first to fourth
As in the embodiment described above, the display unevenness is more effectively not recognized by the human eye.

(4) Sixth Embodiment FIG. 10 is a plan view showing a TFT matrix device according to the sixth embodiment of the present invention. The entire TFT matrix pattern is divided into eight partial areas.

That is, four pattern formation regions PF are arranged in the right direction.
R6a, PFR6b, PFR6c, and PFR6d are sequentially connected, and four pattern forming regions PFR6e, PFR6f, PFR6g, and PFR6h are connected to each of these four in the horizontal direction and one in the vertical direction. Join each other.

Also in this case, the arrangement of the pattern forming area and the light shielding area at the boundary of the reticle can be applied as in the first to fifth embodiments.

The pattern forming region PFR6b in the central portion,
PFR6c, PFR6f, and PFR6g all have three boundaries, and the combination of the connections that they relate to is (PF
R6a, PFR6b, PFR6e, PFR6f), (PFR6b, PFR6c, P
FR6f, PFR6g), (PFR6c, PFR6d, PFR6g, PFR6h)
The number of reticles to be superposed on each other at the joining portion JT6 is four. In the overlapping portion of the four sheets, the alternating arrangement of the pattern forming area and the light shielding area is broken, as in FIG.

According to the entire TFT matrix pattern described above, as in the first to fifth embodiments, in the joining portion JT6, the portions having the brightness difference due to the difference in Cgs are not aligned in a straight line. Therefore, the display unevenness is not perceived by the human eye on the screen of the liquid crystal device because of the mixing or the mixture.

The pattern forming regions PFR6a and PF at both ends are
Since R6d, PFR6e and PFR6h are narrow in width, it is preferable to form two R6d's, PFR6a's and PFR6e's, and PFR6e's and PFR6h's' on one reticle. In this case, when transferring each pattern forming area PFR6a or PFR6d, PFR6e or PFR6h, the pattern forming area PFR6d or PFR6a, PFR6h or PFR6e which is not transferred is shielded from light.

(5) Seventh Embodiment FIG. 11 shows a set of arbitrary layers out of a set of two reticles formed for each layer by dividing the entire TFT matrix pattern into two left and right partial regions. 7 is a plan view showing reticles 7a and 7b of FIG. Also in this case, the pattern on the reticles 7a and 7b does not show an actual pattern, but shows a pattern on the assumption that a plurality of layers of patterns are overlapped for the sake of easy understanding. The above also applies to the following eighth to tenth embodiments.

From the m-th row of both reticles 7a and 7b, m + 2
The three lines up to the first line are extracted. Also, the whole TFT
In the matrix pattern, the npth column to the nth column are joint portions, and correspond to the boundary portions BR7a, BR7b of the reticles 7a, 7b. p represents a number of 2 or more.

As in the fourth embodiment, each reticle 7
In the boundary portions BR7a and BR7b of a and 7b, the light shielding regions SR7a and SR7b corresponding to one pixel pattern and the pattern forming regions PFR7a and PFR7b are alternately arranged in the vertical and horizontal directions. Different from the fourth embodiment, two or four or more pixel patterns are the boundary portions BR7a and BR7b.

As described above, the size of the boundary portion can be arbitrarily set within a range in which one reticle can be formed, and the number of pixel patterns included in the boundary portion also falls within the above limit. It can be arbitrarily selected within the range.

(6) Eighth Embodiment FIG. 12 is a plan view showing two reticles 8a and 8b formed by dividing the entire TFT matrix pattern of one layer into two left and right partial regions. .

From the m-th row of both reticles 8a and 8b, m + 2
The three lines up to the first line are extracted. Also, the whole TFT
In the matrix pattern, the n-th column to the n-th column are joint portions and correspond to the boundary portions BR8a and BR8b of the reticles 8a and 8b. p represents a number of 4 or more.

Light-shielding areas SR8a and SR8b and pattern formation area PF
Although R8a and PFR8b are arranged alternately in the vertical and horizontal directions and that the sizes of the boundary portions BR8a and BR8b are set arbitrarily, they are the same as in the fourth embodiment. Four
Unlike the embodiment described above, the continuous light-shielding regions SR8a and SR8b and the pattern forming regions PFR8a and PFR8b both correspond to two individual pixel patterns.

As described above, the continuous light-shielding regions SR8a and SR8b
The size of the pattern forming regions PFR8a and PFR8b can be arbitrarily selected.

(7) Ninth Embodiment FIG. 13 shows two reticles 9a formed by dividing the entire TFT matrix pattern into two left and right partial regions.
It is a top view which shows 9b.

From the m-th row of both reticles 9a and 9b, m + 2
The three lines up to the first line are extracted. Further, in the entire pattern, the n-th to n-th columns are joint portions, and correspond to the boundary portions BR9a and BR9b of the reticles 9a and 9b.

In the ninth embodiment, as shown in FIG. 12, the light-shielding regions SR9a and SR9b and the pattern forming regions PFR9a and PFR9b both correspond to two individual pixel patterns, as in the eighth embodiment. Corresponding to, the light-shielding regions SR9a and SR9b and the pattern forming regions PFR9a and PFR9b are alternately arranged in the vertical direction and the horizontal direction, but the entire upper array is pixel pattern compared to the array of the eighth embodiment. Shift one item to the right,
The entire lower array is shifted to the left by one pixel pattern. That is, as shown in FIG. 13, the light shielding regions SR9a, SR9b
And pattern forming regions PFR9a and PFR9b are arranged so as to be continuous in the oblique direction.

(8) Tenth Embodiment FIG. 14 shows a reticle 10 formed by dividing an entire TFT matrix pattern into two left and right partial regions.
It is a top view showing a and 10b.

From the m-th row of both reticles 10a, 10b to m
The three lines up to the + 2nd line are extracted. Also, the total T
In the FT matrix pattern, the n-th to n-th columns are the boundary portions BR10a and BR10b of the reticles 10a and 10b.
Thus, when the patterns are transferred by overlapping the boundary portions BR10a and BR10b with each other, the overlapping portion becomes a connecting portion.

Similar to the above embodiment, the light shielding region SR10
Although a and SR10b and pattern forming regions PFR10a and PFR10b are alternately arranged in the vertical and horizontal directions, unlike the above embodiment, the light shielding regions SR10a, which are continuous in one row,
That is, the sizes of the SR10b and the pattern forming regions PFR10a and PFR10b are changed. In the case of the tenth embodiment,
The sizes of the light shielding regions SR10a, SR10b and the pattern forming regions PFR10a, PFR10b at the boundary portions BR10a, BR10b are gradually reduced from the pixel pattern p / 2 at the boundary end of the reticles 10a, 10b, and further increased from the middle. In the n-th column, there are p / 2 pixel patterns.

By arranging the connecting portions in such a manner, even if there is a pattern shift, the luminance change apparently continuously changes, and it becomes more natural.

As described above, according to the seventh to tenth embodiments, in the joining portion formed by overlapping the boundary portions of the reticle, different pattern forming areas are mixed and arranged, and different pattern forming areas are arranged. The boundary of is unclear. Therefore, even if there is a brightness difference due to the Cgs difference between different pattern formation regions, the boundary of the part having the brightness difference becomes unclear, and thus display unevenness is recognized by the human eye on the screen of the liquid crystal device. Disappear.

In particular, also in the seventh to tenth embodiments, at least one of the light shielding area and the pattern forming area at the boundary is set to have a size not larger than the pattern resolution by the naked eye, for example, The thickness is preferably 200 μm or less.

[0118]

As described above, according to the present invention, an unexposed region is formed in advance at a place where the first pattern is to be arranged in the joining portion (third region) by one exposure mask, and Then, a latent image of the first pattern is formed thereon by another exposure mask, and then developed to form the pattern.

As a result, the boundaries between the patterns associated with different exposure masks can be made uneven or the patterns associated with different exposure masks can be arranged side by side without disturbing the regularity at the pattern joining portion. .

Further, in the method of manufacturing a thin film transistor matrix device of the present invention, by applying the above pattern forming step to at least two different films,
Forming at least two different layers, eg a gate electrode and a source / drain electrode. Therefore, even when the patterns of the respective exposure masks are transferred to the photosensitive resist film and the Cgs of the pattern forming regions of the different exposure masks are different due to misalignment, the Cgs of the pattern forming regions are different from each other. The areas having a difference in brightness due to the difference of (1) are not aligned on a straight line, or the boundaries thereof are unclear.
Therefore, display unevenness is not recognized by human eyes, and as a result, display unevenness of the liquid crystal display device can be suppressed.

In particular, when the size of the different pattern forming regions is equal to or smaller than the pattern resolution by the naked eye in the connecting portion of the TFT matrix device, the display unevenness is more effectively not recognized by the human eye.

[Brief description of drawings]

FIG. 1 is a plan view showing parts of a TFT matrix device according to first to third embodiments of the present invention and a liquid crystal display device using the same.

FIG. 2 is a plan view showing a reticle according to the first embodiment of the present invention.

FIG. 3 is a sectional view showing an exposure method using a reticle according to the first embodiment of the present invention.

FIG. 4 is a plan view showing a reticle according to a second embodiment of the present invention.

FIG. 5 is a plan view showing a reticle according to a third embodiment of the present invention.

FIG. 6 is a TF according to a fourth embodiment of the present invention.
FIG. 3 is a plan view showing a T matrix device and a liquid crystal display device using the same.

FIG. 7 is a plan view showing a reticle according to a fourth embodiment of the present invention.

FIG. 8 is a TF according to a fifth embodiment of the present invention.
FIG. 3 is a plan view showing a T matrix device and a liquid crystal display device using the same.

FIG. 9 is a plan view showing a reticle according to a fifth embodiment of the present invention.

FIG. 10 is a plan view showing a part of a TFT matrix device and a liquid crystal display device using the same according to a sixth embodiment of the present invention.

FIG. 11 is a plan view showing a reticle according to a seventh embodiment of the present invention.

FIG. 12 is a plan view showing a reticle according to an eighth embodiment of the present invention.

FIG. 13 is a plan view showing a reticle according to a ninth embodiment of the present invention.

FIG. 14 is a plan view showing a reticle according to a tenth embodiment of the present invention.

FIG. 15 is a TFT according to an embodiment of the present invention.
FIG. 3 is an enlarged plan view of a matrix device and a portion of a liquid crystal display device using the same.

FIG. 16 is a TFT according to an embodiment of the present invention.
FIG. 3 is an enlarged plan view showing one pixel of a liquid crystal display device using a matrix device.

17A to 17D are sectional views showing a method of manufacturing a TFT matrix device according to an embodiment of the present invention and a method of manufacturing a portion of a liquid crystal display device using the same (Part 1). Is.

18 (a) and 18 (b) are sectional views (No. 2) showing a method of manufacturing a TFT matrix device according to an embodiment of the present invention and a part of a liquid crystal display device using the same.
Is.

FIG. 19 is a TFT according to an embodiment of the present invention.
It is sectional drawing which shows the liquid crystal display device using a matrix device.

20A and 20B are cross-sectional views showing another manufacturing method of the TFT matrix device according to the embodiment of the present invention.

FIG. 21 is a sectional view showing a staggered TFT matrix device and a liquid crystal display device using the staggered TFT matrix device according to an embodiment of the present invention.

FIG. 22 is a cross-sectional view showing a TFT matrix device and a liquid crystal display device according to a conventional example.

FIG. 23 is a plan view showing a reticle according to a conventional example.

24A and 24B are cross-sectional views showing a manufacturing method of a general TFT matrix device and a liquid crystal display device.

FIG. 25 (a) is an equivalent circuit diagram of a liquid crystal display device having a TFT matrix for explaining the problems of the conventional example, and FIG. 25 (b) is a timing chart of the operation of the liquid crystal display device.

FIG. 26 is a characteristic diagram showing the relationship between the source voltage (applied voltage) and the transmittance of the liquid crystal, which explains the problem of the conventional example.

[Explanation of symbols]

11,51 glass substrate, 12 gate electrode, 13,15,15a, 21 insulating film, 14a-Si film, 14a channel layer, 16,16a n + type a-Si film, 17,17a metal film, 18,52 Resist film (photosensitive resist film), 18a resist mask, 19 reticle, 20a source electrode, 20b drain electrode, 22 pixel electrode, 51, 101a, 101b substrate, 53 light shielding plate, BE1a, BE1b boundary edge, BR1a, BR1b, BR2a , BR2b, BR3a ~ BR3d, BR4a, BR4b, BR
5a ~ BR5d, BR6a ~ BR6h, BR7a, BR7b, BR8a, BR8b, BR9
a, BR9b, BR10a, BR10b boundary, DB drain bus line, DT drain terminal, GB gate bus line, GT gate terminal, JT1 to JT6 connecting portion, LR1 to LR7 row-direction convex and concave areas, VR1 to VR7 Convex and concave regions in the row direction, PE pixel electrode, PFR1a, PFR1b, PFR2a, PFR2b, PFR3a to PFR3d, PF
R4a, PFR4b, PFR5a to PFR5d, PFR6a to PFR6h, PFR7
a, PFR7b, PFR8a, PFR8b, PFR9a, PFR9b, PFR10
a, PFR10b pattern formation area, SB source bus line, SCB common electrode, SR1a, SR1b, SR2a, SR2b, SR3a to SR3d, SR4a, SR4b, SR
5a ~ SR5d, SR6a ~ SR6h, SR7a, SR7b, SR8a, SR8b, SR9
a, SR9b, SR10a, SR10b Light-shielding area.

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification code FI theme code (reference) H01L 29/786 (72) Inventor Shogo Hayashi 4-1-1, Kamikodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Fujitsu Stock In-house F-term (reference) 2H092 HA04 JA24 KA05 MA15 MA19 NA01 2H095 BA05 BB02 BB36 2H097 GA45 LA12 5C094 AA03 AA14 AA43 AA48 BA03 CA19 DA13 DB01 DB04 EA04 EB02 FA01 FB02 CC01 FF02 CC0102 BB01 BB02 FF02 CC01A02 BB01 BB02 FF02 HK21 HK24 HL07 NN02 NN24 QQ01 QQ14

Claims (7)

[Claims] 1. A photosensitive resist film is formed on a substrate having a first region, a second region, and a third region sandwiched between the first region and the second region. And exposing the photosensitive resist film using a first exposure mask, thereby forming a plurality of latent images of a first pattern on the photosensitive resist film on the first region. And forming an unexposed area of the photosensitive resist film on the third area, the area having the first pattern in the exposed area and at least one latent image of the first pattern, The photosensitive resist film is exposed using a second exposure mask, whereby a plurality of latent images of the first pattern are arranged and formed on the photosensitive resist film on the second region, The latent pattern of the first pattern is formed in the unexposed area on the third area. Forming a plurality of the first patterns of the photosensitive resist film by developing the photosensitive resist film, and forming the first pattern of the photosensitive resist film. A pattern forming step including a step of forming a plurality of second patterns of a desired film by regularly arranging the pattern as a mask, and the pattern forming step. Is applied to at least two different films to form at least two different layers. 2. The thin film transistor matrix device, wherein a gate electrode, a first insulating film above the gate electrode, a semiconductor layer above the gate electrode, and a semiconductor layer on both sides of the gate electrode are connected to a source on a glass substrate. 2. A method of manufacturing a thin film transistor matrix device according to claim 1, further comprising a transistor having a gate electrode and a source / drain electrode, wherein the at least two different layers are the gate electrode and the source / drain electrode. 3. The one or more second patterns of the same exposure mask are continuously arranged in the third region. A method of manufacturing a thin film transistor matrix device as described. 4. The boundary line between the second pattern of the first exposure mask and the second pattern of the second exposure mask is uneven in the third region. The method of manufacturing a thin film transistor matrix device according to claim 1, wherein 5. In the third region, one region or two or more second patterns related to the first exposure mask are continuously arranged and a second pattern related to the second exposure mask. The one or two or more consecutively arranged regions are the second
5. The method for manufacturing a thin film transistor matrix device according to claim 1, wherein the patterns are alternately arranged in a horizontal direction or a vertical direction. 6. A step of forming a second insulating film that covers the transistor after forming the transistor on the glass substrate by the method of manufacturing a thin film transistor matrix device according to claim 1. And a step of electrically forming a pixel electrode electrically connected to one of the source / drain electrodes through an opening of the second insulating film. 7. The method of manufacturing a liquid crystal display device according to claim 6, wherein the at least two different layers are the gate electrode, the source / drain electrodes, and the pixel electrode.