JP2003295822A - Display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve the problem that an after-image phenomenon is seen on the display panel of a display device when an optical element on which high luminance data are set is rewritten into low luminance data. <P>SOLUTION: When a scanning line SL becomes a high and a data transferring transistor Tr1 is turned on, a potential corresponding to the luminance data of an OLED (organic light emitting diode) 10 is set on the gate electrode of a driving transistor Tr2 and a storage capacitor SC1. A signal which is impressed on a reversed scanning line RSL is shifted to a range of voltage with which a discharging transistor Tr4 is to be driven by a second storage capacitor SC2 to be inputted to the gate of the discharging transistor Tr4. Thus, the transistor Tr4 is turned on and the electric charges of the anode of the OLED 10 are extracted to a negative fixed potential Vcc through the transistor Tr4. <P>COPYRIGHT: (C)2004,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display device, and more particularly to a technique for improving the display quality of an active matrix display device.

[0002]

2. Description of the Related Art Notebook type personal computers and portable terminals are becoming widespread. Currently, mainly liquid crystal display devices
It is used in those display devices, and it is used in organic EL (Electr
o Luminescence) display device is expected as a next-generation flat panel display device. The liquid crystal display device has a narrow viewing angle,
The slow response speed remains an issue. On the other hand, the organic EL display device can achieve high brightness and high efficiency while overcoming the above problems.

The active matrix drive system is centrally located as a display method for these display devices. A display device using this method is called an active matrix display device, in which a large number of pixels are arranged vertically and horizontally to show a matrix shape, and a switch element is arranged in each pixel. The video data is sequentially written for each pixel by the switch element.

Currently, the practical development of an organic EL display device is in its infancy, and various pixel circuits have been proposed. As an example of such a circuit, a pixel circuit disclosed in Japanese Patent Laid-Open No. 11-219146 will be briefly described with reference to FIG.

This circuit includes two n-channel data transfer transistors Tr11 and drive transistors Tr12, and an optical light emitting diode (Organic Light Emitting Diode; hereinafter simply referred to as "OLED") 10 And holding capacity SC11
A scanning line SL, a power supply line Vdd, and a data line DL for inputting luminance data.

The operation of this circuit is such that, for writing the brightness data of the OLED 10, the scanning line SL becomes high, the data transfer transistor Tr11 is turned on, and the brightness data input to the data line DL is driven. Transistor Tr1
2 and the storage capacity SC11. When the scanning line SL becomes low at the timing of light emission, the data transfer transistor Tr11 is turned off, the gate voltage of the drive transistor Tr12 is maintained, and the OLED 10 emits light with the set brightness data.

[0007]

When the brightness data of the optical element is large, even if an attempt is made to set a small brightness data by rewriting the brightness data, charges corresponding to the previous large brightness data remain without being removed from the optical element. In some cases, the afterimage phenomenon cannot be seen because the luminance data cannot be set accurately. In particular, the image becomes very difficult to see when displaying a moving image.

The present invention has been made in view of such circumstances, and an object thereof is to propose a new circuit for reducing the above-mentioned afterimage phenomenon. Another object is to reduce the power consumption of the display device.

[0009]

One aspect of the present invention relates to a display device. This device is provided with an optical element, a current bypass circuit which is provided in parallel with the optical element, and which initializes a voltage generated at both ends of the optical element, and a voltage range of a signal which controls the current bypass circuit. A signal conversion circuit that supplies the current bypass circuit.

Here, an OLED can be assumed as the optical element, but the invention is not limited to this. In addition, as a current bypass circuit and switching circuit, MOS (Metal Oxide)
Semiconductor) transistor and thin film transistor (Th
in Film Transistor: hereinafter simply referred to as “TFT”), but is not limited to this. Further, the "brightness data" is data relating to the brightness information set in the drive transistor, and is distinguished from the light intensity emitted by the optical element. The current bypass circuit initializes the voltage generated across the optical element, thereby more accurately updating the brightness data. A storage capacitor or the like is exemplified as the signal conversion circuit. By controlling the current bypass circuit via the storage capacitor, it is possible to shift the voltage range of the signal for performing the on / off control of the current bypass circuit.

Further, the signal conversion circuit may have a storage capacitor, and the current bypass circuit may have a transistor,
The transistor has a gate electrode connected to one electrode of the storage capacitor, a signal line for controlling the current bypass circuit connected to the other electrode of the storage capacitor, and a signal following the voltage follow-up action between the electrodes of the storage capacitor. May be shifted to the voltage range for controlling the transistor.

For example, assume a p-channel transistor having a threshold voltage of −2V and a drain potential of −10V. This transistor is turned on when the source potential is -4V and the gate potential is -6V or less. Therefore, if the potential of the signal input to the gate electrode of the transistor is in the range of, for example, -5 to 10 V, the transistor will always be off.
Therefore, one electrode of the storage capacitor is connected to the gate electrode of the transistor, and a floating state is formed between these electrodes. When the potential between the electrodes is 0V and the high-side potential of the signal is 10V, the voltage of the signal input to the gate electrode of the transistor is -15 to 0V due to the principle of tapping. At this time, the potential on the low side of the signal is −15 V, which is lower than −6 V which is the potential at which the transistor is turned on, so that the transistor is turned on.

A switching circuit may be provided to shut off the path for supplying a current to the optical element when the current bypass circuit is turned on. At this time, if the power supply to the optical element is not interrupted, a penetrating current is generated from the power supply that supplies the power to the optical element to the current bypass circuit, and unnecessary power is consumed.

Further, the data update instruction signal for setting the brightness data and the signal for controlling the current bypass circuit are made common to initialize the voltage generated at both ends of the optical element and at the same time set the brightness data. May be. That is, it is not necessary to separately provide a special signal line for controlling the current bypass circuit, and the pixel circuit can be simplified.

Further, the signal for controlling the current bypass circuit is used as an inversion signal of the data update instruction signal for setting the brightness data, and the voltage generated at both ends of the optical element is initialized, and at the same time, the brightness data is set. You may. Although a special signal line will be provided separately for controlling the current bypass circuit, an inverted signal of the data update instruction signal is applied to that signal line, so a simple circuit such as an inverter generates the signal. it can. It should be noted that any combination or rearrangement of the above components is also effective as an aspect of the present invention.

[0016]

BEST MODE FOR CARRYING OUT THE INVENTION In the following embodiments, an active matrix type organic EL display is assumed as a display device. The embodiment proposes a new circuit that reduces the above-mentioned afterimage phenomenon. For this reason, a bypass circuit including a switching circuit is provided in parallel between the anode and the cathode of the optical element, and when the luminance data is set in the driving element, the switching circuit is turned on and off to release the electric charge of the optical element. It escapes to the potential and initializes the brightness data of the optical element.

First, in parallel with the OLED which is an optical element,
A pixel circuit provided with a transistor as a bypass circuit will be described with reference to FIG. This pixel is OL
An ED 10, a first storage capacitor SC1, a data transfer transistor Tr1, a drive transistor Tr2, a power cutoff transistor Tr3, and a discharge transistor Tr4 are provided. In addition, the data line DL and the power supply line Vdd
Are shared by a plurality of pixels in the same column, and similarly, the scanning line SL is shared by a plurality of pixels in the same row.

The data transfer transistor Tr1 receives the brightness data applied to the data line DL from the drive transistor T1.
It functions as a switching circuit when set to r2.
The drive transistor Tr2 holds the brightness data of the OLED 10 in the form of voltage. Power cutoff transistor Tr3
Functions as a switching circuit that cuts off the power to be supplied to the OLED 10 from the power supply line Vdd. The discharge transistor Tr4 is provided in parallel with the OLED 10 and functions as a switching circuit that extracts the electric charge set in the anode of the OLED 10 when setting the brightness data in the drive transistor Tr2.

Data transfer transistor Tr1, power cutoff transistor Tr3, and discharge transistor Tr
Since 4 functions as a switching circuit as described above, they may have a configuration in which two or more transistors are placed in series. Furthermore, the characteristics of those transistors, such as the current amplification factor, may be different.

The first storage capacitor SC1 holds the brightness data set in the drive transistor Tr2. The data transfer transistor Tr1, the drive transistor Tr2, and the discharge transistor Tr4 are p-channel TFTs.
The power cutoff transistor Tr3 is an n-channel TFT.
Is.

The data transfer transistor Tr1, the power cutoff transistor Tr3, and the discharge transistor Tr
The gate electrode of No. 4 is connected to the scanning line SL. The other one electrode of the data transfer transistor Tr1 is a data line D.
Connected to L. The remaining other electrode of the data transfer transistor Tr1, the one electrode of the first storage capacitor SC1, and the gate electrode of the drive transistor Tr2 are connected at the first node N1. The source electrode of the drive transistor Tr2 is connected to the remaining one electrode of the power cutoff transistor Tr3, and the other remaining electrode of the power cutoff transistor Tr3 is connected to the power supply line Vdd.

The drain electrode of the drive transistor Tr2, the anode of the OLED 10 and the discharge transistor T.
The source electrode of r4 is connected at the second node N2. The other electrode of the first storage capacitor SC1, the cathode of the OLED 10, and the drain electrode of the discharging transistor Tr4 are connected to the ground potential.

The operation of the circuit configured as described above will be described. When the scanning line SL becomes low and the data transfer transistor Tr1 is turned on for writing the brightness data, the gate electrode of the drive transistor Tr2 and the storage capacitor SC1 are turned on.
A potential corresponding to the brightness data of the OLED 10 is set at. At the same time, the discharging transistor Tr4, which is a p-channel TFT, is turned on, and the charge of the anode of the OLED 10 is extracted to the ground potential via the discharging transistor Tr4. At the same time, since the power cutoff transistor Tr3 is turned off, generation of a through current from the power supply line Vdd can be suppressed. As a result, the anode of the OLED 10 has the same potential as the ground potential.

Then, at the timing of light emission, the scanning line SL becomes high, so that the data transfer transistor T
The r1 and the discharging transistor Tr4 are turned off, and the power cutoff transistor Tr3 is turned on. As a result, a current according to the brightness data set in the drive transistor Tr2 is supplied from the power supply line Vdd to the OLED10, and the OLED1
0 emits light with a desired brightness.

Here, for example, assume a circuit in which the potential of the electrode of the discharging transistor Tr4 and the cathode of the OLED 10 connected to the ground potential is a negative potential. The potential of the second node N2 is VN2. FIG. 9 is a diagram showing the relationship between the voltage level of a signal input to the discharging transistor Tr4, the anode-side potential VN2 of the optical element, and the threshold voltage Vth of the discharging transistor Tr4. As shown in FIG. 9A, when the low-side potential of the signal is higher than the potential VN2 + Vth, which is the sum of the anode-side potential VN2 of the optical element and the threshold voltage Vth, the discharging transistor Tr4 is always off.

The problem that the discharging transistor Tr4 is always turned off is solved by separately providing a dedicated control line connected to the gate electrode of the discharging transistor Tr4 and applying a voltage for turning on / off the discharging transistor Tr4. To be done. However, in this case, it is necessary to provide a dedicated control line and a dedicated signal.

In the following embodiments, in order to solve the above problems, a signal applied to the scanning line SL and its inverted signal are used. Further, by providing a storage capacitor between the discharge transistor Tr4 and the scanning line SL, the scanning line SL
The voltage level of the scanning signal and its inverted signal applied to is converted into a voltage level driven by the discharging transistor Tr4. However, those having the same function are given the same name and the same reference numeral, and the description thereof is partially omitted.

The initial state potential of the gate electrode of the discharge transistor Tr4 and the electrode of the second storage capacitor on the side connected to the gate electrode is 0V, which is equal to the potential on the high side of the scanning signal or its inverted signal. Let As a result, as shown in FIG. 9B, the low-side potential can be made lower than the potential VN2 + Vth driven by the discharging transistor Tr4.

First Embodiment FIG. 1 shows a circuit of one pixel of the display device according to the first embodiment. This pixel includes an OLED 10, which is an optical element, and first and second storage capacitors SC.
1, SC2, data transfer transistor Tr1, drive transistor Tr2, power cutoff transistor Tr3
And a discharge transistor Tr4. Further, the data line DL and the power supply line Vdd are shared by a plurality of pixels in the same column, and similarly, the scanning line SL is shared by a plurality of pixels in the same row. In particular, the data transfer transistor Tr1,
The drive transistor Tr2 and the first storage capacitor SC1 are called a drive circuit 20. At this time, in the circuit of this pixel, the power supply line Vdd, the power cutoff transistor Tr3,
The drive circuit 20 and the OLED 10 are connected in series to form a main path, and the discharge transistor Tr4 is provided in parallel with the OLED 10 to form a bypass path.

The second storage capacitor SC2 shifts the potentials on the high and low sides while setting the voltage applied to the scanning line SL within the range of the voltage, and sets it to the gate electrode of the discharge transistor Tr4. Data transfer transistor Tr
1 is an n-channel TFT. The drive transistor Tr2, the power cutoff transistor Tr3, and the discharging transistor Tr4 are p-channel TFTs.

The gate electrodes of the data transfer transistor Tr1 and the power cutoff transistor Tr3 are connected to the scanning line SL. The remaining one electrode of the data transfer transistor Tr1 is connected to the data line DL. The remaining other electrode of the data transfer transistor Tr1, one electrode of the first storage capacitor SC1, and the gate electrode of the drive transistor Tr2 are connected at a node N1. The source electrode of the drive transistor Tr2 and the power cutoff transistor Tr3
The other electrode of the power cutoff transistor Tr3 is connected to the power supply line Vdd.

The drain electrode of the drive transistor Tr2, the anode of the OLED 10 and the discharge transistor T.
The source electrode of r4 is connected at node N2. One electrode of the second storage capacitor SC2 is connected to the inversion scanning line RSL, and the other electrode of the second storage capacitor SC2 is connected to the gate electrode of the discharging transistor Tr4. That is, the second storage capacitor SC2 is provided between the gate electrode of the discharging transistor Tr4 and the inversion scanning line RSL. First
The other electrode of the storage capacitor SC1, the cathode of the OLED 10, and the drain electrode of the discharging transistor Tr4 are connected to a negative fixed potential Vcc, which is a negative potential.

The operation of the circuit configured as above will be described. When the scanning line SL goes high and the data transfer transistor Tr1 is turned on for writing the brightness data, the gate electrode of the drive transistor Tr2 and the storage capacitor SC1 are turned on.
A potential corresponding to the brightness data of the OLED 10 is set at. At this time, an inversion signal whose logic is opposite to that of the signal applied to the scanning line SL is applied to the inversion scanning line RSL.

Therefore, the signal applied to the inversion scanning line RSL is shifted by the second storage capacitor SC2 to the range of the voltage driven by the discharging transistor Tr4 and input to the gate electrode of the discharging transistor Tr4. As a result, the discharge transistor Tr4 is turned on, and the charge of the anode of the OLED 10 is extracted to the negative fixed potential Vcc via the discharge transistor Tr4. At the same time, since the power cutoff transistor Tr3 is turned off, the power supply line Vd
Generation of a through current from d is suppressed. This makes O
The anode of the LED 10 has the same potential as the negative fixed potential Vcc.

Then, at the light emission timing, the scanning line SL becomes low and the inversion scanning line RSL becomes high, so that the data transfer transistor Tr1 and the discharging transistor T are formed.
The r4 is turned off and the power cutoff transistor Tr3 is turned on. As a result, a current corresponding to the brightness data set in the transistor Tr2 is supplied from the power supply line Vdd to the OLED 10.
Flow to.

According to the first embodiment, since the brightness data of the OLED 10 which is an optical element is initialized at the time of writing the brightness data, the afterimage phenomenon observed when the large brightness data is rewritten to the small brightness data. Can be reduced. At that time, the supply of current from the power supply line Vdd to the drive circuit 20 is cut off, so that the consumption current is reduced. Furthermore, the signals applied to the data lines DL, the scanning lines SL, and the inversion scanning lines RSL are shifted, and the vicinity of the center of these signals approaches 0 V, so that power consumption can be reduced.

Second Embodiment: FIG. 2 shows a pixel circuit of a display device according to a second embodiment. Since the circuit configuration of this pixel is similar to the circuit configuration shown in the first embodiment, the points characteristic of the second embodiment are particularly shown.

In the first embodiment, the data transfer transistor Tr1 is an n-channel TFT and the power cutoff transistor Tr3 is a p-channel TFT, but in the second embodiment, the data transfer transistor Tr1 is a p-channel TFT. Power cutoff transistor Tr3 is n channel T
FT.

Further, in the first embodiment, the gate electrode of the discharging transistor Tr4 is connected to the inversion scanning line RSL via the second storage capacitor SC2, but in the second embodiment, it is connected to the scanning line SL. To be done. Therefore, the reverse scanning line RSL becomes unnecessary. The operation of these circuits is the first embodiment.
Since it is similar to the operation of the circuit of, the description thereof is omitted. Further, the same effect can be obtained.

The present invention has been described above based on the embodiments. It should be understood by those skilled in the art that this embodiment is an exemplification, and that various modifications can be made to the combinations of the respective constituent elements and the respective processing processes, and that such modifications are within the scope of the present invention. . An example of such a modification will be given.

FIG. 3 shows a generalized circuit of the pixel shown in FIG. The feature of the embodiment is the OLED.
In parallel with 10, the discharge transistor T is provided as a bypass path.
r4 is provided, and the inversion scanning line R is provided via the second storage capacitor SC2.
The discharge transistor Tr4 is controlled by the signal of SL
That is, the electric charges generated at both ends of the LED 10 are discharged. Therefore, the configuration of the drive circuit 20 does not matter. However, although not shown in the figure, the data transfer transistor Tr1 is an n-channel transistor. FIG. 4 shows a circuit in which the power cutoff transistor Tr3 of the pixel circuit shown in FIG. 3 is provided between the drive circuit 20 and the OLED 10.

FIG. 5 shows a generalized circuit of the pixel shown in FIG. However, although not shown in the figure, the data transfer transistor Tr1 is a p-channel transistor. Further, in FIG. 6, the power cutoff transistor Tr3 of the pixel circuit shown in FIG.
This is a circuit provided between the LEDs 10.

[0043]

According to the present invention, it is possible to reduce the afterimage phenomenon. From another point of view, reduction of power consumption can be realized.

[Brief description of drawings]

FIG. 1 is a diagram showing a circuit configuration of a pixel according to a first embodiment.

FIG. 2 is a diagram showing a circuit configuration of a pixel according to a second embodiment.

FIG. 3 is a diagram showing a generalized circuit configuration of a pixel according to the first embodiment.

FIG. 4 is a diagram showing a generalized circuit configuration of a pixel according to the first embodiment.

FIG. 5 is a diagram showing a generalized circuit configuration of a pixel according to a second embodiment.

FIG. 6 is a diagram showing a generalized circuit configuration of a pixel according to a second embodiment.

FIG. 7 is a diagram showing a circuit configuration of a pixel of a conventional technique.

FIG. 8 is a diagram showing a circuit configuration of a pixel including a bypass path for initializing luminance data of an optical element.

FIG. 9 is a diagram showing a relationship between a voltage level of a signal input to a discharge transistor, an anode-side potential of an optical element, and a threshold voltage of a discharge transistor.

[Explanation of symbols]

DL data line, RSL inversion scan line, SC1 first storage capacitor, SC2 second storage capacitor, SL scan line,
Tr1 data transfer transistor, Tr2 drive transistor, Tr3 power cutoff transistor, T
r4 Discharge transistor, Vdd power supply line.

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification code FI theme code (reference) H05B 33/14 H05B 33/14 A

Claims (4)

[Claims] 1. An optical element, a current bypass circuit which is provided in parallel with the optical element and initializes a voltage generated at both ends of the optical element, and converts a voltage range of a signal for controlling the current bypass circuit. And a signal conversion circuit which supplies the current bypass circuit to the current bypass circuit. 2. The signal conversion circuit has a storage capacitor, the current bypass circuit has a transistor, the gate electrode of the transistor is connected to one electrode of the storage capacitor, the other of the storage capacitor. When a signal for controlling the current bypass circuit is supplied to one of the electrodes, it is possible to shift the voltage range of the signal to a voltage range for controlling the transistor by the voltage following action between the electrodes of the storage capacitor. The display device according to claim 1, wherein the display device is a display device. 3. The display device according to claim 1, further comprising a switching circuit that interrupts a path for supplying a current to the optical element when the current bypass circuit is turned on. 4. The brightness data is set when the current bypass circuit is controlled by a data update instruction signal for setting the brightness data or an inverted signal thereof to initialize the voltage generated across the optical element. It sets, The display apparatus in any one of Claim 1 to 3 characterized by the above-mentioned.