JP2003294796A - Actuator testing device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an actuator testing device capable of testing the soundness of a peripheral driving circuit including these actuators without causing a malfunction even if the actuators are either of an ordinary operation type and an ordinary stopping type. <P>SOLUTION: This actuator testing device has a pulse generating circuit 12 for successively connecting a power source 4 and switching elements 2 and 3 in a vertical row to the actuators 5, and imparting a test pulse having a pulse width of a degree of not operating the actuators 5 to the switching elements 2 and 3 when testing the actuators 5, and a monitor circuit 14 connected in parallel to the switching elements 2 and 3. This monitor circuit 14 is constituted by connecting a relay circuit 7, a current limiting circuit 8, and a current detecting circuit 9 in series. <P>COPYRIGHT: (C)2004,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an actuator testing apparatus for testing the soundness of actuators installed in various plants and the drive circuits around them.

[0002]

2. Description of the Related Art Generally, various plants are equipped with various actuators such as valves, motors, and circuit breakers as equipment for operating the plants. In addition, such an actuator is usually in a stopped state and is operated only when necessary (hereinafter referred to as a normal stop type actuator), and normally in an operating state and operated only when necessary. Some are stopped (hereinafter referred to as normal operation type actuators).

By the way, in any of the above-mentioned types of actuators, when they play a very important role in the operation of the plant or when they are indispensable for ensuring safety, the actuator and its surroundings. It is necessary to regularly test whether or not the drive circuit of (1) operates normally.

When performing the test, it is necessary to confirm the soundness of the above normal stop type while maintaining the stopped state so that the actuator does not malfunction. Similarly, for the normal operation type,
It is necessary to confirm the soundness while maintaining the operating state.

Conventionally, as an actuator test apparatus for testing the soundness of an actuator and a drive circuit around the actuator, there has been proposed an actuator test apparatus having, for example, a configuration as shown in FIG. 60-60
1411).

In FIG. 8, 30 is an actuator of a normal operation type driven by direct current, and 31 is an actuator 3.
0 is a DC power source for driving, and A0 is an actuator testing device.

This actuator testing device A0 also serves as a drive circuit for the actuator 30, and has an input terminal 20 for an ON / OFF signal for selecting either the operating / non-operating state of the actuator 30, and this input terminal 20. A logic circuit 21 for turning on / off the power transistor 24 according to an applied on / off signal, a pulse generating circuit 23 for generating a test pulse, a switching element 22 turned on / off by an output pulse of the pulse generating circuit 23, A diode 25 connected in series to the power transistor 24, a resistor 28 forming a bypass circuit 32, a bypass contact 29, a current detection circuit 26 including a current transformer, and an actuator 30 based on the detection output of the current detection circuit 26. And a judgment circuit 27 for judging the soundness of the peripheral circuits To have.

In the above structure, an ON signal is input to the input terminal 20 to bring the actuator 30 into the operating state. Then, the logic circuit 21 outputs a high-level actuator drive signal. At this time, no test pulse is output from the pulse generation circuit 23, and therefore the switching element 22 is turned on. As a result, the power transistor 24 is turned on while the bypass contact 29 is turned off, so that current flows from the DC power supply 31 to the actuator 30 via the power transistor 24, and the actuator 30 operates.

If there is a failure such as disconnection of the operating coil inside the actuator 30, no current will flow through the actuator 30, so the current detection circuit 27
Since the current cannot be detected by the
An abnormality of the actuator 30 is detected by 7.

On the other hand, to make the actuator 30 inoperative, an OFF signal is input to the input terminal 20. Then, the output of the logic circuit 21 becomes low level and the power transistor 24 is turned off, so that the energization of the actuator 30 is stopped.

Next, to test the integrity of the bypass circuit 32, the bypass contact 29 is turned on. At this time, if the bypass circuit 32 is normal, a part (about half) of the current that has been flowing through the power transistor 24 until then will flow through the bypass circuit 32. The current that flows through is reduced. The soundness can be confirmed by judging this by the judgment circuit 27.

On the other hand, if a failure such as disconnection of the connection line in the middle of the bypass circuit 32 occurs, the current detection circuit 26 cannot detect such a current change when the bypass contact 29 is turned on. Therefore, the pulse circuit 32
It can be seen that something is wrong with.

In order to test the soundness of the power transistor 24, after confirming the soundness of the bypass circuit 32, a test pulse is generated from the pulse generating circuit 23 and the test pulse is generated. The switching element 22 is turned off only during the output period. Accordingly, if the power transistor 24 is normal, the power transistor 24 is turned off, so that the current flows only in the bypass circuit 32. At this time, since the value of the current flowing through the actuator 30 does not change, the operating state of the actuator 30 is maintained as it is. On the other hand, since the current stops flowing to the current detection circuit 26 when the power transistor 24 is turned off, the change circuit 27 determines this current change.
It is possible to confirm the soundness of the power transistor 24 by making a determination in.

On the other hand, if a failure such as the opening of the power transistor 24 occurs, the current detection circuit 26 detects the current change even if the test pulse is generated from the bypass generation circuit 23. Therefore, it can be understood that some abnormality has occurred in the power transistor 24.

As described above, the conventional actuator test apparatus A0 shown in FIG. 8 maintains the operating state of the normal operation type actuator 30 and drives the actuator 30 and its peripheral drive circuits (power transistor 24 and bypass). The integrity of the circuit 32) can be tested.

[0016]

However, as described above, the actuators include not only the normal operation type but also the normal stop type. And FIG.
The conventional actuator test apparatus A0 shown in FIG. 2 is applicable to the normal operation type, but is difficult to apply to the normal stop type.

That is, when the actuator 30 is of a normal stop type, in the configuration of FIG. 8, when the bypass circuit 32 and the power transistor 24 are turned on to test the soundness of the power transistor 24, the actuator 30 is activated.
Current flows into the actuator and malfunctions, causing the actuator 30
It is difficult to conduct a soundness test while maintaining the suspension state of.

Further, although the one shown in FIG. 8 uses the DC power supply 31 for the DC-driven actuator 30, when the AC-driven actuator is used, the actuator 30 and its peripheral driving circuit are Even if the wire is abruptly disconnected, the current continues to flow due to the influence of the stray capacitance of the connection line, and the current is detected by the current detection circuit 26. Therefore, normal disconnection cannot be detected.

The present invention has been made to solve the above problems, and includes not only a normal operation type actuator but also a normal stop type actuator without causing a malfunction. A first object of the present invention is to provide an actuator test device capable of testing the soundness of a peripheral drive circuit.

Further, according to the present invention, when an AC power source is used as the power source of the actuator, the presence or absence of disconnection of the connection line connecting the actuator and the drive circuits in the periphery thereof is influenced by the stray capacitance of the connection line. A second object of the present invention is to provide an actuator testing device that can reliably detect without the need.

[0021]

The present invention has the following features to attain the object mentioned above.

That is, in the actuator test apparatus according to the first aspect of the invention, the power source and the switching elements are sequentially connected in cascade to the actuator, and
A pulse generation circuit that gives a test pulse having a pulse width to the extent that an actuator does not operate during a test of the actuator, and a monitor circuit connected in parallel to the switching element, and the monitor circuit comprises: It is characterized in that a relay circuit, a current limiting circuit, and a current detecting circuit are connected in series with each other.

According to a second aspect of the present invention, there is provided an actuator testing device according to the first aspect of the invention, wherein a pair of the monitor circuits are provided and these monitor circuits are connected in parallel to the switching elements. In addition, the current detection threshold value of the current detection circuit constituting each monitor circuit is individually set according to the characteristics of the actuator.

According to a third aspect of the present invention, in the actuator test apparatus according to the first aspect of the present invention, the power source is an AC power source, and the magnitude of the current detected by the current detection circuit is changed. And a timing control circuit for shifting the output timing of the test pulse output from the pulse generation circuit.

According to a fourth aspect of the present invention, in the actuator test apparatus according to the first aspect of the present invention, the power source is an AC power source, and a current peak is detected each time the current detection circuit detects a current peak. And a trigger signal generating circuit for outputting a trigger signal for generating a test pulse to the pulse generating circuit in synchronism with the above.

According to a fifth aspect of the present invention, in the actuator test apparatus according to the first aspect of the invention, the power source is an AC power source, the switching element is a field effect transistor, and the pulse generator is used. Instead of the circuit, a gate voltage control circuit for outputting a signal for controlling the gate voltage of the field effect transistor according to the magnitude of the current detected by the current detection circuit is provided.

An actuator test apparatus according to a sixth aspect of the present invention is the actuator test apparatus according to any one of the first to fifth aspects, wherein the power source is an AC power source and the monitor circuit is Is characterized in that a rectifying diode is inserted.

An actuator test apparatus according to a seventh aspect of the present invention is the actuator test apparatus according to any one of the first to sixth aspects, wherein the current limiting circuit is a constant current circuit. I am trying.

[0029]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiment 1. 1 is a configuration diagram of an actuator test apparatus according to a first embodiment of the present invention. In FIG. 1, 5 is an AC driven actuator, 4 is an AC driving AC power supply, and A1 is an actuator test apparatus.

A drive for driving the actuator 5 by sequentially connecting the AC power source 4 and two field effect transistors (hereinafter referred to as FETs) 2 and 3 as switching elements to the actuator 5 in cascade connection. The circuit is configured. In addition, this Embodiment 1
In the above, the actuator 5 may be a normal operation type or a normal stop type, and is not particularly limited.

Reference numeral 12 is a pulse generating circuit, which is composed of a logic circuit which is a combination of AND gates or OR gates (not shown). Then, one input terminal 41 of this pulse generation circuit 12 is supplied with an ON / OFF signal for putting the actuator 5 into an operating state or a non-operation state, and the other input terminal 42 thereof is provided with a test start signal. It is designed to be input from a controller (not shown).

Therefore, the pulse generating circuit 12 is
When the OFF signal is input to one of the input terminals 41, the low level signal is continuously output. However, when the test start signal is input to the other input terminal 42 in this state, the test start signal is responded accordingly. A high level signal having a short pulse width such that the actuator 5 does not operate is temporarily output as a test pulse. On the contrary, one input terminal 4
When the ON signal is input to 1, the high level signal is continuously output, but when the test start signal is input to the other input terminal 42 in this state, the actuator 5 operates accordingly. A low-level signal with a short pulse width that does not occur is temporarily output as a test pulse.

Reference numeral 14 is a monitor circuit connected in parallel with the FETs 2 and 3. The monitor circuit 14 includes a rectifying diode 6, a photo-mos relay 7 as a relay circuit,
A constant current circuit 8 as a current limiting circuit and a current detection circuit 9 such as a current transformer are connected in series with each other.

The photo MOS relay 7 is turned on / off by a signal from a controller (not shown). Further, the constant current circuit 8 is the monitor circuit 1
When a large amount of current flows into 4, the actuator 5 serves to adjust so that a constant current flows so that the actuator 5 does not malfunction. Further, the detection output of the current detection circuit 9 is taken in by a controller (not shown) so that the presence or absence of soundness is finally determined.

Numerals 10 and 11 are stray capacitances generated in a connection line such as a cable connecting the actuator 5, the AC power supply 4, and the FETs 2 and 3 to each other.

Next, the operation of the actuator testing apparatus having the above configuration will be described separately for the case where the actuator 5 is of the normal stop type and the case of the normal operation type.

(1) When the actuator 5 is a normal stop type a. In normal time The controller (not shown) gives an OFF signal to one of the input terminals 41 in advance, so that the pulse generation circuit 1
The low level signal is continuously output from 2 and the FET
2 and 3 are non-conducting. At this time, the photo MOS relay 7 is off. Therefore, the actuator 5 is not supplied with the electric power from the AC power supply 4 and is normally in a stopped state.

When it becomes necessary to operate the actuator 5, one of the input terminals 4 is fed from a controller (not shown).
The ON signal is input to 1. In response to this, the pulse generation circuit 12 outputs a high level signal,
FETs 2 and 3 are conducted. At this time, the photo MOS relay 7 is off. As a result, the actuator 5 operates because the electric power from the AC power supply 4 is supplied via the FETs 2 and 3.

B. At the time of test First, the operation in the case of testing the soundness of the connection line of the actuator 5 and cables before and after the actuator 5 will be described.

In this case, when the actuator 5 is normally stopped, that is, the FETs 2 and 3 are non-conductive, a signal is given from a controller (not shown) to turn on the photomos relay 7. At this time, when the actuator 5 and the connecting lines before and after the actuator 5 are normal, a current flows through the actuator 5 via the monitor circuit 14 in response to the photoMOS relay 7 being turned on, and this is detected by the current detection circuit 9. . This confirms that the actuator 5 and the connecting lines before and after it are healthy. At that time, since the current is limited by the constant current circuit 8 to the extent that the actuator 5 does not operate, the actuator 5 does not malfunction and the normal stop state is maintained.

On the other hand, when the photo-MOS relay 7 is turned on when the actuator 5 and the connecting lines before and after the actuator are broken, immediately after that, the monitor circuit 14 is connected to the monitor circuit 14 via the stray capacitances 10 and 11. A current flows, but since the current is half-wave rectified by the rectifying diode 6, the stray capacitances 10 and 11 gradually become in a charging state with the passage of time, and the current does not flow to the monitor circuit 14.
Therefore, if a current is not detected by the current detection circuit 9 after a predetermined time has passed since the photo MOS relay 7 was turned on, it can be confirmed that some abnormality has occurred in the actuator 5 or the connecting lines before and after the actuator 5.

As described above, in the first embodiment, when the AC power source 4 is used, the stray capacitances 10 and 11 are provided by providing the monitor circuit 14 with the rectifying diode 6.
The existence of soundness of the actuator 5 and the like can be surely tested without being affected by.

Next, the operation in the case of testing the soundness of the FETs 2 and 3 constituting the drive circuit of the actuator 5 will be described.

In this case, after confirming the soundness of the actuator 5 and the connection lines before and after the actuator 5, the controller (not shown) makes another operation continuously (that is, while keeping the photomos relay 7 in the ON state). A test start signal is input to the input terminal 42 of. In response to this, the pulse generation circuit 1
From 2 on, a high level test pulse having a short pulse width such that the actuator 5 does not operate is temporarily FET
It is output to 2 and 3.

At this time, if the FETs 2 and 3 are normal,
The high level test pulse causes the FETs 2 and 3 to conduct for a short time. Then, no current flows through the monitor circuit 14, and this is detected by the current detection circuit 9. This confirms that the FETs 2 and 3 are sound.
At that time, since the current flowing through the actuator 5 is for a short time, the actuator 5 is normally stopped without malfunctioning.

On the other hand, even if a high-level test pulse is applied to the FETs 2 and 3, if the current detection circuit 9 does not detect that the current flowing through the monitor circuit 14 is stopped, some abnormality occurs in the FETs 2 and 3. It can be confirmed that it is occurring.

(2) When the actuator 5 is of the normal operation type a. In the normal state When a controller (not shown) gives an ON signal to one of the input terminals 41 in advance, the pulse generation circuit 1
Since the high level signal is continuously output from 2, the FETs 2 and 3 are conducting. At this time, the photo MOS relay 7 is off. Therefore, the actuator 5 is in the normal operating state because the electric power from the AC power source 4 is supplied through the FETs 2 and 3.

When it is necessary to stop the actuator 5, one of the input terminals 4 from the controller (not shown) is used.
An OFF signal is input to 1. In response to this, the pulse generation circuit 12 outputs a low level signal,
FETs 2 and 3 are non-conductive. At this time, the photo MOS relay 7 is off. As a result, the actuator 5 is stopped from being supplied with electric power from the AC power source 4, so that the operation is stopped.

B. At the time of test When an abnormality such as disconnection occurs in the actuator 5 of the normal operation type and the connection lines before and after it, the FETs 2 and 3 are used.
However, since the actuator 5 does not operate even if it is conducting, it is obvious that an abnormality has occurred without needing to perform a soundness test. Therefore, here, the FET
The operation for testing the soundness of a few items will be described.

To test the soundness of the FETs 2 and 3, a high level signal is output from the pulse generation circuit 12 and F
The photoMOS relay 7 is turned on by a controller (not shown) in a state where the ETs 2 and 3 are conducting and therefore the actuator 5 is normally operating. Next, a test start signal is input from the controller to the other input terminal 42. In response to this, the pulse generation circuit 12 temporarily outputs to the FETs 2 and 3 a low-level test pulse having a short pulse width such that the actuator 5 does not operate.

At this time, if the FETs 2 and 3 are normal,
The low level test pulse causes the FETs 2 and 3 to be non-conductive for a short time. Then, a current flows through the monitor circuit 14, and this is detected by the current detection circuit 9. This confirms that the FETs 2 and 3 are normal. At that time, the current flowing through the actuator 5 temporarily decreases, but since the period is short, the actuator 5
The normal operating state is maintained without malfunction.

On the other hand, when a low-level test pulse is applied from the pulse generation circuit 12 to the FETs 2 and 3 to make them non-conductive, it is detected by the current detection circuit 9 that a current has flown to the monitor circuit 14. If not, FET
It can be confirmed that some abnormality has occurred in 2 and 3.

As described above, according to the first embodiment, not only the actuator 5 of the normal operation type but also the actuator of the normal stop type does not cause any malfunction, and the peripherals including these actuators 5 do not occur. It is possible to test the soundness of the drive circuit. Moreover, when the AC power source 4 is used as the power source of the actuator 5, the presence or absence of disconnection of the connection line connecting the actuator 5 and its peripheral drive circuits is not affected by the stray capacitances 10 and 11 of the connection line. It can be reliably detected.

Embodiment 2 FIG. 2 is a configuration diagram of an actuator test apparatus according to Embodiment 2 of the present invention.
The components corresponding to those of the first embodiment shown in FIG.

The actuator test apparatus A2 according to the second embodiment is characterized by a pair of monitor circuits 14a and 14b.
Are provided, and these monitor circuits 14a and 14b are respectively connected in parallel to the FETs 2 and 3 as switching elements. Each monitor circuit 14a, 14b
Diodes 6a and 6b, photo-mos relays 7a and 7b,
Constant current circuits 8a and 8b and variable current detection circuits 9a and 9
It is similar to the case of the first embodiment in that b is connected in series.

However, the current detection threshold values of the current detection circuits 9a and 9b forming the monitor circuits 14a and 14b are individually set according to the characteristics of the actuator 5. That is, in the case where the actuator 5 is of the normal stop type and the case of the normal operation type, the currents flowing through the monitor circuits 14a and 14b when the FETs 2 and 3 are turned on or off when testing the soundness of the FETs 2 and 3. The value of is different. Therefore, the respective currents are supplied to the current detection circuits 9a and 9b.
The threshold value for current detection is individually set so that the current can be detected reliably. Other configurations are similar to those of the first embodiment, and therefore detailed description is omitted here.

Next, the operation when testing the soundness of the FETs 2 and 3 will be described separately for the case where the actuator 5 is the normal stop type and the case where it is the normal operation type.

(1) When the actuator 5 is of a normal stop type When the photoMOS relay 7a of one monitor circuit 14a is turned on while the FETs 2 and 3 are non-conducting and the actuator 5 is normally stopped, the monitor circuit is turned on. An alternating current as shown in FIG. 3A is applied to the input side of 14a.

Next, when a test start signal is input from the controller (not shown) to the other input terminal 42, a high level test having a short pulse width such that the actuator 5 does not operate from the pulse generation circuit 12 in response thereto. A pulse is temporarily applied to FETs 2 and 3. At this time, FET2,3
Is normal, this high-level test pulse causes the FETs 2 and 3 to conduct for a short time, so that the constant current circuit 8
No current flows into the input side of a (period T1 in FIG. 3). Therefore, if the threshold value for current detection of the current detection circuit 9 is set to CT1, and if the current value detected by the current detection circuit 9 becomes less than or equal to this threshold value CT1, the FET
It can be judged that a few are normal.

(2) When the actuator 5 is of a normal operation type Even if the photo MOS relay 7b of one monitor circuit 14b is turned on while the FETs 2 and 3 are conducting and the actuator 5 is normally operating, As shown in FIG. 3 (b), since almost no current flows into the monitor circuit 14b, no current is detected by the current detection circuit 9b.

Next, when a test start signal is input from the controller (not shown) to the other input terminal 42, a low level test having a short pulse width such that the actuator 5 does not operate from the pulse generation circuit 12 in response to this. A pulse is temporarily applied to FETs 2 and 3. At this time, FET2,3
Is normal, the FETs 2 and 3 are rendered non-conductive for a short time by this low-level test pulse, so that current flows into the monitor circuit 14b (period T2 in FIG. 3). Therefore, if the threshold value for current detection of the current detection circuit 9b is set to CT2, and the current value detected by the current detection circuit 9 becomes equal to or higher than this threshold value, the FETs 2 and 3 are normal. You can judge.

In this case, when the current rises slowly due to the influence of the stray capacitances 10 and 11, the threshold value CT
By setting 2 to be low, the current detection circuit 9b can reliably detect the increase in current, and it is possible to reliably determine whether or not the FETs 2 and 3 are sound. Since the other operations are the same as those in the first embodiment, detailed description thereof is omitted here.

As described above, in the second embodiment, the pair of monitor circuits 14a and 14b are provided and each monitor circuit 14 is provided.
Since the current detection thresholds of the current detection circuits 9a and 9b forming a and 14b are individually set according to the characteristics of the actuator 5, the soundness of the FETs 2 and 3 can be reliably detected. .

In the first embodiment described above, the connecting lines before and after the actuator 5 are long and the stray capacitances 10, 1
When the influence of 1 is great, it is necessary to lengthen the pulse width of the test pulse output from the pulse generation circuit 12, whereas in the second embodiment, the current detection circuits 9a and 9a.
Since the threshold value for current detection of b can be set individually, the soundness of the peripheral drive circuit including the actuator 5 can be reliably tested without increasing the pulse width.

Embodiment 3 FIG. 4 is a block diagram of an actuator test apparatus according to Embodiment 3 of the present invention.
The components corresponding to those of the first embodiment shown in FIG.

The characteristics of the actuator test apparatus A3 according to the third embodiment are suitable when the actuator 5 is a normal operation type and the AC power supply 4 is used, and the current detected by the current detection circuit 9 is That is, the timing control circuit 16 is provided to shift the output timing of the test pulse output from the pulse generation circuit 12 according to the magnitude of the.

That is, the timing control circuit 16
According to the current detection level of the current detection circuit 9, the generation timing of the test start signal applied to the other input terminal 42 of the pulse generation circuit 1 is sequentially shifted on the time axis and output. Other configurations are similar to those of the first embodiment, and therefore detailed description is omitted here.

In the above configuration, when the actuator 5 is of the normal operation type, when testing the soundness of the FETs 2 and 3, the photomos relay 7 is turned on while the FETs 2 and 3 are conducting as described above. .

Next, a test start signal is input from the timing control circuit 16 to the other input terminal 42. In response to the test start signal, the pulse generation circuit 12 temporarily outputs to the FETs 2 and 3 a low-level test pulse having a short pulse width such that the actuator 5 does not operate.

At this time, if the FETs 2 and 3 are normal,
The low level test pulse causes the FETs 2 and 3 to be non-conductive for a short time. Here, in the case of the AC power supply 4, an alternating current flows into the monitor circuit 14, so when the current flowing into the monitor circuit 14 is small, the current detection circuit 9
Therefore, there is a possibility that it is erroneously determined that some abnormality has occurred even if the FETs 2 and 3 are normal.

Therefore, when the current detected by the current detection circuit 9 is small, the timing control circuit 16 outputs to the other input terminal 42 while sequentially shifting the generation timing of the test start signal on the time axis. And the exchange is 1/4
When the test start signal is output when the current peak corresponding to the cycle is reached, the current detection circuit 9 detects a current value equal to or higher than a preset threshold value. Can be reliably determined to be normal. The other operations are the same as in the case of the normal operation type actuator 5 described in the first embodiment, and a detailed description thereof will be omitted here.

As described above, in the third embodiment, when the actuator 5 is the normal operation type and the AC power source 4 is used, the FET is more than the first embodiment.
The presence or absence of soundness of a few items can be more surely confirmed, and erroneous determination can be prevented.

Embodiment 4 FIG. 5 is a block diagram of an actuator test apparatus according to Embodiment 4 of the present invention.
The components corresponding to those of the first embodiment shown in FIG.

The characteristics of the actuator test apparatus A4 according to the fourth embodiment are suitable when the actuator 5 is a normal stop type and the AC power supply 4 is used, and the current detection circuit 9 detects the current peak. A trigger signal generation circuit (AND gate in this example) 17 that outputs a test start signal serving as a trigger for generating a test pulse to the pulse generation circuit 12 in synchronization with this is provided.

That is, in the AND gate 17, one input portion is connected to the test command signal input terminal 43 and the other input portion is connected to the detection output portion of the current detection circuit 9, and the output portion of the AND gate 17 is connected. Is connected to the other input terminal 42 of the pulse generation circuit 12. Other configurations are similar to those of the first embodiment, and therefore detailed description is omitted here.

In the above structure, when the soundness of the FETs 2 and 3 is tested when the actuator 5 is of the normal stop type, the photo MOS relay 7 is turned on while the FETs 2 and 3 are non-conductive as described above. . Further, a high-level test command signal is input to the input terminal 43 in advance.

When the photo MOS relay 7 is turned on, current flows into the monitor circuit 14. When the current peak corresponding to 1/4 cycle of alternating current is reached,
Since the detection output of the current detection circuit 9 becomes high level, the test start signal is input to the pulse generation circuit 12 through the AND gate 17.

As a result, a high-level test pulse having a short pulse width such that the actuator 5 does not operate is applied to the FETs 2 and 3 from the pulse generation circuit 12. At this time, if the FETs 2 and 3 are normal, the FETs 2 and 3 are turned on for a short time by this high-level test pulse, so that no current flows into the input side of the constant current circuit 8a and the current detection circuit 9 operates. When the current drop is detected, FE
It can be determined that T2 and T3 are normal. In addition,
Other operations are the same as in the case of the normal stop type actuator 5 described in the first embodiment, and therefore detailed description will be omitted here.

As described above, in the fourth embodiment, when the actuator 5 is a normal stop type and the AC power supply 4 is used, the FET is automatically synchronized with the AC cycle.
The soundness of 2 and 3 can be surely recognized, and the processing for shifting the test pulse output from the pulse generation circuit 12 in time as in the third embodiment is not necessary. Therefore, the test time can be shortened. can do.

Embodiment 5 FIG. 6 is a block diagram of an actuator test apparatus according to Embodiment 5 of the present invention.
The components corresponding to those of the first embodiment shown in FIG.

The characteristic of the actuator test apparatus A5 according to the fifth embodiment is suitable for the case where the actuator 5 is a normal stop type and the FETs 2 and 3 are used as switching elements to correspond to the AC power source 4. Instead of the pulse generation circuit 12 used in the first to fourth embodiments, a signal for controlling the gate voltage of the FETs 2 and 3 is output according to the magnitude of the current detected by the current detection circuit 9. The gate voltage control circuit 18 is provided. Further, the monitor circuit 14 is provided with a current limiting resistor 19 in place of the constant current circuit 8. Other configurations are similar to those of the first embodiment, and therefore detailed description is omitted here.

In the above structure, when the actuator 5 is a normal stop type, normally, when an OFF signal is input to one of the input terminals 41 from the controller (not shown),
In response to this, the gate voltage control circuit 18 controls so that the gate voltage becomes smaller, so that the FETs 2 and 3 become non-conductive (period Ta in FIG. 7). Further, when an ON signal is input to the input terminal 41 as necessary, the gate voltage control circuit 18 controls the gate voltage to increase so that the FETs 2 and 3 become conductive (period Tb in FIG. 7). . As a result, the actuator 5 is turned on / off.

On the other hand, when testing the soundness of the FETs 2 and 3, the photo MOS relay 7 is turned on while the FETs 2 and 3 are not conducting. When the photo MOS relay 7 is turned on, a current flows into the monitor circuit 14. Then, as the value of the alternating current increases, the current value detected by the current detection circuit 9 also gradually increases, and accordingly, the gate voltage output from the gate voltage control circuit 18 to the FETs 2 and 3 also increases. It gets bigger and bigger.

At this time, if the FETs 2 and 3 are normal,
The current flowing through the FETs 2 and 3 also gradually increases. In this case, the gate voltage control circuit 18 controls the gate voltage so that the actuator 5 having the maximum current flowing through the FETs 2 and 3 does not malfunction. (Tc in FIG. 7).

When the current flowing through the FETs 2 and 3 increases, on the contrary, the current does not flow into the monitor circuit 14 side and the current value detected by the current detection circuit 9 decreases conversely. FET by detecting the change
It can be judged that a few are normal. The other operations are the same as in the case of the normal stop type actuator 5 described in the first embodiment, and therefore detailed description thereof will be omitted here.

As described above, in the fifth embodiment, when the actuator 5 is the normal stop type and the AC power supply 4 is used, the gate voltage control circuit 18 controls the gate voltages of the FETs 2 and 3. Therefore, in order to prevent the actuator 5 from malfunctioning, it is possible to confirm the soundness of the FETs 2 and 3 even if it is unknown what the pulse width of the test pulse should be. In addition, by controlling the gate voltage, even if the actuator 5 has a small size and quick response,
Allows for integrity testing.

The present invention is based on the above first to fifth embodiments.
The present invention is not limited to the configuration shown in (1) above, and can be implemented with appropriate changes without departing from the spirit of the present invention.

That is, although the two FETs 2 and 3 are used as the switching elements in each of the above-described first to fifth embodiments, the number of FETs may be only one.
Instead of T2 and T3, it is also possible to use switching elements such as triacs and GTOs.

Further, in each of the above-described first to fifth embodiments, the actuator 5 is shown to be driven by AC, but the present invention can be applied to an actuator driven by DC. In that case, a direct current power source can be used as the power source 4 and a bipolar transistor can be used instead of the FETs 2 and 3 as the switching elements. At this time, the rectifying diodes 6, 6a, 6b forming the monitor circuits 14, 14a, 14b can be omitted.

Further, in each of the above-described first to fourth embodiments, a constant current circuit is used as a current limiting circuit in order to stably flow a current that does not cause the actuator 5 to malfunction even if the impedance of each element in the device changes. Although 8, 8a and 8b are used, the present invention is not limited to this, and other elements such as resistors and transistors may be used as long as the current can be limited so that the actuator 5 does not malfunction. .

Furthermore, in each of the first to fifth embodiments, the photo-moss relays 7, 7a and 7b are used, but instead of this,
It is also possible to use an electromagnetic relay.

[0092]

The actuator testing apparatus according to the present invention has the following effects. (1) According to the invention described in claim 1, not only the normal operation type actuators but also the normal stop type actuators do not cause malfunctions, and the soundness of the peripheral drive circuit including these actuators is sound. The presence or absence of sex can be tested. Further, it can be applied regardless of whether the actuator is AC driven or DC driven.

(2) According to the invention described in claim 2, in addition to the effect of the invention described in claim 1, a pair of monitor circuits are provided to detect the current of the current detection circuits constituting each monitor circuit. Since the threshold value is individually set according to the characteristics of the actuator, it is possible to reliably detect the soundness of the switching element. In addition, since the threshold value for current detection of the current detection circuit can be set individually, the soundness of the peripheral drive circuit including the actuator can be reliably tested without increasing the pulse width of the test pulse. .

(3) According to the invention described in claim 3, when the actuator is a normal operation type and an AC power source is used, the soundness of the switching element is higher than that of the invention described in claim 1. The presence or absence can be tested more reliably, and erroneous determination can be prevented.

(4) According to the invention described in claim 4, when the actuator is a normal stop type and the AC power source is used, the soundness of the switching element is ensured by automatically synchronizing with the AC cycle. Can be recognized. Further, since it is not necessary to shift the test pulse output from the pulse generation circuit in time, the test time can be shortened.

(5) According to the invention of claim 5, when the actuator is a normal stop type and an AC power supply is used, the gate voltage control circuit controls the gate voltage of the switching element. ,
In order to prevent the actuator from malfunctioning, the soundness of the switching element can be confirmed even if it is not known what the pulse width of the test pulse should be. Further, by controlling the gate voltage, the soundness test can be surely performed even for the actuator having a small size and quick response.

(6) According to the invention described in claim 6, in addition to the effects of the invention described in claims 1 to 5, since a diode for rectification is inserted in the monitor circuit, it can be used as a power source for the actuator. When an AC power supply is used, it is possible to reliably detect the presence or absence of a disconnection of the connection line connecting the actuator and the drive circuits in the periphery thereof without being affected by the stray capacitance of the connection line.

(7) According to the invention of claim 7, in addition to the effects of the invention of claims 1 to 6, since a constant current circuit is used as a current limiting circuit, Even if the impedance of each element is different, it is possible to easily adjust so that a constant current flows so that the actuator does not malfunction, and it is possible to reliably prevent malfunction of the actuator during a test.

[Brief description of drawings]

FIG. 1 is a configuration diagram of an actuator test apparatus according to a first embodiment of the present invention.

FIG. 2 is a configuration diagram of an actuator test apparatus according to a second embodiment of the present invention.

FIG. 3 is a waveform diagram for explaining the operation of the actuator testing device of FIG.

FIG. 4 is a configuration diagram of an actuator test apparatus according to a third embodiment of the present invention.

FIG. 5 is a configuration diagram of an actuator testing device according to a fourth embodiment of the present invention.

FIG. 6 is a configuration diagram of an actuator test device according to a fifth embodiment of the present invention.

7 is a timing chart showing changes in the gate voltage output from the gate voltage control circuit of the actuator test apparatus of FIG.

FIG. 8 is a configuration diagram of a conventional actuator test device.

[Explanation of symbols]

A1, A2, A3, A4, A5 actuator test equipment, 2, 3 FET (switching element), 4 power supply,
5 actuators, 6, 6a, 6b diodes,
7, 7a, 7b Photomos relay (relay circuit),
8, 8a, 8b constant current circuit (current limiting circuit), 9, 9
a, 9b Current detection circuit, 12 pulse generation circuit, 16
Timing control circuit, 17 AND gate (trigger signal generation circuit), 18 Gate voltage control circuit.

Claims (7)

[Claims] 1. A pulse generator circuit, in which a power source and switching elements are sequentially connected in series to an actuator, and a test pulse having a pulse width such that the actuator does not operate during a test of the actuator is provided to the switching element. And a monitor circuit connected in parallel to the switching element, the monitor circuit comprising a relay circuit, a current limiting circuit, and a current detecting circuit connected in series with each other. 2. A pair of the monitor circuits are provided, the monitor circuits are connected in parallel to the switching elements, respectively, and a current detection circuit for the current detection circuits constituting the monitor circuits is provided. The actuator testing apparatus according to claim 1, wherein the threshold value is set individually according to the characteristics of the actuator. 3. A timing control circuit, wherein the power supply is an AC power supply, and the output timing of the test pulse output from the pulse generation circuit is shifted according to the magnitude of the current detected by the current detection circuit. The actuator testing apparatus according to claim 1, further comprising: 4. The power source is an AC power source, and each time a current peak is detected by the current detection circuit, a trigger signal for generating a test pulse is output to the pulse generation circuit in synchronization with this. The actuator test apparatus according to claim 1, further comprising a trigger signal generation circuit. 5. The power source is an AC power source, the switching element is a field-effect transistor, and the pulse generator circuit is replaced with the current detector circuit according to the magnitude of the current detected by the current detector circuit. The actuator testing apparatus according to claim 1, further comprising a gate voltage control circuit that outputs a signal that controls a gate voltage of the field effect transistor. 6. The actuator according to claim 1, wherein the power source is an AC power source, and a rectifying diode is inserted in the monitor circuit. Test equipment. 7. The actuator testing device according to claim 1, wherein the current limiting circuit comprises a constant current circuit.