JP2003273342A - Solid-state image sensing element and its manufacturing method - Google Patents
Solid-state image sensing element and its manufacturing methodInfo
- Publication number
- JP2003273342A JP2003273342A JP2002067861A JP2002067861A JP2003273342A JP 2003273342 A JP2003273342 A JP 2003273342A JP 2002067861 A JP2002067861 A JP 2002067861A JP 2002067861 A JP2002067861 A JP 2002067861A JP 2003273342 A JP2003273342 A JP 2003273342A
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- solid
- signal line
- state image
- unit pixel
- light
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- 238000006243 chemical reaction Methods 0.000 claims abstract description 19
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- 238000000034 method Methods 0.000 claims description 16
- 238000002955 isolation Methods 0.000 claims description 6
- 238000006073 displacement reaction Methods 0.000 claims description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 11
- 229910052710 silicon Inorganic materials 0.000 abstract description 11
- 239000010703 silicon Substances 0.000 abstract description 11
- 230000001788 irregular Effects 0.000 abstract description 2
- 206010034972 Photosensitivity reaction Diseases 0.000 abstract 1
- 238000009413 insulation Methods 0.000 abstract 1
- 230000036211 photosensitivity Effects 0.000 abstract 1
- 230000000452 restraining effect Effects 0.000 abstract 1
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- 230000003321 amplification Effects 0.000 description 22
- 238000003199 nucleic acid amplification method Methods 0.000 description 22
- 210000001747 pupil Anatomy 0.000 description 14
- 230000035945 sensitivity Effects 0.000 description 13
- 230000003287 optical effect Effects 0.000 description 8
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- 229910052782 aluminium Inorganic materials 0.000 description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 5
- 238000000059 patterning Methods 0.000 description 5
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- 230000015572 biosynthetic process Effects 0.000 description 4
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- 238000005468 ion implantation Methods 0.000 description 4
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- 238000010586 diagram Methods 0.000 description 3
- 239000002344 surface layer Substances 0.000 description 3
- 238000013461 design Methods 0.000 description 2
- 230000006866 deterioration Effects 0.000 description 2
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- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
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- 238000007796 conventional method Methods 0.000 description 1
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- 238000005516 engineering process Methods 0.000 description 1
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- 230000006872 improvement Effects 0.000 description 1
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Landscapes
- Solid State Image Pick-Up Elements (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、光電変換手段等を
含む複数の単位画素が２次元配列された撮像領域を有す
る固体撮像素子及びその製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state image pickup device having an image pickup area in which a plurality of unit pixels including photoelectric conversion means and the like are two-dimensionally arranged, and a manufacturing method thereof.
【０００２】[0002]
【従来の技術】近年、ビデオカメラや電子カメラが広く
普及しており、これらのカメラには、ＣＣＤ型や増幅型
の固体撮像素子が使用されている。これらの固体撮像素
子は、それぞれ光電変換手段（フォトダイオード；Ｐ
Ｄ）を設けた複数の単位画素が撮像領域内に２次元配列
のアレイ状に配置されたものである。そして、ＣＣＤ型
固体撮像素子では、各単位画素に入射した光をフォトダ
イオードによって光電変換して信号電荷を生成し、この
信号電荷を垂直ＣＣＤ転送レジスタおよび水平ＣＣＤ転
送レジスタを介して出力部に設けたフローティングデフ
ュージョン（ＦＤ）部に転送する。そして、このＦＤ部
の電位変動をＭＯＳトランジスタによって検出し、これ
を電気信号に変換、増幅することにより、撮像信号とし
て出力する。2. Description of the Related Art In recent years, video cameras and electronic cameras have become widespread, and CCD type or amplification type solid state image pickup devices are used for these cameras. Each of these solid-state image pickup devices has a photoelectric conversion means (photodiode; P).
A plurality of unit pixels provided with D) are arranged in a two-dimensional array in the imaging area. Then, in the CCD type solid-state image pickup device, light incident on each unit pixel is photoelectrically converted by a photodiode to generate a signal charge, and the signal charge is provided to an output portion via a vertical CCD transfer register and a horizontal CCD transfer register. Transfer to the floating diffusion (FD) unit. Then, the potential variation of the FD portion is detected by the MOS transistor, converted into an electric signal and amplified, and output as an image pickup signal.
【０００３】一方、増幅型固体撮像素子（ＣＭＯＳイメ
ージセンサ）では、各単位画素内にＦＤ部や転送、増幅
等の各種ＭＯＳトランジスタを有し、各単位画素に入射
した光をフォトダイオードによって光電変換して信号電
荷を生成し、この信号電荷を転送トランジスタによって
ＦＤ部に転送し、このＦＤ部の電位変動を増幅トランジ
スタによって検出し、これを電気信号に変換、増幅する
ことにより、各画素毎の信号を信号線より出力する。On the other hand, in an amplification type solid-state image pickup device (CMOS image sensor), each unit pixel has an FD section and various MOS transistors for transfer, amplification, etc., and light incident on each unit pixel is photoelectrically converted by a photodiode. To generate a signal charge, transfer the signal charge to the FD section by the transfer transistor, detect the potential fluctuation of the FD section by the amplifying transistor, convert this into an electric signal, and amplify the electric signal. The signal is output from the signal line.
【０００４】ところで、近年では、 携帯電話などのモバ
イル機器へのカメラ機能搭載の目的から、撮像素子の小
型化、省電力化に対する要求が強まっている。このよう
な要求に応えるためには、ＣＣＤ型の固体撮像素子より
も低電圧で動作可能であり、また、複雑な信号処理機能
も容易にワンチップ化できる増幅型固体撮像素子（ＣＭ
ＯＳイメージセンサ）が適している。そして、このよう
な増幅型固体撮像素子のうち、現時点では最も小型の画
素を有する構成としては、図１０に示すような画素構造
を有するものが提案されている（例えば、「Dun-Nian Y
aung, Shou-Gwo Wuu, Yean-Kuen Fang et al., "Nonsil
icide source/drain pixel for 0.25um CMOS image sen
sor" IEEE Electron Device Letters, Vol.22, No.2, p
p.71-73, February 2001」参照）。By the way, in recent years, for the purpose of mounting a camera function in mobile devices such as mobile phones, there is an increasing demand for downsizing of image pickup devices and power saving. In order to meet such demands, an amplification type solid-state image pickup device (CM) that can operate at a lower voltage than a CCD type solid-state image pickup device and can also easily have a complicated signal processing function in one chip.
OS image sensor) is suitable. Among such amplification type solid-state image pickup devices, one having a pixel structure as shown in FIG. 10 has been proposed as a structure having the smallest pixel at the present time (for example, “Dun-Nian Y”).
aung, Shou-Gwo Wuu, Yean-Kuen Fang et al., "Nonsil
icide source / drain pixel for 0.25um CMOS image sen
sor "IEEE Electron Device Letters, Vol.22, No.2, p
p.71-73, February 2001 ”).
【０００５】以下、この従来例について、図１０を参照
して説明する。図１０は、２×２＝４画素分の構成を示
しており、各単位画素は、シリコン基板にはｐ型拡散層
とｎ型拡散層からなるフォトダイオードＰＤと、このフ
ォトダイオードＰＤで光電変換された信号電荷を電圧信
号に変換して出力するための４つのＭＯＳトランジスタ
Ｔｒ１〜Ｔｒ４を設けたものである。すなわち、読み出
しトランジスタＴｒ１は、読み出しパルスに基づいてフ
ォトダイオードＰＤで生成された信号電荷を読み出して
増幅トランジスタＴｒ２にゲートに接続されたＦＤ部に
転送するものであり、増幅トランジスタＴｒ２は、ＦＤ
部の電位変動を対応して電圧信号（画素信号）を出力す
るものである。また、垂直選択（アドレス）トランジス
タＴｒ３は、アドレスパルスに基づいて画素信号を読み
出す水平ライン（画素行）を垂直方向に順次選択するた
めのものであり、リセットトランジスタＴｒ４は、リセ
ットパルスに基づいてＦＤ部の電位を電源電位にリセッ
トするものである。This conventional example will be described below with reference to FIG. FIG. 10 shows a configuration of 2 × 2 = 4 pixels. Each unit pixel has a photodiode PD including a p-type diffusion layer and an n-type diffusion layer on a silicon substrate, and photoelectric conversion is performed by the photodiode PD. Four MOS transistors Tr1 to Tr4 for converting the generated signal charges into a voltage signal and outputting the voltage signal are provided. That is, the read transistor Tr1 reads the signal charge generated by the photodiode PD based on the read pulse and transfers the signal charge to the FD unit connected to the gate of the amplification transistor Tr2.
The voltage signal (pixel signal) is output in response to the potential fluctuation of the part. The vertical selection (address) transistor Tr3 is for sequentially selecting a horizontal line (pixel row) for reading a pixel signal in the vertical direction based on an address pulse, and the reset transistor Tr4 is based on the reset pulse. This is for resetting the potential of the part to the power source potential.
【０００６】また、水平アドレス信号線１１は、垂直選
択トランジスタＴｒ３のゲートに結線され、垂直選択ト
ランジスタＴｒ３によって信号を読み出す水平ラインを
選択するものであり、リセット線１２はリセットトラン
ジスタＴｒ４のゲートに結線され、リセットトランジス
タＴｒ４によってＦＤ部の電位をリセットするものであ
る。また、垂直信号線１３は、増幅トランジスタＴｒ２
のソースに結線され、増幅トランジスタＴｒ２から出力
された画素信号を画素部の外部に出力するものであり、
定電流源１４は、各画素に駆動電流を供給しており、図
では省略しているが、画素列毎に垂直方向に配線された
信号線によって供給される。The horizontal address signal line 11 is connected to the gate of the vertical selection transistor Tr3 to select a horizontal line for reading a signal by the vertical selection transistor Tr3, and the reset line 12 is connected to the gate of the reset transistor Tr4. Then, the potential of the FD portion is reset by the reset transistor Tr4. The vertical signal line 13 is connected to the amplification transistor Tr2.
The pixel signal output from the amplification transistor Tr2 is output to the outside of the pixel unit.
The constant current source 14 supplies a drive current to each pixel, and although not shown in the drawing, the constant current source 14 is supplied by a signal line wired in the vertical direction for each pixel column.
【０００７】これらの配線は、例えばＡｌ多層配線が形
成されている。フォトダイオードＰＤに多くの光を導入
するためには、フォトダイオードＰＤの開口率を上げる
必要があり、フォトダイオードＰＤの上方には、できる
だけ信号線を配置しないようにレイアウトされている。
そして、この配線層の上方には、オンチップレンズ（Ｏ
ＣＬ）を配置して開口率を上げる工夫がなされる。ま
た、カラー信号を得るためのカラーフィルタが各フォト
ダイオードＰＤに対応して配線層上に配置される。ま
た、ＭＯＳトランジスタＴｒ１〜Ｔｒ４による回路部に
光が入射しないようにするための遮光膜が配置されてい
る。For these wirings, for example, Al multi-layer wirings are formed. In order to introduce a large amount of light into the photodiode PD, it is necessary to increase the aperture ratio of the photodiode PD, and the layout is arranged above the photodiode PD so that signal lines are not arranged as much as possible.
An on-chip lens (O
(CL) is arranged to increase the aperture ratio. A color filter for obtaining a color signal is arranged on the wiring layer corresponding to each photodiode PD. Further, a light-shielding film is arranged to prevent light from entering the circuit portion formed by the MOS transistors Tr1 to Tr4.
【０００８】[0008]
【発明が解決しようとする課題】ところで、被写体をレ
ンズにより結像して撮像する固体撮像装置においては、
シェーディングによる周辺減光の問題がある。具体的に
は、信号線などのチップ上の構造物による斜め光成分の
乱反射により、画面中央部に比べて周辺部でフォトダイ
オードへの入射光量や光電変換効率が低下するという問
題である。特に近年はカメラ機能部品の小型化の要求か
ら瞳距離の短い光学系が望まれるが、 その場合、画面周
辺の画素において斜めに入射する光の成分が信号線によ
って遮られるため、感度が低下し、シェーディングによ
る画質劣化が顕著になってしまう。By the way, in a solid-state image pickup device for forming an image of a subject by a lens,
There is a problem of peripheral dimming due to shading. Specifically, there is a problem that the amount of light incident on the photodiode and the photoelectric conversion efficiency in the peripheral portion of the screen are reduced as compared with the central portion of the screen due to diffused reflection of the oblique light component by the structure on the chip such as the signal line. In recent years, in particular, an optical system with a short pupil distance is desired due to the demand for miniaturization of camera functional parts.In that case, however, the signal line blocks the obliquely incident light components in the pixels around the screen, which lowers the sensitivity. , The image quality deterioration due to shading becomes remarkable.
【０００９】そこで従来は、瞳補正と称して、例えば特
開2000-150849 号公報に開示されるように、撮像領域の
周辺部寄りの領域において斜め光がフォトダイオードに
集光されるように、オンチップレンズや遮光膜の開口の
位置を補正し、シェーディングを軽減している。具体的
には、フォトダイオードから見て光が入射する方向にオ
ンチップレンズおよび遮光膜開口を配置する。Therefore, conventionally, as referred to as pupil correction, for example, as disclosed in Japanese Patent Laid-Open No. 2000-150849, oblique light is focused on a photodiode in a region near the periphery of an image pickup region. Shading is reduced by correcting the positions of the on-chip lens and aperture of the light shielding film. Specifically, the on-chip lens and the light-shielding film opening are arranged in the direction in which the light enters when viewed from the photodiode.
【００１０】しかし、ＣＣＤ型の固体撮像素子であれ
ば、画面内には多層配線が無く、フォトダイオード以外
の領域を覆うための遮光膜以外には光をさえぎるものが
ない。従って、瞳補正によるシェーディング低減が効果
的である。図１１は、ＣＣＤ型の固体撮像素子の積層構
造を示しており、シリコン基板２０の表層部にフォトダ
イオードＰＤが設けられている。そして、このシリコン
基板２０の上部にＣＣＤの転送電極となる第１層目の配
線層２１が形成され、その上に所定膜厚の絶縁膜２３を
介して第２層目の配線層２２が積層されている。そし
て、その上に平坦化膜２４等を介してカラーフィルタ２
５およびオンチップレンズ２６が配置されている。However, in the case of a CCD type solid-state image pickup device, there is no multilayer wiring in the screen, and there is nothing that blocks light except a light-shielding film for covering a region other than the photodiode. Therefore, shading reduction by pupil correction is effective. FIG. 11 shows a laminated structure of a CCD type solid-state imaging device, in which a photodiode PD is provided on the surface layer portion of a silicon substrate 20. A first wiring layer 21 serving as a CCD transfer electrode is formed on the silicon substrate 20, and a second wiring layer 22 is laminated on the first wiring layer 21 via an insulating film 23 having a predetermined thickness. Has been done. Then, a color filter 2 is formed on the flattening film 24 and the like.
5 and the on-chip lens 26 are arranged.
【００１１】これに対し、増幅型の固体撮像素子では、
画面内に少なくとも２層、望ましくは３層以上の多層信
号線が必要である。図１２は、増幅型の固体撮像素子の
積層構造を示しており、シリコン基板３０の表層部にフ
ォトダイオードＰＤが設けられ、このシリコン基板３０
の上部にそれぞれ所定膜厚の絶縁膜３１を介して３層の
配線層３２、３３、３４が積層され、その上に平坦化膜
３５等を介してカラーフィルタ３６およびオンチップレ
ンズ３７が配置されている。すなわち、図１１に示すＣ
ＣＤ型撮像素子の積層構造に比較して、より膜厚の大き
い多層構造となっている。On the other hand, in the amplification type solid-state image pickup device,
A multilayer signal line of at least two layers, preferably three layers or more, is required in the screen. FIG. 12 shows a laminated structure of an amplification type solid-state imaging device, in which a photodiode PD is provided on a surface layer portion of a silicon substrate 30.
Three wiring layers 32, 33, and 34 are laminated on the upper part of each of the insulating films 31 having a predetermined thickness, and a color filter 36 and an on-chip lens 37 are arranged on the wiring layers 32, 33, and 34 with a flattening film 35 or the like interposed therebetween. ing. That is, C shown in FIG.
Compared with the laminated structure of the CD type image pickup device, it has a multi-layer structure having a larger film thickness.
【００１２】このため上述した特開2000-150849 号公報
に開示されるように、遮光膜やオンチップレンズのみの
位置補正ではシェーディング改善の効果は小さい。ま
た、最上層の信号線はフォトダイオードの表面から３μ
ｍから５μｍ程度上層にあるのが普通である。この段差
は０．２５μｍゲート長世代のプロセス技術用いて製造
した増幅型撮像素子の画素サイズとほぼ等しいため、瞳
補正を行っても信号線によって斜め入射光が遮られ、特
に短射出瞳距離の場合においてシェーディング抑制が十
分にできない。以上のように、従来の増幅型撮像素子に
おいては、ＰＤ表面と信号線との間に画素サイズと同等
の段差があるため、瞳補正を行っても撮像領域の周辺部
寄りの領域でシェーディングが大きいという問題があっ
た。Therefore, as disclosed in the above-mentioned Japanese Patent Laid-Open No. 2000-150849, the effect of shading improvement is small in the position correction of only the light shielding film or the on-chip lens. Also, the signal line on the top layer is 3μ from the surface of the photodiode.
Usually, the upper layer is about 5 to 5 μm. Since this step is almost equal to the pixel size of the amplification type imaging device manufactured by using the process technology of the 0.25 μm gate length generation, even if the pupil correction is performed, the oblique incident light is blocked by the signal line, and particularly, in the case of the short exit pupil distance. In some cases, shading cannot be suppressed sufficiently. As described above, in the conventional amplification type image pickup device, since there is a step size equal to the pixel size between the PD surface and the signal line, even if the pupil correction is performed, the shading occurs in the region near the peripheral portion of the image pickup region. There was a big problem.
【００１３】そこで本発明の目的は、２次元配列された
光電変換手段の受光面の上層に配置される多層信号線に
よる入射光の乱反射を抑えることができ、特に撮像領域
の周辺部近傍における受光感度の改善を図ることができ
る固体撮像素子及びその製造方法を提供することにあ
る。Therefore, an object of the present invention is to suppress irregular reflection of incident light by a multi-layer signal line arranged in the upper layer of the light receiving surface of the photoelectric conversion means which is two-dimensionally arranged, and in particular, in the vicinity of the peripheral portion of the image pickup area It is an object of the present invention to provide a solid-state image sensor capable of improving sensitivity and a method for manufacturing the same.
【００１４】[0014]
【課題を解決するための手段】本発明の固体撮像素子
は、前記目的を達成するため、半導体基板に光電変換素
子とゲート素子を含む複数の単位画素を２次元アレイ状
に配列した撮像領域を設けるとともに、前記半導体基板
上に各単位画素の受光用開口部を避ける状態で単位画素
の行方向、または列方向、または格子状に複数層の信号
線を配置した固体撮像素子において、前記撮像領域の中
心部から周辺部に行くに従って前記各単位画素に対する
前記信号線の相対位置が撮像領域の中心に近づく方向に
ずれていることを特徴とする。In order to achieve the above object, the solid-state image pickup device of the present invention has an image pickup area in which a plurality of unit pixels including a photoelectric conversion element and a gate element are arranged in a two-dimensional array on a semiconductor substrate. In the solid-state image pickup device, in which a plurality of layers of signal lines are arranged in a row direction, a column direction, or a lattice pattern of the unit pixels on the semiconductor substrate while avoiding the light receiving opening of each unit pixel, The relative position of the signal line with respect to each of the unit pixels is shifted in the direction approaching the center of the imaging region from the central portion to the peripheral portion.
【００１５】また、本発明の固体撮像素子の製造方法
は、半導体基板に光電変換素子とゲート素子を含む複数
の単位画素を２次元アレイ状に配列した撮像領域を設け
るとともに、前記半導体基板上に各単位画素の受光用開
口部を避ける状態で単位画素の行方向、または列方向、
または格子状に複数層の信号線を配置した固体撮像素子
の製造方法において、前記複数層の信号線を形成する場
合に、前記撮像領域の中心部から周辺部に行くに従って
前記各単位画素に対する前記信号線の相対位置を撮像領
域の中心に近づく方向にずらして形成することを特徴と
する。Further, in the method for manufacturing a solid-state image pickup device of the present invention, an image pickup region in which a plurality of unit pixels including a photoelectric conversion element and a gate element are arranged in a two-dimensional array is provided on the semiconductor substrate, and the solid-state image pickup device is provided on the semiconductor substrate. The row direction or the column direction of the unit pixel while avoiding the light receiving opening of each unit pixel,
Alternatively, in a method for manufacturing a solid-state image sensor in which signal lines of a plurality of layers are arranged in a grid pattern, when forming the signal lines of the plurality of layers, the unit pixel for each of the unit pixels is moved from a central portion to a peripheral portion of the imaging region. It is characterized in that the relative position of the signal line is formed so as to be shifted in a direction approaching the center of the imaging region.
【００１６】また、本発明の携帯機器は、半導体基板に
光電変換素子とゲート素子を含む複数の単位画素を２次
元アレイ状に配列した撮像領域を設けるとともに、前記
半導体基板上に各単位画素の受光用開口部を避ける状態
で単位画素の行方向、または列方向、または格子状に複
数層の信号線を配置した固体撮像素子を搭載した携帯機
器において、前記固体撮像素子は、その撮像領域の中心
部から周辺部に行くに従って前記各単位画素に対する前
記信号線の相対位置が撮像領域の中心に近づく方向にず
れていることを特徴とする。Further, in the portable device of the present invention, an imaging region in which a plurality of unit pixels including photoelectric conversion elements and gate elements are arranged in a two-dimensional array is provided on a semiconductor substrate, and each unit pixel of the unit pixels is arranged on the semiconductor substrate. In a mobile device equipped with a solid-state image sensor in which a plurality of layers of signal lines are arranged in a row direction, a column direction, or a lattice pattern of unit pixels in a state of avoiding a light receiving opening, the solid-state image sensor is It is characterized in that the relative position of the signal line with respect to each unit pixel shifts toward the center of the imaging region from the central portion toward the peripheral portion.
【００１７】本発明の固体撮像素子では、撮像領域の中
心部から周辺部に行くに従って各単位画素に対する信号
線の相対位置が撮像領域の中心に近づく方向にずれてい
ることから、撮像領域の周辺部近傍における斜めの入射
光を有効に光電変換手段の受光部に入射させることがで
き、受光感度の改善を図ることができる。また、本発明
の製造方法では、撮像領域の中心部から周辺部に行くに
従って各単位画素に対する信号線の相対位置が撮像領域
の中心に近づく方向にずらして形成することにより、撮
像領域の周辺部近傍における斜めの入射光を有効に光電
変換手段の受光部に入射させることが可能な固体撮像素
子を製造することができ、受光感度の改善した固体撮像
素子を提供できる。In the solid-state image sensor of the present invention, the relative position of the signal line with respect to each unit pixel deviates in the direction approaching the center of the image pickup area from the central portion of the image pickup area to the peripheral portion. The oblique incident light in the vicinity of the portion can be effectively incident on the light receiving portion of the photoelectric conversion means, and the light receiving sensitivity can be improved. Further, in the manufacturing method of the present invention, the relative position of the signal line with respect to each unit pixel is formed so as to be shifted toward the center of the imaging region from the central part of the imaging region to the peripheral part. It is possible to manufacture a solid-state image sensor capable of effectively allowing oblique incident light in the vicinity to be incident on the light receiving portion of the photoelectric conversion means, and to provide a solid-state image sensor having improved light receiving sensitivity.
【００１８】さらに、本発明の携帯機器では、固体撮像
素子を搭載し、この固体撮像素子が撮像領域の中心部か
ら周辺部に行くに従って各単位画素に対する信号線の相
対位置が撮像領域の中心に近づく方向にずれていること
から、光学系を小型化した場合にも、撮像領域の周辺部
近傍における斜めの入射光を有効に光電変換手段の受光
部に入射させることができ、受光感度の改善を図ること
ができるため、固体撮像素子をコンパクトに搭載でき、
携帯機器の小型化を図ることが可能となる。Further, in the portable device of the present invention, a solid-state image pickup device is mounted, and as the solid-state image pickup device goes from the central portion of the image pickup area to the peripheral portion, the relative position of the signal line with respect to each unit pixel becomes the center of the image pickup area. Since the light beams are shifted toward each other, even when the optical system is downsized, the oblique incident light in the vicinity of the peripheral portion of the imaging region can be effectively incident on the light receiving portion of the photoelectric conversion unit, and the light receiving sensitivity is improved. Therefore, the solid-state image sensor can be mounted compactly,
It is possible to reduce the size of the mobile device.
【００１９】[0019]
【発明の実施の形態】以下、本発明による固体撮像素子
及びその製造方法の実施の形態例について説明する。本
実施の形態による固体撮像素子は、回路構成については
上記図１０で示した従来例と同様の増幅型固体撮像素子
であるが、その素子構造、特に各単位画素と周辺回路と
を接続している信号線（上層配線層）の位置関係が従来
例と異なっている。図１は、本実施の形態による固体撮
像素子の素子構造、特にフォトダイオードＰＤと信号線
との位置関係を示す部分断面図であり、図１（Ａ）は撮
像領域の中心部近傍の画素における素子構造、図１
（Ｂ）は撮像領域の中心部と周辺部との中間に位置する
画素における素子構造、図１（Ｃ）は撮像領域の周辺部
近傍の画素における素子構造を示している。BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of a solid-state image sensor and a method of manufacturing the same according to the present invention will be described below. The solid-state image sensor according to the present embodiment is the same amplification type solid-state image sensor as the conventional example shown in FIG. 10 with respect to the circuit configuration, but its element structure, in particular, each unit pixel and the peripheral circuit are connected. The positional relationship of existing signal lines (upper wiring layer) is different from the conventional example. FIG. 1 is a partial cross-sectional view showing the element structure of the solid-state imaging device according to the present embodiment, particularly the positional relationship between the photodiode PD and the signal line. FIG. 1A shows a pixel in the vicinity of the center of the imaging region. Device structure, Figure 1
FIG. 1B shows an element structure in a pixel located between the center and the periphery of the imaging area, and FIG. 1C shows an element structure in a pixel near the periphery of the imaging area.
【００２０】図示のように、この固体撮像素子において
は、シリコン基板４０の表層部にフォトダイオードＰＤ
が設けられ、このシリコン基板４０の上部にそれぞれ所
定膜厚の絶縁膜４１を介して３層の配線層（信号線）４
２、４３、４４が積層され、その上に平坦化膜（パッシ
ベーション膜）４５等を介してカラーフィルタ４６およ
びオンチップレンズ４７が配置されている。そして、図
１（Ａ）に示すように、撮像領域の中心部近傍の画素で
は、フォトダイオードＰＤの上方を避けるように信号線
を配置する。また、図１（Ｂ）（Ｃ）に示すように、撮
像領域の周辺部に近づくにつれて、画素の信号線を、中
心部近傍の画素に比べて光が入射してくる方向に配置
し、画素への斜め入射光をできる限り多くフォトダイオ
ードＰＤに到達させる。As shown in the figure, in this solid-state image pickup device, the photodiode PD is formed on the surface layer of the silicon substrate 40.
Is provided, and three wiring layers (signal lines) 4 are provided on the silicon substrate 40 with an insulating film 41 having a predetermined thickness interposed therebetween.
2, 43, and 44 are laminated, and a color filter 46 and an on-chip lens 47 are arranged on the laminated film 2, 43 and 44 with a flattening film (passivation film) 45 and the like interposed therebetween. Then, as shown in FIG. 1A, in the pixel near the center of the imaging region, the signal line is arranged so as to avoid above the photodiode PD. In addition, as shown in FIGS. 1B and 1C, the signal line of the pixel is arranged in a direction in which light is incident as compared with a pixel near the center as the peripheral portion of the imaging region is approached. As much obliquely incident light on the photodiode PD as possible is allowed to reach the photodiode PD.
【００２１】図２は、フォトダイオードＰＤと信号線と
の平面方向の位置関係を示す平面図である。図示のよう
に、この固体撮像素子において、シリコン基板４０に２
次元マトリクス状にフォトダイオードＰＤが配置されて
おり、そのシリコン基板４０の上部に行方向の信号線４
４Ａと列方向の信号線４４Ｂが配置されている。各フォ
トダイオードＰＤは、行方向および列方向に一定の間隔
で配置されているが、各信号線４４Ａ、４４Ｂの位置
は、各フォトダイオードＰＤに対して撮像領域の中心部
と周辺部とで位置関係がずれている。すなわち、撮像領
域の中心部の画素では、フォトダイオードＰＤ中心に対
して各信号線４４Ａ、４４Ｂの間の中心位置が一致して
いる。また、撮像領域の周辺部側の画素では、信号線４
４Ａ、４４Ｂが撮像領域の中心方向にずれている。FIG. 2 is a plan view showing the positional relationship between the photodiode PD and the signal line in the plane direction. As shown in the figure, in this solid-state image sensor, two
The photodiodes PD are arranged in a three-dimensional matrix, and the signal lines 4 in the row direction are provided above the silicon substrate 40.
4A and a signal line 44B in the column direction are arranged. The photodiodes PD are arranged at regular intervals in the row direction and the column direction, but the positions of the signal lines 44A and 44B are located at the central portion and the peripheral portion of the imaging area with respect to the photodiodes PD. The relationship is off. That is, in the pixel at the center of the imaging region, the center position between the signal lines 44A and 44B coincides with the center of the photodiode PD. In the pixels on the peripheral side of the imaging area, the signal line 4
4A and 44B are displaced toward the center of the imaging area.
【００２２】次に、このような固体撮像素子の製造方法
について説明する。まず、イオン注入と熟拡散によりｐ
型半導体層のｐウェル、あるいはｎ型半導体層のｎウェ
ルを形成する。その後、素子分離領域を形成し、各ＭＯ
Ｓトランジスタのしきい値を決めるためのイオン注入を
行い、ポリシリコン等でゲート層などを形成する。次い
で、レジスト塗布、パターニングを行い、リンなどのｎ
型半導体層を形成するイオンを、例えば０．８ＭｅＶの
エネルギで２×１０１３ｃｍ-2のドーズ量で、イオン注
入法により基板に打ち込み、フォトダイオードＰＤを形
成する。次いで、ＰＳＧなどの酸化シリコン材料で層間
膜を形成する。次いで、コンタクトホールを開口し、タ
ングステンを埋め込み、コンタクトを形成する。次い
で、アルミ等の導電膜を、例えば４００ｎｍ堆積し、パ
ターニングを行い、１層目の信号線を形成する。次い
で、コンタクト形成と信号線の形成を繰り返して、所望
の層数の多層配線を形成する。Next, a method of manufacturing such a solid-state image pickup device will be described. First, p by ion implantation and deep diffusion
A p-well of the n-type semiconductor layer or an n-well of the n-type semiconductor layer is formed. After that, an element isolation region is formed and each MO is
Ions are implanted to determine the threshold value of the S transistor, and a gate layer or the like is formed of polysilicon or the like. Next, resist coating and patterning are performed, and n such as phosphorus is applied.
Ions for forming the type semiconductor layer are implanted into the substrate by an ion implantation method at a dose amount of 2 × 10 13 cm −2 with an energy of 0.8 MeV, for example, to form a photodiode PD. Then, an interlayer film is formed using a silicon oxide material such as PSG. Next, a contact hole is opened and tungsten is embedded to form a contact. Next, a conductive film such as aluminum is deposited to a thickness of 400 nm, for example, and patterned to form a first-layer signal line. Next, the formation of contacts and the formation of signal lines are repeated to form a multilayer wiring having a desired number of layers.
【００２３】増幅型固体撮像素子では、水平方向と垂直
方向の信号線を形成するために、最低でも２層の多層配
線が必要である。また、撮像領域の周辺に配置されてい
る信号処理回路や画素の微細化のためには３層の多層配
線が効果的であるし、さらに複雑な信号処理を行う回路
を混載するためには４層以上の多層配線が有効であり、
配線層数は製品の種類によって異なる。たとえば、アル
ミで３層配線を形成する場合にはフォトダイオードＰＤ
から３層目配線までの高さは５μｍ程度が普通である。In the amplification type solid state image pickup device, in order to form the signal lines in the horizontal direction and the vertical direction, at least two layers of multilayer wiring are required. Also, three-layered multilayer wiring is effective for miniaturizing the signal processing circuits and pixels arranged around the imaging area, and four wirings for mounting a circuit that performs more complicated signal processing. Multi-layer wiring of more layers is effective,
The number of wiring layers depends on the type of product. For example, when the three-layer wiring is made of aluminum, the photodiode PD
The height from the third wiring to the third wiring is usually about 5 μm.
【００２４】そして、本実施の形態では、信号線のパタ
ーニング時に使用するマスクにおいて、信号線の画素内
に配置されるフォトダイオードＰＤと信号線の位置関係
が、撮像領域の中央近傍の画素と周辺部側の画素とで異
なるようなパターンを用いる。具体的には、中央近傍の
画素ではフォトダイオードＰＤの上方に信号線が配置さ
れないように各層の信号線を配置し、周辺部側の画素で
は、縦（垂直）方向の信号線は撮像領域の右側では左方
向、左側では右方向にずれており、横（水平）方向の信
号線は撮像領域の上側では下方向、下側では上方向にず
れている。なお、理想的には、隣接画素間で信号線のズ
レ量が緩やかに変化するのが理想的である。このような
マスクを用いてパターニングすると、信号線をフォトダ
イオードＰＤの位置に対してずらして形成することがで
きる。Further, in the present embodiment, in the mask used for patterning the signal line, the photodiode PD arranged in the pixel of the signal line and the signal line have a positional relationship between the pixel PD near the center of the image pickup region and the periphery thereof. A different pattern is used for the pixels on the copy side. Specifically, in the pixels near the center, the signal lines of each layer are arranged so that the signal lines are not arranged above the photodiode PD, and in the pixels on the peripheral side, the signal lines in the vertical (vertical) direction are arranged in the imaging region. The right side is deviated to the left side, and the left side is deviated to the right direction. The signal lines in the lateral (horizontal) direction are deviated downward in the upper side of the imaging region and upward in the lower side. Ideally, it is ideal that the shift amount of the signal line gradually changes between adjacent pixels. When patterning is performed using such a mask, the signal line can be formed so as to be displaced from the position of the photodiode PD.
【００２５】また、コンタクトホールのパターニング時
に使用するマスクにおいては、上記のように単位画素に
対する信号線の相対位置が画素によって異なるので、信
号線の位置に対応してコンタクトの位置をずらすことが
必要である。また、単に信号線のズレに合わせてコンタ
クトをずらすだけでは接続できない場合も生じる。そこ
で、このような場合には、新たに配線素片を配置して正
しく信号線と接続する。また、この場合には、隣接画素
間で配線素片の形状が緩やかに変化するように形成す
る。すなわち、配線素片の形状を隣接画素間で急激に変
化させると、画素間特性差が大きくなり、画質劣化の原
因となるからである。この後、従来の方法でパッシベー
ション膜（ＳｉＮなど）を堆積し、さらにオンチップフ
ィルタやオンチップレンズを形成することで、本実施の
形態による固体撮像装置が完成することになる。このよ
うな増幅型固体撮像素子では、フォトダイオードの受光
面に結像する光学系を配置して用いることが望ましい。
そして、この光学系のＦ値は有限の値をとり、瞳中心は
画面（撮像領域）の中央位置の上方になるようにする。In the mask used for patterning the contact hole, the relative position of the signal line with respect to the unit pixel differs depending on the pixel as described above, so it is necessary to shift the position of the contact in correspondence with the position of the signal line. Is. In addition, there may be a case where the connection cannot be made simply by shifting the contacts according to the deviation of the signal lines. Therefore, in such a case, a wiring element is newly arranged and properly connected to the signal line. In this case, the wiring element is formed so that the shape of the wiring element gradually changes between adjacent pixels. That is, if the shape of the wiring element is drastically changed between the adjacent pixels, the characteristic difference between the pixels becomes large, which causes deterioration of the image quality. After that, a passivation film (SiN or the like) is deposited by a conventional method, and an on-chip filter or an on-chip lens is further formed, whereby the solid-state imaging device according to the present embodiment is completed. In such an amplification type solid-state image pickup device, it is desirable to arrange and use an optical system for forming an image on the light receiving surface of the photodiode.
Then, the F value of this optical system has a finite value, and the center of the pupil is located above the center position of the screen (imaging region).
【００２６】続いて、本実施の形態例に示した増幅型撮
像素子の特性面での特徴を従来例と比較しながら説明す
る。まず、撮像領域（画面）の中心部の画素では、フォ
トダイオードＰＤ上方には信号線が存在しない領域があ
り、中心画素の上方に瞳中心がある。このため、図１
（Ａ）に示すように、画面中心では主要な光の成分ａは
ほぼ垂直に受光面に入射し、信号線が存在しない領域を
通過してフォトダイオードＰＤに到達できる。この画面
中心では従来例と本例との違いはなく、光を効率よくフ
ォトダイオードＰＤに導入できる。Next, characteristics of the amplification type image pickup device shown in this embodiment in terms of characteristics will be described in comparison with a conventional example. First, in the pixel at the center of the imaging region (screen), there is a region where no signal line exists above the photodiode PD, and the pupil center is above the center pixel. For this reason,
As shown in (A), at the center of the screen, the main light component a is incident on the light-receiving surface almost vertically, and can reach the photodiode PD through a region where no signal line exists. At this screen center, there is no difference between the conventional example and this example, and light can be efficiently introduced into the photodiode PD.
【００２７】一方、画面周辺部の画素では、瞳中心が斜
め上方に位置し、主要な光の成分ａが瞳から斜めに入射
する（図１（Ｂ）（Ｃ））。上記従来例のように、フォ
トダイオードＰＤの上方を避けて信号線を配置しても、
斜め入射光の光路上に信号線が配置されることになり、
フォトダイオードＰＤの入射光を遮ってしまう。しか
し、本例では、信号線が存在しない領域が光の入射方向
にあるので、光を効率よくフォトダイオードＰＤに導く
ことができる。結果として、周辺画素での減光の少な
い、すなわちシェーディングの少ないフォトダイオード
ＰＤを製造できる。また、製造工程の上でも変更点はな
く、信号線を形成する際に用いるマスクにおいて、信号
線を所望の形状に設計するのみで容易に実現できるとい
う利点がある。On the other hand, in the pixels in the peripheral portion of the screen, the center of the pupil is located diagonally upward, and the main light component a is obliquely incident from the pupil (FIGS. 1B and 1C). Even if the signal line is arranged avoiding the upper portion of the photodiode PD as in the conventional example,
A signal line will be placed on the optical path of the obliquely incident light,
The light incident on the photodiode PD is blocked. However, in this example, since the region where the signal line does not exist is in the light incident direction, the light can be efficiently guided to the photodiode PD. As a result, it is possible to manufacture the photodiode PD with less dimming in the peripheral pixels, that is, less shading. In addition, there is no change in the manufacturing process, and there is an advantage that it can be easily realized only by designing the signal line into a desired shape in the mask used when forming the signal line.
【００２８】なお、本発明は上述した各実施の形態例に
限定されるものではない。１つの画素となる基本セルの
回路構成は図１０に示したものに何ら限定されるもので
はなく、光電変換部で得られた信号電荷を増幅して取り
出すことのできる構成であればよい。また、画面周辺の
画素における金属膜による開口中心のずれ量や開口面積
増大量等の条件は、適宜に定めればよい。その他、本発
明の要旨を逸脱しない範囲で、種々変形して実施するこ
とができる。The present invention is not limited to the above embodiments. The circuit configuration of the basic cell, which is one pixel, is not limited to that shown in FIG. 10, and may be any configuration capable of amplifying and extracting the signal charge obtained by the photoelectric conversion unit. The conditions such as the amount of shift of the center of the aperture and the amount of increase in the aperture area due to the metal film in the pixels around the screen may be appropriately determined. In addition, various modifications can be made without departing from the scope of the present invention.
【００２９】次に、以上のような本実施の形態例による
固体撮像素子のより具体的な実施例および応用例につい
て説明する。
（１）上述のように図１に示す実施例は、従来の瞳補正
でオンチップレンズをずらすのと同様な原理で信号線を
ずらすことにより、フォトダイオードＰＤへの入射光量
を増加させるようにしたものである。撮像素子に結像す
る光学系の瞳中心は撮像素子の画面中心の直上にある場
合がほとんどであるので、信号線は画面の中心方向にず
らし、そのずらし量は画面端に行くほどずらし量を大き
くしていくのが好ましい。ただし、画面の一部のみ、た
とえば、中心部分はずらさず、周辺部近傍部分だけをず
らすだけでも、シェーディングの大きい画面周辺部近傍
でのシェーディングが軽減され、画質の向上が達成され
る。Next, more specific examples and application examples of the solid-state image pickup device according to the above-described embodiment will be described. (1) As described above, in the embodiment shown in FIG. 1, by shifting the signal line according to the same principle as shifting the on-chip lens in the conventional pupil correction, the amount of light incident on the photodiode PD is increased. It was done. In most cases, the center of the pupil of the optical system that forms an image on the image sensor is directly above the center of the screen of the image sensor, so the signal line is shifted toward the center of the screen. It is preferable to increase it. However, even if only a part of the screen, for example, the central part is not displaced and only the peripheral part is shifted, the shading in the peripheral part of the screen where the shading is large is reduced, and the image quality is improved.
【００３０】（２）従来例で示したように、一部の信号
線は電源電位やグランド電位を供給するために、すべて
の単位画素に接続されている。その場合は、網状に信号
線を形成し、網目に相当する開口部から各単位画素のフ
ォトダイオードＰＤに光を導入する。この場合でも、信
号線パターンを画面中心部に向かってずらすことで、シ
ェーディングが改善される。
（３）例えば０．２５ミクロン世代の素子では、配線幅
が０．４０ミクロン、ビアコンタクト径が０．３４ミク
ロン程度となる。単純に信号線だけを１ミクロンずらす
と、ビアコンタクトと接続できないため、画素は動作で
きない。そこで、信号線をずらしても接続を保つための
構造として、図３に示すように、信号線５０Ａ、５０Ｂ
がずれる方向に長径の断面を有するビアコンタクト５２
を形成し、信号線がどこにずれても、ビアコンタクトと
信号線とを接触できるようにする。
（４）または、図４に示すように、新たな配線素片５４
を配置して、ビアコンタクト５６と信号線５０Ａ、５０
Ｂを接続する。なお、配線素片５４の形状は全画素で同
一にするとよい。(2) As shown in the conventional example, some signal lines are connected to all unit pixels in order to supply the power supply potential and the ground potential. In that case, a signal line is formed in a mesh shape, and light is introduced into the photodiode PD of each unit pixel from the opening corresponding to the mesh. Even in this case, the shading is improved by shifting the signal line pattern toward the center of the screen. (3) For example, in a 0.25 micron generation element, the wiring width is 0.40 micron and the via contact diameter is approximately 0.34 micron. If only the signal line is shifted by 1 micron, the pixel cannot operate because it cannot be connected to the via contact. Therefore, as a structure for maintaining the connection even if the signal lines are displaced, as shown in FIG.
Via contact 52 having a cross section with a major axis in the direction of deviation
Is formed so that the via contact and the signal line can be brought into contact with each other wherever the signal line is displaced. (4) Alternatively, as shown in FIG. 4, a new wiring element 54
Are arranged, and the via contact 56 and the signal lines 50A, 50
Connect B. The shape of the wiring element 54 is preferably the same for all pixels.
【００３１】（５）また、この配線素片を全画素で同一
形状にする場合、信号線のずれの範囲内でどのようにず
れても接続が保たれるような大きさにしなければならな
い。つまり、一部のずれ量が大きい場合には、全ての配
線素片を大きくしなければならず、配線素片が光を遮っ
てしまう。そこで、こういった場合には、配線素片の形
状を画素ごとに変化させることで、配線素片を小さくす
る。図５は、ずれ量が大きい場合に配線素片の形状を変
化させてビアコンタクトと信号線を接続する場合の一例
を示す平断面図である。図４に示すようなずれ量を有す
る領域では小さい配線素片５４を用い、図５に示すよう
に、ずれ量が大きい領域では大きい配線素片５８を用い
て接続する。(5) When the wiring element has the same shape in all pixels, it must be sized so that the connection can be maintained regardless of how much the signal line is displaced. That is, when a part of the displacement amount is large, all the wiring pieces must be made large, and the wiring pieces block light. Therefore, in such a case, the size of the wiring element is reduced by changing the shape of the wiring element for each pixel. FIG. 5 is a plan sectional view showing an example of connecting the via contact and the signal line by changing the shape of the wiring element when the amount of deviation is large. A small wiring element 54 is used in an area having a displacement amount as shown in FIG. 4, and a large wiring element 58 is used in an area having a large displacement amount as shown in FIG.
【００３２】（６）信号線のずらし量は画面中心から端
に行くにしたがって徐々に大きくすることが好ましい。
このため、ずらし量を細かく設定する必要がある場合が
多い。たとえば、４ｕｍピッチの画素アレイで、射出瞳
距離が数１０〜数ｍｍであれは、１画素あたり０．１か
ら１ｎｍ程度の小さいずらし量の最適値となる。つま
り、信号線のピッチは３．９９９９μｍから３．９９９
０μｍというように細かく設定する必要がある。そし
て、このように半端な数値を取り扱う場合、設計作業は
現在入手可能なＣＡＤツールで問題ないが、マスクの作
成に問題がある。つまり、このマスク作成作業は、マス
ク描画機を用いて描画グリッド（単位格子）でマスクパ
ターンを設定していくものであるが、たとえば、よく用
いられるＪＥＯＬ社製のマスク描画機ＡＬＴＡでは最小
描画グリッドが２０ｎｍであるから、５倍マスクの場
合、２０／５＝４ｎｍが半導体基板上にパターニング後
の最小グリッドとなり、０．１から１ｎｍ程度の小さい
ずらし量で信号線を形成することができない。(6) It is preferable that the shift amount of the signal line is gradually increased from the center of the screen to the end.
Therefore, it is often necessary to finely set the shift amount. For example, in a pixel array with a pitch of 4 μm and an exit pupil distance of several tens to several mm, the optimum shift amount is about 0.1 to 1 nm per pixel. That is, the pitch of the signal lines is from 3.9999 μm to 3.999.
It is necessary to make a fine setting such as 0 μm. When dealing with such odd numerical values, there is no problem with the CAD tools currently available for design work, but there is a problem with mask creation. In other words, in this mask creation work, a mask pattern is set with a drawing grid (unit grid) using a mask drawing machine. For example, in the commonly used JEOL mask drawing machine ALTA, the minimum drawing grid is used. Since it is 20 nm, in the case of a 5 × mask, 20/5 = 4 nm is the minimum grid after patterning on the semiconductor substrate, and the signal line cannot be formed with a small shift amount of about 0.1 to 1 nm.
【００３３】そこで、この対策として、ずらし量の丸め
を行い、最小グリッドに乗らない信号線をグリッドに載
せるようにする。上述のように、ずらし量は隣接する画
素間で大きく変化しないことが重要であるが、たとえ
ば、最小グリッド４ｎｍで０．５ｎｍ／pixel のずらし
を行うと、８画素ごとに４μｍずつずらし量が増加する
ことになる。この場合、８画素ごとに特性が変化してし
まい、撮像結果に８画素ごとの縦筋が現れて問題となる
ことが懸念されるが、最小グリッドが画素サイズの０．
５％以下であれば、縦筋は認識できない程度であり、問
題にならないことが分かった。また、画素ピッチは最小
グリッドの整数倍としてグリッドに載るようにするのが
設計上便利である。Therefore, as a countermeasure against this, the shift amount is rounded so that the signal lines that do not fit on the minimum grid are placed on the grid. As described above, it is important that the shift amount does not change significantly between adjacent pixels. For example, if the shift amount of 0.5 nm / pixel is performed with the minimum grid of 4 nm, the shift amount increases by 4 μm every 8 pixels. Will be done. In this case, the characteristics change every 8 pixels, and vertical stripes appear every 8 pixels in the imaging result, which may cause a problem, but the minimum grid has a pixel size of 0.
It was found that if it is 5% or less, the vertical stripes are not recognizable, which is not a problem. In addition, it is convenient in design that the pixel pitch is set on the grid as an integral multiple of the minimum grid.
【００３４】（７）信号線の位置合わせずれにより設計
どおりの位置に信号線が形成できないと、信号線により
光が遮られ感度が低下する。そこで、普通は多層配線は
直下の層に位置合わせを行うのであるが、より下の層に
対して合わせを行うことにより、全体の位置合わせずれ
量を減らすことができる。図６は、多層配線を直下の層
を基準として各層の位置合わせを行う場合の手順を示す
フローチャートである。図示のように、シリコン基板の
素子分離領域（Ｓ１）を位置合わせの基準として、イオ
ン注入（Ｓ２）とゲート形成（Ｓ３）を行う。その後、
各層のコンタクト（１ＭＣ、２ＭＣ、３ＭＣ）と配線層
（１ＭＴ、２ＭＴ）を直下の層を位置合わせの基準とし
て形成し（Ｓ４〜Ｓ８）、さらに遮光膜（３ＭＴ）、カ
ラーフィルタ、オンチップレンズを直下の層を位置合わ
せの基準として形成する（Ｓ９〜Ｓ１１）。(7) If the signal line cannot be formed at the designed position due to misalignment of the signal line, light is blocked by the signal line and the sensitivity is lowered. Therefore, normally, the multilayer wiring is aligned with the layer immediately below, but by aligning with the lower layer, it is possible to reduce the amount of misalignment as a whole. FIG. 6 is a flowchart showing a procedure for aligning each layer with the layer immediately below the multilayer wiring as a reference. As shown in the figure, ion implantation (S2) and gate formation (S3) are performed using the element isolation region (S1) of the silicon substrate as a reference for alignment. afterwards,
The contacts (1MC, 2MC, 3MC) of each layer and the wiring layers (1MT, 2MT) are formed by using the layers immediately below as a reference for alignment (S4 to S8), and further, a light shielding film (3MT), a color filter, and an on-chip lens are formed. The layer immediately below is formed as a reference for alignment (S9 to S11).
【００３５】また、図７は、多層配線を直下でなく、よ
り下層を位置袷の基準として各層の位置合わせを行う場
合の手順を示すフローチャートである。図示のように、
通常のアルミ配線ならば、コンタクトの全層をゲート層
に合わせるようにするとよい。この位置合わせのため
に、たとえば全層のコンタクトに対する合わせマークを
ゲート層に形成しておく。また、通常のアルミ配線プロ
セスを用いる場合は、アルミ配線層は直下のコンタクト
層にしか合わせられないので、図示のように各コンタク
ト層をゲート層などに合わせ、その上のアルミ配線層は
直下のコンタクト層に合わせるようにする。FIG. 7 is a flow chart showing a procedure for aligning each layer by using the lower layer as a reference for position matching, not directly under the multilayer wiring. As shown,
For normal aluminum wiring, it is advisable to match all the contact layers with the gate layer. For this alignment, alignment marks for contacts of all layers are formed in the gate layer, for example. Also, when using a normal aluminum wiring process, the aluminum wiring layer can be aligned only with the contact layer directly below, so as shown in the figure, each contact layer is aligned with the gate layer, etc. Align with the contact layer.
【００３６】すなわち、図７において、シリコン基板の
素子分離領域（Ｓ２１）を位置合わせの基準として、イ
オン注入（Ｓ２２）とゲート形成（Ｓ２３）を行う。そ
の後、第１層目のコンタクト（１ＭＣ）をゲート層に位
置合わせして形成し（Ｓ２４）、このコンタクト（１Ｍ
Ｃ）に第１層目の配線層（１ＭＴ）を位置合わせして形
成する（Ｓ２５）。次に、第２層目のコンタクト（２Ｍ
Ｃ）をゲート層に位置合わせして形成し（Ｓ２６）、こ
のコンタクト（２ＭＣ）に第２層目の配線層（２ＭＴ）
を位置合わせして形成する（Ｓ２７）。That is, in FIG. 7, ion implantation (S22) and gate formation (S23) are performed using the element isolation region (S21) of the silicon substrate as a reference for alignment. Then, a contact (1MC) for the first layer is formed by aligning with the gate layer (S24), and the contact (1M) is formed.
The first wiring layer (1MT) is aligned and formed in C) (S25). Next, the second layer contact (2M
C) is aligned with the gate layer (S26), and a second wiring layer (2MT) is formed on this contact (2MC).
Are aligned and formed (S27).
【００３７】次に、第３層目のコンタクト（３ＭＣ）を
ゲート層に位置合わせして形成し（Ｓ２８）、このコン
タクト（３ＭＣ）に遮光膜（３ＭＴ）を位置合わせして
形成する（Ｓ２９）。さらに、カラーフィルタ、オンチ
ップレンズをゲート層に位置合わせして形成する（Ｓ３
０、Ｓ３１）。このような位置わせ方法は、信号線をず
らさない場合にも効果があるが、特に信号線をずらす場
合に効果が大きいものである。なお、本例では全コンタ
クト層をゲート層に対して位置合わせマークを設けて位
置合わせしたが、例えば素子分離領域やバルクコンタク
トに対して全配線層に位置合わせマークを設けて位置合
わせを行うようにしてもよい。また、このような方法は
埋め込み配線などの場合には必ずしも採用しないものと
する。Next, a third layer contact (3MC) is formed by aligning with the gate layer (S28), and a light shielding film (3MT) is formed by aligning with this contact (3MC) (S29). . Further, a color filter and an on-chip lens are formed in alignment with the gate layer (S3).
0, S31). Such a positioning method is effective even when the signal lines are not displaced, but is particularly effective when the signal lines are displaced. In this example, all the contact layers are aligned by providing alignment marks with respect to the gate layer. However, for example, alignment marks may be provided with respect to element isolation regions and bulk contacts in all wiring layers. You may Further, such a method is not necessarily adopted in the case of embedded wiring or the like.
【００３８】（８）通常の増幅型固体撮像素子は、水平
方向、垂直方向の画素選択信号線のドライバや読み出し
信号線のからの信号処理回路等の周辺回路を配置する。
これらの回路は、画素アレイの行や列ごとに必要である
ため、 便宜上、画素ピッチと同じピッチで画素の周囲に
配置するのがもっとも便利である。しかし、本例のよう
に信号線をずらす場合、 信号線の位置と周辺回路の位置
がずれて、周辺回路のつなぎ部分が接続できない問題が
ある。そこで信号線と周辺回路との間に配線素片を配置
して、信号線を周辺回路と接続する。図８は、この配線
例を示す説明図である。図示のように、撮像領域（画素
アレイ）６０から引き出された各信号線６２は、それぞ
れ周辺回路６４に導かれるが、図示の例では、各周辺回
路６４側に配線素片６６を設け、各周辺回路６４内の配
線６４Ａと各信号線６２とを接続している。(8) In a normal amplification type solid-state image pickup device, peripheral circuits such as a driver of a pixel selection signal line in the horizontal and vertical directions and a signal processing circuit from a read signal line are arranged.
Since these circuits are required for each row or column of the pixel array, it is most convenient to arrange them around the pixels at the same pitch as the pixel pitch for convenience. However, when the signal lines are displaced as in this example, there is a problem in that the positions of the signal lines and the peripheral circuits are misaligned and the connecting portions of the peripheral circuits cannot be connected. Therefore, a wiring element is arranged between the signal line and the peripheral circuit to connect the signal line to the peripheral circuit. FIG. 8 is an explanatory diagram showing this wiring example. As shown in the drawing, the signal lines 62 drawn out from the imaging region (pixel array) 60 are respectively guided to the peripheral circuits 64. In the illustrated example, however, wiring pieces 66 are provided on the peripheral circuit 64 side, and The wiring 64A in the peripheral circuit 64 and each signal line 62 are connected.
【００３９】（９）信号線のずらし量を上層の配線層に
いくほど大きくすると、斜め光が効率よく入射するため
感度が向上する。図９は、このようなずらし構造を一例
を示す断面図である。なお、図１と共通する構成には同
一符号を付してある。図１に示す例では、２層目の配線
層（信号線）４３と３層目の配線層（信号線）４４がず
れない例を示したが、図９に示すように、２層目の配線
層（信号線）４３と３層目の配線層（信号線）４４とを
ずらすことにより、さらに有効な素子配置を得ることで
き、感度を向上することができる。また、図９に示す例
において、上層のオンチップレンズ４７やカラーフィル
タ４６を配置する場合に、それらを信号線と同様にずら
して、ずらし量は上層にいくほど大きくするとよい。(9) Increasing the shift amount of the signal line to the upper wiring layer improves the sensitivity because the oblique light is efficiently incident. FIG. 9 is a cross-sectional view showing an example of such a shift structure. The same components as those in FIG. 1 are designated by the same reference numerals. In the example shown in FIG. 1, an example in which the second wiring layer (signal line) 43 and the third wiring layer (signal line) 44 are not displaced is shown, but as shown in FIG. By shifting the wiring layer (signal line) 43 and the third wiring layer (signal line) 44, a more effective element arrangement can be obtained, and the sensitivity can be improved. Further, in the example shown in FIG. 9, when the upper layer on-chip lens 47 and the color filter 46 are arranged, they may be displaced in the same manner as the signal line, and the displacement amount may be increased toward the upper layer.
【００４０】以上に記した構造の固体撮像素子は、特に
瞳射出距離が短い光学系と組み合わせると効果が大き
い。増幅型の固体撮像素子は、Ａ／Ｄ回路や画像信号処
理をワンチップ化できることもあり、レンズ系を含めた
撮像システムを小さく形成することができる。そして、
このような撮像システムは、携帯機器に搭載すると機器
全体を小型化でき都合がよい。特に近年は、携帯電話な
ど通信機能を備えた携帯機器への撮像機能の搭載が始ま
っており、上述のような実施の形態で説明した固体撮像
素子を搭載した携帯機器についても本発明の範囲に含ま
れるものとする。また、以上の説明では、増幅型固体撮
像素子について本発明を適用したが、上部配線層の少な
い固体撮像素子（例えばＣＣＤ型固体撮像素子）につい
ても本発明を適用し得るものであり、このような固体撮
像素子にも本発明の範囲に含まれるものとする。The solid-state image pickup device having the structure described above is particularly effective when combined with an optical system having a short pupil exit distance. In the amplification type solid-state image pickup device, the A / D circuit and the image signal processing may be integrated into one chip, and thus the image pickup system including the lens system can be formed small. And
When such an imaging system is mounted on a portable device, the entire device can be downsized, which is convenient. Particularly in recent years, the mounting of the imaging function on a mobile device such as a mobile phone having a communication function has started, and the mobile device equipped with the solid-state imaging device described in the above embodiments is also within the scope of the present invention. Shall be included. Further, in the above description, the present invention is applied to the amplification type solid-state image pickup device, but the present invention can be applied to a solid-state image pickup device having a small number of upper wiring layers (for example, CCD type solid-state image pickup device). Such solid-state image pickup devices are also included in the scope of the present invention.
【００４１】以上詳述したように本実施の形態によれ
ば、増幅型固体撮像装置において、垂直、水平、あるい
は網状の信号線を光が入射してくる方向にずらすことに
よって画面周辺の感度低下を抑制することができる。ま
た、信号線をずらす際に、ずらし量を工夫することで、
製造コストの増加は最小限になる。また、同時にオンチ
ップカラーフィルタやオンチップマイクロレンズをずら
すことで、 さらに画面周辺の感度低下を抑制できる。ま
た、本実施の形態による撮像素子を用いれば、射出瞳距
離を短くできるため、各種の携帯機器に搭載することに
よって、機器の小型化が可能となり、携帯機器の付加価
値を向上できる。As described above in detail, according to the present embodiment, in the amplification type solid-state imaging device, the vertical, horizontal, or net-like signal lines are shifted in the direction in which light is incident to lower the sensitivity around the screen. Can be suppressed. Also, when shifting the signal line, by devising the shift amount,
The increase in manufacturing costs is minimal. Further, by simultaneously shifting the on-chip color filter and the on-chip microlens, it is possible to further suppress the decrease in sensitivity around the screen. Further, since the exit pupil distance can be shortened by using the image sensor according to the present embodiment, the size of the device can be reduced by mounting it on various mobile devices, and the added value of the mobile device can be improved.
【００４２】[0042]
【発明の効果】以上説明したように本発明の固体撮像素
子によれば、撮像領域の中心部から周辺部に行くに従っ
て各単位画素に対する信号線の相対位置が撮像領域の中
心に近づく方向にずれていることから、撮像領域の周辺
部近傍における斜めの入射光を有効に光電変換手段の受
光部に入射させることができ、受光感度の改善を図るこ
とができる。As described above, according to the solid-state image pickup device of the present invention, the relative position of the signal line with respect to each unit pixel shifts toward the center of the image pickup region from the central portion to the peripheral portion of the image pickup region. Therefore, the oblique incident light in the vicinity of the peripheral portion of the imaging region can be effectively incident on the light receiving portion of the photoelectric conversion means, and the light receiving sensitivity can be improved.
【００４３】また、本発明の製造方法によれば、撮像領
域の中心部から周辺部に行くに従って各単位画素に対す
る信号線の相対位置が撮像領域の中心に近づく方向にず
らして形成することにより、撮像領域の周辺部近傍にお
ける斜めの入射光を有効に光電変換手段の受光部に入射
させることが可能な固体撮像素子を製造することがで
き、受光感度の改善した固体撮像素子を提供できる。Further, according to the manufacturing method of the present invention, the relative position of the signal line with respect to each unit pixel is shifted in the direction approaching the center of the image pickup region from the central portion of the image pickup region to the peripheral portion, whereby It is possible to manufacture a solid-state image sensor capable of effectively allowing oblique incident light in the vicinity of the peripheral part of the image-capturing region to enter the light-receiving section of the photoelectric conversion means, and to provide a solid-state image sensor with improved light-receiving sensitivity.
【００４４】さらに、本発明の携帯機器によれば、搭載
した固体撮像素子が撮像領域の中心部から周辺部に行く
に従って各単位画素に対する信号線の相対位置が撮像領
域の中心に近づく方向にずれていることから、光学系を
小型化した場合にも、撮像領域の周辺部近傍における斜
めの入射光を有効に光電変換手段の受光部に入射させる
ことができ、受光感度の改善を図ることができるため、
固体撮像素子をコンパクトに搭載でき、携帯機器の小型
化を図ることが可能となる。Further, according to the portable device of the present invention, the relative position of the signal line to each unit pixel shifts toward the center of the image pickup area as the mounted solid-state image pickup element goes from the center portion to the peripheral portion of the image pickup area. Therefore, even when the optical system is downsized, the oblique incident light in the vicinity of the peripheral portion of the imaging region can be effectively incident on the light receiving portion of the photoelectric conversion means, and the light receiving sensitivity can be improved. Because you can
The solid-state imaging device can be compactly mounted, and the portable device can be downsized.
【図１】本発明の実施の形態例による固体撮像素子の単
位画素における素子構造を示す部分断面図である。FIG. 1 is a partial cross-sectional view showing a device structure in a unit pixel of a solid-state image sensor according to an embodiment of the present invention.
【図２】図１に示す固体撮像素子のフォトダイオードＰ
Ｄと信号線との平面方向の位置関係を示す平面図であ
る。FIG. 2 is a photodiode P of the solid-state image sensor shown in FIG.
7 is a plan view showing a positional relationship between D and a signal line in a plane direction. FIG.
【図３】図１に示す固体撮像素子の信号線とビアコンタ
クトの一例を示す部分平面図である。3 is a partial plan view showing an example of signal lines and via contacts of the solid-state imaging device shown in FIG.
【図４】図１に示す固体撮像素子のビアコンタクトと信
号線を接続する配線素片の一例を示す部分平面図であ
る。4 is a partial plan view showing an example of a wiring element that connects a via contact and a signal line of the solid-state imaging device shown in FIG.
【図５】図１に示す固体撮像素子のビアコンタクトと信
号線のずれ量が大きい場合の配線素片の形状例を示す部
分平面図である。5 is a partial plan view showing an example of the shape of a wiring element when the amount of deviation between the via contact and the signal line of the solid-state imaging device shown in FIG. 1 is large.
【図６】図１に示す固体撮像素子の製造方法において多
層配線を直下の層を基準として各層の位置合わせを行う
場合の手順を示すフローチャートである。6 is a flow chart showing a procedure for aligning each layer with respect to the layer immediately below the multilayer wiring in the method for manufacturing the solid-state imaging device shown in FIG.
【図７】図１に示す固体撮像素子の製造方法において多
層配線を直下でなく、より下の層を基準として各層の位
置合わせを行う場合の手順を示すフローチャートであ
る。FIG. 7 is a flowchart showing a procedure for aligning each layer based on a lower layer as a reference rather than directly under the multilayer wiring in the method for manufacturing the solid-state imaging device shown in FIG.
【図８】図１に示す固体撮像素子の撮像領域の信号線と
周辺回路の信号線との配線例を示す説明図である。8 is an explanatory diagram showing a wiring example of a signal line in an imaging region of the solid-state imaging device shown in FIG. 1 and a signal line of a peripheral circuit.
【図９】本発明の他の実施の形態例による固体撮像素子
の単位画素における素子構造を示す部分断面図である。FIG. 9 is a partial cross-sectional view showing an element structure in a unit pixel of a solid-state image pickup element according to another embodiment of the present invention.
【図１０】増幅型固体撮像素子の単位画素の回路構成を
示す回路図である。FIG. 10 is a circuit diagram showing a circuit configuration of a unit pixel of the amplification type solid-state imaging device.
【図１１】従来のＣＣＤ型固体撮像素子に対する斜め入
射光の一例を示す部分断面図である。FIG. 11 is a partial cross-sectional view showing an example of obliquely incident light with respect to a conventional CCD type solid-state imaging device.
【図１２】従来の増幅型固体撮像素子に対する斜め入射
光の一例を示す部分断面図である。FIG. 12 is a partial cross-sectional view showing an example of obliquely incident light with respect to a conventional amplification type solid-state imaging device.
ＰＤ……フォトダイオード、４０……シリコン基板、４
１……絶縁膜、４２、４３、４４、４４Ａ、４４Ｂ、５
０Ａ、５０Ｂ……配線層（信号線）、４５……平坦化
膜、４６……カラーフィルタ、４７……オンチップレン
ズ、５２、５６……ビアコンタクト、５４、５８……配
線素片。PD: photodiode, 40: silicon substrate, 4
1 ... Insulating film, 42, 43, 44, 44A, 44B, 5
0A, 50B ... Wiring layer (signal line), 45 ... Flattening film, 46 ... Color filter, 47 ... On-chip lens, 52, 56 ... Via contact, 54, 58 ... Wiring element.
Claims (26)
を含む複数の単位画素を２次元アレイ状に配列した撮像
領域を設けるとともに、前記半導体基板上に各単位画素
の受光用開口部を避ける状態で単位画素の行方向、また
は列方向、または格子状に複数層の信号線を配置した固
体撮像素子において、 前記撮像領域の中心部から周辺部に行くに従って前記各
単位画素に対する前記信号線の相対位置が撮像領域の中
心に近づく方向にずれている、 ことを特徴とする固体撮像素子。1. A state in which a semiconductor substrate is provided with an imaging region in which a plurality of unit pixels including photoelectric conversion elements and gate elements are arranged in a two-dimensional array, and a light receiving opening of each unit pixel is avoided on the semiconductor substrate. In the solid-state imaging device in which the signal lines of the plurality of layers are arranged in the row direction or the column direction of the unit pixel, or in a grid pattern, the relative position of the signal line with respect to each of the unit pixels from the central portion to the peripheral portion of the imaging region. A solid-state image sensor, wherein the position is shifted in a direction of approaching the center of the imaging region.
それぞれ絶縁膜を介して配置されていることを特徴とす
る請求項１記載の固体撮像素子。2. The solid-state imaging device according to claim 1, wherein the semiconductor substrate and the signal lines of a plurality of layers are arranged with an insulating film interposed therebetween.
タクトを介して接続されていることを特徴とする請求項
１記載の固体撮像素子。3. The solid-state image sensor according to claim 1, wherein the gate element and the signal line are connected via a via contact.
タクトおよび配線素片を介して接続されていることを特
徴とする請求項３記載の固体撮像素子。4. The solid-state image sensor according to claim 3, wherein the gate element and the signal line are connected via a via contact and a wiring element.
対位置がずれた方向に長径断面を有して形成され、前記
ビアコンタクトの長径断面により、相対位置のずれた信
号線とビアコンタクトとが接触していることを特徴とす
る請求項３記載の固体撮像素子。5. The via contact is formed so as to have a long diameter cross section in a direction in which the relative position of the signal line is deviated, and the signal line and the via contact deviated in relative position are formed by the long diameter cross section of the via contact. The solid-state imaging device according to claim 3, wherein the solid-state imaging device is in contact with each other.
がずれた方向に長尺に形成され、前記長尺の配線素片に
より、相対位置のずれた信号線と配線素片とが接触し、
前記配線素片を介して信号線とビアコンタクトが接続さ
れていることを特徴とする請求項４記載の固体撮像素
子。6. The wiring element is formed to be long in a direction in which the relative position of the signal line is deviated, and the long wiring element causes the signal line and the wiring element deviated in relative position to move from each other. Contact,
The solid-state imaging device according to claim 4, wherein the signal line and the via contact are connected via the wiring element.
る配線素片の形状が撮像領域の中心部から周辺部に行く
に従って徐々に変化していることを特徴とする請求項６
記載の固体撮像素子。7. The shape of a wiring element connecting the via contact and the signal line is gradually changed from the central portion of the imaging region to the peripheral portion thereof.
The solid-state image sensor according to claim 1.
し、前記信号線は画素一辺の長さの０．５％以下の描画
グリッドに配置され、隣接した信号線間隔の差が１描画
グリッド以下であることを特徴とする請求項１記載の固
体撮像素子。8. The signal line is arranged in a drawing grid of 0.5% or less of the length of one side of a pixel with respect to a drawing grid by a mask drawing machine, and a difference between adjacent signal line intervals is 1 drawing grid or less. The solid-state imaging device according to claim 1, wherein
層、バルクコンタクトのいずれかに対する位置合わせマ
ークを備えていることを特徴とする請求項１記載の固体
撮像素子。9. The solid-state imaging device according to claim 1, wherein all the wiring layers are provided with alignment marks for any one of an element isolation region, a gate layer, and a bulk contact.
て、単位画素行または単位画素列に対応して配置され、
単位画素行または単位画素列から導かれる信号線に接続
される周辺回路を有し、単位画素行または単位画素列か
ら導かれる信号線と前記周辺回路内の信号線とが配線素
片を介して接続されていることを特徴とする請求項１記
載の固体撮像素子。10. A unit pixel row or a unit pixel column is arranged along at least one side of the imaging region,
A peripheral circuit connected to a signal line led from a unit pixel row or a unit pixel column is provided, and the signal line led from the unit pixel row or the unit pixel column and the signal line in the peripheral circuit are connected via a wiring element. The solid-state image pickup device according to claim 1, wherein the solid-state image pickup device is connected.
行くほど大きくなっていることを特徴とする請求項１０
記載の固体撮像素子。11. The shift amount of the signal lines of the plurality of layers is increased toward the upper layer.
The solid-state image sensor according to claim 1.
プレンズとカラーフィルタの少なくとも１つを含む上部
積層物を有し、前記撮像領域の中心部から周辺部に行く
に従って前記各単位画素に対する前記上部積層物の相対
位置が撮像領域の中心に近づく方向にずれていることを
特徴とする請求項１記載の固体撮像素子。12. An upper layered product including at least one of an on-chip lens and a color filter is provided on an upper layer of the signal lines of the plurality of layers, and the unit pixel is provided for each unit pixel from a central portion to a peripheral portion of the imaging region. The solid-state image pickup device according to claim 1, wherein a relative position of the upper laminate is displaced in a direction approaching a center of an image pickup region.
ほど大きくなっていることを特徴とする請求項１２記載
の固体撮像素子。13. The solid-state image pickup device according to claim 12, wherein the amount of displacement of the upper laminate is larger toward the upper layer.
部を有する遮光膜を有し、前記撮像領域の中心部から周
辺部に行くに従って前記各単位画素に対する前記遮光膜
の受光用開口部の相対位置が撮像領域の中心に近づく方
向にずれていることを特徴とする請求項１記載の固体撮
像素子。14. A light-shielding film having a light-receiving opening corresponding to each of said unit pixels, wherein the light-receiving opening of said light-shielding film for each of said unit pixels goes from a central portion of said imaging region to a peripheral portion thereof. The solid-state image pickup device according to claim 1, wherein the relative position is displaced in a direction approaching the center of the image pickup region.
開口部のずれ量が上層に行くほど大きくなっていること
をことを特徴とする請求項１４記載の固体撮像素子。15. The solid-state image sensor according to claim 14, wherein the shift amount between the signal lines of the plurality of layers and the light-receiving opening of the light-shielding film becomes larger toward the upper layer.
子を含む複数の単位画素を２次元アレイ状に配列した撮
像領域を設けるとともに、前記半導体基板上に各単位画
素の受光用開口部を避ける状態で単位画素の行方向、ま
たは列方向、または格子状に複数層の信号線を配置した
固体撮像素子の製造方法において、 前記複数層の信号線を形成する場合に、前記撮像領域の
中心部から周辺部に行くに従って前記各単位画素に対す
る前記信号線の相対位置を撮像領域の中心に近づく方向
にずらして形成する、 ことを特徴とする固体撮像素子の製造方法。16. A state in which a semiconductor substrate is provided with an imaging region in which a plurality of unit pixels including photoelectric conversion elements and gate elements are arranged in a two-dimensional array, and a light receiving opening of each unit pixel is avoided on the semiconductor substrate. In the manufacturing method of the solid-state image sensor in which the signal lines of the plurality of layers are arranged in the row direction of the unit pixel, or the column direction, or the lattice pattern, in the case of forming the signal lines of the plurality of layers, from the central portion of the imaging region. A method of manufacturing a solid-state image sensor, comprising: forming relative positions of the signal lines with respect to the respective unit pixels so as to shift toward a peripheral portion in a direction approaching a center of an image pickup region.
パターンをマスク描画機によって形成する場合に、前記
マスク描画機による描画グリッドに対し、前記信号線は
画素一辺の長さの０．５％以下の描画グリッドに配置
し、隣接した信号線間隔の差を１描画グリッド以下とす
ることを特徴とする請求項１６記載の固体撮像素子の製
造方法。17. When the mask pattern for forming the signal lines of the plurality of layers is formed by a mask drawing machine, the signal line is 0.5% of the length of one side of a pixel with respect to the drawing grid by the mask drawing machine. 17. The method for manufacturing a solid-state image sensor according to claim 16, wherein the solid-state imaging device is arranged in the following drawing grid, and a difference between adjacent signal line intervals is set to 1 drawing grid or less.
層、バルクコンタクトのいずれかに対する位置合わせマ
ークを備え、前記位置合わせマークを基準として各配線
層の位置合わせを行うことを特徴とする請求項１６記載
の固体撮像素子の製造方法。18. The wiring layer is provided with alignment marks for any one of an element isolation region, a gate layer, and a bulk contact, and each wiring layer is aligned with the alignment mark as a reference. Item 17. A method for manufacturing a solid-state image sensor according to Item 16.
行くほど大きくしたことを特徴とする請求項１６記載の
固体撮像素子。19. The solid-state image pickup device according to claim 16, wherein the shift amount of the signal lines of the plurality of layers is increased toward the upper layer.
子を含む複数の単位画素を２次元アレイ状に配列した撮
像領域を設けるとともに、前記半導体基板上に各単位画
素の受光用開口部を避ける状態で単位画素の行方向、ま
たは列方向、または格子状に複数層の信号線を配置した
固体撮像素子を搭載した携帯機器において、 前記固体撮像素子は、その撮像領域の中心部から周辺部
に行くに従って前記各単位画素に対する前記信号線の相
対位置が撮像領域の中心に近づく方向にずれている、 ことを特徴とする携帯機器。20. A state in which a semiconductor substrate is provided with an imaging region in which a plurality of unit pixels including photoelectric conversion elements and gate elements are arranged in a two-dimensional array, and a light receiving opening of each unit pixel is avoided on the semiconductor substrate. In a mobile device equipped with a solid-state image sensor in which signal lines of a plurality of layers are arranged in a row direction, a column direction, or a lattice pattern of unit pixels, the solid-state image sensor goes from the central part of the imaging area to the peripheral part. According to the above, the relative position of the signal line with respect to each of the unit pixels is shifted in a direction approaching the center of the imaging region.
くとも一辺に沿って、単位画素行または単位画素列に対
応して配置され、単位画素行または単位画素列から導か
れる信号線に接続される周辺回路を有し、単位画素行ま
たは単位画素列から導かれる信号線と前記周辺回路内の
信号線とが配線素片を介して接続されていることを特徴
とする請求項２１記載の携帯機器。21. The solid-state image sensor is arranged corresponding to a unit pixel row or a unit pixel column along at least one side of an image capturing area, and is connected to a signal line led from the unit pixel row or the unit pixel column. 22. The mobile device according to claim 21, further comprising a peripheral circuit, wherein a signal line guided from a unit pixel row or a unit pixel column and a signal line in the peripheral circuit are connected via a wiring element. .
号線のずれ量が上層に行くほど大きくなっていることを
特徴とする請求項２１記載の携帯機器。22. The mobile device according to claim 21, wherein in the solid-state image pickup device, a shift amount of the signal lines of the plurality of layers becomes larger toward an upper layer.
号線の上層にオンチップレンズとカラーフィルタの少な
くとも１つを含む上部積層物を有し、前記撮像領域の中
心部から周辺部に行くに従って前記各単位画素に対する
前記上部積層物の相対位置が撮像領域の中心に近づく方
向にずれていることを特徴とする請求項２１記載の携帯
機器。23. The solid-state imaging device has an upper laminate including at least one of an on-chip lens and a color filter on an upper layer of the signal lines of the plurality of layers, and goes from a central portion of the imaging region to a peripheral portion thereof. 22. The mobile device according to claim 21, wherein the relative position of the upper laminate with respect to each of the unit pixels is displaced in a direction approaching the center of the imaging region.
ほど大きくなっていることを特徴とする請求項２４記載
の携帯機器。24. The mobile device according to claim 24, wherein the shift amount of the upper laminate increases as it goes to the upper layer.
に対応する受光用開口部を有する遮光膜を有し、前記撮
像領域の中心部から周辺部に行くに従って前記各単位画
素に対する前記遮光膜の受光用開口部の相対位置が撮像
領域の中心に近づく方向にずれていることを特徴とする
請求項２１記載の携帯機器。25. The solid-state imaging device includes a light-shielding film having a light-receiving opening corresponding to each of the unit pixels, and the light-shielding film for each of the unit pixels is located from a central portion of the imaging region to a peripheral portion thereof. 22. The portable device according to claim 21, wherein the relative position of the light receiving opening of the is shifted toward the center of the imaging region.
開口部のずれ量が上層に行くほど大きくなっていること
をことを特徴とする請求項２６記載の携帯機器。26. The portable device according to claim 26, wherein the shift amount between the signal lines of the plurality of layers and the light-receiving opening of the light-shielding film becomes larger toward the upper layer.
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