JP2003273311A - Semiconductor device and manufacturing method therefor, circuit substrate, and electronic apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve thinness and reliability for a semiconductor device using a lead frame. <P>SOLUTION: A semiconductor device includes a lead 20 which has a first and a second part 22 and 24, a semiconductor chip 30 which is electrically connected to the first part 22 through a wire 34, and a sealing part 40 which covers at least one part of the semiconductor chip 30 and which supports the lead 20. The sealing part 40 is provided on the surface side where the wire 34 of the first part 22 is formed. The lead 20 bends toward the side of the sealing part 40 at the part which extends to the outer side of the sealing part 40 from the first part 22, and the second part 24 is located at the opposite side of the first part 22 side of the sealing part 40. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and its manufacturing method, a circuit board, and an electronic device.

[0002]

BACKGROUND OF THE INVENTION As a package form of a semiconductor device, Q
There is known a FP (Quad Flat Package) in which a semiconductor chip is mounted on a die pad of a lead frame and the semiconductor chip and inner leads are sealed with resin or the like. On the other hand, a stacked semiconductor device in which a plurality of semiconductor devices are stacked has been developed, but in order to realize such a semiconductor device, a thin package and high reliability are required.

However, conventionally, in the encapsulation process, the encapsulation portions have been provided on the upper and lower sides of the lead frame with substantially uniform thickness, so that there is a limit to the thinness of the package. In addition, if the sealing portion on either the upper or lower side of the lead frame is thin, a part of the sealing portion may be missing during the manufacturing process, which may impair reliability.

The present invention is intended to solve the above-described problems, and an object thereof is to improve the thinness and reliability of a semiconductor device using a lead frame.

[0005]

(1) A semiconductor device according to the present invention includes a semiconductor chip electrically connected to a lead having first and second parts and a wire to the first part. And a sealing portion which covers at least a part of the semiconductor chip and supports the leads,
The sealing portion is provided on the surface of the first portion on which the wire is formed, and the lead is bent toward the sealing portion at a portion extending from the first portion to the outside of the sealing portion. Therefore, the second portion may be arranged on the opposite side of the sealing portion from the first portion side.

According to the present invention, the sealing portion is the first portion of the lead.
Since it is provided on the surface side where the wire is formed in the part (1), it is possible to reduce the thickness of the entire sealing portion as compared with the case where it is provided on both surface sides of the first part. Further, since the sealing portion is provided on the one surface side of the lead, even if the sealing portion is thick enough to prevent chipping of the sealing portion, the sealing portion as a whole can be thinned. Therefore, it is possible to improve the thinness and reliability of the semiconductor device.

Further, the lead is bent toward the sealing portion at a portion extending from the first portion to the outside of the sealing portion, and the respective portions of the lead are arranged on both surface sides of the sealing portion. . Therefore, electrical connection can be achieved from both sides of the semiconductor device.

(2) This semiconductor device may further include a die pad supporting the semiconductor chip.

(3) In this semiconductor device, the die pad may support the semiconductor chip on the side having an electrode.

According to this, in the height direction of the sealing portion, the rising height of the wire, the thickness of the die pad,
Are duplicated, the semiconductor device can be made thinner even if it has a die pad.

(4) In this semiconductor device, the die pad may support the semiconductor chip on the side opposite to the surface having the electrodes.

(5) In this semiconductor device, a surface of the die pad opposite to the semiconductor chip may be exposed from the sealing portion.

As a result, the heat dissipation of the semiconductor device can be improved.

(6) In this semiconductor device, the die pad may enter the sealing portion.

According to this, since the die pad enters into the sealing portion, it is possible to secure a large marking area of the semiconductor device, for example.

(7) This semiconductor device may further include a substrate which is provided on the side of the first portion of the sealing portion and supports the semiconductor chip.

(8) In this semiconductor device, the second
The portion may extend in the direction of the outside of the sealing portion on the side opposite to the first portion side of the sealing portion.

(9) In this semiconductor device, the second
The portion may extend inward of the sealing portion on the side opposite to the first portion side of the sealing portion.

(10) In a semiconductor device according to the present invention, a semiconductor device including at least one of the above semiconductor devices is stacked, and a surface of the lead exposed from the sealing portion of the first portion. And the second portion of the lead are used as an electrical connection.

According to this, it is possible to realize a thin and highly reliable stacked type semiconductor device.

(11) The semiconductor device is mounted on the circuit board according to the present invention.

(12) An electronic device according to the present invention has the above semiconductor device.

(13) In the method of manufacturing a semiconductor device according to the present invention, the semiconductor chip is formed into the first lead of the lead frame.
Wire bonding step of electrically connecting via a wire, a sealing step of covering at least a part of the semiconductor chip and forming a sealing portion for supporting the lead, and bending forming of the lead. And a forming step, wherein the sealing portion is provided on a surface side of the first portion on which the wire is formed, and the lead is formed into the first portion in the forming step. The second portion of the lead is arranged on the side opposite to the first portion side of the sealing portion by bending the portion extending outward from the sealing portion to the sealing portion side.

According to the present invention, the sealing portion is the first lead
Since it is provided on the surface side of the wire on which the wire is formed, it is possible to reduce the thickness of the entire sealing portion as compared with the case where it is provided on both surface sides of the first part. Further, since the sealing portion is provided on one surface side of the lead, even if the sealing portion is thick enough to prevent chipping, the entire sealing portion can be thinned.
Therefore, it is possible to manufacture a semiconductor device that is thin and has improved reliability.

Further, by bending the lead toward the sealing portion at the portion extending from the first portion to the outside of the sealing portion, each portion of the lead is arranged on both surface sides of the sealing portion. Therefore, electrical connection can be achieved from both sides of the semiconductor device.

(14) In this method of manufacturing a semiconductor device, the lead frame may have a die pad, and the method may further include supporting the semiconductor chip on the die pad before the wire bonding step.

(15) In this method of manufacturing a semiconductor device, the semiconductor chip may be supported by the die pad on the side having the electrodes.

According to this, in the height direction of the sealing portion, the rising height of the wire, the thickness of the die pad,
Are duplicated, the semiconductor device can be made thinner even if it has a die pad.

(16) In this method of manufacturing a semiconductor device, the semiconductor chip may be supported on the die pad on the side opposite to the surface having electrodes.

(17) In this method of manufacturing a semiconductor device, the surface of the die pad opposite to the semiconductor chip may be exposed from the sealing portion in the sealing step.

As a result, the heat dissipation of the semiconductor device can be improved.

(18) In this method of manufacturing a semiconductor device, further including shifting the die pad in either direction from the first portion of the lead before the wire bonding step, and the encapsulation is performed. In the step, the die pad may be inserted into the sealing portion.

According to this, since the die pad is inserted into the sealing portion, for example, a wide marking area of the semiconductor device can be secured.

(19) This method of manufacturing a semiconductor device may further include providing a substrate on the lead frame and supporting the semiconductor chip on the substrate before the wire bonding step.

(20) This semiconductor device manufacturing method may further include removing the substrate after the sealing step.

As a result, a thinner semiconductor device can be manufactured.

(21) In this method of manufacturing a semiconductor device, in the encapsulating step, the recess formed in one of the first and second molds is formed with the wire of the first portion. The lead frame may be set between the first and second molds so as to be arranged on the surface side, and the recess may be filled with the material of the sealing portion.

(22) In this method of manufacturing a semiconductor device, in the forming step, the lead is formed into the second layer.
Is a side opposite to the first portion side of the sealing portion,
You may shape so that it may extend in the direction of the outer side of the said sealing part.

(23) In this method of manufacturing a semiconductor device, in the forming step, the lead is formed into the second layer.
Is a side opposite to the first portion side of the sealing portion,
You may shape so that it may extend inward of the said sealing part.

[0040]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings. However, the present invention is not limited to the following embodiments.

(First Embodiment) FIGS. 1 to 5 are views for explaining the first embodiment of the present invention. FIG. 1 is a diagram showing a lead frame used in this embodiment.
2 is a diagram for explaining the wire bonding process, FIG. 3 is a diagram for explaining the sealing process, and FIG. 4 is a diagram for explaining the lead forming process.

The lead frame 10 is formed by processing a copper-based or iron-based plate material. As the processing method, chemical etching or mechanical punching is applied. The lead frame 10 has an outer frame 12. The outer frame 12 often has a rectangular shape, and the outer frame 12 has the outer shape of the lead frame 10.

At least one hole (jig hole) 13 is formed in the outer frame 12. Thereby, the lead frame 10 can be easily positioned with respect to the mold (for example, the first and second molds for sealing). A plurality of holes 13 may be formed at both ends of the outer frame 12. In that case, the hole 13 formed at one end of the outer frame 12 (for example, the left end in FIG. 1)
And the hole 13 formed in the other end (for example, the right end in FIG. 1) are formed at positions displaced in the length direction of the outer frame 12 (for example, the vertical direction in FIG. 1). Is preferred. By doing so, the lead frame 10 can be set in the mold without making a mistake in the orientation.

The lead frame 10 has at least one die pad (or island) 14 (one in FIG. 1, but generally more than one). The die pad 14 is
It is a portion on which electronic components such as the semiconductor chip 30 are mounted, and is often rectangular (rectangular or square). The die pad 14 is a suspension pin (tie bar or suspension lead) 1.
It is supported by the outer frame 12 by 6.

The lead frame 10 includes a plurality of leads 20.
Have. The lead 20 extends toward the die pad 14. Specifically, the lead 20 extends toward each side of the rectangular die pad 14. In the example shown in FIG.
The leads 20 are arranged on the same plane as the virtual plane on which the die pad 14 is arranged. In other words, the die pad 14 is arranged at the same height as the surface of the lead 20 without being vertically shifted with respect to the lead 20.

The lead 20 includes a first portion 22 and a second portion 22,
With 24. The first portion 22 may be an end of the lead 20 on the die pad 14 side. The second part 24 is
It may be an end portion of the lead 20 on the outer frame 12 side. The first portion 22 is arranged inside the sealing portion 40, which is indicated by a chain double-dashed line in FIG.
Is a portion electrically connected (see FIG. 2). The second portion 24 is arranged outside the sealing section 40 in plan view.
The first portion 22 may be called an inner lead and the second portion 24 may be called an outer lead.

At this point, the leads 20 adjacent to each other are connected. In the example shown in FIG. 1, the leads 20 adjacent to each other
Are connected at multiple positions (two positions in FIG. 1).

The first connecting portion 26 connects the intermediate portions of the leads 20. The first connecting portion 26 is arranged outside the sealing portion 40. The first connecting portion 26 is called a dam bar (or tie bar) and is used to prevent the sealing material from leaking between the leads 20 adjacent to each other.

The second connecting portion 28 connects the second portions 24 of the leads 20. The second connecting portion 28 extends in a direction orthogonal to the leads 20 and collectively supports the plurality of leads 20. The second connecting portion 28 may be an end portion of the leads 20. By providing the second connecting portion 28, it is possible to prevent the lead 20 from bending in the lateral direction (direction of the adjacent lead) in the forming process, for example. Therefore, it is possible to prevent the leads 20 adjacent to each other from short-circuiting and perform the forming in a stable state. The first and second connecting portions 26 and 28 are cut after the sealing step.

Although the lead frame 10 described above is used in the present embodiment, the form of the lead frame is not limited to this.

First, as shown in FIG. 2, a die bonding process is performed. That is, the semiconductor chip 30 is supported on the die pad 14 of the lead frame 10. Note that FIG.
2 shows a sectional view taken along the line II-II of the lead frame in FIG. 1, and the outer frame 12 of the lead frame 10 is omitted.

The shape of the semiconductor chip 30 is often a rectangular parallelepiped (including a cube). In the semiconductor chip 30,
An integrated circuit is formed. The semiconductor chip 30 has at least one (often a plurality of) electrodes 32 electrically connected to the integrated circuit. The electrode 32 may be arranged at the end of the surface of the semiconductor chip 30 along two or four sides of the outer shape (two opposite sides in FIG. 2), or may be formed at the center of the surface. . The electrode 32 is often formed of an aluminum-based or copper-based metal. In addition, a passivation film (not shown) is formed on the semiconductor chip 30 so as to cover the ends of the semiconductor chip 30 while avoiding the central part. The passivation film can be formed of, for example, SiO ₂ , SiN, polyimide resin, or the like.

In this embodiment, the semiconductor chip 30 is
The die pad 14 is supported on the side opposite to the surface having the electrodes 32. In that case, both may be adhered by an adhesive material (not shown). If a material having a high thermal conductivity (for example, a metal paste such as silver) is used as the adhesive material, the heat of the semiconductor chip 30 is easily transferred to the die pad 14, and the heat dissipation can be improved.

Next, a wire bonding process is performed. That is, the electrode 32 of the semiconductor chip 30 and the first portion 22 of the lead 20 are electrically connected via the wire 34. The wire 34 is a conductive wire (for example, a gold wire). This step may be performed by applying a ball bonding method.
For example, the tip of the wire 34 drawn out of the tool (for example, a capillary) is melted into a ball shape, and the tip is thermocompression bonded to the electrode 32. Then, pull out the wire 34 toward the lead 20, and use the tool to pull the wire 34.
Is partially thermocompression-bonded to the first portion 22. During thermocompression bonding,
It is preferable to use ultrasonic vibration together. When the wire 34 is first bonded to the electrode 32, bumps are provided on the electrode 32 as shown in FIG. If possible, connect the wire 34 to the first portion 22 of the lead 20.
May be bonded first. In that case, the first
Bumps are provided on the portion 22 of.

As shown in FIG. 3, a sealing step (molding step) is performed. In this embodiment, the first and second molds 50 and 52 are used. In the example shown in FIG. 3, the first die 50 is the upper die on the semiconductor chip 30 side and the second die 52 is the upper die.
Is a lower mold on the die pad 14 side. And the first mold 5
At 0, a recess 54 for filling the sealing material is formed. The depth of the recess 54 is formed deeper than the loop height of the wire 34. When molding a plurality of semiconductor chips 30 at the same time, the first die 50 has
A plurality of recesses 54 are formed. On the other hand, the region of the second mold 52 facing the recess 54 of the first mold 50 is preferably formed on a flat surface. By doing so, a space (cavity) filled with the sealing material can be formed only on one surface side of the lead frame 10. Further, in the present embodiment, the die pad 14 is not shifted in the vertical direction with respect to the lead 20, so the die pad 14 is in contact with the second die 52. At least one of the first and second molds 50 and 52 is provided with a predetermined passage (a groove forming a runner, a gate, etc.) for pouring the sealing material.

After the lead frame 10 is set, the recess 54 is filled with a sealing material. The sealing material is often a resin (for example, a thermosetting resin). The fluidity of the sealing material is increased by applying pressure and heat from the solid state. The sealing material is the semiconductor chip 30, the wire 34.
And the first portion 22 of the lead 20 is sealed. The sealing material flows between the leads 20 adjacent to each other to the first connecting portion 26. A gate (not shown) leading to the recess 54
Is provided on the semiconductor chip 30 side (upper side) than the lead frame 10.

Thus, the sealing portion 40 can be formed on the one surface side of the lead frame 10. In other words, the sealing portion 40 is a virtual plane on which the die pad 14 and the leads 20 are arranged (for example, the surface of the second die 52 in FIG. 3).
Is provided on one surface side. The die pad 14 and the leads 20 are exposed from the sealing section 40. For more information,
The die pad 14 is exposed from the sealing section 40 on the surface opposite to the mounting surface of the semiconductor chip 30. The lead 20 is exposed from the sealing portion 40 on the surface of the first portion 22 opposite to the surface on which the wire 34 is formed.

After that, a lead forming step is performed. Before or after this step, a burr removal step, an exterior treatment (plating) step, a trimming step, a marking step, etc. may be performed.

For example, after the sealing step, the first connecting portion 26 is cut (dam bar cut) as a trimming step,
The burr of the sealing portion 40 may be removed. The burrs of the sealing portion 40 may be removed at the same time when the first connecting portion 26 is cut, and the lead frame 10 is exterior-treated. By performing electrolytic plating, the lead frame 10
A metal coating (not shown) is formed on the portion exposed from the sealing portion 40 of. If the plurality of leads 20 are connected to the outer frame 12, electrolytic plating can be performed via the outer frame 12. Then, the lead 20 is cut from the outer frame 12. In that case, the leads 20 adjacent to each other have the second connecting portion 28.
The forming process of the plurality of leads 20 may be performed in the state of being connected by. If the die pad 14 is supported by the outer frame 12 by the hanging pins 16, by handling one lead frame 10, the leads 20 of the plurality of sealing portions 40 can be formed simultaneously.

In the present embodiment, the bent shape of the surface mount type lead is formed. That is, forming is performed so that the surface of the second portion 24 is parallel to the mounting surface of the member (for example, the circuit board). As a modified example, the bending shape of the lead for the insertion mounting type, that is, the second portion 24 may be formed so as to extend perpendicularly to the mounting surface of the member.

As shown in FIG. 4, the lead 20 may be formed into a gull wing shape. That is, QFP (Quad F
The lead shape may be the same as the shape called a lat package). However, as shown in FIG. 4, in the present embodiment, the lead 20 is bent toward the semiconductor chip 30 (sealing portion 40) side at the portion extending from the first portion 22 to the outside of the sealing portion 40. That is, the lead 20 has the first portion 2
4 extends to the outside of the sealing portion 40, and is bent to the sealing portion 40 side (the upper side in FIG. 4) outside the sealing portion 40. The second portion 24 is arranged on the opposite side of the sealing portion 40 from the first portion 22 side and extends in the direction outside the sealing portion 40. The forming process can be performed using a mold, a roller, a punch, or the like. In addition,
The bent shape of the lead 20 is not limited to this.

After the forming process, the leads 20 adjacent to each other are formed.
The second connecting portion 28 connecting the two is cut. Further, the hanging pin 16 that connects the sealing portion 40 and the outer frame 12 is also cut. After that, a semiconductor device is manufactured through an inspection process.

In FIG. 5, the semiconductor device according to this embodiment is mounted on a circuit board. The circuit board 60 may be a motherboard. An organic substrate is generally used for the circuit board 60, and a desired wiring pattern 62 of copper or the like is formed. Lead 20 of semiconductor device 1
The second portion 24 and the wiring pattern 62 are electrically connected. For example, both may be joined via the brazing material 64.

As shown in FIG. 5, the semiconductor device 1 includes a lead 20, a semiconductor chip 30, and a sealing portion 40. The lead 20 has first and second portions 22 and 24. The semiconductor chip 30 has a wire 3 on the first portion 22.
It is electrically connected via 4. And the sealing part 4
0 covers at least a part of the semiconductor chip 30 (in FIG. 5, the entire semiconductor chip is sealed) and supports the leads 20.

A sealing portion 40 is provided on the surface of the first portion 22 on which the wires 34 are formed. And the first
The surface of the portion 22 opposite to the wire 34 is exposed from the sealing portion 40. The second portion 24 of the lead 20 is arranged on the opposite side of the sealing portion 40 from the first portion 22.
The bent shape of the lead 20 is as described above.
As shown in FIG. 5, if the second portion 24 is exposed, in a state where the semiconductor device 1 is mounted on the circuit board 60,
The electrical inspection of the semiconductor device 1 can be performed via the second portion 24.

The semiconductor device according to the present embodiment includes a structure derived from any of the specific items selected from the above-described manufacturing method, and the effects thereof have the above-described effects. The semiconductor device according to the present embodiment includes one manufactured by the manufacturing method described above.

According to the semiconductor device of this embodiment,
The encapsulation portion 40 is the wire 3 of the first portion 22 of the lead 20.
Since it is provided on the side where the surface 4 is formed, the first portion 22
It is possible to reduce the thickness of the entire sealing portion 40 as compared with the case where the sealing portion 40 is provided on both surface sides. Further, since the sealing portion 40 is provided on one surface side of the lead 20, even if the sealing portion 40 is thick enough to prevent chipping of the sealing portion 40, the sealing portion 40 can be made thin as a whole. Therefore, it is possible to improve the thinness and reliability of the semiconductor device.

Further, the lead 20 is bent toward the sealing portion 40 at a portion extending from the first portion 22 to the outside of the sealing portion 40, and the leads 20 are provided on both surface sides of the sealing portion 40. Portions (first and second portions 22, 24) are arranged. Therefore, electrical connection can be achieved from both sides of the semiconductor device.

Further, since the lead 20 extends in the height direction toward the sealing portion 40 side, the space in the height direction of the semiconductor device can be effectively used and the length of the lead 20 can be maintained to some extent. . That is, the stress relaxation function of the lead 20 can be sufficiently ensured.

The present invention is not limited to this embodiment but can be applied to various forms. In the following description of the embodiments, matters common to other embodiments (configurations, actions, functions and effects) and matters that can be assumed from the other embodiments will be omitted. The present invention also includes items achieved by combining a plurality of embodiments.

(Second Embodiment) FIG. 6 is a diagram for explaining the second embodiment of the present invention, showing a semiconductor device. In the present embodiment, the die pad 74 is embedded in the sealing section 40. That is, the die pad 74
Are not exposed from the sealing portion 40.

The die pad 74 is shifted to the mounting surface side of the semiconductor chip 30. Specifically, by bending the hanging pin toward the semiconductor chip 30, the surface of the die pad 74 is shifted toward the semiconductor chip 30 side rather than the first portion 22 of the lead 20. It can be said that the die pad 74 is upset on the mounting surface side of the semiconductor chip 30.

The step of shifting the die pad 74 is performed before mounting the semiconductor chip 30. Lead frame 10
The die pad 74 may be simultaneously shifted at the time of processing. In the sealing step, the sealing material is filled between the die pad 74 and the second die, so that the die pad 74 enters the sealing portion 40.

According to this, the die pad 74 is sealed by the sealing portion 4.
Since it enters 0, a large marking area of the semiconductor device can be secured, for example.

(Third Embodiment) FIG. 7 is a diagram for explaining the third embodiment of the present invention, and is a diagram showing a semiconductor device. In this embodiment, the bent shape of the lead 80 is different from that of the first embodiment.

The second portion 84 of the lead 80 is the sealing portion 4
On the side opposite to the first portion 82 of 0, it extends inward of the sealing portion 40. The second portion 84 is arranged in a region substantially overlapping the first portion 82 in the plan view of the sealing section 40. The portion of the lead 80 outside the sealing portion 40 is bent into a J-shape (or an inverted J-shape) or an L-shape (or an inverted L-shape).

According to this, since the electrical connection portions can be arranged in the regions which substantially overlap on both sides of the semiconductor device, it is easy to stack a plurality of semiconductor devices.

(Fourth Embodiment) FIGS. 8 and 9 are views for explaining a fourth embodiment of the present invention, showing a semiconductor device. In this embodiment, a plurality of semiconductor devices are stacked. This semiconductor device is a three-dimensional mounting type (stacked type) semiconductor device. Note that the following example is an example of a stacked mode of a semiconductor device, and this embodiment is not limited to this example.

In the example shown in FIG. 8, the semiconductor device 1 described above is used.
The semiconductor device 3 (see the third embodiment) and the semiconductor device 3 (see the first embodiment) are stacked. For example, at least one semiconductor device 3 may be mounted on the semiconductor device 1 (the number is one in FIG. 8 but may be two or more). In the semiconductor device 3, the first and second portions 82 and 84 are arranged in a region that substantially overlaps with each other in plan view, so that the plurality of semiconductor devices 3 can be easily stacked.

In the example shown in FIG. 8, the second portion 84 of the semiconductor device 3 and the first portion 22 of the semiconductor device 1 are electrically connected. That is, the second portion (outer lead) of the lead of each semiconductor device has the same direction (see FIG. 8).
It is arranged facing down). In other words, the surfaces of the respective semiconductor chips having the electrodes are arranged in the same direction (downward in FIG. 8). The leads may be electrically connected by interposing a brazing material, for example.

As a modification, the first portion 82 of the semiconductor device 3 and the first portion 22 of the semiconductor device 1 may be electrically connected. That is, the semiconductor device 3 may be mounted on the semiconductor device 1 with the vertical direction opposite to that of the configuration shown in FIG.

When laminating a plurality of semiconductor devices 3, the semiconductor devices 3 mounted on the semiconductor device 1 may be laminated in the same direction or in different directions. The second portion 24 of the semiconductor device 1 may be electrically connected to the circuit board.

In the example shown in FIG. 9, another semiconductor device 5 is stacked on the semiconductor device 1. In the semiconductor device 5, a pad 90 is formed instead of the lead. Other forms of the semiconductor device 5 may be the same as the semiconductor device 1. The pad 90 is, for example, the lead 20 of the semiconductor device 1.
Is cut off outside the sealing portion 40 to leave the first portion 22
May be This semiconductor device has a QFN (Quad Fla
t Non-leaded Package). The pad 90 is exposed from the sealing portion 40 on the side opposite to the surface on which the wire 34 is formed. The pad 90 and the first portion 22 of the semiconductor device 1 are electrically connected. In the example shown in FIG. 9, since the facing surfaces of the semiconductor devices 1 and 5 are flat, the electrical connection between the two can be easily and stably achieved.

According to this, it is possible to realize a thin and highly reliable stacked type semiconductor device.

(Fifth Embodiment) FIGS. 10 and 11
FIG. 10 is a diagram illustrating a fifth embodiment of the present invention, FIG. 10 is a diagram showing an arrangement of semiconductor chips and die pads, and FIG. 11 is a diagram showing a semiconductor device. In the present embodiment, the die pad 104 supports the semiconductor chip 30 on the side having the electrodes 32.

As shown in FIG. 10, the planar shape of the die pad 104 is smaller than the planar shape of the semiconductor chip 30. The die pad 104 is arranged at a position avoiding the electrode 32. For example, the die pad 104 has a plurality of electrodes 32.
It is placed inside the area surrounded by. Die pad 104
May be rectangular, and is supported by an outer frame (not shown) by hanging pins 106. The hanging pin 106 is
It is preferable to bend it into a predetermined shape so as to avoid a short circuit with the semiconductor chip 30. In the wire bonding step, it is preferable to set the semiconductor chip 30 on a stage (not shown) with the semiconductor chip 30 supported by the die pad 104.

As shown in FIG. 11, the die pad 104
May be formed with a thickness exceeding the apex of the loop of the wire 34. By doing this, for example, in the sealing step,
Since the surface of the die pad 104 can be brought into contact with the surface of the recess of the first die, part of the die pad 104 (the surface opposite to the mounting surface of the semiconductor chip) can be exposed. As a modification, the die pad 104 is made of the wire 3
It may be formed with a thickness not exceeding the apex of the loop of No. 4.
Further, the die pad 104 may be allowed to enter the sealing portion 40 without being exposed from the sealing portion 40.

In the example shown in FIG. 11, the die pad 104 is used.
Is formed thicker than other portions of the lead frame (for example, the leads), but they may be the same.

According to this, in the height direction of the sealing portion 40, the rising height of the wire 34 and the die pad 10 are increased.
4 and the thickness of 4 overlap, the semiconductor device can be made thinner even when the die pad 104 is provided.

(Sixth Embodiment) FIGS. 12 to 16 show
It is a figure explaining the 6th Embodiment of this invention. In this embodiment, the lead frame 110 without the die pad is used.
A semiconductor device is manufactured using (including the lead 120). Since the lead frame 110 does not have a die pad, the hanging pins may be omitted. Other forms may be the same as the lead frame 10 described in the first embodiment.

In this embodiment, the lead frame 110 is used.
The substrate 130 is provided on the substrate. The substrate 130 may be an organic flexible substrate (for example, a film or tape). If the substrate 130 can control the development and reduction of the adhesive force of, for example, an ultraviolet curable resin, the substrate 130 is attached to the lead frame 11 in a subsequent step (see FIG. 14).
It can be easily peeled off from scratch.

The substrate 130 may be provided on the lead frame 110 so as to support the leads 120 (eg, the first portions 122). The planar shape of the substrate 130 may be rectangular and the shape is not limited.

Then, the semiconductor chip 30 is supported on the substrate 130. The semiconductor chip 30 is arranged with the side opposite to the surface having the electrodes 32 facing the substrate 130. In that case,
The semiconductor chip 30 may be fixed by the adhesive force of the substrate 130 itself, or the semiconductor chip 30 may be fixed by interposing an adhesive material.

After performing the wire bonding process, a sealing process is performed as shown in FIG. For example, the substrate 130 may contact the second mold 52, which has a substantially flat surface. By providing the substrate 130 on the lead frame 110 so as to include the planar shape of the sealing portion 40, it is possible to prevent the sealing material from adhering to the second mold 52.

After the sealing step, the substrate 130 may be removed as shown in FIG. The substrate 130 may be peeled off from the lead frame 110 by reducing the adhesive force of the substrate 130. If the substrate 130 is an ultraviolet curable resin, the adhesive force of the substrate 130 can be easily reduced by irradiating it with ultraviolet rays, so that the substrate 130 can be easily peeled off.

After that, a predetermined process (forming process or the like) is performed, and the semiconductor device shown in FIG. 15 can be manufactured. Part of the semiconductor chip 30 (the side opposite to the surface having the electrodes 32) is exposed from the sealing section 40. According to this, since the thickness of the die pad can be omitted, the semiconductor device can be made thinner.

As a modification, as shown in FIG. 16, the lead frame 110 may be left on the substrate 140.
That is, this semiconductor device includes the substrate 140 that supports the semiconductor chip 30. The substrate 140 is provided on the first portion 22 side of the sealing section 40. If the substrate 140 is thinner than the thickness of a general die pad, the semiconductor device can be made thinner.

The substrate 140 is preferably made of an insulating material. By doing so, even if the lead frame 110 is brought into contact with the lead frame 110, short-circuiting of the leads 120 can be prevented. The substrate 140 may be formed of an organic or inorganic material. For example, the substrate 140 may be a ceramic substrate or a glass substrate. If the substrate 140 is made of a hard material (for example, a material harder than the lead frame), the wire bonding process can be performed in a stable state.

As an electronic apparatus having the semiconductor device according to the embodiment of the present invention, FIG. 17 shows a notebook personal computer 1000, and FIG. 18 shows a mobile phone 20.
00 is shown.

The present invention is not limited to the above-mentioned embodiment, but various modifications can be made. For example, the present invention includes configurations that are substantially the same as the configurations described in the embodiments (for example, configurations having the same function, method and result, or configurations having the same purpose and result). Further, the invention includes configurations in which non-essential parts of the configurations described in the embodiments are replaced. Further, the present invention includes a configuration having the same effects as the configurations described in the embodiments or a configuration capable of achieving the same object. Further, the invention includes configurations in which known techniques are added to the configurations described in the embodiments.

[Brief description of drawings]

FIG. 1 is a diagram showing a lead frame used in a first embodiment of the present invention.

FIG. 2 is a diagram illustrating a method for manufacturing the semiconductor device according to the first embodiment of the present invention.

FIG. 3 is a diagram for explaining the manufacturing method for the semiconductor device according to the first embodiment of the present invention.

FIG. 4 is a diagram illustrating a method for manufacturing the semiconductor device according to the first embodiment of the present invention.

FIG. 5 is a diagram illustrating a semiconductor device and a circuit board according to a first embodiment of the present invention.

FIG. 6 is a diagram showing a semiconductor device according to a second embodiment of the present invention.

FIG. 7 is a diagram showing a semiconductor device according to a third embodiment of the present invention.

FIG. 8 is a diagram showing a semiconductor device according to a fourth embodiment of the present invention.

FIG. 9 is a diagram showing a semiconductor device according to a fourth embodiment of the present invention.

FIG. 10 is a diagram illustrating a semiconductor device and a manufacturing method thereof according to a fifth embodiment of the present invention.

FIG. 11 is a diagram showing a semiconductor device according to a fifth embodiment of the present invention.

FIG. 12 is a diagram illustrating a method for manufacturing a semiconductor device according to a sixth embodiment of the present invention.

FIG. 13 is a diagram illustrating a method for manufacturing a semiconductor device according to a sixth embodiment of the present invention.

FIG. 14 is a diagram illustrating a method for manufacturing a semiconductor device according to a sixth embodiment of the present invention.

FIG. 15 is a diagram showing a semiconductor device according to a sixth embodiment of the present invention.

FIG. 16 is a diagram showing a semiconductor device of a modified example of the sixth exemplary embodiment of the present invention.

FIG. 17 is a diagram showing an electronic device having a semiconductor device according to an embodiment of the present invention.

FIG. 18 is a diagram showing an electronic device having a semiconductor device according to an embodiment of the present invention.

[Explanation of symbols]

10 lead frame 14 die pad 20 leads 22 First Part 24 Second part 30 semiconductor chips 32 electrodes 34 wires 40 Sealing part Fifty first mold 52 Second type 54 recess 60 circuit board 74 die pad 80 leads 82 First part 84 Second Part 104 die pad 110 lead frame 120 leads 122 First Part 124 Second part 130 substrates 140 substrates

   ─────────────────────────────────────────────────── ─── Continued front page    F-term (reference) 4M109 AA01 BA01 CA21 DA04 DB02                       DB04                 5F061 AA01 BA01 CA21 CB13 DD13                       EA03                 5F067 AA02 AB03 BC08 BC12 BC13                       BC14 BD05 BE09 CC02 CC05                       CC09 DA07

Claims (23)

[Claims] 1. A lead having first and second parts, a semiconductor chip electrically connected to the first part via a wire, and covering at least a part of the semiconductor chip and the lead. And a sealing part formed on a surface of the first portion on which the wire is formed, and the lead is formed from the first portion to the sealing part. A semiconductor device formed by bending to the sealing portion side at a portion extending to the outside, and arranging the second portion on the side opposite to the first portion side of the sealing portion. 2. The semiconductor device according to claim 1, further comprising a die pad supporting the semiconductor chip. 3. The semiconductor device according to claim 2, wherein the die pad supports the semiconductor chip on a surface side having an electrode. 4. The semiconductor device according to claim 2, wherein the die pad supports the semiconductor chip on a side opposite to a surface having electrodes. 5. The semiconductor device according to claim 2, wherein the die pad has a surface opposite to the semiconductor chip exposed from the sealing portion. 6. The semiconductor device according to claim 2, wherein the die pad is embedded in the sealing portion. 7. The semiconductor device according to claim 1, further comprising a substrate that is provided on the first portion side of the sealing portion and that supports the semiconductor chip. 8. The semiconductor device according to claim 1, wherein the second portion is on the side opposite to the first portion side of the sealing portion and the sealing portion. A semiconductor device that extends in a direction outside of the. 9. The semiconductor device according to claim 1, wherein the second portion is on a side opposite to the first portion side of the sealing portion, and the sealing portion. A semiconductor device that extends inward. 10. A surface of a plurality of semiconductor devices including at least one semiconductor device according to claim 1, which is stacked, and which is exposed from the sealing portion of the first portion of the lead. And the second portion of the lead are used as an electrical connection portion. 11. A circuit board on which the semiconductor device according to claim 1 is mounted. 12. An electronic device including the semiconductor device according to claim 1. 13. A wire bonding step of electrically connecting a semiconductor chip to a first portion of a lead of a lead frame via a wire, and covering at least a part of the semiconductor chip and supporting the lead. A sealing step of forming a sealing portion; and a forming step of bending and forming the lead, wherein in the sealing step, the sealing portion is formed on a surface side of the first portion on which the wire is formed. In the forming step, by bending the lead toward the sealing portion side at a portion extending from the first portion to the outside of the sealing portion, the second portion of the lead is moved to the sealing portion. A method of manufacturing a semiconductor device, wherein the semiconductor device is arranged on a side opposite to the first portion side. 14. The method of manufacturing a semiconductor device according to claim 13, wherein the lead frame has a die pad, and further comprising supporting the semiconductor chip on the die pad before the wire bonding step. Method. 15. The method of manufacturing a semiconductor device according to claim 14, wherein the semiconductor chip is supported on the die pad on a surface side having an electrode. 16. The method of manufacturing a semiconductor device according to claim 14, wherein the semiconductor chip is supported on the die pad on a side opposite to a surface having electrodes. 17. The method of manufacturing a semiconductor device according to claim 14, wherein in the sealing step, a surface of the die pad opposite to the semiconductor chip is exposed from the sealing portion. Method for manufacturing a semiconductor device. 18. The method of manufacturing a semiconductor device according to claim 14, wherein the die pad is formed before the wire bonding step.
A method of manufacturing a semiconductor device, further comprising: shifting the lead in any direction from the first portion, wherein the die pad is inserted into the sealing portion in the sealing step. 19. The method of manufacturing a semiconductor device according to claim 13, further comprising: providing a substrate on the lead frame and supporting the semiconductor chip on the substrate before the wire bonding step. . 20. The method of manufacturing a semiconductor device according to claim 19, further comprising removing the substrate after the sealing step. 21. The method of manufacturing a semiconductor device according to claim 13, wherein the recess formed in one of the first and second molds is formed in the sealing step. A semiconductor in which the lead frame is set between the first and second molds so as to be arranged on the surface of the first portion on which the wire is formed, and the recess is filled with the material of the sealing portion. Device manufacturing method. 22. The method of manufacturing a semiconductor device according to claim 13, wherein in the forming step, the lead is the first portion of the sealing portion. A method of manufacturing a semiconductor device, which is formed so as to extend in a direction outside the sealing portion on the side opposite to the side. 23. The method of manufacturing a semiconductor device according to claim 13, wherein, in the forming step, the lead is the first portion of the sealing portion. A method of manufacturing a semiconductor device, which is formed so as to extend inward of the sealing portion on the side opposite to the side.