JP2003273186A - Method and device for inspecting semiconductor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method and a device for inspecting a semiconductor in which an inspection time can be shortened by operating a plurality of inspection device in parallel. <P>SOLUTION: In the method for inspecting a semiconductor, inspection is started by inserting a wafer into a dimension inspecting device 2 requiring a longest inspection time, by inserting the wafer into an overlay inspecting device 1 requiring a second longest inspection time, and by inserting the wafer into a macro inspecting device 3 requiring a third longest inspection time. Subsequently, the inspected wafer is taken out of the macro inspecting device 3 and inserted into a wafer cassette, out of the overlay inspecting device 1 and inserted into the wafer cassette, and out of the dimension inspecting device 2 and inserted into the wafer cassette. Since the plurality of inspection devices are operated in parallel, the inspection time can be shortened. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor inspection method and a semiconductor inspection apparatus, and more particularly to a semiconductor inspection method and a semiconductor inspection apparatus capable of shortening an inspection time by processing a plurality of inspection apparatuses in parallel.

[0002]

2. Description of the Related Art FIG. 13 is a block diagram showing a conventional inspection method in a photolithography process. A photoresist film is applied on the wafer, and the photoresist film is exposed and developed to form a resist pattern on the wafer. When inspecting this photolithography process, the overlay inspection apparatus 101, the dimension inspection apparatus 102, and the macro inspection apparatus 103 are used, but these inspection apparatuses have been sequentially processed by different apparatuses.

That is, for the wafer after the photolithography process, first, one wafer extracted from the wafer cassette by the arm is inserted into the overlay inspection apparatus 101 to perform the overlay inspection. Next, the inspected wafer is taken out of the overlay inspection apparatus by the arm and stored in the wafer cassette.

Next, the other one wafer is taken out from the wafer cassette by the arm, and this wafer is inserted into the dimension inspection device 102 to perform the dimension inspection. Next, the inspected wafer is taken out from the dimension inspection device by the arm, and the wafer is stored in the wafer cassette.

Next, the other one wafer is taken out from the wafer cassette by the arm, and this wafer is inserted into the macro inspection device 103 to perform the macro inspection. Next, the inspected wafer is taken out from the macro inspection apparatus by the arm, and the wafer is stored in the wafer cassette. Then
The other one wafer is taken out from the wafer cassette by the arm, and this wafer is inserted into the macro inspection device 103,
Perform macro inspection. Repeat macro inspection like this,
Macro inspection is performed on a total of 6 wafers.

As described above, in the conventional photolithography process inspection method, the overlay inspection device 101, the dimension inspection device 102, and the macro inspection device 103 are all single-wafer processing devices. However, since these inspection devices are devices that perform independent processing, it takes substantially double the time. That is, in the inspection method of the photolithography process, for example, the overlay inspection apparatus 101 requires 8 minutes × 1 sheet = 8 minutes, and the dimension inspection apparatus 102 requires 20 minutes × 1.
The number of sheets = 20 minutes, and the macro inspection device 103 requires 1 minute × 6 sheets = 6 minutes. Therefore, it takes a total of 34 minutes or more.

FIG. 14 is a block diagram showing a conventional inspection method for an etching process. After forming a resist pattern on the wafer, etching is performed using the resist pattern as a mask to form an etching pattern on the wafer. When inspecting this etching process, the macro inspection device 103, the dimension inspection device 102, and the defect inspection device 106 are used, but these inspection devices are processed by different devices in order.

That is, with respect to the wafer after the etching process, first, one wafer extracted from the wafer cassette by the arm is inserted into the macro inspection device 103 to perform the macro inspection. Next, the inspected wafer is taken out from the macro inspection apparatus by the arm, and the wafer is stored in the wafer cassette. This kind of macro inspection is performed on the wafer cassette 18
Performed for one wafer.

Next, one arm is used to pull out one wafer from the wafer cassette, and this wafer is inspected by the dimension inspection apparatus 1
It is inserted in 02 and a dimensional inspection is performed. Next, the inspected wafer is taken out from the dimension inspection device by the arm, and the wafer is stored in the wafer cassette.

Next, another arm is pulled out from the wafer cassette by the arm, and this wafer is inserted into the defect inspection device 106 to perform the defect inspection. Next, the inspected wafer is taken out from the defect inspection apparatus by the arm, and the wafer is stored in the wafer cassette. Then, the arm pulls the other wafer out of the wafer cassette,
This wafer is inserted into the defect inspection apparatus to perform defect inspection.
By repeating such defect inspection, defect inspection is performed on a total of 6 wafers.

As described above, in the conventional etching process inspection method, the macro inspection device 103 and the dimension inspection device 10 are used.
2 and the defect inspection device 106 are all single-wafer processing devices. However, since these inspection devices are devices that perform independent processing, it takes substantially double the time. That is, in the inspection method of the etching process, for example, the macro inspection device 103 requires 1 minute × 18 sheets = 18 minutes,
The dimension inspection apparatus 102 requires 20 minutes × 1 sheet = 20 minutes, and the defect inspection apparatus 106 requires 8 minutes × 6 sheets = 48 minutes. Therefore, it takes a total of 86 minutes or more.

[0012]

As described above, as shown in FIG.
In the conventional inspection method of the photolithography process shown in FIG. 3, since all the inspection devices of the overlay inspection device 101, the dimension inspection device 102, and the macro inspection device 103 are devices that perform independent processing, the time that is substantially doubled. It was hanging. The same is true for the conventional inspection method of the etching step shown in FIG.

The present invention has been made in view of the above circumstances, and an object thereof is to provide a semiconductor inspection method and a semiconductor inspection apparatus capable of shortening the inspection time by processing a plurality of inspection apparatuses in parallel. To do.

[0014]

In order to solve the above problems, a semiconductor inspection method according to the present invention is a method of performing a semiconductor inspection using a first inspection device and a second inspection device,
A step of removing the first wafer from the wafer cassette, inserting the first wafer into the first inspection device of the first and second inspection devices, which requires a long inspection time, and starting inspection, and extracting the second wafer from the wafer cassette , Second to the second inspection device
A step of inserting a wafer to start the inspection, a step of taking out the second wafer after inspection from the second inspection apparatus and inserting it into a wafer cassette, and a step of taking out the first wafer after inspection from the first inspection apparatus to set the wafer cassette And a step of inserting into the.

According to the above-described semiconductor inspection method, the inspection is started from the first inspection device which requires a long inspection time, and the second inspection devices also perform the inspection in parallel. Therefore, the inspection time can be shortened as compared with the conventional inspection method. Thereby, the inspection efficiency can be improved.

A semiconductor inspection method according to the present invention is a method of performing a semiconductor inspection using a first inspection device, a second inspection device and a third inspection device, wherein the first wafer is extracted from a wafer cassette and the first to The step of inserting the first wafer into the first inspection apparatus, which takes the longest inspection time among the third inspection apparatuses, to start the inspection, and the step of removing the second wafer from the wafer cassette, and The step of inserting the second wafer into the second inspection apparatus, which takes the second longest inspection time, and the inspection is started, and the third wafer is taken out from the wafer cassette. The step of inserting the third wafer into the third inspection apparatus, which takes a long time, to start the inspection, the step of taking out the third wafer after the inspection from the third inspection apparatus and inserting it into the wafer cassette, and the step of performing the inspection from the second inspection apparatus. Taking out a second wafer after the step of inserting the wafer cassette, remove the first wafer after inspecting the first inspection apparatus, characterized by comprising the steps of: inserting a wafer cassette, a.

Further, in the semiconductor inspection method according to the present invention, the first to third inspection devices may be devices for inspecting a wafer on which a resist pattern is formed by a photolithography process in the photolithography process. is there.

Further, in the semiconductor inspection method according to the present invention, resist patterns are formed on a plurality of wafers before the step of inserting the first wafer into the first inspection apparatus and starting the inspection. It is possible to further include the step of storing the wafer in the wafer cassette.

In the semiconductor inspection method according to the present invention, the first inspection device is a dimension inspection device, the second inspection device is an overlay inspection device, and the third inspection device is a macro inspection device. It is also possible.

Further, in the semiconductor inspection method according to the present invention, the first to third inspection devices may be devices for inspecting a wafer having an etching pattern formed by the etching process in the etching process.

Further, in the semiconductor inspection method according to the present invention, etching patterns are formed on a plurality of wafers before the step of inserting the first wafer into the first inspection apparatus and starting the inspection, and It is possible to further include the step of storing the wafer in the wafer cassette.

In the semiconductor inspection method according to the present invention, the first inspection device is a defect inspection device, the second inspection device is a dimension inspection device, and the third inspection device is a macro inspection device. It is also possible.

A semiconductor inspection apparatus according to the present invention comprises a first inspection apparatus, a second inspection apparatus, a wafer cassette for accommodating wafers to be subjected to semiconductor inspection using these first and second inspection apparatuses, and this wafer cassette. A semiconductor inspection device including a control unit for controlling the first and second inspection devices, wherein the first wafer is taken out from the wafer cassette, and the inspection time of the first and second inspection devices is long. After the first wafer is inserted into the inspection device to start the inspection, the second wafer is taken out from the wafer cassette, the second wafer is inserted into the second inspection device to start the inspection, and then the second inspection device performs inspection. Remove the second wafer, insert it into the wafer cassette,
It is characterized in that the control section controls so that the first wafer after the inspection is taken out from the first inspection device and is inserted into the wafer cassette.

A semiconductor inspection device according to the present invention comprises a first inspection device, a second inspection device, a third inspection device, and a first inspection device.
To a wafer cassette for accommodating wafers to be subjected to semiconductor inspection using the third inspection device, the wafer cassette, and the first cassette
To a control unit for controlling the third inspection device, wherein the first inspection device takes the longest inspection time among the first to third inspection devices by extracting the first wafer from the wafer cassette. The first wafer is inserted into the wafer to start the inspection, the second wafer is taken out from the wafer cassette, and the second wafer is inserted into the second inspection device, which takes the second longest inspection time among the first to third inspection devices. To start the inspection,
After the third wafer is taken out from the wafer cassette, the third wafer is inserted into the third inspection apparatus, which takes the third longest inspection time among the first to third inspection apparatuses, and the inspection is started, The third wafer after inspection is taken out and inserted into the wafer cassette, the second wafer after inspection is taken out from the second inspection device, inserted into the wafer cassette, the first wafer after inspection is taken out from the first inspection device, and the wafer It is characterized in that it is controlled by the control unit so as to be inserted into the cassette.

Further, in the semiconductor inspection device according to the present invention, the first to third inspection devices may be devices for inspecting a wafer having a resist pattern formed by the photolithography process in the photolithography process. is there.

Further, in the semiconductor inspection apparatus according to the present invention, it is possible to form resist patterns on a plurality of wafers and store these wafers in the wafer cassette before extracting the first wafer from the wafer cassette. Is.

Further, in the semiconductor inspection apparatus according to the present invention, the first inspection apparatus is a dimension inspection apparatus, the second inspection apparatus is an overlay inspection apparatus, and the third inspection apparatus is a macro inspection apparatus. It is also possible.

Further, in the semiconductor inspection device according to the present invention, the first to third inspection devices may be devices for inspecting a wafer having an etching pattern formed by the etching process in the etching process.

Further, in the semiconductor inspection apparatus according to the present invention, it is possible to form etching patterns on a plurality of wafers and store these wafers in the wafer cassette before taking out the first wafer from the wafer cassette. Is.

Further, in the semiconductor inspection device according to the present invention, the first inspection device is a defect inspection device, the second inspection device is a dimension inspection device, and the third inspection device is a macro inspection device. It is also possible.

[0031]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows a first embodiment according to the present invention.
2 is a configuration diagram schematically showing an inspection apparatus in a photolithography process according to the embodiment of FIG.

The inspection device in the photolithography process comprises an overlay inspection device 1, a dimension inspection device 2, a macro inspection device 3, a wafer cassette 4 and a control section 5. These inspection devices 1 to 3 are integrally connected as one device. Further, as the wafers which are taken out from the wafer cassette 4 and inserted into the respective inspection devices 1 to 3, different wafers (wafers having different numbers) are used. This allows
It is possible to complete the inspection of the photolithography process by the inspection time of the inspection apparatus which takes the longest. Further, the control unit 5 controls to operate the inspection device in the photolithography process as described later.

Next, a method of inspecting a wafer by using the inspection apparatus for the photolithography process will be described.
First, the wafer cassette 4 stores one lot of wafers after the photolithography process is completed. This photolithography step is a step of forming a resist pattern on the wafer by applying a photoresist film on the wafer and exposing and developing the photoresist film.

Then, one wafer (wafer number 12) is taken out from the wafer cassette 4 by the arm and this wafer is inserted into the dimension inspection device 2 to start the inspection. This inspection takes 20 minutes for one wafer.

Next, one arm (wafer number 13) is taken out from the wafer cassette 4 by the arm and this wafer is inserted into the overlay inspection apparatus 1 to start the inspection. This inspection takes 8 minutes for one wafer.

Then, one wafer (wafer number 1) is taken out from the wafer cassette 4 by the arm and this wafer is inserted into the macro inspection device 3 to start the inspection. This inspection takes one minute for one wafer. However, 6 wafers (wafer numbers 1, 5,
10, 15, 20, 25) are extracted and inspected.

Next, since the inspection is completed from the device having a short inspection time, the inspected wafers are taken out in order from the completed inspection device and stored in the wafer cassette 4.

That is, a wafer that has been inspected from the macro inspection device 3 is taken out by an arm and stored in the wafer cassette 4, and then one wafer (wafer number 5) is taken out from the wafer cassette 4 by the arm, and this wafer is macro-processed. It is inserted into the inspection device 3 and the inspection is started. Next, after the inspection-completed wafer is taken out from the macro inspection device 3 by the arm and stored in the wafer cassette 4,
One arm (wafer number 10) is taken out from the wafer cassette 4 by the arm, this wafer is inserted into the macro inspection device 3, and the inspection is started. By repeating the macro inspection in this way, six wafers (wafer numbers 1, 5, 10, 1
5, 20, 25) macro inspection is performed.

Next, the inspected wafer is taken out from the overlay inspection apparatus 1 by the arm and stored in the wafer cassette 4. Next, the inspected wafer is taken out from the dimension inspection device 2 by the arm and stored in the wafer cassette 4.

According to the first embodiment, the inspection is started from the dimension inspection device 2 which takes the longest inspection time, and the other inspection devices 1 and 3 also perform the inspection in parallel. The overlay inspection apparatus 1 requires an inspection time of 8 minutes × 1 sheet = 8 minutes,
The dimension inspection apparatus 2 requires an inspection time of 20 minutes × 1 sheet = 20 minutes, and the macro inspection apparatus 3 requires an inspection time of 1 minute × 6 sheets = 6 minutes, but the total time required for the inspection is the longest. It takes about 20 minutes for the dimensional inspection, which is a complicated inspection process. Therefore, the inspection time can be shortened as compared with the conventional inspection method in the photolithography process. This allows
The inspection efficiency can be improved.

Next, an example of the inspection method of the overlay inspection apparatus 1 will be described with reference to FIGS.
FIG. 2A is a plan view showing an overlay mark,
FIG. 2B is a sectional view taken along line X′-X ′ shown in FIG. FIG. 3 is a diagram showing nine measurement shots in the wafer in which the overlay inspection is performed.

The displacement of the second layer superposed on the first layer previously formed on the wafer is measured for nine shots in the wafer shown in FIG. As shown in FIG. 2A, each of the nine shots in the wafer has an outer BOX mark 7 and a second BOX mark 7 formed on the first layer.
BOX-in composed of an inner BOX mark 8 formed in the layer
-BOX is formed.

Generally, image recognition is used for the measurement.
Each BOX is irradiated with broadband light such as a xenon lamp as a light source, and the edge of each BOX is detected from the intensity of the reflected light. As a result, the outer box shown in FIG.
The distances a and b between the edge of the mark 7 and the edge of the inner BOX mark 8 are measured, and by substituting the values a and b in the following equation (1), the first layer and the second layer in the X-axis direction The deviation can be measured.

[0044] (Displacement amount) = (ab) / 2 (1)

When the layer formed in the step of the overlay measurement in the X-axis direction and the layer formed in the step of the overlay measurement in the Y-axis direction are different, that is, a plurality of layers On the other hand, in the case of performing the overlay measurement, the method of simultaneously performing the overlay measurement in the X-axis direction and the Y-axis direction, which is disclosed in JP-A-8-116141, is adopted.

If the amount of deviation measured in this way is within the predetermined range, the overlay inspection result is determined to be good, and if it is outside the predetermined range, the overlay inspection result is determined to be no.

Next, an example of the inspection method of the dimension inspection apparatus 2 will be described with reference to FIGS. This dimension inspection method inspects the pattern dimension on the wafer. As a dimension inspection method for inspecting such a pattern width, there are an electron beam method and an optical method. Among these, as a technique to which the electron beam method is applied, there is a scanning electron microscope (SEM).

FIG. 4 is a diagram for explaining the electron beam system. FIG. 5 is a diagram showing calculation of a pattern width by the electron beam method. FIG. 6 is a diagram for explaining the laser spot method. FIG. 7 is a diagram showing the calculation of the pattern width by the laser spot method.

This SEM measures the pattern size from an enlarged image of the pattern on the wafer surface. As shown in FIG. 4, an electron beam is irradiated onto the measured pattern 9 from the vertical direction and scanning is performed. The obtained secondary electrons are detected and the intensity change thereof is obtained as a function of the scanning position as shown in FIG. Then, this is output as an image, and the pattern width is obtained from the distance between the pattern edges.

As an optical system, there is a laser spot scan system. In this method, as shown in FIG. 6, a laser spot is irradiated onto the measured pattern 10 in the vertical direction and is scanned, and scattered light from an edge generated at this time is detected by a detector 11. Then, the pattern width W is obtained based on the scanning of the laser spot, that is, the output signal (FIG. 7) of the detector 11 corresponding to the moving distance of the stage 12.

If the pattern dimension thus measured is within a predetermined range, the overlay inspection result is judged to be good,
If it is outside the predetermined range, the overlay inspection result is determined to be no.

Next, an example of the inspection method of the macro inspection device 3 will be described with reference to FIGS. Figure 8
FIG. 3 is a schematic view showing a macro inspection device. FIG. 9 is a light reception signal level diagram showing an example of quality determination. Figure 10
It is the figure which projected the two-dimensional matrix image on the wafer.

Wafer 1 mounted on wafer holding shaft 13
4, the incident light 16 is emitted from the condenser 15. Reflected light 17 and scattered light 18 are received by the light receiving unit 19 depending on the surface condition on the wafer 14. The signal at the light receiving unit is the arithmetic unit 20.
Then, the signal is processed in the arithmetic unit 20 and a pass / fail judgment is reported. Here, by providing the slit and the pinhole 21 in front of the light receiving portion 19, the reflected light 17 and the scattered light 18 from the minute area of the wafer 14 are received. By performing the wafer rotation 22 and the wafer tilt 23, the received light signal has continuity, and as a result, the received light signal level shown in FIG. 9 is obtained. The received light signal level is in a good wafer surface state, and the received light signal level indicates that the scattered light 18 is strengthened by, for example, a foreign substance on the surface of the wafer 14. The received light signal level indicates that the reflected light 17 is weakened due to, for example, a region where the film thickness is different from the surrounding. By processing this by the arithmetic unit 20, for example, by presetting the judgment signal levels of the high threshold value 24 and the low threshold value 25, only the portion in the example of FIG. 9 is reported as defective.
This can be applied to any type of wafer 14 by variously changing the threshold high value 24 and the threshold low value 25 depending on the type of the wafer 14. Further, by setting several kinds of high threshold value 24 and low threshold value 25 in the arithmetic unit 20 in advance, the recipe can be realized.

On the other hand, as shown in FIG. 10, the inclination angle and the rotation angle of the wafer 26, and the pass / fail judgment results of the white and white good judgment positions 27 and the hatched defect judgment positions 28 are shown in a two-dimensional matrix. The defect determination position 28 on the wafer 26 can be understood by capturing it as an image. By setting the origin arbitrarily, the two-dimensional matrix image can be projected on the wafer 26 and the position coordinates of the defect judgment 28 can be reported.

Further, the inspection of one wafer is carried out a plurality of times in succession, and all the defective position coordinates obtained at each time are reported, so that it is possible to prevent defective detection in the apparatus and improve the reliability of the data. it can.

Similarly, one wafer is continuously inspected a plurality of times, and the defective position coordinates obtained at each time are compared with each other.
By reporting the common defective position coordinates in the inspection results of each time, it is possible to prevent erroneous reporting due to erroneous detection in the device and improve the reliability of the device.

FIG. 11 is a schematic diagram showing an inspection apparatus for an etching step according to the second embodiment of the present invention.

The inspection apparatus for the etching process comprises a defect inspection apparatus 6, a dimension inspection apparatus 2, a macro inspection apparatus 3, a wafer cassette 4 and a controller 5. These inspection devices 6, 2 and 3 are integrally connected as one device. Further, as the wafers to be taken out from the wafer cassette 4 and inserted into the respective inspection devices 6, 2 and 3, different wafers (wafers having different numbers) are used. As a result, the inspection of the etching process can be completed with the longest inspection time of the inspection device. Further, the control unit 5 controls so as to operate the inspection device in the etching process as described later.

Next, a method of inspecting a wafer by using the inspection apparatus for the etching process will be described. First, the wafer cassette 4 stores one lot of wafers after the etching process. In this etching process, the resist pattern formed on the wafer by the photolithography process is used as a mask for etching,
This is a step of forming an etching pattern on a wafer (dry etching step, wet etching step, resist stripping step, etc.).

Next, one arm (wafer number 1) is taken out from the wafer cassette 4 by the arm and this wafer is inserted into the defect inspection apparatus 6 to start the inspection. This inspection takes 8 minutes for one wafer. However, 6 wafers (wafer number 1, 2, 1
2, 13, 24, 25) are inspected.

Next, one arm (wafer number 14) is taken out from the wafer cassette 4 by the arm and this wafer is inserted into the dimension inspection device 2 to start the inspection. This inspection takes 20 minutes for one wafer.

Then, one wafer (wafer number 3) is taken out from the wafer cassette 4 by the arm and this wafer is inserted into the macro inspection device 3 to start the inspection. This inspection takes one minute for one wafer. However, 18 wafers (wafer numbers 3 to 1) per lot are used for macro inspection.
1, 15 to 23) are extracted and inspected.

Next, since the inspection is completed from the device having a short inspection time, the inspected wafers are taken out in order from the completed inspection device and stored in the wafer cassette 4. Then, in the defect inspection device 6 and the macro inspection device 3 which inspect a plurality of wafers, the wafers are sequentially taken out from the wafer cassette 4 and inserted into the inspection device to start the inspection, and the wafers after the inspection are taken out from the inspection device. Store in a cassette,
Repeat this.

According to the second embodiment described above, the inspection is started from the defect inspection apparatus 6 which takes the longest inspection time, and the other inspection apparatuses 2 and 3 also perform the inspection in parallel. The defect inspection apparatus 6 requires an inspection time of 8 minutes × 6 sheets = 48 minutes, the dimension inspection apparatus 2 requires an inspection time of 20 minutes × 1 sheet = 20 minutes, and the macro inspection apparatus 3 requires 1 minute × 18 sheets. Although the inspection time is 18 minutes, the total time required for the inspection is about 48 minutes for the defect inspection, which is the most time-consuming inspection process.
Therefore, the inspection time can be shortened as compared with the conventional inspection method in the etching process. Thereby, the inspection efficiency can be improved.

Next, an example of the inspection method of the defect inspection apparatus 6 will be described with reference to FIG. FIG. 12 is a plan view showing a wafer on which a defect inspection is performed using the defect inspection method.

In this defect inspection method, a defect is inspected by irradiating the wafer surface with light, capturing an image of the wafer surface, and measuring the brightness (brightness) of the wafer surface. Since multiple identical chip areas are formed side by side on the wafer surface, the existence of defects is inspected by comparing the brightness of each chip area with the brightness of the adjacent chip area and measuring the difference in brightness. To do.

More specifically, first, the chip area 29 located near the center of the wafer shown in FIG. 12 is irradiated with light,
Brightness (brightness) of a predetermined portion in the chip area 29
To detect. The surface of the wafer is divided into square areas (each of which is called a pixel) with a side of about 0.25 μm.
The predetermined portion is an area having a plurality of pixels.

Next, the brightness of each pixel is detected from the detected brightness data of the predetermined portion, the brightness of the brightest pixel is defined as the light level 255, and the brightness of the darkest pixel is set to the light level 0. Stipulate. The light levels 0 and 255 defined as absolute values in this way are the reference lightness when measuring the lightness of the wafer surface. Therefore, it is necessary to select in advance the area having both the brightest pixel and the darkest pixel in the brightness of the entire wafer as the predetermined portion.

Thereafter, the upper chip area of the wafer shown in FIG. 12 is irradiated with light, and the brightness of each pixel in the chip area is measured. The light level for each pixel is relatively derived as a numerical value from 0 to 255 based on the measured lightness data and the reference of the light levels 0 and 255 described above. Next, the chip area adjacent to the chip area is irradiated with light, and the brightness of each pixel in the chip area is measured. From the measured lightness data and the reference of the light levels 0 and 255, the light level of each pixel is relatively derived as a numerical value of 0 to 255. Then, the light levels of corresponding pixels in adjacent chip areas are compared with each other, and pixels having a predetermined difference in the light levels are detected. It is determined that there is a defect at the position of the detected pixel.

Next, such a comparison of the write levels of the adjacent chip areas is performed in the lateral direction in order from the upper chip area of the wafer, and sequentially proceeds to the lower chip area of the wafer, and all the chip areas on the wafer are compared. Inspect the chip area for defects.

Since an example of the inspection method for each of the dimension inspection device 2 and the macro inspection device 3 is the same as that of the first embodiment, the description thereof will be omitted.

Further, the present invention is not limited to the above-mentioned embodiment, but can be implemented with various modifications. For example,
The structure of the wafer cassette and the movements of the wafer cassette and the arm can be appropriately changed and implemented.
Alternatively, the wafer cassette may be moved to each inspection device.

Further, in the first embodiment, the present invention is applied to a photolithography process inspection method and its inspection device, and in the second embodiment, an etching process inspection method and its inspection device are applied. However, the present invention can also be applied to an inspection method and an inspection apparatus other than the inspection method and the inspection apparatus for the photolithography process and the etching process without departing from the gist of the present invention.

[0074]

As described above, according to the present invention, it is possible to provide a semiconductor inspection method and a semiconductor inspection device capable of shortening the inspection time by processing a plurality of inspection devices in parallel.

[Brief description of drawings]

FIG. 1 is a configuration diagram schematically showing an inspection apparatus in a photolithography process according to a first embodiment of the present invention.

2A is a plan view showing an overlay mark, and FIG. 2B is a sectional view taken along line X′-X ′ shown in FIG.

FIG. 3 is a diagram showing nine measurement shots in a wafer on which an overlay inspection is performed.

FIG. 4 is a diagram for explaining an electron beam system.

FIG. 5 is a diagram showing calculation of a pattern width by an electron beam method.

FIG. 6 is a diagram for explaining a laser spot system.

FIG. 7 is a diagram showing calculation of a pattern width by a laser spot method.

FIG. 8 is a schematic view showing a macro inspection device.

FIG. 9 is a light reception signal level diagram showing an example of quality determination.

FIG. 10 is a diagram showing a two-dimensional matrix image projected on a wafer.

FIG. 11 is a configuration diagram schematically showing an inspection apparatus for an etching process according to a second embodiment of the present invention.

FIG. 12 is a plan view showing a wafer on which a defect inspection is performed by using the defect inspection method.

FIG. 13 is a configuration diagram showing a conventional inspection method in a photolithography process.

FIG. 14 is a configuration diagram showing a conventional inspection method of an etching step.

[Explanation of symbols]

1, 101 ... Overlap inspection device 2, 102 ... Dimension inspection device 3, 103 ... Macro inspection device 4 ... Wafer cassette 5 ... Control unit 6, 106 ... Defect inspection device 7 ... Outer BOX mark 8 ... Inner BOX mark 9, 10 ... Measured pattern 11 ... Detector 12 ... Stage 13 ... Wafer holding shaft 14 ... Wafer 15 ... Concentrator 16 ... Incident light 17 ... Reflected light 18 ... Scattered light 19 ... Light receiving part 20 ... Arithmetic device 21 ... Slit, pinhole 22 ... Wafer rotation 23 ... Wafer tilt 24 ... Threshold high 25 ... Threshold low 26 ... Wafer 27 ... Good judgment position 28 ... Defect judgment position 29 ... Chip area

Claims (16)

[Claims] 1. A method of performing a semiconductor inspection using a first inspection device and a second inspection device, wherein a first wafer is taken out from a wafer cassette, and the inspection time of the first and second inspection devices is long. A step of inserting the first wafer into the first inspection device and starting the inspection; a step of extracting the second wafer from the wafer cassette and inserting the second wafer into the second inspection device to start the inspection; and a second inspection device A semiconductor inspection, comprising: a step of taking out a second wafer after inspection from the first inspection apparatus and inserting it into a wafer cassette; and a step of taking out the first wafer after inspection from the first inspection apparatus and inserting it into the wafer cassette. Method. 2. A method of performing a semiconductor inspection using a first inspection device, a second inspection device, and a third inspection device, wherein a first wafer is extracted from a wafer cassette, and the first inspection device Inspecting the first wafer by inserting the first wafer into the first inspection device, which requires a long inspection time, and extracting the second wafer from the wafer cassette, which requires the second inspection time in the first to third inspection devices. A step of inserting a second wafer into the second inspection device to start the inspection, and a step of removing the third wafer from the wafer cassette to make it the third inspection device requiring the longest inspection time among the first to third inspection devices. Inserting a third wafer to start the inspection, removing the inspected third wafer from the third inspection device and inserting it into the wafer cassette, and removing the inspected second wafer from the second inspection device. A step of inserting the wafer cassette, remove the first wafer after inspecting the first inspection device, the semiconductor inspection method characterized by comprising the steps of: inserting a wafer cassette, a. 3. The semiconductor inspection according to claim 2, wherein the first to third inspection devices are devices for inspecting a wafer on which a resist pattern is formed by a photolithography process in the photolithography process. Method. 4. A step of forming resist patterns on a plurality of wafers and storing these wafers in a wafer cassette before the step of inserting the first wafer into the first inspection apparatus and starting the inspection. 4. Including
The semiconductor inspection method described in. 5. The third inspection apparatus is a overlay inspection apparatus, the third inspection apparatus is a macro inspection apparatus, and the first inspection apparatus is a dimension inspection apparatus. 4. The semiconductor inspection method according to 4. 6. The semiconductor inspection method according to claim 2, wherein the first to third inspection apparatuses are apparatuses for inspecting a wafer on which an etching pattern has been formed by an etching step, in the etching step. 7. A step of forming an etching pattern on a plurality of wafers and storing the wafers in a wafer cassette before the step of inserting the first wafer into the first inspection apparatus and starting the inspection is further performed. The semiconductor inspection method according to claim 6, further comprising: 8. The first inspection device is a defect inspection device, the second inspection device is a dimension inspection device, and the third inspection device is a third inspection device.
The semiconductor inspection method according to claim 6, wherein the inspection device is a macro inspection device. 9. A first inspecting device, a second inspecting device, a wafer cassette for accommodating a wafer to be subjected to a semiconductor inspection using the first and second inspecting devices, and the wafer cassette, the first and second inspecting devices. A semiconductor inspection apparatus comprising: a control unit that controls the apparatus, wherein a first wafer is extracted from a wafer cassette, and the first inspection apparatus of the first and second inspection apparatuses, which requires a long inspection time, receives the first wafer. After the insertion, the inspection is started, the second wafer is taken out from the wafer cassette, the second wafer is inserted into the second inspection device, the inspection is started, and the second wafer after the inspection is taken out from the second inspection device. Insert into cassette, first
A semiconductor inspection device characterized in that the above-mentioned control unit controls so that the first wafer after inspection is taken out from the inspection device and inserted into a wafer cassette. 10. A first inspecting device, a second inspecting device, a third inspecting device, a wafer cassette for accommodating wafers to be subjected to semiconductor inspection using these first to third inspecting devices, and this wafer cassette and A semiconductor inspection device comprising: a control unit for controlling the first to third inspection devices, wherein a first wafer is extracted from a wafer cassette, and the inspection time is the longest among the first to third inspection devices. The first wafer is inserted into the inspection device to start the inspection, the second wafer is taken out from the wafer cassette, and the second inspection device, which takes the second longest inspection time among the first to third inspection devices, is the second inspection device.
Inspection is started by inserting a wafer, removing the third wafer from the wafer cassette, and inserting the third wafer into the third inspection device, which takes the third longest inspection time among the first to third inspection devices, and then inspects it. After starting the inspection, the third wafer after inspection is taken out from the third inspection device, inserted into the wafer cassette, the second wafer after inspection is taken out from the second inspection device, inserted into the wafer cassette, and then inserted from the first inspection device. A semiconductor inspection device characterized in that the above-mentioned control unit controls so that the first wafer after inspection is taken out and inserted into a wafer cassette. 11. The semiconductor inspection according to claim 10, wherein the first to third inspection devices are devices for inspecting a wafer having a resist pattern formed by a photolithography process in the photolithography process. apparatus. 12. The semiconductor inspection according to claim 11, wherein a resist pattern is formed on a plurality of wafers and the wafers are stored in the wafer cassette before the first wafer is extracted from the wafer cassette. apparatus. 13. The method according to claim 11, wherein the first inspection device is a dimension inspection device, the second inspection device is an overlay inspection device, and the third inspection device is a macro inspection device. 12. The semiconductor inspection device according to item 12. 14. The semiconductor inspection device according to claim 10, wherein the first to third inspection devices are devices for inspecting a wafer on which an etching pattern is formed by an etching process in the etching process. 15. The semiconductor inspection according to claim 14, wherein an etching pattern is formed on a plurality of wafers and the wafers are housed in the wafer cassette before the first wafer is extracted from the wafer cassette. apparatus. 16. The first inspection device is a defect inspection device, the second inspection device is a dimension inspection device, and the third inspection device is a third inspection device.
The semiconductor inspection device according to claim 14 or 15, wherein the inspection device is a macro inspection device.