JP2003263958A - Plasma display panel and display device using the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a plasma display panel with high brightness and high luminous efficiency and capable of stable discharge, and to provide a display device using the same. <P>SOLUTION: The plasma display panel has: pairs of display electrodes 41, 42 in parallel with each other on the inner surface of one of a pair of substrates binding a discharge space; and address electrodes crossing the pairs of display electrodes 41, 42, partitions partitioning the discharge space into unit luminous regions, and phosphor bodies emitting light by discharge, on the inner surface of the other of the pair of substrates. The pair of display electrodes 41, 42 form a discharge gap of 0.2 mm or more, and a plurality of float electrodes 61 are formed between pairs of electrodes 41, 42, to prevent the discharge from flickering and mis-occurring. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display panel and a display device using the same, and more particularly to a display electrode pair which is substantially parallel to each other on the inner surface of one of the pair of substrates sandwiching a discharge space. A plasma display panel having an address electrode intersecting the display electrode pair, a partition partitioning the discharge space into unit light emitting regions, and a phosphor that emits light by discharge, and a display using the same on the inner surface of the substrate. Regarding the device.

[0002]

2. Description of the Related Art Plasma display panel (PDP)
Is a flat panel display technology because it can display at a higher speed than a liquid crystal panel, has a wide viewing angle, can be easily upsized, and has a high display quality because it is a self-luminous type. And recently it has been attracting a lot of attention.

Generally, in PDP, ultraviolet rays are generated by gas discharge, and the fluorescent materials are excited by the ultraviolet rays to emit light to perform color display. The display cell divided by the partition is provided on the substrate, and the phosphor layer is formed on the display cell. In particular, the mainstream of PDPs at present is a surface discharge type PDP having a three-electrode structure, which has a pair of display electrodes adjacent in parallel on one substrate and a direction intersecting with the display electrodes on the other substrate. Since it has an address electrode extending to, a partition wall, and a phosphor layer, the phosphor layer can be made relatively thick, and it can be said that it is suitable for color display by the phosphor.

FIG. 13 shows a conventional surface discharge type PD having a three-electrode structure.
The disassembled perspective view of P is shown. The display electrode pair is composed of a scan electrode (scan electrode) 41 and a sustain electrode (sustain electrode) 42. The advantage of this structure is that it has a very simple structure and is relatively easy to manufacture, that the phosphor layer can be thickened and the phosphor screen can be directly viewed to increase the brightness, and that the phosphor layer can be separated from the scan electrode. Can reduce the deterioration of the phosphor due to the sustain discharge.

However, it is still difficult to obtain high luminous efficiency or high brightness. Up to now, various studies have been made on the above problems, but there is no example in which a PDP using a positive column has been put to practical use in order to increase the emission efficiency of ultraviolet rays. This is the PD for the distance between the electrodes required for the positive column.
The reason is that the size of the P cell is limited, and the discharge is not stable and it is difficult to control the discharge simply by increasing the distance between the electrodes.

Patents include, for example, JP-A-5-41165, JP-A-5-41164, and JP-A-6-275202, but sufficient results have been obtained even if these are adopted. Absent.

[0007]

As described above, the conventional PDP has low brightness and low luminous efficiency, and has various problems such as stability of discharge even when a positive column is used.

It is an object of the present invention to solve the above problems, that is, to provide a plasma display panel which can stably utilize a positive column and has high brightness and high luminous efficiency, and a display device using the same.

[0009]

In order to solve this problem, the plasma display panel of the present invention has display electrode pairs that are substantially parallel to each other on the inner surface of one of the substrate pairs sandwiching the discharge space. In a plasma display panel having an address electrode crossing the display electrode pair, a partition partitioning the discharge space into unit light emitting regions, and a phosphor emitting light by discharge on the inner surface of the other substrate, the display electrode pair Has a discharge interval of 0.2 mm or more, and a plurality of address electrodes are formed in the unit light emitting region.

According to another aspect, a protrusion having a height lower than that of the partition wall is formed between the plurality of address electrodes formed in the unit light emitting region, if necessary.

In still another aspect, a part or all of a plurality of address electrodes formed in the unit light emitting region are connected.

[0012] In still another aspect, a part or all of a plurality of address electrodes formed in the unit light emitting region are connected in a mesh pattern.

In still another aspect, the protrusions are formed in stripes and are parallel to the address electrodes.

In still another aspect, the discharge interval of the display electrode pair is 0.2 mm or more and the interval between the adjacent barrier ribs or more.

In still another aspect, the discharge interval of the display electrode pair is 0.2 mm or more, and a plurality of float electrodes are formed between the adjacent display electrode pairs.

In still another aspect, a part or all of a plurality of float electrodes formed between adjacent display electrode pairs are connected.

In still another aspect, the discharge interval of the display electrode pair is 0.2 mm or more, and the protrusion having a height lower than that of the partition wall is formed between the adjacent display electrode pairs.

In still another aspect, the discharge interval between the display electrode pairs is 0.2 mm or more, and a part of the partition wall is formed between the adjacent display electrode pairs.

[0019]

BEST MODE FOR CARRYING OUT THE INVENTION The invention according to claim 1 of the present invention comprises a first substrate, and a second substrate (20) arranged so as to sandwich a discharge space with the first substrate (10). , The first substrate (1
The first display electrode (41) and the second display electrode (41) are parallel to each other on the inner surface of (0).
Address electrodes (31) arranged in a direction perpendicular to the first display electrodes (41) on the inner surface of the second substrate (20), and the discharge space. Unit emission area (EU)
The partition wall (21) for each partition and the phosphor (2
2) A plasma display panel comprising: a first display electrode (41) and a second display electrode (42) having a discharge interval of 0.2 mm or more, and the adjacent first A plasma display panel is characterized in that a plurality of float electrodes (61) are formed between a first display electrode (41) and a second display electrode (42).

As described above, when the discharge interval, which is the interval between the first display electrode pair 41 and the second display electrode 42, is 0.2 mm or more, it becomes possible to generate a positive column, and further, the positive columns are adjacent to each other. By forming a plurality of float electrodes 61 between the first display electrode pair 41 and the second display electrode 42, it is possible to suppress flickering of discharge and erroneous discharge.

The invention according to claim 2 of the present invention is the plasma display panel according to claim 1, characterized in that at least a part of the float electrode (61) is connected. With such a configuration, it is possible to suppress flickering of discharge and erroneous discharge.

According to a third aspect of the present invention, there is provided a first substrate, a second substrate (20) arranged so as to sandwich a discharge space with the first substrate (10), and the first substrate (20). A first display electrode (41) and a second display electrode on the inner surface of the substrate (10) parallel to each other.
(42) having the first substrate on the inner surface of the second substrate (20).
Address electrodes arranged in a direction perpendicular to the display electrodes (41) of
A plasma display panel comprising: (31), a partition wall (21) partitioning the discharge space into unit light emitting regions (EU), and a phosphor (22) emitting light by discharge, wherein the first display electrode is provided. The discharge interval, which is the interval between the (41) and the second display electrode (42), is 0.2 mm or more, and between the adjacent first display electrode (41) and second display electrode (42). The plasma display panel is characterized in that a protrusion (23) having a height lower than that of the partition wall (21) is formed on the inside.

As described above, when the discharge interval, which is the interval between the first display electrode pair 41 and the second display electrode 42, is 0.2 mm or more, it becomes possible to generate a positive column, and further, the adjacent positive columns can be generated. Since the protrusion 23 having a height lower than that of the partition wall 21 is formed between the first display electrode pair 41 and the second display electrode 42, it is possible to suppress flicker of discharge and erroneous discharge.

According to a fourth aspect of the present invention, there is provided a first substrate, a second substrate (20) arranged so as to sandwich a discharge space with the first substrate (10), and the first substrate. A first display electrode (41) and a second display electrode on the inner surface of the substrate (10) parallel to each other.
(42) having the first substrate on the inner surface of the second substrate (20).
Address electrodes arranged in a direction perpendicular to the display electrodes (41) of
A plasma display panel comprising: (31), a partition wall (21) partitioning the discharge space into unit light emitting regions (EU), and a phosphor (22) emitting light by discharge, wherein the first display electrode is provided. The discharge interval, which is the interval between the (41) and the second display electrode (42), is 0.2 mm or more, and between the adjacent first display electrode (41) and second display electrode (42). The plasma display panel is characterized in that a part of the partition wall (21) is formed in the.

As described above, when the discharge interval, which is the interval between the first display electrode pair 41 and the second display electrode 42, is 0.2 mm or more, it becomes possible to generate a positive column, and further, the positive columns are adjacent to each other. Since a part of the partition wall 21 is formed between the first display electrode pair 41 and the second display electrode 42,
It is possible to suppress flicker of discharge and erroneous discharge.

The invention according to claim 5 of the present invention is the display device characterized in that the plasma display panel according to any one of claims 1 to 4 performs display by AC voltage driving.

In such a display device, the positive columns are stably formed, and the brightness and luminous efficiency can be improved.

Embodiments of the present invention will be described below with reference to the drawings. The embodiment of the present invention is not limited to these.

(First Embodiment) FIG. 1 is an example of a sectional view of a front plate of a plasma display panel (PDP) according to the first embodiment. FIG. 2 is an example of a rear plate sectional view of the plasma display panel (PDP) according to the first embodiment. In FIG. 1, 10 is a first substrate, 11 is a dielectric layer, 12 is a protective layer, 41 is a first display electrode, and 42 is a second display electrode. In FIG. 2, 20 is a second substrate, 31
Is an address electrode, 24 is an overcoat, 21 is a partition wall, and 22 is a phosphor. The front plate shown in FIG. 1 and the rear plate shown in FIG. 2 are attached to each other so that the first display electrodes and the address electrodes are perpendicular to each other to form a discharge space.

The plasma display panel of the present embodiment has display electrode pairs 41 and 42 substantially parallel to each other on the inner surface of one substrate 10 of the substrate pair sandwiching the discharge space, and the other substrate.
A plasma display panel having, on the inner surface of 20, address electrodes 31 that intersect the display electrode pairs 41 and 42, barrier ribs 21 that partition the discharge space into unit emission regions EU, and phosphors 22 that emit light by discharge. And the display electrode pair 4
The discharge interval of 1 and 42 is 0.2 mm or more, and a plurality of the address electrodes 31 are formed in the unit light emitting region EU.

The material of the substrate is generally soda lime glass, but is not particularly limited. As a material for the partition wall, a low melting point glass is generally used, but the material is not particularly limited. Further, as a method of forming the partition wall, a screen printing method, a sandblast method, a photosensitive paste method, a photo embedding method, a pressure molding method, or the like can be used.
Also, the phosphor is excited by the ultraviolet rays generated by the discharge,
There is no particular limitation as long as it emits light. Further, as a method for forming the phosphor layer, a screen printing method, a sandblast method, an inkjet method, or the like can be used.

The present embodiment will be specifically described below by taking the PDP in FIGS. 1 and 2 as an example.

First, the plasma display panel in the present embodiment will be described. Here, description will be given by showing a specific structure of the PDP in FIG.
The embodiment of the present invention is not limited to this.

In the PDP shown in FIGS. 1 and 2, the partition wall 21 is formed in a stripe shape, and two address electrodes 31 are provided in the unit light emitting region EU in parallel with the partition wall 21.
Overcoat layer made of dielectric on address electrode 31
A phosphor layer 22 is formed via 24. Display electrode pair 4
Scan electrodes 41 and sustain electrodes 1 and 42, respectively
42, the scan electrodes 41 and the sustain electrodes 42 are formed substantially orthogonal to the address electrodes 31.
Is covered with a transparent dielectric layer 11 and a protective layer 12. The discharge interval between the scan electrode 41 and the sustain electrode 42 is 0.2 mm or more. Here, the two address electrodes 31 provided in the unit light emitting region EU were electrically connected.

The number of the address electrodes 31 provided in the unit light emitting region EU may be two or more, and the connection may be one place, but if they are connected in a mesh at a plurality of places, some of them are cut. However, there is an effect that it is not electrically disconnected.

Next, a method of manufacturing the plasma display panel in the present embodiment will be described. here,
This will be described by showing a specific method for manufacturing the PDP in FIGS. 1 and 2, but the embodiment of the present invention is not limited to this.

First, a method of manufacturing the back plate will be described. The substrate 20 was soda glass and had a plate thickness of 2.8 mm. On this substrate, silver paste, XFP5392 (manufactured by NAMICS CORPORATION) was printed by a screen printing method and dried (150
C.) and firing (550.degree. C.) were carried out to produce a silver address electrode 31. Next, on the address electrode 31, a dielectric paste, a prototype G3-2083 (manufactured by Okuno Chemical Industries Co., Ltd.) is printed by a screen printing method, and dried (150 ° C.) and baked (550 ° C.) to overcoat. Layer 24 was made.

Next, rib paste G3-1961 (manufactured by Okuno Chemical Industries Co., Ltd.) was printed by a screen printing method and dried.
(150 ° C.) to form the partition walls 21 at a predetermined height, and these were baked at 550 ° C. to form the partition walls 21. Next, a red phosphor paste (made by Okuno Chemical Industries Co., Ltd.) between the partition walls 21 formed as described above, a green phosphor paste
(Made by Okuno Chemical Industries Co., Ltd.), blue phosphor paste (manufactured by Okuno Chemical Industry Co., Ltd.) was sequentially printed by screen printing, dried (150 ° C.), baked (500 ° C.) to form the phosphor layer 22. .

Next, a method for manufacturing the front plate will be described. The substrate 10 was soda glass and had a plate thickness of 2.8 mm. On this substrate, display electrode pairs 41 and 42 were formed in the order of chromium, copper and chromium by a vacuum evaporation method. Next, display electrode pair
A dielectric paste, G3-0496 (manufactured by Okuno Chemical Industries Co., Ltd.), is printed on 41 and 42 by a screen printing method and dried (15
The dielectric layer 11 was formed by performing baking (580 ° C.). Next, a protective film material is formed on the dielectric layer 11 by a vacuum deposition method.
MgO was evaporated to form the protective layer 12.

The front plate and the back plate thus produced are arranged to face each other, the periphery is sealed with frit glass, and after sufficient evacuation, gas (Xe of 5% Xe, Ne mixed gas, 500 torr) is filled. Then, chip off, that is, by sealing the gas-filled tube, a PDP was produced.

Next, the display device according to the present embodiment will be described. Here, as an example, FIGS.
The present invention will be described by showing a specific display device using the PDP, but the embodiment of the present invention is not limited to this.

FIG. 3 is a block diagram showing the configuration of the display device according to the present embodiment. The display device of FIG. 3 includes a PDP 100, an address driver 110, a scan driver 120, a sustain driver 130, a discharge control timing generation circuit 140, an A / D converter (analog / digital converter) 151, a scan number conversion unit 152, and a subfield. The converter 153 is included.

The PDP 100 includes a plurality of address electrodes, a plurality of scan electrodes (scan electrodes), and a plurality of sustain electrodes (sustain electrodes). The plurality of address electrodes are arranged in the vertical direction of the screen, the plurality of scan electrodes and the plurality of scan electrodes. The sustain electrodes are arranged in the horizontal direction of the screen. In addition, the plurality of sustain electrodes are commonly connected. In addition, discharge cells are formed at the intersections of the address electrodes, scan electrodes, and sustain electrodes, and each discharge cell constitutes a pixel on the screen. By applying a write pulse between the address electrode and the scan electrode to the PDP 100, address discharge is performed between the address electrode and the scan electrode to select a discharge cell, and then between the scan electrode and the sustain electrode. By applying a periodic sustain pulse that is alternately inverted, sustain discharge is performed between the scan electrode and the sustain electrode, and display is performed.

As a gradation display driving method in the AC type PDP, for example, ADS (Address and Display-period Sep
arated: address / display period separation) method can be used. FIG. 4 is a diagram for explaining the ADS method. The vertical axis of FIG. 4 represents the scanning direction (vertical scanning direction) of the scan electrodes from the first line to the m-th line, and the horizontal axis represents time. In the ADS method, 1 field 1/60 sec = 16.67 ms) is temporally divided into a plurality of subfields. For example, 8
When displaying 256 gradations with bits, one field is divided into eight subfields. In addition, each subfield is divided into an address period in which an address discharge for selecting a lighted cell is performed and a sustain period in which a sustain discharge for display is performed. In the ADS method, scanning is performed by address discharge over the entire surface of the PDP from the first line to the m-th line in each subfield, and sustain discharge is performed at the end of the full-area address discharge.

First, the video signal VD is sent to the A / D converter 15
Entered in 1. The horizontal synchronizing signal H and the vertical synchronizing signal V are supplied to the discharge control timing generating circuit 140, the A / D converter 151, the scanning number converting section 152, and the subfield converting section 153.
Given to. The A / D converter 151 converts the video signal VD into a digital signal, and converts the image data thereof into a scanning number conversion unit.
Give to 152. The scanning number conversion unit 152 converts the image data into image data of the number of lines corresponding to the number of pixels of the PDP, and gives the image data of each line to the subfield conversion unit 153.

The subfield converter 153 divides each pixel data of the image data for each line into a plurality of bits corresponding to a plurality of subfields, and the address driver 110 divides each bit of each pixel data for each subfield. Output serially to. The address driver 110 is the power supply circuit 1
The data is serially supplied from the subfield conversion unit 153 to each subfield and is converted into parallel data, and a plurality of address electrodes are driven based on the parallel data.

Discharge control timing generation circuit 140 generates discharge control timing signals SC and SU with reference to horizontal synchronizing signal H and vertical synchronizing signal V, and supplies them to scan driver 120 and sustain driver 130, respectively. The scan driver 120 includes an output circuit 121 and a shift register 122.
including. The sustain driver 130 also includes an output circuit 131 and a shift register 132. The scan driver 120 and the sustain driver 130 have a common power supply circuit 123.
It is connected to the.

Shift register 122 of scan driver 120
Applies the discharge control timing signal SC provided from the discharge control timing generating circuit 140 to the output circuit 121 while shifting it in the vertical scanning direction. The output circuit 121 is the shift register 12
In response to the discharge control timing signal SC given from 2, the plurality of scan electrodes are sequentially driven.

Shift register 1 of sustain driver 130
Reference numeral 32 applies the discharge control timing signal SU supplied from the discharge control timing generation circuit 140 to the output circuit 131 while shifting it in the vertical scanning direction. The output circuit 131 is a shift register
In response to the discharge control timing signal SU provided from 132, the plurality of sustain electrodes are sequentially driven.

FIG. 5 is a timing chart showing the drive voltage applied to each electrode of the PDP 100. In FIG. 5, the address electrode, the sustain electrode, and the nth line to the (nth) line.
The drive voltage of the +2) scan electrode is shown. Here, n is an arbitrary integer. As shown in FIG. 5, in the sustain period, a sustain pulse (P
su) is applied. In the address period, the write pulse (Pw) is applied to the scan electrode. This write pulse
The write pulse (Pwa) is applied to the address electrode in synchronization with (Pw).

Write pulse applied to address electrodes
On / off of (Pwa) is controlled according to each pixel of the image to be displayed. When the write pulse (Pw) and the write pulse (Pwa) are simultaneously applied, an address discharge is generated in the discharge cell at the intersection of the scan electrode and the address electrode, and the discharge cell is lit. In the sustain period after the address period, the sustain pulse (Psc) is applied to the scan electrodes at a constant cycle.
The phase of the sustain pulse (Psc) applied to the scan electrode is 180 degrees out of phase with the phase of the sustain pulse (Psc) applied to the sustain electrode. In this case, the sustain discharge is generated only in the discharge cells that are turned on by the address discharge.

At the end of each subfield, an erase pulse (Pe) is applied to the scan electrodes. As a result, the wall charge of each discharge cell is reduced to such an extent that the discharge or the sustain discharge does not occur, and the sustain discharge ends. During the rest period after the application of the erase pulse (Pe), the rest pulse is applied to the scan electrode at regular intervals
(Pr) is applied. The rest pulse (Pr) has the same phase as the sustain pulse (Psu).

Next, the above display device was made to emit light over its entire surface, and its luminance and luminous efficiency were evaluated. The brightness was evaluated using a color analyzer, CA-100 (manufactured by Minolta). Further, the luminous efficiency was obtained by dividing the luminous flux calculated from the luminance by the electric power applied during the discharge.

The results of the above evaluations are shown in (Table 1). For comparison, the address electrode is a unit light emitting area EU.
The results of the display device formed in one of them are also shown.

[0055]

[Table 1]

From Table 1, it can be seen that by forming a plurality of address electrodes in the unit light emitting region EU, the luminance and the light emitting efficiency are increased.

(Second Embodiment) FIG. 6 is an example of a sectional view of a back plate of a plasma display panel (PDP) according to the second embodiment. The configuration of the front plate is the same as in the first embodiment.
1 is the same as that in FIG.

The plasma display panel of the second embodiment has display electrode pairs 41 and 42 which are substantially parallel to each other on the inner surface of one substrate 10 of the substrate pair sandwiching the discharge space, and the other substrate.
On the inner surface of 20, an address electrode 31 that intersects with the display electrode pair 41, 42, a partition wall 21 that partitions the discharge space into unit emission regions EU, and a phosphor 22 that emits light by discharge, are displayed. The discharge interval of the electrode pair 41, 42 is 0.2 mm or more, and
A plurality of the address electrodes 31 are formed in the unit light emitting region EU, and a plurality of protrusions 23 having a height lower than that of the partition wall 21 are provided between the plurality of address electrodes 31 formed in the unit light emitting region EU. Formed.

The protrusion 23 is made of the same material as the partition wall 21,
It can be easily formed by the same method. Here, it is not always necessary that the same material as the partition wall 21 is used, and it is not necessary that the partition wall 21 is formed by the same method.

The protrusions 23 can be arranged in any height, shape, position and number as required. Also, the protrusion
The partition 23 can also be formed in contact with the partition wall 21. Further, the protrusion 23 can be formed by contacting the plurality of protrusions 23 with each other.

The present embodiment will be specifically described below by taking the PDP in FIG. 6 as an example.

First, the panel of the plasma display according to the present embodiment will be described. Here, description will be given by showing a specific structure of the PDP in FIG.
The embodiment of the present invention is not limited to this.

In the PDP shown in FIG. 6, the partition walls 21 are formed in a stripe shape, and two address electrodes 31 are provided in the unit light emitting region EU in parallel with the partition walls 21. Between the two address electrodes 31, a wall-shaped protrusion 23 having a height lower than that of the partition wall 21 is formed in parallel with the partition wall 21 and the address electrode 31. A phosphor layer 22 is formed on the address electrode 31 and the protrusion 23 via an overcoat layer 24 made of a dielectric material.

As shown in FIG. 1, a pair of parallel scan electrodes 41 and sustain electrodes 42 are formed on the inner surface of the front substrate 10 substantially orthogonal to the address electrodes 31, and the scan electrodes 41 and The sustain electrode 42 is covered with the transparent dielectric layer 11 and the protective layer 12. Scan electrode
The discharge interval between 41 and the sustain electrode 42 is 0.2 mm or more.

The term "protruding portion" as used in the present invention means "a partially protruding portion", and its shape, position, number, material, etc. are not particularly limited.

Next, a method of manufacturing the plasma display panel in the present embodiment will be described. here,
This will be described by showing a specific method for manufacturing the PDP in FIG. 6, but the embodiment of the present invention is not limited to this.

First, a method of manufacturing the back plate will be described. The substrate 20 was soda glass and had a plate thickness of 2.8 mm. On this substrate, silver paste, XFP5392 (manufactured by NAMICS CORPORATION) was printed by a screen printing method and dried (150
C.) and baking (550.degree. C.) were carried out to produce a silver address electrode. Next, on the address electrode, dielectric paste, prototype
G3-2083 (manufactured by Okuno Chemical Industries Co., Ltd.) was printed by a screen printing method, dried (150 ° C.) and baked (550 ° C.) to prepare an overcoat layer.

Next, rib paste G3-1961 (manufactured by Okuno Chemical Industries Co., Ltd.) was printed by the screen printing method in the pattern of the partition wall 21 and the protrusion 23 shown in FIG. 7, and dried (150 ° C.). The partition wall 21 and the protrusions 23 are formed to a predetermined height, and then the rib paste, with the pattern of only the partition wall 21 shown in FIG.
G3-1961 (manufactured by Okuno Chemical Industries Co., Ltd.) is printed by a screen printing method, dried (150 ° C.) to prepare the rest of the partition walls 21 at a predetermined height, and baked at 550 ° C. Thus, the partition wall 21 and the protrusion 23 were formed. Next, between the partition walls 21 formed as described above, a red phosphor paste (manufactured by Okuno Chemical Industry Co., Ltd.), a green phosphor paste (manufactured by Okuno Chemical Industry Co., Ltd.), a blue phosphor paste (Okuno Pharmaceutical Co., Ltd. stock) (Company) is sequentially printed by screen printing and dried (15
The phosphor layer 22 was formed by baking (0 ° C.) and firing (500 ° C.).

The manufacturing method of the front plate is the same as that of the first embodiment. The substrate 10 was soda glass and had a plate thickness of 2.8 mm. On this substrate, chromium by vacuum deposition method,
A display electrode was formed in the order of copper and chromium. Next, a dielectric paste, G3-0496 (manufactured by Okuno Chemical Industries Co., Ltd.) is printed on the display electrode by a screen printing method, and dried (150 ° C) and baked (580 ° C) to form a dielectric layer. did. Next, a protective film material MgO is vapor-deposited on the dielectric layer by a vacuum vapor deposition method,
A protective layer was formed.

The front plate and the back plate thus produced are arranged opposite to each other, the periphery is sealed with frit glass, and after sufficient evacuation, gas (Xe of 5% Xe, Ne mixed gas, 500 torr) is filled. Then, chip off, that is, by sealing the gas-filled tube, a PDP was produced.

Next, the display device according to the present embodiment will be described. The display device according to the present embodiment is the same as the display device according to the first embodiment except that the PDP according to the present embodiment is used. Note that, like the first embodiment, the embodiment of the present invention is not limited to this.

Next, the above display device was made to emit light over the entire surface, and its luminance and luminous efficiency were evaluated. The brightness was evaluated using a color analyzer, CA-100 (manufactured by Minolta). Further, the luminous efficiency was obtained by dividing the luminous flux calculated from the luminance by the electric power applied during the discharge.

The results of the above evaluation are shown in (Table 2). For comparison, the results of a display device using a PDP without protrusions are also shown.

[0074]

[Table 2]

From Table 2, it can be seen that the brightness and the luminous efficiency are increased by providing the protrusions.

(Third Embodiment) FIG. 9 is an example of a rear plate sectional view of a plasma display panel (PDP) according to the third embodiment. The configuration of the front plate is the same as in the first embodiment.
1 is the same as that in FIG.

The plasma display panel of the third embodiment has display electrode pairs 41 and 42 which are substantially parallel to each other on the inner surface of one substrate 10 of the substrate pair sandwiching the discharge space, and the other substrate.
A plasma display panel having, on the inner surface of 20, address electrodes 31 that intersect the display electrode pairs 41 and 42, barrier ribs 21 that partition the discharge space into unit emission regions EU, and phosphors 22 that emit light by discharge. And the display electrode pair 4
The discharge interval of 1 and 42 is 0.2 mm or more, and is the interval of the adjacent barrier ribs 21 or more.

The present embodiment will be specifically described below by taking the PDP in FIG. 9 as an example.

First, the panel of the plasma display according to the present embodiment will be described. Here, description will be given by showing a specific structure of the PDP in FIG.
The embodiment of the present invention is not limited to this.

In the PDP shown in FIG. 9, the partition wall 21 is formed in a stripe shape, and the address electrode 31 is provided substantially parallel to the partition wall 21. In addition, the phosphor layer 22 is formed on the address electrode 31 via the overcoat layer 24 made of a dielectric material.
Are formed.

As shown in FIG. 1, a pair of parallel scan electrodes 41 and sustain electrodes 42 are formed on the inner surface of the front substrate 10 so as to be substantially orthogonal to the address electrodes 31, and these scan electrodes 41 and sustain electrodes are formed. The electrode 42 is covered with the transparent dielectric layer 11 and the protective layer 12. Scan electrode
The discharge interval between 41 and the sustain electrode 42 is 0.2 mm or more,
In addition, the interval between adjacent partition walls 21 is equal to or greater than the interval. In order to satisfy this condition, in FIG. 9, two phosphor regions of the same color are formed in one pixel.
They are provided one by one.

Next, a method of manufacturing the plasma display panel in the present embodiment will be described. The method for manufacturing the plasma display panel in the present embodiment is the same as the method for manufacturing the PDP in the first embodiment except for the electrode pattern. Note that, like the first embodiment, the embodiment of the present invention is not limited to this.

Next, the display device according to the present embodiment will be described. The display device according to the present embodiment is the same as the display device according to the first embodiment except that the PDP according to the present embodiment is used. Note that, like the first embodiment, the embodiment of the present invention is not limited to this.

Next, the above display device was made to emit light over the entire surface, and its luminance and luminous efficiency were evaluated. The brightness was evaluated using a color analyzer, CA-100 (manufactured by Minolta). Further, the luminous efficiency was obtained by dividing the luminous flux calculated from the luminance by the electric power applied during the discharge.

The results of the above evaluations are shown in (Table 3).

[0086]

[Table 3]

From Table 3, it can be seen that the discharge is stabilized and the luminance and the light emission efficiency are increased by narrowing the interval between the partition walls adjacent to the discharge interval.

(Embodiment 4) FIG. 10 shows an example of a front plate electrode pattern of a plasma display panel (PDP) in the present embodiment.

The plasma display panel of the present embodiment has display electrode pairs 41 and 42 which are substantially parallel to each other on the inner surface of one substrate 10 of the substrate pair sandwiching the discharge space, and the other substrate.
A plasma display panel having, on the inner surface of 20, address electrodes 31 that intersect the display electrode pairs 41 and 42, barrier ribs 21 that partition the discharge space into unit emission regions EU, and phosphors 22 that emit light by discharge. And the display electrode pair 4
The discharge intervals of 1 and 42 are 0.2 mm or more, and a plurality of float electrodes 61 are formed between the adjacent display electrode pairs 41 and 42.

The present embodiment will be specifically described below by taking the front plate electrode pattern in FIG. 10 as an example.

First, a panel of the plasma display according to the present embodiment will be described. Here, the front plate electrode pattern in FIG. 10 will be described, but the embodiment of the present invention is not limited to this.

In the front plate electrode pattern in FIG. 10,
The discharge interval between the display electrode pairs 41 and 42 which are parallel to each other is 0.2 mm or more, and two float electrodes 61 are formed between the adjacent display electrode pairs 41 and 42. To connect this, it may be connected in advance on the electrode pattern, or the float electrodes 61 taken out from both sides may be connected and floated. Here, the float electrodes 61 taken out from both sides are partially or entirely connected and floated.

Next, a method of manufacturing the plasma display panel in the present embodiment will be described. The method for manufacturing the plasma display panel in the present embodiment is the same as the method for manufacturing the PDP in the first embodiment except for the electrode pattern. Note that, like the first embodiment, the embodiment of the present invention is not limited to this.

Next, the display device according to the present embodiment will be described. The display device according to the present embodiment is the same as the display device according to the first embodiment except that the PDP according to the present embodiment is used. Note that, like the first embodiment, the embodiment of the present invention is not limited to this.

Next, the display device was made to emit light over the entire surface, and the stability of discharge was observed. As a result of evaluation in this manner, a plurality of float electrodes 61 are formed between the adjacent display electrode pairs 41 and 42, and by connecting a part or all of them, it is possible to suppress flicker of discharge and erroneous discharge. I knew I could do it.

(Fifth Embodiment) FIG. 11 shows the fifth embodiment.
2 is an example of a front view of the plasma display panel (PDP) in FIG.

The plasma display panel of the present embodiment has display electrode pairs 41 and 42 which are substantially parallel to each other on the inner surface of one substrate 10 of the substrate pair sandwiching the discharge space, and the other substrate.
A plasma display panel having, on the inner surface of 20, address electrodes 31 that intersect the display electrode pairs 41 and 42, barrier ribs 21 that partition the discharge space into unit emission regions EU, and phosphors 22 that emit light by discharge. And the display electrode pair 4
A discharge interval of 1 and 42 is 0.2 mm or more, and a projection 23 having a height lower than that of the partition wall 21 is formed between the adjacent display electrode pairs 41 and 42.

The present embodiment will be specifically described below by taking the PDP in FIG. 11 as an example.

First, a panel of the plasma display according to the present embodiment will be described. Here, description will be given by showing a specific structure of the PDP in FIG. 11, but the embodiment of the present invention is not limited to this.

In the PDP shown in FIG. 11, the partition wall 21 is formed in a stripe shape, and the wall-shaped protrusion 23 having a height lower than that of the partition wall 21 has a display electrode pair 41 between adjacent display electrode pairs 41 and 42. , 42 are formed parallel to each other. Display electrode pair 41,
42 The interval is 0.2 mm or more.

Next, a method of manufacturing the plasma display panel in the present embodiment will be described. The method of manufacturing the plasma display panel in the present embodiment is the same as the method of manufacturing the PDP in the second embodiment except for the electrode pattern, the mask pattern of the partition wall, and the mask pattern of the protrusion. Note that, like the second embodiment, the embodiment of the present invention is not limited to this.

Next, the display device according to the present embodiment will be described. The display device according to the present embodiment is the same as the display device according to the first embodiment except that the PDP according to the present embodiment is used. Note that, like the first embodiment, the embodiment of the present invention is not limited to this.

Next, the display device was made to emit light over the entire surface, and the discharge stability was observed.

As a result of the evaluation as described above, the protrusion 23 having a height lower than that of the partition wall 21 is provided between the adjacent display electrode pairs 41 and 42.
It was found that flicker of discharge and erroneous discharge can be suppressed by forming.

(Sixth Embodiment) FIG. 12 shows a sixth embodiment.
2 is an example of a front view of the plasma display panel (PDP) in FIG.

The plasma display panel of the present embodiment has display electrode pairs 41 and 42 substantially parallel to each other on the inner surface of one substrate 10 of the substrate pair sandwiching the discharge space, and the other substrate.
A plasma display panel having, on the inner surface of 20, address electrodes 31 that intersect the display electrode pairs 41 and 42, barrier ribs 21 that partition the discharge space into unit emission regions EU, and phosphors 22 that emit light by discharge. And the display electrode pair 4
The discharge interval of 1 and 42 is 0.2 mm or more, and a part of the partition wall 21 is formed between the adjacent display electrode pairs 41 and 42.

The present embodiment will be specifically described below by taking the PDP in FIG. 12 as an example.

First, a panel of the plasma display according to the present embodiment will be described. Here, description will be given by showing a specific structure of the PDP in FIG. 12, but the embodiment of the present invention is not limited to this.

In the PDP shown in FIG. 12, the partition wall 21 is formed in a grid pattern, and a part of the partition wall 21 is formed between the adjacent display electrode pair 41, 42 in parallel with the display electrode pair 41, 42. There is. The distance between the display electrode pairs 41 and 42 is 0.2 mm or more.

Next, a method of manufacturing the plasma display panel in the present embodiment will be described. The plasma display panel manufacturing method in the present embodiment is the same as the PDP manufacturing method in the second embodiment except for the electrode pattern and the partition mask pattern. Note that, like the second embodiment, the embodiment of the present invention is not limited to this.

Next, the display device according to the present embodiment will be described. The display device according to the present embodiment is the same as the display device according to the first embodiment except that the PDP according to the present embodiment is used. Note that, like the first embodiment, the embodiment of the present invention is not limited to this.

Next, the display device was made to emit light over the entire surface, and the stability of discharge was observed. As a result of the evaluation as described above, the partition wall 21 is provided between the adjacent display electrode pairs 41 and 42.
It was found that the flicker of discharge and erroneous discharge can be suppressed by forming a part of.

[0113]

As is apparent from the embodiments of the present invention, display electrode pairs 41 and 42, which are substantially parallel to each other, are provided on the inner surface of one substrate 10 of the substrate pair sandwiching the discharge space, and the other substrate 20.
In the plasma display panel having an address electrode 31 that intersects the display electrode pair 41, 42 on the inner surface of the partition wall 21, a partition wall 21 that partitions the discharge space into unit emission regions EU, and a phosphor 22 that emits light by discharge. By forming display electrode pairs 41, 42 having a discharge interval of 0.2 mm or more and forming a plurality of float electrodes 61 between the adjacent display electrode pairs 41, 42, it is possible to suppress flicker of discharge and erroneous discharge. You can

Furthermore, since a part or all of the plurality of float electrodes 61 formed between the adjacent display electrode pairs 41 and 42 are connected, it is possible to further suppress the flicker of discharge and erroneous discharge. .

Further, as is apparent from the embodiments of the present invention, the display electrode pairs 41 and 42 which are substantially parallel to each other are provided on the inner surface of one substrate 10 of the substrate pair sandwiching the discharge space, and the other substrate.
A plasma display panel having, on the inner surface of 20, address electrodes 31 that intersect the display electrode pairs 41 and 42, barrier ribs 21 that partition the discharge space into unit emission regions EU, and phosphors 22 that emit light by discharge. Discharge interval is 0.2mm
By forming the above-mentioned display electrode pair 41, 42 and forming the protrusion 23 having a height lower than that of the partition wall 21 between the adjacent display electrode pairs 41, 42, it is possible to suppress flicker of discharge and erroneous discharge. it can.

As is apparent from the embodiments of the present invention, display electrode pairs 41 and 42 which are substantially parallel to each other are provided on the inner surface of one substrate 10 of the substrate pair sandwiching the discharge space, and the other substrate.
A plasma display panel having, on the inner surface of 20, address electrodes 31 that intersect the display electrode pairs 41 and 42, barrier ribs 21 that partition the discharge space into unit emission regions EU, and phosphors 22 that emit light by discharge. Discharge interval is 0.2mm
By forming the display electrode pairs 41 and 42 and forming a part of the partition wall 21 between the adjacent display electrode pairs 41 and 42, it is possible to suppress flicker of discharge and erroneous discharge.

As described above, by controlling the positive column discharge, it is possible to provide a plasma display panel capable of high-luminance, high luminous efficiency and stable discharge.

[Brief description of drawings]

FIG. 1 is a sectional view of a front plate of a plasma display panel according to a first embodiment of the present invention.

FIG. 2 is a sectional view of a back plate of the plasma display panel according to the first embodiment of the present invention.

FIG. 3 is a block diagram showing a configuration of a display device according to the first embodiment of the present invention.

FIG. 4 is a conceptual diagram for explaining an ADS method in the display device according to the first embodiment of the present invention.

FIG. 5 is a timing chart showing a drive voltage applied to each electrode of the plasma display panel according to the first embodiment of the present invention.

FIG. 6 is a sectional view of a back plate of a plasma display panel according to a second embodiment of the present invention.

FIG. 7 is a diagram showing print patterns of partition walls and protrusions according to Embodiment 2 of the present invention.

FIG. 8 is a diagram showing a printing pattern of partition walls according to the second embodiment of the present invention.

FIG. 9 is a sectional view of a rear plate of a plasma display panel according to a third embodiment of the present invention.

FIG. 10 is a diagram showing a front plate electrode pattern of a plasma display panel according to a fourth embodiment of the present invention.

FIG. 11 is a front view of a plasma display panel according to a fifth embodiment of the present invention.

FIG. 12 is a front view of a plasma display panel according to a sixth embodiment of the present invention.

FIG. 13 is an exploded perspective view of a conventional typical three-electrode structure surface discharge plasma display panel.

[Explanation of symbols]

10 First Substrate 11 Dielectric Layer 12 Protective Layer 20 Second Substrate 21 Partition 22 Fluorescent Material 23 Projection 24 Overcoat Layer 31 Address Electrode 41 First Display Electrode (Scan Electrode) 42 Second Display Electrode (Sustain) 61) Float electrode 100 Plasma display panel (PDP) 110 Address driver 111 Power supply circuit of address driver 120 Scan driver 121 Output circuit of scan driver 122 Shift register of scan driver 123 Power supply circuit common to scan driver and sustain driver 130 Sustain driver 131 Sustain driver output circuit 132 Sustain driver shift register 140 Discharge control timing generation circuit 151 A / D converter 152 Scan number conversion unit 153 Subfield conversion unit

   ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor Yoshio Watanabe             1006 Kadoma, Kadoma-shi, Osaka Matsushita Electric             Sangyo Co., Ltd. (72) Inventor Hiroki Kono             1006 Kadoma, Kadoma-shi, Osaka Matsushita Electric             Sangyo Co., Ltd. F-term (reference) 5C040 FA01 FA04 GB02 GB03 GB12                       GB14 GC20 GF01 GF02 GF03                       GF20 MA03 MA17 MA18 MA20                 5C080 AA05 BB05 CC03 DD06 DD09                       EE29 FF12 HH02 HH04 HH05                       HH07 JJ02 JJ04 JJ06

Claims (5)

[Claims] 1. A first substrate, a second substrate (20) arranged so as to sandwich a discharge space with the first substrate (10), and an inner surface of the first substrate (10) with each other. The first display electrode (4
1) and a second display electrode (42), the second substrate (20)
An address electrode (31) arranged on the inner surface of the first display electrode (41) in a direction perpendicular to the first display electrode (41), a partition wall (21) partitioning the discharge space into unit emission regions (EU), and a discharge A plasma display panel having a phosphor (22) which emits light by means of the first display electrode (41) and the second display electrode (4).
The discharge interval which is the interval of 2) is 0.2 mm or more, and a plurality of float electrodes (61) are formed between the adjacent first display electrode (41) and second display electrode (42). The plasma display panel is characterized in that 2. The plasma display panel according to claim 1, wherein at least a part of the float electrode (61) is connected. 3. A first substrate, a second substrate (20) arranged so as to sandwich a discharge space with the first substrate (10), and an inner surface of the first substrate (10) with each other. The first display electrode (4
1) and a second display electrode (42), the second substrate (20)
An address electrode (31) arranged on the inner surface of the first display electrode (41) in a direction perpendicular to the first display electrode (41), a partition wall (21) partitioning the discharge space into unit emission regions (EU), and a discharge A plasma display panel having a phosphor (22) which emits light by means of the first display electrode (41) and the second display electrode (4).
The discharge interval which is the interval of 2) is 0.2 mm or more, and the height between the adjacent first display electrode (41) and the second display electrode (42) is lower than that of the barrier ribs (21). A plasma display panel having a protrusion (23) formed therein. 4. A first substrate, a second substrate (20) arranged so as to sandwich a discharge space with the first substrate (10), and an inner surface of the first substrate (10) with each other. The first display electrode (4
1) and a second display electrode (42), the second substrate (20)
An address electrode (31) arranged on the inner surface of the first display electrode (41) in a direction perpendicular to the first display electrode (41), a partition wall (21) partitioning the discharge space into unit emission regions (EU), and a discharge A plasma display panel having a phosphor (22) which emits light by means of the first display electrode (41) and the second display electrode (4).
The discharge interval which is the interval of 2) is 0.2 mm or more, and a part of the partition wall (21) is formed between the adjacent first display electrode (41) and second display electrode (42). The plasma display panel is characterized by being. 5. A display device for displaying on the plasma display panel according to claim 1 by AC voltage driving.