JP2003263402A - Data transfer device and data transfer method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a data transfer device capable of stably operating connected electronic equipment regarding the data transfer device connected to a plurality of electronic equipment with mutually different interfaces, to carry out data transfer among these electronic equipment. <P>SOLUTION: An interface control part 22 obtains and compares a data transfer amount A in an IEEE1394 interface 11 and a data transfer amount B in an ATAPI interface 31 on the basis of information described in a command issued from a PC 1. In the case of A>B as a result of comparison, the data transfer amount B is set as the data transfer amount between the PC 1 and peripheral equipment 3 to carry out the command. Data transfer can thereby be carried out while stabilizing the operation of the PC 1 and peripheral equipment 3. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to data transfer between electronic devices, and more particularly to data transfer technology between electronic devices having different interfaces.

[0002]

2. Description of the Related Art A technique for recording data of a digital video cassette recorder (DCR) in a hard disk drive (HDD) via an editing machine (personal computer) as a technique relating to data transfer between electronic devices having different interfaces. However, JP-A-10-
It is disclosed in Japanese Patent No. 254811.

FIG. 16 shows the configuration of the electronic device control apparatus disclosed in the publication. The operation of this electronic control unit will be briefly described below.

Editing machine (personal computer) 101
Is operated to input a predetermined command to the HDD 104, AV / C (Audio / Video Control) corresponding to this input is input.
l) The command packet containing the command is IEEE13
94 (Institute of Electrical and Electronics Engi
neers 1394) input to the PHY 151 in the conversion device 102 via the bus 111. The PHY 151 outputs the obtained packet to the LINK 152. The LINK 152 extracts the command included in the packet and stores it in the built-in memory 1
Record at 53. The system controller 154 extracts the packet recorded in the memory 153 and
(Integrated Device Electronics) interface, that is, converted into a command based on ATA (AT Attachment) and output to the IDE controller 171. I
The DE controller 171 sends the converted command to the I
The data is output to the HDD 104 via the DE interface 112.

A personal computer (hereinafter referred to as a PC) having an IEEE 1394 interface and an SC
A technique for realizing data transfer with a peripheral device having an SI (Small Computer System Interface) is disclosed in Japanese Patent Application Laid-Open No.
No. 00-196605.

FIG. 17 shows the configuration of the IEEE 1394-SCSI conversion logic of the data transfer device disclosed in this publication. The operation of the IEEE 1394-SCSI conversion logic will be briefly described below.

The command packet sent from the PC to the IEEE 1394 interface is sent to the management holding function 203 via the physical layer function 201 and the link layer function 202. Management holding function 20
3 analyzes the header of the sent command packet, and when it recognizes that this command packet targets a peripheral device having a SCSI interface, it holds the operation request block (ORB) in the command packet as data. It is stored in the function 205. After that, the ORB is sent to the SCSI execution function 206, converted into a SCSI command, and output to the peripheral device via the SCSI bus. At this time, the management mediation function 204 receives the O from the management holding function 203.
The data holding function 205 and the SCSI execution function 206 are controlled based on the RB header information.

[0008]

[Problems to be Solved by the Invention] PC to IEEE13
Command packets sent via the 94 interface, for example SBP-2 (Serial Bus Protocol 2)
In the command packet conforming to the above, the data transfer amount in the IEEE 1394 interface and the data transfer amount in the interface of the peripheral device such as the SCSI device are described. However, these data transfer amounts are not necessarily the same, and may differ depending on the command.

In the command requested by the PC, the data transfer amount of the first interface connected to the PC,
If the data transfer amount of the second interface connected to the peripheral device is different, there is a discrepancy between the data transfer amount of the first interface and the data amount actually transferred from the peripheral device, resulting in data transfer processing. It may not end normally. In such a case, the operation of the PC and peripheral devices may become unstable or inoperable.

In rare cases, the data transfer direction for the first interface and the data transfer direction for the peripheral device may not match. Also in this case, the data transfer process does not end normally, and the operation of the PC and peripheral devices becomes unstable.

In view of the above problems, the present invention is a data transfer device that is connected to a plurality of electronic devices having mutually different interfaces and transfers data between these electronic devices, and stably operates the connected electronic devices. The challenge is to be able to do so.

[0012]

In order to solve the above-mentioned problems, the means taken by the invention of claim 1 is a first electronic device having a first interface and a second electronic device having a second interface. The first electronic device is provided between the electronic device and the first electronic device according to a command issued from the first electronic device.
And a data transfer device for transferring data between the second electronic device, the first data transfer amount at the first interface and the first data transfer amount at the second interface based on the information described in the command. Two
It is assumed that an interface control unit is provided to stop the execution of the command when the first and second data transfer amounts do not match as a result of the comparison.

According to the first aspect of the present invention, the first data transfer amount and the second data transfer amount are compared, and when they do not match, the command execution is forcibly stopped. Accordingly, it is possible to prevent the operations of the first and second electronic devices from becoming unstable due to the data transfer performed while the data transfer amounts do not match.

According to a second aspect of the present invention, it is provided between the first electronic device having the first interface and the second electronic device having the second interface, and is issued from the first electronic device. A data transfer device that transfers data between the first and second electronic devices according to a command, based on information described in the command,
The first data transfer amount in the first interface and the second data transfer amount in the second interface are obtained and compared, and as a result of this comparison, the second data transfer amount is the first data. When the transfer amount is smaller than the transfer amount, the second data transfer amount is set to the first and second data transfer amounts.
It is assumed that an interface control unit for executing the command is provided as a data transfer amount between the electronic devices.

According to the second aspect of the present invention, the first data transfer amount and the second data transfer amount are compared with each other, and it is determined that the second data transfer amount is smaller than the first data transfer amount. , The second data transfer amount is the data transfer amount between the first and second electronic devices, and the data is transferred. This makes it possible to perform data transfer while stabilizing the operations of the first and second electronic devices.

In the invention of claim 3, the interface control unit of claim 1 or 2 is based on the information described in the command, whether the first data transfer amount is indirectly described in the command. When it is determined that it is indirectly described, the information regarding the first data transfer amount is obtained from the first electronic device, and the first information is acquired based on the obtained information. The data transfer amount shall be calculated.

According to the third aspect of the invention, when the interface controller determines that the first data transfer amount is indirectly described in the command, the first electronic device transfers the first data transfer amount. The first data transfer amount can be calculated by obtaining the information related to. This makes the first
Even if the data transfer amount is not directly described in the command, the first data transfer amount can be accurately grasped and the data transfer can be executed.

In the invention of claim 4, the interface control unit of claim 1 or 2 needs to obtain the second data transfer amount from the second electronic device based on the information described in the command. It is determined whether or not there is, and when it is determined that it is necessary, the second electronic device is inquired about the second data transfer amount.

According to the fourth aspect of the present invention, when the interface control section determines that the second data transfer amount needs to be obtained from the second electronic device based on the information described in the command, The second data transfer amount can be obtained by inquiring the second electronic device. Accordingly, even when the second data transfer amount cannot be directly obtained from the information described in the command, the second data transfer amount can be accurately grasped and the data transfer can be executed. .

According to a fifth aspect of the present invention, it is provided between the first electronic device having the first interface and the second electronic device having the second interface, and is issued from the first electronic device. A data transfer device that transfers data between the first and second electronic devices according to a command, and obtains a first data transfer direction in the first interface based on information described in the command, The second data transfer direction in the second interface is obtained from the second electronic device, the first and second data transfer directions are compared, and as a result of this comparison, the first and second data transfer directions are obtained. It is assumed that an interface control unit is provided for stopping the execution of the command when the data transfer directions do not match.

According to the fifth aspect of the present invention, the first data transfer direction and the second data transfer direction are compared, and when they do not match, the command execution is forcibly stopped.
Accordingly, it is possible to prevent the operations of the first and second electronic devices from becoming unstable due to the data transfer performed while the data transfer directions do not match.

According to the invention of claim 6, it is provided between the first electronic device having the first interface and the second electronic device having the second interface, and issued from the first electronic device. A data transfer device that transfers data between the first and second electronic devices according to a command, and obtains a first data transfer direction in the first interface based on information described in the command, The second data transfer direction in the second interface is obtained from the second electronic device, the first and second data transfer directions are compared, and as a result of this comparison, the first and second data transfer directions are obtained. When the data transfer directions do not match, the command is executed with the second data transfer direction as the data transfer direction between the first and second electronic devices. And those with that interface control unit.

According to the invention of claim 6, the first data transfer direction and the second data transfer direction are compared, and when they do not match, the data transfer direction obtained from the second electronic device is the first data transfer direction. Data is transferred as a data transfer direction between the second electronic device and the second electronic device. Thereby, the first and second
It is possible to execute data transfer while stabilizing the operation of the electronic device.

According to a seventh aspect of the invention, the interface control section of the first or fifth aspect outputs the control signal in the case of the mismatch. Then, the data transfer device according to claim 1 is provided with a status transmission circuit that sends a status signal indicating the inconsistency to the first electronic device in response to the control signal.

In the invention of claim 8, the interface control section of claim 2 or 6 outputs the control signal when the execution of the command is completed. The data transfer device according to claim 2 or 6, further comprising a status transmission circuit that sends a status signal indicating that the execution of the command has ended to the first electronic device in response to the control signal. And

In the invention of claim 9, the first interface of any one of claims 1, 2, 5 and 6 is I
EEE1394 (Institute of Electrical and Electr
onics Engineers 1394).

In the invention of claim 10, the protocol of the first interface of claim 9 is SBP-2 (Serial
Bus Protocol 2) or SBP-3.

According to the invention of claim 11, claims 1, 2, and 5 are provided.
And the second interface of any one of 6 and 6,
ATA (AT Attachment) or ATAPI (ATA Pack
et Interface).

In the invention of claim 12, claims 1, 2, and 5 are provided.
It is assumed that the data transferred between the first and second electronic devices of any one of 1 and 6 is at least one of video and audio.

And, the means taken by the invention of claim 13 is, in accordance with a command issued from the first electronic device having the first interface, the second electronic device having the second electronic interface and the first electronic device. A data transfer method for transferring data to and from a device, wherein the first data transfer amount in the first interface and the second data in the second interface are based on information described in the command. When the transfer amount is obtained, the first data transfer amount and the second data transfer amount are compared, and when the result of the comparison indicates that the first and second data transfer amounts do not match, the command is executed. Then, the first electronic device is indicated to indicate the inconsistency.

In the fourteenth aspect of the present invention, data is transmitted between the first electronic device and the second electronic device having the second interface in accordance with a command issued from the first electronic device having the first interface. A data transfer method for performing transfer, wherein a first data transfer amount in the first interface and a second data transfer amount in the second interface are obtained based on information described in the command, The first data transfer amount and the second data transfer amount are compared, and as a result of the comparison, when the second data transfer amount is smaller than the first data transfer amount, the second data is transferred. The transfer amount is the first
The command is executed as the data transfer amount between the second electronic device and the first electronic device to indicate that the execution of the command is completed.

According to a fifteenth aspect of the invention, data is transferred between the first electronic device and the second electronic device having the second interface in accordance with a command issued from the first electronic device having the first interface. A data transfer method for performing transfer, wherein a first data transfer direction in the first interface is obtained based on information described in the command, and a second data in the second interface is acquired from the second electronic device. 2 data transfer directions are obtained, the first data transfer direction and the second data transfer direction are compared, and as a result of the comparison, when the first and second data transfer directions do not match, The execution of the command is stopped, and the inconsistency is indicated to the first electronic device.

In the sixteenth aspect of the present invention, data is transmitted between the first electronic device and the second electronic device having the second interface in accordance with a command issued from the first electronic device having the first interface. A data transfer method for performing transfer, wherein a first data transfer direction in the first interface is obtained based on information described in the command, and a second data in the second interface is acquired from the second electronic device. 2 data transfer directions are obtained, the first data transfer direction and the second data transfer direction are compared, and as a result of the comparison, when the first and second data transfer directions do not match, By executing the command with the second data transfer direction as the data transfer direction between the first and second electronic devices, Execution of the serial command is assumed to indicate that it has finished.

[0034]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below in detail with reference to the drawings.

(First Embodiment) FIG. 1 shows a first embodiment of the present invention.
2 shows a configuration of a data transfer device according to the exemplary embodiment. The data transfer device 2 according to the present embodiment corresponds to the PC 1 corresponding to the first electronic device via the IEEE 1394 interface 11 corresponding to the first interface of the present invention, and corresponds to the second interface of the present invention. AT
API (ATA Packet Interface, ATA: AT Attachment)
It is connected to the peripheral device 3 corresponding to the second electronic device via the interface 31 to eliminate the inconsistency in the data transfer amount between the PC 1 and the peripheral device 3 and to realize stable data transfer. is there. The data to be transferred may be, for example, SBP (SB here.
P is a general term including the current SBP-2 standard and SBP-3 which is scheduled to be standardized in the future. ) Video and audio data according to the standard.

The data transfer device 2 includes an IEEE 1394 control unit 21 connected to the IEEE 1394 interface 11, an ATAPI control unit 23 connected to an ATAPI interface 31, and an IEEE 1394 control unit 2.
1 and an ATAPI control unit 23, and is composed of an interface control unit 22.

The physical layer controller 211 uses the IEEE1
Functions such as initialization of the 394 interface 11, arbitration, and control of bias voltage are provided. Also,
DS (Data Strobe) demodulation processing is performed, and the demodulated packet is output to the LINKCORE 212.

The LINKCORE 212 creates and detects an error detection code of the received packet and adds a code to the packet. Furthermore, the data from the transmission / reception buffer 215 is packetized to create the physical layer controller 211.
On the other hand, the packet from the physical layer controller 211 is sent to the packet filter 213.

The packet filter 213 is a LINKCO.
The header of the packet from the RE 212 is analyzed and assigned to a command packet or data packet related to control. Then, the command packet is received in the reception buffer 214.
First, the data packet is sent to the transmission / reception buffer 215.

The reception buffer 214 stores the command packet from the packet filter 213 and sends the parameter of the command packet to the transfer control circuit 221.

The packet transmission / reception processing circuit 216 inputs parameters such as the data transfer amount from the transfer control circuit 221, creates an IEEE 1394 packet, and stores it in the transmission / reception buffer 215.

The transfer control circuit 221 in the interface control unit 22 uses the parameters of the command packet sent from the reception buffer 214 to determine the data transfer amount in the IEEE 1394 interface 11 corresponding to the first data transfer amount of the present invention (hereinafter, data transfer amount). The amount A) and the amount of data transfer in the ATAPI interface 31 corresponding to the second amount of data transfer (hereinafter, the amount of data transfer B) are obtained and compared. Then, in accordance with the comparison result, the data transfer amount is set in the packet transmission / reception processing circuit 216 and the sequence control circuit 232, and the packet transmission / reception processing circuit 216 and the sequence control circuit 232 are activated.

The data transfer circuit 231 exchanges data with the packet transmission / reception processing circuit 216. In addition, data is input and output to and from the peripheral device 3 via the ATAPI interface 31.

The sequence control circuit 232 receives the command information from the transfer control circuit 221, and activates the data transfer circuit 231 to transmit the command to the peripheral device 3.

Next, a flow of data transfer among the PC 1, the data transfer device 2 and the peripheral device 3 will be described.

For data transfer by IEEE1394,
There are Isochronous mode and Asynchronous mode.
In the Isochronous mode, a node number is assigned to each electronic device connected to the IEEE 1394 interface, and 125 μs is set to 1 between the electronic devices.
Periodic data transfer is performed. On the other hand, Asynchronous
In mode, data transfer is performed asynchronously and Write, Re
Exchange with the file system is performed by transaction processing such as ad and Lock.

FIG. 2 shows a flow of a series of data among the PC 1, the data transfer device 2 and the peripheral device 3 when the Read command is issued from the PC 1.

First, in the command phase Ph1,
“Block Write Request” is sent from the PC 1 to the data transfer device 2.
In response to this, the data transfer device 2 sends a “Block Read Request” to the PC 1 to request command transmission. In response to this, the PC 1 sends “Block Read Request”.
Response ”to transmit the Read command. When the data transfer device 2 receives the Read command from the PC 1,
The command described in the CDB of the packet is issued to the peripheral device 3 via the TAPI interface 31.

Here, the packet issued by the Read command on the IEEE 1394 interface will be described with reference to FIG.

The command packet is roughly divided into IE
The EE 1394 header 301, the IEEE 1394 command 302, and the ATAPI command 303 are included. The IEEE 1394 header 301 describes packet header information. “Destination_ID” indicates the ID of the data transfer destination (node number of the data transfer device 2 in FIG. 2). “Tl (transaction label)” indicates the packet number, and “rt (Retry code)” indicates the retry type. And "tcode (transaction code)" is IE
Indicates the type of packet defined in EE1394,
Further, “pri (priority)” indicates the priority order of packets. “Source_ID” indicates the ID of the data transfer source (node number of PC1 in FIG. 2). “RCode (response cod
e) ”indicates the processing status of the transmitted packet, and“ da ”
“Ta_length” indicates the data length of the data field of the packet.

The IEEE 1394 command 302 includes I
The command parameters for the EEE1394 control unit 21 are described. The "next_ORB" field indicates the address of the storage destination of the next command. “D” and “p”
Will be described in detail later. "Data_descript
“Or” indicates the start address of the memory that stores the data, and “data_size” describes the data transfer amount A corresponding to the first data transfer amount of the present invention.

In the ATAPI command 303, the command parameter for the peripheral device 2 is CDB (Command Desc).
riptor Block). When accessing a file system such as a DVD that handles audio / video data as in the present embodiment, an ATAPI command is used as a command described in the CDB.

FIG. 4 shows the format of the ATAPI command described in the CDB. In the figure, the "Operation Code" of the 0th byte corresponds to "CDB [0]" in FIG. 3, and similarly, the nth byte (n is a natural number) corresponds to "CDB [n]". Of these, the 6th to 9th bytes "Transfer l
In "ength", the data transfer amount B corresponding to the second data transfer amount of the present invention is described.

Next, in the data transfer phase Ph2, data is transferred from the peripheral device 3 to the data transfer device 2 in accordance with the command issued by the data transfer device 2.
The data transfer device 2 transfers the transferred data to the IEEE 13
The packet is shaped into a 94 packet and transmitted to the PC 1 via the IEEE 1394 interface 11. When the PC 1 receives the packet, the PC 1 sends “Write Respon
se ”is transmitted. The processing in the data transfer phase Ph2 is repeated until the transfer of all the data requested by the PC1 is completed.

When the transfer of all the data is completed, the status transfer phase Ph3 starts and the data transfer device 2
A status packet is sent from the PC 1 to the PC 1 by “Block Write Request”, and a series of data transfer processing is completed.

FIG. 5 shows the format of the status packet on the IEEE 1394 interface. The status of the data transfer process is indicated by "sbp_status". This will be described later in detail.

Next, regarding the operation of the data transfer device 2,
Description will be given according to the flowchart of FIG. For the sake of convenience, it is assumed that the Read command is issued from the PC 1.

First, when a command is issued from PC1, the command is IEEE1 in step S101.
After being taken into the physical layer controller 211 via the 394 interface 11 and subjected to DS demodulation, LINKC
It is sent to the packet filter 213 via the ORE 212. Then, the packet filter 213 analyzes the header of the command packet, determines that the received packet is a command, and stores it in the reception buffer 214.

In step S102, the transfer control circuit 221 in the interface controller 22 compares the data transfer amount A with the data transfer amount B. Note that, as described above, the data transfer amount A is determined by the reception buffer 214.
Among the parameters of the command packet stored in
It can be obtained from the information described in "ta_size". Similarly, the data transfer amount B can be obtained from the information described in "Transfer length" in the CDB field information. The process proceeds to S103, and when A = B, proceeds to step 104.

When A <B, the transfer control circuit 22
The execution of the command is stopped by 1 so that the data transfer process is not performed. The reason for this will be described later.

In step S103, the data transfer amount B is set as the data transfer amount between the PC 1 and the peripheral device 3. Specifically, the transfer control circuit 221 causes the IE
The data transfer amount A in the EE1394 control unit 21 is converted into the data transfer amount B.

In a succeeding step S104, the transfer control circuit 221 causes the IEEE 1394 control unit 21 and A
The TAPI control unit 23 is activated and data transfer is performed. Specifically, the data transmitted from the data transfer circuit 231 is automatically divided by the packet transmission / reception processing circuit 216 into a data packet of an arbitrary size and stored in the transmission / reception buffer 215. Then, the data packet is sent to the LINKCORE 212, an error detection code and the like is created and added, and is shaped as a packet for IEEE1394. After that, the packet is transmitted from the physical layer controller 211 to the PC 1 via the IEEE 1394 interface 11.

Finally, in step S105, the packet transmission / reception processing circuit 216 and the sequence control circuit 2
A control signal indicating that the data transfer is completed is output from 32 to the transfer control circuit 221, and a series of data transfer processing is completed.

In step S102, A <B
When, the data transfer process is not performed. This is because the data transfer amount B cannot be changed and the data transfer amount A must be adjusted when the data transfer amounts do not match, but the data transfer amount A is smaller than the value indicated in the command. Because it cannot be increased.

As described above, according to the present embodiment, the interface controller 22 compares the data transfer amount A with the data transfer amount B. As a result, when A> B, the data transfer amount B is the PC 1 and the peripheral device 3. And the amount of data transfer between them and the data transfer is performed according to the command. As a result, the data transfer can be executed while stabilizing the operations of the PC 1 and the peripheral device 3.

(Second Embodiment) FIG. 7 shows a second embodiment of the present invention.
2 shows a configuration of a data transfer device according to the exemplary embodiment. The data transmission device 2A according to the present embodiment includes a status transmission circuit 24 for transmitting status information of a command execution result to the PC 1, and an interface control unit 22A having a configuration different from that of the first embodiment. The status of the result of data transfer can be displayed on.

FIG. 8 shows a list of status information transmitted to the PC 1. The status information is the data transfer device 2
It has a CPU 4 connected to the outside of A. Valu in the figure
The value indicated by e is a value that can be taken by "sbp_status" in the status packet of FIG. Where Value
Codes with values "13" and "14" are the current SBP
-2 is undefined in the standard and added in the present invention.

The transfer control circuit 221A in the interface control unit 22A has a function of stopping the execution of the command when the data transfer amount A and the data transfer amount B are compared and the results do not match. Further, it outputs a control signal DT1 to the status control circuit 24 according to the execution result of the command.

The status transmission circuit 24 transmits the control signal DT1 from the transfer control circuit 221A to the CPU 4, stores the status packet (packet in which the status information is described) sent from the CPU 4, and stores it in the packet transmission / reception processing circuit 216. The status signal DT2 is transmitted. The status transmission circuit 24 can input and store a status packet from the CPU 4 even during execution of the data transfer process. It is also possible to discard the already stored status packet, store a new status packet according to the command execution result, and transmit the status signal DT2 after the data transfer process is completed.

Next, the operation of the data transfer device 2A will be described with reference to the flowchart of FIG. For the sake of convenience, it is assumed that the Read command is issued from the PC 1.

First, a command is issued from the PC 1, and a command receiving process is performed in step S201. Since this step S201 is the same as step S101 of FIG. 6, description thereof will be omitted here.

Next, in step S202, the transfer control circuit 221A in the interface control section 22A compares the data transfer amount A with the data transfer amount B. When A ≠ B as a result of the comparison, the transfer control circuit 221A suspends the execution of the command, and the status transmission circuit 24 indicates that the execution of the command has been suspended due to the mismatch of the data transfer amount. The signal DT1 is output.

In the following step S203, the control signal DT1 is transferred from the status transmission circuit 24 to the CPU 4,
In response to this, the CPU 4 causes the status transmission circuit 24 to
Status information indicating a mismatch in the data transfer amount ("Transfer Length" of Value value "13" in the list of FIG. 8)
disagreement ") is transmitted. The status transmission circuit 24 outputs the status packet received from the CPU 4 to the IEEE 1394 control unit 21 as a status signal DT2.
The status packet is transmitted to the PC 1 via the IEEE 1394 control unit 21, and the PC 1 displays the status indicating that the data transfer was not executed due to the mismatch of the data transfer amounts.

As described above, according to the present embodiment, when A ≠ B as a result of the comparison between the data transfer amount A and the data transfer amount B by the interface control unit 22A, the command execution is stopped. As a result, it is possible to prevent the operation of the PC 1 and the peripheral device 3 from becoming unstable due to the data transfer while the data transfer amounts do not match. If the command is not executed and the data is not transferred, the PC1
In addition, it is possible to display the status indicating that the data transfer is not performed due to the mismatch of the data transfer amounts.

Although the CPU 4 has been described as being connected to the outside of the data transfer device 2A, it may be provided inside the data transfer device 2A.

(Third Embodiment) FIG. 10 shows the configuration of a data transfer apparatus according to the third embodiment of the present invention. The data transfer device 2B according to the present embodiment includes an interface control unit 22B having a command determination circuit 222 that analyzes a command issued from the PC 1, and the data transfer amounts A and B are indirectly described in the command. And the case where the data transfer directions do not match.

The command determination circuit 222 inputs the command parameter stored in the reception buffer 214 through the transfer control circuit 221B. Then, the page_table_present bit in the command parameter (IE in FIG.
"P" in EE1394 command 302 is "1"
In this case, it is determined that the data transfer amount A is indirectly described in the command (page table mode), and “data_descriptor” and “data_siz” are set from the command parameter.
e ”is extracted and output to the transfer control circuit 221B. When the page_table_present bit is“ 0 ”, the data transfer amount A is set to“ data_size ”in the command parameter as described in the first embodiment. Directly written (direct memory mode).

Here, regarding the page table mode,
This will be described with reference to FIG.

In the page table mode, "data_de
The pointer to the page table is "data" in "scriptor".
The number of pages is described in “_size”. In this figure, this pointer is P10 and the number of pages is 4. In the page table (Page Table) referred to by the pointer P10, the memory is Offset-1 to offset-4 indicating the offset address of the area and le indicating the data length
n-1 to len-4 are stored. The first page is offset
A data buffer DataBuffer-1 having a data length len-1 at the reference destination of the pointer P11 described as -1. Similarly, pages 2 to 4 have data buffer Da
taBuffer-2 to DataBuffer-4.

Further, the command determination circuit 222 determines whether or not the data transfer amount B needs to be obtained from the peripheral device 3 based on the ATAPI command described in the CDB in the command parameter. Specifically, the described A
When the TAPI command is a command of a type in which the data transfer amount B is determined only after the peripheral device 3 is inquired, it is determined that the data transfer amount B needs to be obtained from the peripheral device 3. Then, the data transfer amount B to the peripheral device 3
The transfer control circuit 221B is controlled to inquire.

Further, the command judgment circuit 222 includes the direction bit (I in FIG. 3) indicating the data transfer direction in the IEEE interface 11 in the command parameter.
Based on "d") in the IEEE 1394 command 302, the IEEE corresponding to the first data transfer direction of the present invention
The data transfer direction in the E1394 interface 11 (hereinafter, data transfer direction X) is obtained. Further, the data transfer direction (hereinafter, data transfer direction Y) in the ATAPI interface 31 corresponding to the second data transfer direction of the present invention is input from the transfer control circuit 221B, and both are compared. Then, as a result of the comparison, when X ≠ Y, the PC
The transfer control circuit 221B is controlled so that the data transfer direction between the peripheral device 1 and the peripheral device 3 is the data transfer direction Y.

The transfer control circuit 221B uses the "data_descriptor" and "da" input from the command determination circuit 222.
The page table of PC1 is accessed based on "ta_size". Then, the information (offset address and data length for each page described above) stored in the page table is obtained from PC1 and based on this obtained information, Calculate the data transfer amount A. Note that the data transfer amount A
Can be calculated by summing the data lengths of all pages. For example, in FIG. 11, the data length len-
The data transfer amount A can be obtained by summing 1 to len-4.

Further, the transfer control circuit 221B has a function of inquiring the peripheral device 3 about the data transfer amount B according to the control from the command determination circuit 222.

Further, the transfer control circuit 221B has a function of inquiring the peripheral device 3 about the data transfer direction Y and outputting the data transfer direction Y to the command determination circuit 222.
Then, according to the control from the command determination circuit 222,
The data transfer direction of the IEEE 1394 control unit 21 is set to the data transfer direction Y.

Next, the operation of the data transfer device 2B in the page table mode will be described with reference to the flowchart of FIG. For convenience, the following description will be made assuming that the Read command is issued from the PC 1.

First, a command is issued from the PC 1, and a command receiving process is performed in step S301. This step S301 is the same as step S101 in FIG. 6, and therefore its explanation is omitted here.

Next, in step S302, the transfer control circuit 221B determines the command parameters stored in the reception buffer 214 to be the command determination circuit 222.
Sent to. Then, the command determination circuit 222 determines whether or not the data transfer amount A is described in the page table mode. As a result, if it is determined that the page table mode is not set, that is, the direct memory mode is set, the process proceeds to step S305, and if it is determined that the page table mode is set, the process proceeds to step S303.

In step S303, the page table is fetched from PC1. First, the command determination circuit 222 sets “data_de
"scriptor" and "data_size" are extracted and output to the transfer control circuit 221B.
Based on this information, the page table of PC1 is fetched.

In a succeeding step S304, the transfer control circuit 221B uses the information stored in the fetched table data to calculate the data transfer amount A by the method as described above.
Is calculated.

In step S305, the transfer control circuit 22
1B compares the data transfer amount A with the data transfer amount B. Then, as a result of the comparison, if A> B, the process proceeds to step S306, and if A = B, the process proceeds to step S307.

Since steps S306 and 307 have the same contents as steps S103 and 104 of FIG. 6, respectively,
The description is omitted here.

In step S308, when the data transfer processing is completed, the packet transmission / reception processing circuit 216 and the sequence control circuit 232 transfer the transfer control circuit 221.
A signal indicating the end of data transfer is output to B respectively.

In subsequent step S309, the transfer control circuit 221B outputs the control signal DT1 to the status transmission circuit 24, which indicates that the data transfer is completed.
In response to the control signal DT1, the status control circuit 24 transmits to the PC1 a status signal DT2 indicating that the execution of the command is completed.

Next, the operation of the data transfer device 2B when the peripheral device 3 is inquired about the data transfer amount B will be described with reference to the flowchart of FIG.

First, a command is issued from the PC 1, and a command receiving process is performed in step S401. Since this step S401 is the same as step S101 of FIG. 6, description thereof will be omitted here.

Next, in step S402, the transfer control circuit 221B determines the command parameters stored in the reception buffer 214 to be the command determination circuit 222.
Sent to. Then, the command determination circuit 222 analyzes the type of ATAPI command and determines whether or not the data transfer amount B needs to be obtained from the peripheral device 3. As a result, when it is determined that the inquiry is necessary, the process proceeds to step S403.

In step S403, the transfer control circuit 221B inquires of the peripheral device 3 about the data transfer amount B. Specifically, the transfer control circuit 221B
Sends a control signal to the sequence control circuit 232, and the sequence control circuit 232 sends a command to the peripheral device 3. In response to the command, the peripheral device 3 sends the data transfer amount B to the data transfer circuit 231. Then, the data transfer amount B is sent to the transfer control circuit 221B by the sequence control circuit 232. Then, the data transfer amount A and the data transfer amount B are compared. As a result of the comparison, when A ≧ B, the process proceeds to step S404.

When A <B, data transfer is not performed. This is for the same reason as described in the first embodiment.

In subsequent step S404, the transfer control circuit 221B sets the data transfer amount B as the data transfer amount between the PC 1 and the peripheral device 3.

Steps S405 to 407 have the same contents as steps S307 to 309 of FIG. 12, respectively, and therefore description thereof will be omitted here.

Next, the operation of the data transfer device 2B when the data transfer directions do not match will be described with reference to the flowchart of FIG.

First, a command is issued from the PC 1, and a command receiving process is performed in step S501. Since this step S501 is the same as step S101 of FIG. 6, description thereof will be omitted here.

Next, in step S502, the transfer control circuit 221B inquires of the peripheral device 3 about the data transfer direction Y. The data transfer direction Y obtained as a result of the inquiry is transferred from the peripheral device 3 to the transfer control circuit 221B.
Sent to. Thereafter, the data transfer direction Y is determined by the transfer control circuit 221B together with the command parameters stored in the reception buffer 214 together with the command determination circuit 222.
Sent to.

In step S503, the command determination circuit 222 determines the data transfer direction X and the data transfer direction Y.
And are compared. The data transfer direction X can be obtained by referring to the direction bit indicated by "d" in the command packet. As a result of comparison, X
When ≠ Y, the command determination circuit 222 controls the transfer control circuit 221B so as to stop the execution of the command. Then, the transfer control circuit 221B stops the execution of the command, and outputs a control signal to the status transmission circuit 24, which indicates that the execution of the command has been stopped due to a mismatch in the data transfer directions.

In the following step S504, the control signal is transmitted from the status transmission circuit 24 to the CPU 4,
In response to this, the status transmission circuit 24 notifies the status transmission circuit 24 of the status information indicating the disagreement of the data transfer direction (“Direction disagreeme of Value value“ 14 ”in the list of FIG. 8).
nt ") is transmitted. Then, the status packet is transmitted to the PC 1 via the IEEE 1394 control unit 21 and the status indicating that the data transfer was not executed due to the mismatch of the data transfer directions is displayed. To be done.

Another operation of the data transfer device 2B when the data transfer directions do not match will be described with reference to the flowchart of FIG.

Since steps S601 and 602 have the same contents as steps S501 and 502 of FIG. 14, respectively, description thereof will be omitted here.

In step S603, the command determination circuit 222 determines the data transfer direction X and the data transfer direction Y.
And are compared. As a result of the comparison, when X ≠ Y, the command determination circuit 222 sends P to the transfer control circuit 221B.
The data transfer direction between C1 and the peripheral device 3 is controlled to be the data transfer direction Y.

In the following step S604, the data transfer direction between the PC 1 and the peripheral device 3 is set to the data transfer direction Y by the transfer control circuit 221B. Specifically, the data transfer direction X is converted into the data transfer direction Y.

Subsequent steps S605 to 607 are as shown in FIG.
Since the contents are the same as those in steps S307 to 309 of step 2, the description thereof will be omitted here.

As described above, according to the present embodiment, even when the data transfer amount A is shown in the page table mode, the data transfer amount A is calculated from the information obtained by accessing the page table of the PC 1. can do. Further, even if the data transfer amount B is not known from the information described in the command, the data transfer amount B can be obtained by inquiring the peripheral device 3. As a result, even if the data transfer amount A or the data transfer amount B is not directly described in the command, the data transfer amount A or the data transfer amount B is accurately grasped and the data transfer is executed. The device can be realized.

When the data transfer directions do not match, the transfer control circuit 221 forcibly cancels the command execution. As a result, it is possible to prevent the operation of the PC 1 and the peripheral device 3 from becoming unstable due to the data transfer while the data transfer directions do not match.

If the data transfer directions do not match, the data is transferred using the data transfer direction Y as the data transfer direction between the PC 1 and the peripheral device 3, and the PC 1
Also, data transfer can be executed while stabilizing the operation of the peripheral device 3.

In the above description of the first to third embodiments, the operation of the data transfer devices 2, 2A and 2B has been described by taking the Read command as an example. However, the same applies to the Write command according to the present invention. The effect can be obtained.

The data transfer devices 2, 2A and 2B are
IEEE 1394 interface 11 and ATAP
Although it has been described that it is connected to the I interface 31, the effects of the present invention can be obtained even in the case of an interface other than this.

With respect to the status information in the second and third embodiments, a code having a Value value of "13" is used as a code indicating a discrepancy in the data transfer amount, and "1" is set.
The 4 "code is defined as indicating the mismatch of the data transfer directions. However, the present invention is not limited to this, and the Valu corresponding to these codes is used.
The e value may be another value.

[0117]

As described above, according to the present invention, inconsistency in data transfer amount and data transfer direction between the first electronic device having the first interface and the second electronic device having the second interface. If the two do not match, execution of the data transfer can be stopped. Accordingly, it is possible to prevent the operations of the first and second electronic devices from becoming unstable due to the data transfer while the data transfer amounts or the data transfer directions do not match.

Further, when the data transfer amount and the data transfer direction do not match, the operation of the first and second electronic devices is adjusted by adjusting the data transfer amount and the data transfer direction between the first and second electronic devices. It is possible to execute data transfer while stabilizing the above.

Further, for a command in which the first or second data transfer amount is not directly described, the first or second data transfer amount is accurately grasped and the data transfer is executed. A possible data transfer device can be realized.

[Brief description of drawings]

FIG. 1 is a configuration diagram of a data transfer device according to a first embodiment of the present invention.

FIG. 2 is a diagram showing how data is transferred among a PC, a data transfer device, and peripheral devices.

FIG. 3 is a diagram showing a format of a command packet on an IEEE 1394 interface.

FIG. 4 is a diagram showing a format of a SCSI command described in the CDB in FIG.

FIG. 5 is a diagram showing a format of a status packet on an IEEE 1394 interface.

6 is a flowchart of the operation of the data transfer device of FIG.

FIG. 7 is a configuration diagram of a data transfer device according to a second embodiment of the present invention.

FIG. 8 is a list of status information.

9 is a flowchart of the operation of the data transfer device of FIG.

FIG. 10 is a configuration diagram of a data transfer device according to a third embodiment of the present invention.

FIG. 11 is a schematic diagram of a page table mode.

12 is a flowchart of the operation of the data transfer device of FIG. 11 when the data transfer amount is shown in page table mode.

FIG. 13 is a flowchart of an operation of the data transfer device of FIG. 11 when inquiring a peripheral device about a data transfer amount.

FIG. 14 is a flowchart of the operation of the data transfer device of FIG. 11 when the data transfer directions do not match.

15 is a flowchart of the operation of the data transfer device of FIG. 11 when the data transfer directions do not match.

FIG. 16 is a configuration diagram of a conventional electronic device control apparatus.

FIG. 17 is a configuration diagram of a conventional data transfer device.

[Explanation of symbols]

1 PC (first electronic device) 11 IEEE 1394 interface (first interface) 2, 2A, 2B data transfer device 21 IEEE 1394 control unit 211 physical layer controller 212 LINKCORE 213 packet filter 214 reception buffer 215 transmission / reception buffer 216 packet transmission / reception processing circuit 22, 22A, 22B Interface control unit 221, 221A, 221B Transfer control circuit 222 Command determination circuit 23 ATAPI control unit 231 Data transfer circuit 232 Sequence control circuit 24 Status transmission circuit 3 Peripheral device (second electronic device) 31 ATAPI interface ( Second interface) 4 CPU DT1 control signal DT2 status signal

   ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor Hiroshi Yoshida             1006 Kadoma, Kadoma-shi, Osaka Matsushita Electric             Sangyo Co., Ltd. F term (reference) 5B014 EB01 FA04 GC12 GD05 GD22                       GD35 HC09                 5B065 BA01 BA08 CE03 CE23                 5B077 AA15 NN02

Claims (16)

[Claims] 1. A first electronic device having a first interface and a second electronic device having a second interface, which is provided between the first electronic device and the first electronic device according to a command issued by the first electronic device. A data transfer device for transferring data between a first electronic device and a second electronic device, wherein the first data transfer amount in the first interface and the second interface in the second interface are based on information described in the command. An interface control unit is provided for obtaining the second data transfer amount, performing comparison, and stopping the execution of the command when the first and second data transfer amounts do not match as a result of this comparison. And a data transfer device. 2. The first electronic device having a first interface and the second electronic device having a second interface are provided between the first electronic device and the second electronic device according to a command issued from the first electronic device. A data transfer device for transferring data between a first electronic device and a second electronic device, wherein the first data transfer amount in the first interface and the second interface in the second interface are based on information described in the command. When the second data transfer amount is smaller than the first data transfer amount as a result of this comparison, the second data transfer amount is obtained and compared,
A data transfer device comprising: an interface control unit that executes the command, with the second data transfer amount as a data transfer amount between the first and second electronic devices. 3. The data transfer device according to claim 1, wherein the interface control unit indirectly describes the first data transfer amount in the command based on information described in the command. If it is determined that it is indirectly described, information about the first data transfer amount is obtained from the first electronic device, and based on the obtained information, the 1
A data transfer device for calculating the data transfer amount of 4. The data transfer device according to claim 1, wherein the interface control unit obtains the second data transfer amount from the second electronic device based on the information described in the command. When it is determined that it is necessary, it is determined whether the second
2. The data transfer device, wherein the electronic device inquires about the second data transfer amount. 5. The first electronic device having a first interface and the second electronic device having a second interface are provided between the first electronic device and the second electronic device in accordance with a command issued from the first electronic device. A data transfer device for transferring data between a first electronic device and a second electronic device, wherein the first data transfer direction in the first interface is obtained based on the information described in the command, and the second Obtaining a second data transfer direction at the second interface from an electronic device,
And a second data transfer direction are compared with each other. As a result of the comparison, when the first and second data transfer directions do not match, the interface control unit suspends the execution of the command. Data transfer device. 6. The first electronic device having a first interface and the second electronic device having a second interface are provided between the first electronic device and the second electronic device according to a command issued from the first electronic device. A data transfer device for transferring data between a first electronic device and a second electronic device, wherein the first data transfer direction in the first interface is obtained based on the information described in the command, and the second Obtaining a second data transfer direction at the second interface from an electronic device,
And a second data transfer direction are compared, and as a result of this comparison, when the first and second data transfer directions do not match, the second data transfer direction is set to the first and second data transfer directions.
A data transfer device comprising an interface control unit for executing the command as a data transfer direction between the electronic devices. 7. The data transfer apparatus according to claim 1, wherein the interface control unit outputs a control signal when the mismatches occur, and the data transfer apparatus responds to the control signal according to the control signal. A data transfer device comprising a status transmission circuit for sending a status signal indicating the inconsistency to the first electronic device. 8. The data transfer device according to claim 2, wherein the interface control unit outputs a control signal when execution of the command is completed, and the data transfer device controls the control signal. A data transfer device comprising a status transmission circuit that sends a status signal indicating that the execution of the command has ended to the first electronic device in response to a signal. 9. One of claims 1, 2, 5 and 6
In the data transfer device according to the item 1, the first interface is IEEE 1394 (In
stitute of Electrical and Electronics Engineers 13
94) A data transfer device characterized in that 10. The data transfer apparatus according to claim 9, wherein the protocol of the first interface is SBP-
2 (Serial Bus Protocol 2) or SBP-3. 11. The data transfer device according to claim 1, wherein the second interface is an ATA (AT Attachmen).
t) or ATAPI (ATA Packet Interface). 12. The data transfer device according to claim 1, wherein the data transferred between the first and second electronic devices is at least one of video and audio. The data transfer device is characterized in that 13. A first having a first interface
According to the command issued from the electronic device of
Is a data transfer method for transferring data between the electronic device and a second electronic device having a second interface, wherein the first interface in the first interface is based on the information described in the command. A data transfer amount and a second data transfer amount at the second interface are obtained, and the first data transfer amount and the second data transfer amount are compared, and as a result of the comparison, the first and the second data transfer amounts are compared. When the data transfer amounts of No. 2 do not match, the execution of the command is stopped, and the mismatch is indicated to the first electronic device. 14. A first having a first interface
According to the command issued from the electronic device of
Is a data transfer method for transferring data between the electronic device and a second electronic device having a second interface, wherein the first interface in the first interface is based on the information described in the command. A data transfer amount and a second data transfer amount at the second interface are obtained, and the first data transfer amount and the second data transfer amount are compared, and as a result of the comparison, the second data is transferred. When the transfer amount is smaller than the first data transfer amount, the command is executed by setting the second data transfer amount as the data transfer amount between the first and second electronic devices, and A data transfer method, characterized by indicating to an electronic device that execution of the command has ended. 15. A first having a first interface
According to the command issued from the electronic device of
A data transfer method for transferring data between the electronic device and a second electronic device having a second interface, the first data in the first interface being based on information described in the command. Obtaining a transfer direction, obtaining a second data transfer direction at the second interface from the second electronic device, comparing the first data transfer direction and the second data transfer direction, and As a result of the comparison, when the first and second data transfer directions do not match, the execution of the command is stopped, and the first electronic device indicates the mismatch. 16. A first having a first interface
According to the command issued from the electronic device of
Is a data transfer method for transferring data between the electronic device and a second electronic device having a second interface, wherein the first data in the first interface is based on information described in the command. Obtaining a transfer direction, obtaining a second data transfer direction at the second interface from the second electronic device, comparing the first data transfer direction and the second data transfer direction, and As a result of the comparison, when the first and second data transfer directions do not match, the second data transfer direction is set as the data transfer direction between the first and second electronic devices.
A data transfer method, comprising: executing the command, and indicating to the first electronic device that the execution of the command has ended.