JP2003262848A - Method for driving electro-optical device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To secure the sufficient number of gradations while preventing the deterioration of a picture in the case of MLS (multi-line selection)-driving a liquid crystal display element. <P>SOLUTION: The number of gradations is secured by using a method for MLS driving, a frame rate control (FRC) and a dither system jointly. In order to display some density, a first FRC gradation is applied to a blank pixel in one of dither patterns in figure 2 (b), and a second FRC gradation is applied to a hatched pixel. In the method for MLS driving, in order to group four lines, the dither patterns are fixed with a two-pixel group as a unit. When the number of pixels of the first FRC gradation is odd in some pixel group, the positions of the first FRC gradations in other pixel groups which are vertically adjacent to each other are made to be different from each other to prevent a signal electrode voltage from becoming a high level continuously. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of driving an electro-optical element such as liquid crystal.

[0002]

2. Description of the Related Art (1) MLS + FRC method Conventionally, an MLS (Multi-Line Selection) driving method has been used as a driving method for a plurality of electro-optical elements provided at intersections between a plurality of scanning electrodes and a plurality of signal electrodes. Are known. According to the MLS driving method, in order to select a pixel arranged on a predetermined number of scan electrodes among a plurality of scan electrodes, a scan signal of a voltage specified by an orthogonal function is simultaneously supplied to these scan electrodes. It Further, simultaneously with the supply of these scanning signals, a data signal specified by the scanning signals and display data to be displayed by the electro-optical element is supplied to one signal electrode. Then, the voltage defined by the scanning signal and the data signal is applied to the electro-optical element a plurality of times in one frame period.

In this MLS driving method, it is possible to directly realize multi-gradation display by using PHM modulation or PWM modulation together, but this causes a problem that the circuit becomes complicated. Therefore, the gradation realized by the MLS driving method is instantaneously turned on / off by 2
FRC (Frame Rate Control), which uses only gradation and switches this on / off for each frame to realize multiple gradations
It is common to realize multi-gradation by combining the methods.

Here, the MLS driving method is characterized in that the data signal in the non-selection period has a great influence on the pixel density. Particularly, when the data signals of high voltage level are concentrated and supplied to the signal electrodes within a short time, the deterioration of the display quality in the pixels in the non-selected period becomes large. For this reason, conventionally, the FRC on / off pattern has been determined so that a data signal of a high voltage level is not generated as much as possible, and when it is generated, it is dispersedly generated.

(2) Splicing phenomenon of moving image by MLS driving method When a moving image is displayed on a liquid crystal display device by the MLS driving method, a problem called splicing phenomenon may occur. The phenomenon will be described with reference to FIG. In the display screen 100 of the liquid crystal display device, the image 110 of the automobile is moving from the right to the left in the figure, and the background portion other than the image 110 is in a stationary state. The splicing phenomenon is a phenomenon in which the densities of the background portions 120 above and below the image 110 change according to the movement of the image 110, and vertical streaks appear. The image 110
Stops and the whole image becomes a still image, the splicing phenomenon does not occur.

Here, the reason why the splicing phenomenon occurs will be described by paying attention to the pixel 130 located at a position not overlapping the image 110. FIG. 7 is a graph showing the voltage applied to the target pixel 130 and the transmittance. Here, the “old image” time zone is a time zone in which the image 110 does not intersect the same column (vertical pixel) of the pixel of interest 130, and the “new image” time zone is the same of the pixel of interest 130. Statue 110 in a row
It is the time zone when crosses. Focusing on the drive voltage in FIG. 7, the voltage peaks (7 to 1) in a cycle of approximately 4 msec.
There is a timing to rise (to about 3 [V]). This timing is the selection period of the target pixel 130.

The example shown in the figure is an example in which a distributed MLS driving method is adopted. One frame is divided into four fields, and a selection period for each pixel is provided once for each field. Therefore, the cycle of the selection period in the figure is equal to the field cycle, and four times that is equal to the frame cycle. In the selection period, a predetermined voltage is applied to the scanning electrode and the signal electrode corresponding to the target pixel 130, and a voltage corresponding to the difference between the two is applied to the part of the target pixel 130. Further, in the period other than the selection period, that is, in the non-selection period, the scan electrode related to the target pixel 130 is in a high impedance state, but since the liquid crystal has a certain degree of conductivity, the target pixel 130 has a certain amount of ( During the "image" period, a voltage of about 1.5 [V] is applied.

Next, focusing on the curve of "transmittance",
When a high voltage is applied during the selection period, the pixel of interest 1
The transmittance at 30 rises sharply. Then, when the voltage decreases in the non-selection period, the transmittance gradually decreases due to the viscosity of the liquid crystal. Thus, the transmittance fluctuates in a sawtooth wave shape, but this fluctuation cannot be recognized by the naked eye due to the afterimage phenomenon. The curve of "moving average" shown in the figure is a value obtained by averaging the curve of "transmittance" over several msec before and after. The change in transmittance that can be visually recognized is almost equal to this curve.

Next, referring to the voltage in the non-selection period immediately after switching from the "old image" to the "new image" in the figure, the notch whose level drops to almost 0 [V] extends over three fields. In the next field, a peak reaching a level of about 3 [V] appears.
Then, thereafter, the same pattern is repeated every four fields (= 1 frame). This is because in the non-selection period of the target pixel 130 in order to display the image 110,
It means that the voltage of the pattern of "0 [V], 0 [V], 0 [V], high voltage level" was repeatedly applied to the signal electrode.

In the three fields immediately after switching from the "old image" to the "new image", the effective value of the voltage level in the non-selection period is lowered by the notch, so that the transmittance of the target pixel 130 is reduced. The moving average has dropped significantly. However, regarding the effective value of the voltage during the non-selection period within a long time, "old image" and "new image"
Since there is no big difference between them, the level of the moving average is gradually returning to the original level. The change in the moving average of the transmittance, which occurs when the images are switched, is recognized by the observer as a “strip” extending in the vertical direction of the image 110, that is, splicing.

[0011]

By the way, the above-mentioned M
When a sufficient number of gradations cannot be secured even when the FRC method is used together with the LS driving method, it is possible to further increase the number of gradations with the naked eye by further using the dither method. At that time, even if each FRC pattern is determined so that a data signal with a high voltage level does not occur independently, depending on the dither pattern, the pattern of the voltage level of the data signal collapses and a data signal with a high voltage level is generated. There is also. In a general computer graphic image, since the same gradation is given to a continuous wide range of pixels, in such a case, a high voltage level data signal is continuously applied to one field in one frame. A state in which the voltage is applied to the signal electrode (in other words, a state in which a low voltage is continuously applied in the other three fields) may occur.

Then, a selection mode of a plurality of FRC patterns used for the dither pattern (for example, FRs different from each other)
Depending on the case (for example, having a C cycle), a frame in which a high voltage level continuously occurs in one field and a frame other than that may be alternately repeated in several frame cycles. In other pixels on the same column as the plurality of pixels related to such a data signal, focusing on the drive voltage pattern in the non-selection period, for example, the pattern of “old image” and “new image” shown in FIG. Thus, a voltage pattern is generated such that the above pattern and the above pattern alternately occur in a cycle of several frames.

That is, even if the image displayed on the liquid crystal display device is a still image, a phenomenon in which the transmittance varies as in the splicing phenomenon occurs depending on the FRC pattern and the dither pattern. Then, if the variation of the transmittance is repeated in a cycle of several frames, this appears as flicker or jitter, which causes a problem that the image quality is deteriorated. The present invention has been made in view of the above circumstances, and an object thereof is to provide a driving method of an electro-optical element capable of ensuring a sufficient number of gradations while preventing deterioration of image quality.

[0014]

In order to solve the above problems, in a method of driving an electro-optical element according to the present invention, a plurality of electro-optical elements provided at intersections between a plurality of scanning electrodes and a plurality of signal electrodes. A method of driving an electro-optical element for driving an element, wherein a plurality of pixels corresponding to one signal electrode form a pixel group for each predetermined number of scanning electrodes, and each pixel group is selected a plurality of times within one frame. The scanning signals of the voltage specified by the elements of each column included in the predetermined matrix are simultaneously supplied to the plurality of scanning electrodes corresponding to one pixel group, and each pixel belonging to the one pixel group is A data signal of a voltage specified based on the number of disagreements between the frame pixel density to be displayed in each frame and the elements of each column included in the matrix is supplied to each of the signal electrodes at the same time as each of the scanning signals. In the method of driving an optical element, based on a dither pattern defined in units of a plurality of pixel groups, one of the display densities of a predetermined gradation number is determined for each pixel belonging to these pixel groups. And for each pixel belonging to the plurality of pixel groups, based on a frame rate control pattern corresponding to the determined display density, a frame pixel density of a gradation number smaller than the gradation number of the display density. And a frame pixel density of each pixel in any one pixel group of a plurality of pixel groups that is a unit of the dither pattern, and an arbitrary column of the matrix. When the number of mismatches of is the maximum value or the minimum value, at least each pixel in another pixel group adjacent to the one pixel group concerned As the number of mismatches frame pixel density and the column is less than said maximum value exceeds said minimum value, characterized in that setting the dither pattern.

In the driving method of the electro-optical element, when one frame rate control pattern is applied to all the pixels forming one pixel group, the frame pixel of each pixel is It is preferable to set the number of disagreements between the density and any column of the matrix to exceed the minimum value and less than the maximum value.

In the method of driving the electro-optical element, the scan electrodes corresponding to the one pixel group and the scan electrodes corresponding to the other pixel groups adjacent to the one pixel group are continuously scanned. It is preferable that these pixel groups correspond to a common signal electrode.

Further, in another aspect of the driving method of the electro-optical element of the present invention, the first plurality of electro-optical elements arranged in a matrix corresponding to the intersections of the plurality of scanning electrodes and the plurality of signal electrodes. A method of driving an electro-optical element for driving an element, wherein a combination of a predetermined number of scan electrode voltages is selected for each simultaneous selection of a predetermined number of scan electrodes among the plurality of scan electrodes, in order to display multi-gradation, A predetermined number specified by the two gray levels to be displayed by the plurality of second electro-optical elements of the first plurality of electro-optical elements corresponding to the intersection of the predetermined number of scanning electrodes and one signal electrode. Applying the predetermined number of signal electrode voltages, each signal electrode voltage being one of a plurality of predetermined value voltages, to the one signal electrode. Each element of the electro-optical element of Each cycle of simultaneous selection of the predetermined number of scan electrodes, which is defined for each of the multiple gradations, forms a matrix pattern group that defines two gradations to be displayed by each of the plurality of second electro-optical elements A method for driving an electro-optical element, which is performed in accordance with at least a first pattern and a second pattern, which is used by switching to a plurality of second patterns defined by elements included in one row in the first pattern.
Of two gradations to be displayed by the electro-optical element and a combination of the scan electrode voltage applied to the scan electrodes for each simultaneous selection of the scan electrodes, the maximum voltage of the plurality of predetermined voltages or 1st which is one of the minimum voltage
Of the second pattern corresponding to the one row in the first pattern when the signal electrode voltage of the first pattern is applied to the signal electrode of the first pattern. Specified by a combination of two gradations to be displayed by the plurality of second electro-optical elements defined by elements included in a row and a scan electrode voltage applied to the scan electrodes for each simultaneous selection of the scan electrodes. The second signal electrode voltage to be applied to the one signal electrode is different.

[0018]

DETAILED DESCRIPTION OF THE INVENTION 1. MLS Driving Method Next, a driving method of the liquid crystal display element according to the embodiment of the present invention will be described. In the present embodiment, the MLS driving method, the FRC method, and the dither method are used in combination, and thus these methods will be sequentially described. First, in the MLS driving method, two types, a non-dispersion type and a dispersion type, are known.
In the distributed MLS driving method, one frame is equally divided into, for example, first to fourth fields f1 to f4, and scan electrode groups are sequentially selected for each field. In the non-dispersive MLS driving method, a selection period for each scan electrode group is provided in one frame, and the selection period is the first.
~ Divided into a fourth period. The present invention can be applied to both the non-dispersion type and the dispersion type, but is particularly preferably used for the dispersion type. This is because the high voltage signal electrode voltage is not continuously generated in the non-dispersion type, but such a situation may occur depending on the display content in the dispersion type. Therefore, the distributed type will be described below as an example.

The structure of the liquid crystal display element used in this embodiment is shown in FIG. In the figure, X1, X2, ... Are signal electrodes, and Y1, Y2, Y3 ,. Liquid crystal is sandwiched between these signal electrodes and scanning electrodes, and pixels are formed at the intersections of these electrodes. In this embodiment, the number of scan electrodes is 4S, and every four scan electrodes are simultaneously driven. First, a set of scan electrodes that are simultaneously selected is referred to as a scan electrode group G1, G2, ..., GS.

Further, in each scan electrode group, the first scan electrode Y1, Y5, ..., Yk + 1, ... Is the first scan electrode R1, the second scan electrode Y2, Y6 ,. ,
Is the second scan electrode R2, the third scan electrode Y3, Y
, ..., Yk + 3, ... are third scan electrodes R3, and fourth scan electrodes Y4, Y8 ,.
, Respectively. Further, the four pixels corresponding to the intersecting positions of the four scan electrodes belonging to one scan electrode group and the one signal electrode are referred to as a “pixel group”. The coordinates of the pixel group are expressed by a combination of the sign of the signal electrode and the sign of the scan electrode group, such as “(X1, G1)”.

Reference numeral 10 denotes a signal electrode drive circuit, which applies a signal electrode voltage (data signal) described later to each signal electrode. Reference numeral 20 denotes a scan electrode drive circuit, which is + V3 having a positive polarity with respect to the scan electrode which performs scanning with reference voltage VC as a reference.
Alternatively, one of negative polarity −V3 is applied. In this embodiment, one frame has four fields (first to first).
The fourth fields f1 to f4) are equally divided, and the selection periods SV1 to SV for each scan electrode group are included in each field.
V4 is provided. In each field,
, GS are provided in order of the scan electrode groups G1, G2, ..., GS. The operation within this selection period will be described in more detail with reference to FIG. In FIG. 1B, a “matrix” having “1” or “0” as an element is shown. This matrix shows the transition of the pattern of the scan electrode voltage, and is referred to as “scan pattern matrix” below. Call. Further, each column of the scan pattern matrix is called a "scan pattern".

"1" of each element in the scan pattern matrix
Means selecting + V3 and "0" selecting -V3 as the scan electrode voltage. Each "row" of the matrix is 4
It consists of one element and four selection periods SV in one frame
1 to SV4, the selection voltage applied to one scan electrode is represented in time series. On the other hand, each “column” of the matrix, that is, the scanning pattern is composed of four elements, and has a set of polarities of the selection voltages applied to the scan electrodes R1 to R4 in any one of the selection periods SV1 to SV4. Will be shown. For example, referring to the first row of this matrix, the voltage applied to the first scan electrode R1 is + V3, + V3, −V in the selection periods SV1 to SV4.
It turns out that it changes in order of 3, + V3.

Here, the density that each pixel should realize in one frame is called "frame pixel density". The frame pixel density is either off (white) or on (black). Here, a pattern representing the frame pixel densities of the scan electrodes R1 to R4, which is "0" for off (white) and "1" for on (black), is called a "display pattern". In FIG. 1A, all the display patterns (16 types) that can be realized by four pixels are shown in the columns of “R1” to “R4”.

Next, the signal electrode voltages in the selection periods SV1 to SV4 are selected from ± V2, ± V1 and VC. The magnitude relationship between the above voltages is “+ V3> + V2>
+ V1>VC>-V1>-V2> -V3 ". The signal electrode voltage is selected based on the number of mismatches between each element of the scanning pattern and each element of the display pattern. That is, the number of mismatches between the scanning pattern and the display pattern is "4".
+ V2 is selected as the signal electrode voltage in the case of, similarly, + V1 is set when the number of mismatches is “3”, and VC is set in the case of “2”.
When the value is "1", -V1 is selected as the signal electrode voltage, and when the value is "0", -V2 is selected as the signal electrode voltage.

Here, the method of selecting the signal electrode voltage when the display pattern of a certain pixel group is "0, 0, 0, 0 (white white white white)" will be specifically described. First, according to FIG. 1B, the scanning pattern in the selection period SV1 is "1, 0, 1, 1". Therefore, the number of disagreements between the display pattern and the scanning pattern is “3”,
“+ V1” is selected as the signal electrode voltage. Referring to the elements of the scanning pattern in the selection periods SV2 to SV4 in FIG. 1 (b), there are three "1" elements and one "0" element. Therefore,
For the display pattern of "0,0,0,0 (white white white white)", "+ V1" is always selected as the signal electrode voltage in the selection periods SV1 to SV4.

A method of selecting the signal electrode voltage when the display pattern of a certain pixel group is "0, 0, 0, 1 (white-white-black-white)" will also be described. First, since the scanning pattern in the selection period SV1 is “1,0,1,1”, the number of mismatches between the display pattern and the scanning pattern is “2”, and “VC” is selected as the signal electrode voltage. become. Next, scanning patterns "1, 1, 0, 1", "0, 1, 1," in the selection periods SV2 to SV4.
The number of mismatches with the display pattern for "1" and "1, 1, 1, 0" is "2", "2", and "4", respectively. Therefore, the signal electrode voltages are selected in the order of “VC”, “VC”, “VC”, and “+ V2” in the selection periods SV1 to SV4. In this way, the signal electrode voltages selected in the selection periods SV1 to SV4 corresponding to each display pattern are shown in the columns of “SV1” to “SV4” in FIG.

Now, in FIG. 1A, "SV1" to "SV1"
Referring to the signal electrode voltage shown in the column of "V4", it can be seen that the display patterns are classified into two types.
First, one pattern is that "the signal electrode voltage must be ± V1
Display pattern that is “any of the above”, and these display patterns are referred to as “pattern A”. Another display pattern is a pattern in which the signal electrode voltage is always either ± V2 or VC, and there is a selection period in which the signal electrode voltage is always ± V2. These display patterns are called “pattern B”. The distinction between these patterns is described in the column of “voltage pattern” in FIG.

Explaining the distinction of voltage patterns from another point of view, there is a selection period in which the number of mismatches is "0 (minimum value)" or "4 (maximum value)" when the display pattern and the scanning pattern are compared. The existing display pattern belongs to the pattern B, and the display pattern in which the number of mismatches exceeds “0 (minimum value)” and less than “4 (maximum value)” in any selection period belongs to the pattern A. Further, as long as the scan pattern matrix shown in FIG. 1B is used, a display pattern in which the number of ON (black) or OFF (white) pixels is even belongs to pattern A, and a display pattern in which it is odd is a pattern. It belongs to B.

1.1. FRC method In the MLS driving method described above, the pixel density is off (white) or on (black) in frame units.
Only one of them can be selected. Therefore, in order to realize multi-gradation while using the MLS driving method, the FRC (Fra that switches on / off for each frame)
me Rate Control) method is used together. For example, an example of an FRC pattern for displaying gradations “9” and “11” when displaying “19 gradations” (gradations “0” to “18”) by the FRC method is shown in FIG. ) And (b).

These FRC patterns are defined in units of pixel groups, and hatched pixels are on (black) and blank pixels are off (white) in the figure. It should be noted that, in the present embodiment, it is possible to realize more gradations by using the dither method described later together. In order to distinguish between the final gradation and the gradation that can be realized only by the FRC method, the gradation that can be realized only by the FRC method is called “FRC gradation (or display density)”.

According to FIG. 3A, in order to realize the FRC gradation "9", ON (black) and OFF (white) frames are alternately assigned every 5 frames with a period of 10 frames. It should be noted that the FRC pattern is shifted by one frame for pixels that are adjacent to each other in the vertical and horizontal directions on the liquid crystal display element. Therefore, if the entire screen of the liquid crystal display device is FR
If the C gradation is set to "9", on (black) and off (white) pixels are arranged in a checkerboard pattern in units of one pixel, and the on / off state of each pixel is switched for each frame. It becomes a state. Further, according to FIG. 3B, in order to realize the FRC gradation “11”, 3 frames are assigned to ON (black) and 4 frames are assigned to OFF (white) in a cycle of 7 frames. .

The MLS driving method is characterized in that the data signal in the non-selection period greatly affects the pixel density. In particular, the display pattern (pattern B) in which a high voltage level of “± V2” occurs easily deteriorates the display quality in other pixels in the non-selected state. Therefore, the best solution is to not use the pattern B display pattern at all. Further, the suboptimal measure is to disperse the timing so that a high voltage level of "± V2" does not continuously occur. Therefore, in the present embodiment,
In any FRC gradation, the display pattern adopted in each frame is limited to that belonging to the pattern A, and the number of pixels turned on (black) or off (white) in each frame is always an even number. Is set to.

In this embodiment, any FR is used.
In any frame in C gradation, the same frame pixel density is set in the pixels corresponding to the first and third scan electrodes R1 and R3 in each pixel group, and the second and fourth pixels are set.
The same frame pixel density is set to the pixels corresponding to the scan electrodes R2 and R4.

1.2. Dither method By adopting the FRC method described above, multi-gradation display can be performed even in the MLS driving method.
When the number of gradations is increased only by the C method, the number of frames forming the FRC pattern increases, and flicker becomes noticeable. Therefore, in the present embodiment, a dither method that sets a different FRC gradation for each pixel is adopted.

In this dither method, the FRC gradation of some of the pixels in a certain range is set to the first FRC gradation (for example, FRC gradation "11") and the FRC gradation of other pixels is set.
By setting the RC gradation to the second FRC gradation (for example, FRC gradation "9"), it is intended to display an intermediate gradation between the first and second FRC gradations as a whole. It is a thing. The gradation to be finally displayed is called "dither gradation". In other words, when gradation data (dither gradation) of, for example, 256 gradations is supplied from the external device to the driving device of the liquid crystal display element, the first and second gradation data are supplied in accordance with the gradation data. The FRC gradation and the dither pattern will be determined.

The dither order in the dither method of this embodiment is shown in FIG. In the present embodiment, the dither pattern is set in units of 4 pixels in the X direction (that is, 4 pixel group) and 8 pixels in the Y direction (that is, 2 pixel group). The numbers "1" to "16" in Fig. 2 (a)
Indicates the order in which the FRC gradation is changed as the dither gradation approaches the second FRC gradation from the first FRC gradation. FIG. 2B shows 16 types of dither patterns DP1 to DP16 that are actually obtained according to this order.
In these dither patterns DP1 to DP16, blank pixels have the first FRC gradation and hatched pixels have the second FRC gradation.

Here, in a certain pixel group, the first
Alternatively, there is a case where there is only one pixel of the second FRC gradation (in other words, the number of pixels of the first FRC gradation is an odd number). As described above, a pixel having an FRC gradation different by only one out of the four pixels forming the pixel group is called a “unique pixel”. Here, when the peculiar pixel exists in both of the vertically adjacent two pixel groups and one peculiar pixel is provided on the first scanning electrode R1, the peculiar pixel of the other pixel group is the third scanning electrode. It is provided on R3. When one peculiar pixel is provided on the second scan electrode R2, the peculiar pixel of the other pixel group is provided on the fourth scan electrode R4.

For example, focusing on the column of the signal electrodes X2 of the dither pattern DP9 in FIG. 2B, only the third pixel (pixel on the third scanning electrode R3) in the upper pixel group (X2, G1). Is set to the first FRC gradation. On the other hand, the lower pixel group (X2,
In G2), it can be seen that only the first pixel (pixel on the first scan electrode R1) is set to the first FRC gradation. Here, the signal electrode X2 of the dither pattern DP9
For the column of, the first FRC gradation is “1”.
FIG. 4 shows an arrangement state of the FRC gradation for each pixel when the FRC gradation “9” is applied to the 1 ”and second FRC gradations.

Next, based on the FRC gradation arrangement state of FIG. 4 and the FRC patterns of FIGS. 3A and 3B, the transition of the frame pixel density of each pixel shown in FIG. 4 for each frame is shown. As shown in FIG. Note that, in FIG. 5, hatched pixels are on (black), and blank pixels are off (white). In FIG. 5, the pattern of the frame pixel density of the pixels related to the scan electrodes Y1, Y2 and Y4 is the scan electrode R1 in FIG.
It is equal to the pattern of R2 and R4 repeated every 10 frame periods. Moreover, in FIG.
The pattern of the frame pixel density of the pixel according to FIG.
This is equivalent to the pattern related to the third scan electrode R3 in (b) being repeated in 7 frame periods.

Similarly, in FIG. 5, the scan electrodes Y6, Y
The pattern of the frame pixel density of the pixels related to 7 and Y8 is
The pattern of the scan electrodes R2, R3, and R4 in FIG. 3A is equal to the pattern repeated every 10 frame periods, and the pattern of the frame pixel density of the pixel of the scan electrode Y5 is the first pattern in FIG. This is equivalent to repeating the pattern related to the scan electrode R1 at a cycle of 7 frames. Note that the entire FIG. 5 corresponds to the “matrix pattern group” in the claims, and the portions related to the scan electrode groups G1 and G2 correspond to the “first pattern” and the “second pattern”, respectively.

As described above, the original FRC patterns are set so that only the display patterns belonging to the pattern A appear when they are used alone. However, when a peculiar pixel appears by using the dither method together, the number of pixels having an ON (black) / off (white) frame pixel density becomes an odd number in the pixel group to which the peculiar pixel belongs, and the pattern B Display pattern appears. In the example of FIG. 5, it is understood that the display pattern is the pattern B for the pixel groups (X2, G1) and (X2, G2) in the seventh to thirteenth frames and the twenty-first to twenty-seventh frames.

Next, the voltage applied to the signal electrode X2 in the frame in which the display pattern of the pattern B appears will be examined. First, in FIG. 5, the display pattern of the upper pixel group (X2, G1) in the seventh frame is “1, 0, 0, 0 (black white white white)”. Figure 1 (a)
According to the display pattern, the selection period SV3
It can be seen that the signal electrode voltage becomes “+ V2” in the (third field f3). Further, in FIG. 5, the display pattern of the lower pixel group (X2, G2) in the seventh frame is “0, 0, 1, 0 (white black white white)”. Figure 1 (a)
According to the display pattern, the selection period SV2
It can be seen that the signal electrode voltage becomes “+ V2” in the (second field f2).

In a general computer graphic image, the same gradation (dither gradation in this embodiment) is set for a wide range of pixels. Assuming that the same dither gradation is set for the entire display screen of the liquid crystal display element, the display pattern on the signal electrode X2 is
It becomes equal to a repetition of the display pattern of FIG. That is, the odd-numbered pixel groups (X2, G1), (X
2, G3), ..., (X2, GS-1), the display pattern is equal to the display pattern of the pixel group (X2, G1) shown in the figure, and the even-numbered pixel groups (X2, G1).
The display pattern in 2), (X2, G4), ..., (X2, GS) is equal to the display pattern of the illustrated pixel group (X2, G2).

In this case, in the first field f1, the signal electrode voltage becomes “VC” for any pixel group. In the next second field f2,
Odd-numbered pixel groups (X2, G1), (X2, G
3), ..., (X2, GS-1), the signal electrode voltage becomes “VC”, and the even-numbered pixel groups (X2, G
2), (X2, G4), ..., (X2, GS), the signal electrode voltage becomes “+ V2”. Each scan electrode group G
1, G2, ..., GS are sequentially scanned from the upper direction, so that the signal electrode voltage waveform in the second field f2 is a waveform in which “VC” and “+ V2” are alternately repeated.

Further, in the third field f3, odd-numbered pixel groups (X2, G1), (X2, G
3), ..., (X2, GS-1), the signal electrode voltage becomes “+ V2”, and the even-numbered pixel groups (X2, G
2), (X2, G4), ..., (X2, GS), the signal electrode voltage becomes “VC”. As a result, the signal electrode voltage waveform in the third field f3 becomes a waveform in which “VC” and “+ V2” are alternately repeated, as in the second field f2. Further, in the fourth field f4, the signal electrode voltage becomes “VC” for any pixel group.

As described above, when the FRC gradation is arranged as shown in FIG. 4, the selection period in which the signal electrode voltage is "+ V2" is dispersed by "1/2" in the second field f2 and the third field f3. be able to. The example of the signal electrode voltage described above is an example in which FRC gradations are arranged as shown in FIG. 4, but the same applies when other dither patterns or other FRC gradations are applied. .

That is, according to FIG. 2B, when the peculiar pixel exists in both of the two pixel groups adjacent to each other in the vertical direction, the dither is arranged so that the positions of the peculiar pixels in the pixel groups are different from each other. The pattern is set. As a result, the field in which the signal electrode voltage becomes “± V2” in one pixel group (the number of mismatches is “0
In the field of “(minimum value)” or “4 (maximum value)”, the signal electrode voltage in the other pixel group is always “VC” (the number of mismatches is “2”). Further, when the peculiar pixel exists in only one of the two pixel groups adjacent to each other in the vertical direction, the signal electrode voltage in any field with respect to the one pixel group becomes “± V2”. However, the signal electrode voltage in the other pixel group (where no unique pixel exists) is always “± V1” (the field in which the number of mismatches is “1” or “3”).

As described above, according to this embodiment, when the number of mismatches in one of the two pixel groups adjacent in the vertical direction is "0 (minimum value)" or "4 (maximum value)", The dither pattern is set so that the number of mismatches in the other pixel group exceeds “0 (minimum value)” and less than “4 (maximum value)”. As a result, the timing at which the signal electrode voltage becomes a high voltage (± V2) can be generated in a distributed manner, and a situation in which a high signal electrode voltage is continuously applied to one signal electrode can be prevented. be able to. As a result, the influence of the signal electrode voltage on each pixel in the non-selected period can be reduced, and a high quality image can be displayed.

[0049]

As described above, according to the present invention, the frame pixel density of each pixel in any one of a plurality of pixel groups which is a unit of a dither pattern and an arbitrary column of a predetermined matrix are set. When the number of mismatches is the maximum value or the minimum value, the number of mismatches between the column and the frame pixel density of each pixel in at least another pixel group adjacent to the one pixel group exceeds the minimum value and is less than the maximum value. I set the dither pattern so that
Data signals of high voltage level can be generated dispersively only in the selection period of the one pixel group, and deterioration of image quality can be prevented in advance.

[Brief description of drawings]

FIG. 1 is a diagram showing a relationship among a frame pixel density, a scan electrode voltage, and a signal electrode voltage in a liquid crystal display element according to an embodiment of the present invention.

FIG. 2 is a diagram showing a dither pattern in the above embodiment.

FIG. 3 is a diagram showing an example of an FRC pattern in the above embodiment.

FIG. 4 is a view showing the FR dither pattern in the above embodiment.
It is a figure which shows the specific example which provided C gradation.

FIG. 5 is a diagram showing a transition of frame pixel density in the above embodiment.

FIG. 6 is a diagram showing a structure of a liquid crystal display element in the embodiment.

FIG. 7 is a waveform diagram showing the principle of the splicing phenomenon.

FIG. 8 is a diagram showing an example of an image in which a splicing phenomenon has occurred.

[Explanation of symbols]

10 Signal electrode drive circuit 20 Scan electrode drive circuit SV1 to SV4 selection period DP1 to DP16 dither pattern G1, G2, ..., GS Scan electrode group R1 to R4 scanning electrodes X1, X2, ... Signal electrodes Y1, Y2, Y3, ... Scan electrodes

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification code FI theme code (reference) G09G 3/20 641 G09G 3/20 641F 641G 641K 3/36 3/36 F term (reference) 2H093 NA18 NA20 NA22 NA33 NA43 NA54 NA55 NA79 NC03 NC13 NC15 NC22 NC23 NC26 NC28 NC49 NC90 ND04 ND05 ND06 ND07 ND42 5C006 AA01 AA02 AA12 AA14 AA17 AC13 AF42 AF43 AF51 AF53 BB14 BC12 BC16 BC22 BC23 FA23 FA24 FA25 FA56 GA10BB08DD0510 JJ01 JJ02 JJ04 JJ05 KK02

Claims (4)

[Claims] 1. A driving method of an electro-optical element for driving a plurality of electro-optical elements provided at intersections between a plurality of scanning electrodes and a plurality of signal electrodes, wherein a plurality of pixels corresponding to one signal electrode are provided. Defines a pixel group for each of a predetermined number of scan electrodes, each pixel group is selected multiple times within one frame, and a pixel having a scan signal of a voltage specified by an element of each column included in a predetermined matrix has one pixel. The number of discrepancies between the frame pixel density to be displayed in each frame of each pixel belonging to the one pixel group, which is simultaneously supplied to the plurality of scan electrodes corresponding to the group, and the element of each column included in the matrix. In the method of driving an electro-optical element, which supplies a data signal of a voltage specified based on the above to each signal electrode at the same time as each scanning signal, a dither A step of determining one of the display densities of a predetermined number of gradations for each pixel belonging to these pixel groups based on the pixel, and for each pixel belonging to the plurality of pixel groups, Determining, for each frame, one of the frame pixel densities having a gradation number smaller than the gradation number of the display density based on the frame rate control pattern corresponding to the determined display density, When the number of disagreements between the frame pixel density of each pixel in any one of the plurality of pixel groups that is the unit of the dither pattern and any column of the matrix is the maximum value or the minimum value, at least the one The number of discrepancies between the frame pixel density of each pixel in the other pixel group adjacent to the pixel group and the column exceeds the minimum value and less than the maximum value. A driving method for an electro-optical device is characterized in that setting the dither pattern. 2. When the one frame rate control pattern is applied to all the pixels forming one pixel group, the frame pixel density of each pixel and an arbitrary column of the matrix are combined. The method of driving an electro-optical element according to claim 1, wherein the number of mismatches is set to exceed the minimum value and less than the maximum value. 3. A scan electrode corresponding to the one pixel group and a scan electrode corresponding to another pixel group adjacent to the one pixel group are continuously scanned,
The method of driving an electro-optical element according to claim 1, wherein the pixel groups correspond to a common signal electrode. 4. A driving method of an electro-optical element for driving a first plurality of electro-optical elements arranged in a matrix corresponding to intersections of a plurality of scanning electrodes and a plurality of signal electrodes, wherein multi-gradation is performed. As shown, a combination of the predetermined number of scan electrode voltages for each simultaneous selection of a predetermined number of scan electrodes of the plurality of scan electrodes, and corresponding to the intersection of the predetermined number of scan electrodes and one signal electrode, A predetermined number of signal electrode voltages specified by a plurality of second gradations to be displayed by a plurality of second electro-optical elements of the first plurality of electro-optical elements, each signal electrode voltage having a plurality of predetermined values. Applying the predetermined number of signal electrode voltages, which is one of the voltages, to the one signal electrode in sequence, each element of the plurality of second electro-optical elements being the plurality of second electro-optical elements. The two gradations that each element should display are specified. Constituting the matrix of the pattern group to be,
A method for driving an electro-optical element, which is performed in accordance with at least a first pattern and a second pattern, which is switched and used for each round of simultaneous selection of the predetermined number of scan electrodes, which is defined for each of the multiple gradations, Two gradations to be displayed by the plurality of second electro-optical elements defined by the elements included in one row in the first pattern, and a scan electrode voltage applied to the scan electrodes for each simultaneous selection of the scan electrodes. And a first signal electrode voltage which is one of the maximum voltage and the minimum voltage of the plurality of predetermined voltages and which is specified by a combination of the first signal electrode voltage and the first signal electrode voltage. The plurality of second electro-optical elements defined by elements included in one row of the second pattern corresponding to the one row of the first pattern are displayed when corresponding to the application of Two tones that should be An electro-optical device, which is different from a second signal electrode voltage to be applied to the one signal electrode, which is specified by a combination of scan electrode voltages applied to the scan electrodes for each simultaneous selection of the scan electrodes. Device driving method.