JP2003258761A - Synchronous demodulation circuit for digital broadcasting receiver - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a synchronous demodulation circuit for a digital broadcasting receiver in which accuracy in equalization processing applied to the synchronous demodulation of a signal transmitted by an orthogonal frequency division multiplexing system can be improved. <P>SOLUTION: For each first transmission line response corresponding to each received pilot signal, it is discriminated whether a value related to the size of the first transmission line response is within a prescribed range with a value related to the average value of a received symbol and the sizes of the first transmission line responses corresponding to prescribed two or more received pilot signals within the symbol as a center or not and when the value related to the size of the first transmission line response is out of the prescribed range, in place of the relevant received pilot signal, the average value of the received symbol and the first transmission line responses corresponding to the prescribed two or more received pilot signals within the symbol is outputted to a second transmission line response calculating means. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to OFDM (Orthogonal Frequency Division Multiplexing) used in terrestrial digital broadcasting and the like.
The present invention relates to a synchronous demodulation circuit of a digital broadcast receiving device that receives and demodulates a signal modulated by a method.

[0002]

2. Description of the Related Art In recent years, in a system for transmitting a video signal or an audio signal, an OFDM (Orthogonal Frequency Multiplexing) system has been proposed as a modulation system excellent in high quality transmission and improvement in frequency utilization efficiency. ing.

The OFDM system is a modulation system in which a large number of subcarriers are set up within the band of one channel. For this reason, it is resistant to ghosts and can be made resistant to selective fading by devising a data structure for error correction, which is an effective modulation method in terrestrial digital television broadcasting and the like.

The following processing is performed on the transmitting side. First, for example, an analog signal such as a television signal is converted into a digital signal, and MPEG (Moving Picture Experts Gr
oup) compression. Then, in order to disperse the cause of error in the transmission line such as noise, the data signal is subjected to byte interleaving and bit interleaving, and QPSK (Quadrature Phase Shift Keyin
g), 16QAM (Quadrature Amplitude Modulation)
, 64QAM, etc. are mapped.

Further, in order to disperse causes of error occurrence in the transmission line such as fading and signal loss, time interleaving and frequency interleaving processing is performed,
After performing IFFT (Fast Fourier Transform) and quadrature modulation,
It is converted into an RF frequency and transmitted.

FIG. 1 shows the structure of OFDM system data received by a terrestrial digital broadcast receiver.

One OFDM frame is No. 0-N
o. It is composed of 204 OFDM symbols of 203. The OFDM symbol is composed of a valid data section and an invalid data section (guard interval, null carrier).

FIG. 2 shows a structure of an effective data section in one OFDM symbol shown in FIG.

The effective data section in one OFDM symbol is No. 0-No. It is composed of 12 13 OFDM segments. One OFDM segment is a group of data (data segment) to which a pilot signal is added.

According to the specifications of digital terrestrial broadcasting, No. 0
~ No. It is possible to divide 12 13 OFDM segments into a maximum of 3 layers and specify the modulation scheme for each layer.

FIG. 3 shows the structure of one OFDM segment shown in FIG.

[0012] One OFDM segment is No. 0 to
No. It consists of n carriers of (n-1).

FIG. 4 shows the mode dependence of the structure of one OFDM segment.

The number of carriers of a data signal, the number of carriers of a pilot signal, etc., which compose one OFDM segment, is determined for each mode, and the total number of carriers is set to n.

The modulation type of the OFDM system is DQPS.
K (Dofferential), QPSK, 16QAM, 64QAM
There are four types, and the mapping method is different for each. The DQPSK method is called a differential modulation method, and the other methods are called a synchronous modulation method. The differential modulation method and the synchronous modulation method have different types and arrangement positions of pilot signals included in one OFDM segment, but one OF
The total number of pilot signals included in the DM segment is specified as shown in FIG. Using a pilot signal of the synchronous modulation system, delay multipath is equalized and distortion is improved.

FIG. 5 shows the case where the mode is mode 1.
The valid data (corresponding to FIG. 2) of one OFDM symbol is shown. In FIG. 5, among the pilot signals, only the pilot signal SP of the synchronous demodulation system is shown.

The data signal modulated by the OFDM system is
It is demodulated by the processing which is the reverse of the transmission procedure.

FIG. 6 shows a conventional OFDM receiver 1.
000 configuration is shown.

The tuner 11 is provided with a high frequency signal input (RF signal input) captured by an antenna (not shown). The tuner 11 down-converts the RF signal corresponding to the frequency of the designated channel into a baseband signal.

The analog / digital conversion circuit 12 converts an analog signal into a digital signal and uses Hilbert conversion or the like to convert a signal of a real axis (hereinafter referred to as "I axis") component (in-phase detection axis signal) and an imaginary signal. A signal (quadrature detection axis signal) of an axis (hereinafter, referred to as “Q axis”) component is generated. The I-axis signal and the Q-axis signal output from the analog / digital conversion circuit 12 are subjected to synchronization processing by the synchronization unit 13, and then a fast Fourier transform unit (hereinafter referred to as “FFT unit”).
It is output to 14.

The FFT unit 14 performs a fast Fourier transform on the input signal to convert the time axis data into the frequency axis data. The demodulation unit 15 performs demodulation processing on the signal output from the FFT unit 14 and outputs the obtained signal to the frequency deinterleave unit 16.

The frequency deinterleave circuit 16 performs reverse processing of the frequency interleave performed to compensate for the loss of the specific frequency signal due to the reflection of radio waves. The output of the frequency deinterleave circuit 16 is the time deinterleave circuit 17
Sent to. The time deinterleave circuit 17 performs reverse processing of the time interleave performed for anti-fading.

The time-deinterleaved I-axis data and Q-axis data are sent to the demapping circuit 18 and are
Bit (QPSK), 4 bits (16QAM) or 6
Converted to bit (64QAM) data. The demapped signal is sent to the bit deinterleave circuit 19. The bit deinterleave circuit 19 performs the reverse process of the bit interleave performed for the purpose of increasing error resilience. The output of the bit deinterleave circuit 19 is sent to the Viterbi decoding circuit 20. The Viterbi decoding circuit 20 performs error correction using the convolutional code performed on the transmission side.

The signal subjected to the Viterbi decoding is sent to the byte deinterleave circuit 21. The byte deinterleave circuit 21 performs the reverse process of the byte interleave performed for the purpose of increasing the error resilience similarly to the bit interleave.
The output of the byte deinterleave circuit 21 is sent to the energy despreader 22. The energy despreading unit 22 performs despreading processing. The output of the energy despreading unit 22 is R
It is sent to the S decoding circuit 23. The RS decoding circuit 23,
Error correction is performed by RS (Reed Solomon) decoding.

The output of the RS decoding circuit 23 is sent to the MPEG decoding circuit 24. MPEG decoding circuit 24
Outputs the error-corrected signal (compressed signal) to the digital / analog conversion circuit 25. The digital / analog conversion circuit 25 converts the digital signal sent from the MPEG decoder 24 into an analog signal. As a result, a video signal and an audio signal before being modulated by the OFDM method are generated.

The OFDM system has a characteristic that, when compared at the same transmission rate, the symbol period of the modulated wave can be made longer than that of the single carrier system, so that it is less susceptible to the inter-symbol interference due to the delayed wave. There is.
However, when the amplitude and phase of the modulated wave are excessively distorted in the transmission line due to multipath interference, the data cannot be correctly demodulated unless the distortion is corrected on the receiving side. Therefore, on the receiving side, the demodulation unit 15 demodulates the data with reference to the amplitude and phase of the pilot signal of the synchronous modulation method. The demodulation unit 15 uses a symbol filter that equalizes in the symbol direction and a carrier filter that equalizes in the carrier direction for the transmission path characteristics calculated from the received pilot signal.
An equalization method with improved noise immunity, such as dimensional filtering, is adopted.

FIG. 7 shows the configuration of the demodulation section 15.

The frame extraction unit 30 extracts the frame synchronization signal of the TMCC signal (transmission multiplexing control signal) contained in the signal obtained by the FFT unit 14. T
The MCC decoding unit 31 extracts TMCC information from the TMCC signal and creates various control signals for controlling the switching timing of the modulation system.

In accordance with the TMCC information, the differential demodulation unit (differential demodulation circuit) 32 performs differential demodulation for DQPSK, and the synchronous demodulation unit (synchronous demodulation circuit) 33 includes QPSK, 16QAM,
Synchronous demodulation using a pilot signal (scattered pilot, SP) for 64QAM is performed. The combining unit 34
Demodulated data is generated by combining the output of the differential demodulation unit 32 and the output of the synchronous demodulation unit 33.

FIG. 8 shows the structure of the synchronous demodulator 33.

The OFDM signal converted into the signal on the frequency axis by the FFT unit 14 is represented by Y (l, k). Where l
Represents a symbol number (see FIG. 5), and k represents a carrier number (see FIG. 5).

Pilot signal of the OFDM signal Y (l, k)
Since Y (l, kp) has a known complex amplitude, the received pilot signal Y (l, kp) is received by the complex divider 42 as shown in the following equation (1).
Is divided by the normal pilot signal (complex amplitude) X (l, kp) generated by the pilot generation unit 41 to obtain the transmission path response H (l, kp) of the carrier transmitting the received signal.
= Can be obtained.

H (l, kp) = Y (l, kp) / X (l, kp) (1)

This transmission path response H (l, kp) is sent to the carrier filter section 44 via the symbol filter section 43 for smoothing the transmission path response in the time axis direction (symbol direction). The carrier filter unit 44 estimates the transmission line response H (l, kd) corresponding to each received data signal Y (l, k) based on the transmission line response obtained by the symbol filter unit 43. The transmission line response H (l, kd) corresponding to each received data signal Y (l, k) obtained by the symbol filter unit 43 is sent to the complex division unit 45.

The complex division unit 45 converts the received data signal Y (l, k) into the carrier filter unit 44 as shown in the following equation (2).
The equalized demodulated data is calculated by dividing by the transmission path response H (l, kd) corresponding to the received data signal Y (l, k) obtained by.

X (l, kd) = Y (l, kd) / H (l, kd) (2)

[0037]

By the way, as shown in FIG. 5, in one OFDM segment, the pilot signal SP is inserted once every 12 carriers at the same carrier position every 4 symbols. There is.

When the carrier filter section interpolates the transmission path response on the frequency axis, that is, on the carrier axis, the pilot signal S in the same symbol as the received symbol is used.
There are a first method that uses only the transmission path response obtained from P and a second method that holds and interpolates the transmission path response of the pilot SP up to three symbols before the received symbol. The first method is suitable for a transmission path in which the transmission path response fluctuates with time because interpolation is performed for each received symbol. The second method is a method that is suitable for a transmission line whose time fluctuation is gentle.

FIG. 9 shows the pilot signal SP used in the first method, and FIG. 10 shows the pilot signal SP used in the second method.

The FFT unit 14 (see FIG. 6) uses 1 OFDM
FFT is performed for each symbol. When the channel response is such that the channel response varies with time, like the channel for mobile reception, the channel response of the currently received symbol and the channel response of the symbol at the next time are Since they are different, the second method of holding and interpolating the transmission path response of the pilot SP from the received symbol to 3 symbols before cannot be used. That is, as shown in FIG. 10, it is not possible to use the pilot signal SP that appears at a rate of one for every three carriers.

Therefore, in the case of mobile reception, the transmission line response corresponding to the pilot signal input to the carrier filter unit 44 (see FIG. 8) in the synchronous demodulation unit 33 is 12 carriers shown in FIG. The one corresponding to the pilot signal SP appearing at a rate of one is used. As described above, in the case of mobile reception, since the transmission line response corresponding to the pilot signal SP used for interpolation of the transmission line response on the carrier axis is small, when a certain pilot signal SP largely changes due to noise or the like, Carrier filter unit 4
4 has a problem that the response of the transmission line to the data signal output from No. 4 is greatly affected, and the accuracy of the equalization process becomes low.

The present invention has been made in order to solve the above problems, and the accuracy of the equalization processing performed for the synchronous demodulation of the signal transmitted by the orthogonal frequency division multiplexing system. It is an object of the present invention to provide a synchronous demodulation circuit for a digital broadcast receiving device that can improve the performance.

[0043]

According to a first aspect of the present invention, there is provided a synchronous demodulation circuit of a digital signal receiving device for receiving a signal transmitted by an orthogonal frequency division multiplexing system, wherein the synchronous demodulation circuit is provided in the same symbol as a received symbol. First transmission path response calculation means for calculating a first transmission path response corresponding to each received pilot signal by dividing the received pilot signal for each arranged received pilot signal by a known complex amplitude, A second transmission path response corresponding to each received data signal existing in the same symbol as the received symbol is calculated based on the first transmission path response calculated by the first transmission path response calculation means. Transmission line response calculation means and means for calculating equalized data by dividing each received data signal by a second transmission line response corresponding to the received data signal In the synchronous demodulation circuit of the digital signal receiving apparatus, preprocessing means is provided between the first transmission path response calculation means and the second transmission path response calculation means, and the preprocessing means is provided for each received pilot signal. For each first transmission path response corresponding to, the value related to the magnitude of the first transmission path response of the first transmission path response corresponding to the predetermined two or more received pilot signals in the same symbol as the received symbol. If the value relating to the magnitude of the first transmission line response is within the above-mentioned predetermined range, the determining means for determining whether it is within a predetermined range centered on the value related to the average value of the magnitudes, 1 transmission path response is output to the second transmission path response calculation means, and when the value relating to the magnitude of the first transmission path response is out of the predetermined range, the reception symbol is replaced with the reception symbol. Predetermined within the same symbol as Characterized in that it comprises a selection means for outputting a first transmission channel the mean value of the response corresponding to two or more received pilot signals to the second channel response calculation means.

According to a second aspect of the present invention, in the synchronous demodulation circuit of the digital signal receiving apparatus according to the first aspect, the discriminating means makes a first transmission line response for each first transmission line response corresponding to each received pilot signal. Whether the absolute value of the transmission path response of is within a predetermined range centered on the average value of the absolute values of the first transmission path responses corresponding to two or more predetermined reception pilot signals in the same symbol as the received symbol. If the absolute value of the first transmission path response is within the predetermined range, the selecting means outputs the first transmission path response to the second transmission path response calculating means. However, when the absolute value of the first transmission path response is outside the predetermined range, the first pilot signal corresponding to two or more predetermined reception pilot signals in the same symbol as the reception symbol is used instead of the reception pilot signal. The average value of the transmission path response of the Characterized in that it is intended to be output to the road-response calculation means.

According to a third aspect of the present invention, in the synchronous demodulation circuit of the digital signal receiving apparatus according to the first aspect, the discriminating means is the first for each first transmission line response corresponding to each received pilot signal. Whether the power value of the transmission path response is within a predetermined range centered on the average value of the power values of the first transmission path responses corresponding to predetermined two or more reception pilot signals in the same symbol as the received symbol. When the power value of the first transmission path response is within the predetermined range, the selecting means outputs the first transmission path response to the second transmission path response calculating means. However, when the power value of the first transmission path response is out of the predetermined range, the first pilot signal corresponding to two or more predetermined reception pilot signals in the same symbol as the reception symbol is used instead of the reception pilot signal. The average value of the transmission path response of the Characterized in that it is intended to be output to the road-response calculation means.

[0046]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to FIGS.

FIG. 11 shows an embodiment of the present invention,
The structure of the synchronous demodulation unit of the digital broadcast receiving apparatus is shown. 11, the same parts as those in FIG. 8 are designated by the same reference numerals and the description thereof will be omitted.

Comparing this synchronous demodulation unit with the conventional synchronous demodulation unit (FIG. 8), in this synchronous demodulation unit, the pre-processing of the carrier filter unit 44 is performed between the symbol filter unit 43 and the carrier filter unit 44. It is different from the conventional synchronous demodulation unit in that the carrier filter preprocessing unit 100 for performing is provided.

FIG. 12 shows the carrier filter preprocessing unit 10.
0 configuration is shown.

The data input from the symbol filter unit 43 is the transmission line response H (l, kp) corresponding to the pilot signal SP appearing at a rate of one per 12 carriers shown in FIG. This input data H (l, kp) is used for the average value generation unit 10
1, the average power calculator 102, the single power calculator 103, and the delay circuit (delay circuit) 104.

FIG. 13 shows one OFD in the case of mode 1.
The M segment is shown. 1 O in mode 2
The FDM segment has a form in which two 1 OFDM segments in the case of mode 1 are connected, and 1 in the case of mode 3
One OFDM segment is one OF in the case of mode 1
It takes the form of connecting three DM segments.

In the case of mode 1, the average value generating section 101 has nine pilot signals SP0 to SP8 (1 in the case of mode 2 or mode 3) of the synchronous demodulation system in one OFDM segment shown in FIG. 9 pilot signals SP0 to 0 of the synchronous demodulation system in one part of each OFDM segment
The transmission path responses H0 to H8 corresponding to SP8) are set as one unit, and the transmission path response average value is calculated for each of the transmission path responses H0 to H8.

The absolute values of the transmission path response average values H0 'to H8' calculated for each of the transmission path responses H0 to H8 are obtained based on the following equation (3). Transmission line response average values H0 'to H8'
The same phase as the original transmission line responses H0 to H8 is used as the phase (symbol) of.

[0054]   ｜ H0 '｜ ＝ (｜ H0 ｜ ＋ ｜ H1 ｜) / 2   ｜ H1 '｜ ＝ (｜ H0 ｜ ＋ ｜ H2 ｜) / 2   ｜ H2 '｜ ＝ (｜ H0 ｜ ＋ ｜ H1 ｜ ＋ ｜ H3 ｜ ＋ ｜ H4 ｜) / 4   ｜ H3 '｜ ＝ (｜ H1 ｜ ＋ ｜ H2 ｜ ＋ ｜ H4 ｜ ＋ ｜ H5 ｜) / 4   ｜ H4 '｜ ＝ (｜ H2 ｜ ＋ ｜ H3 ｜ ＋ ｜ H5 ｜ ＋ ｜ H6 ｜) / 4   ｜ H5 '｜ ＝ (｜ H3 ｜ ＋ ｜ H4 ｜ ＋ ｜ H6 ｜ ＋ ｜ H7 ｜) / 4   ｜ H6 '｜ ＝ (｜ H4 ｜ ＋ ｜ H5 ｜ ＋ ｜ H7 ｜ ＋ ｜ H8 ｜) / 4   ｜ H7 '｜ ＝ (｜ H6 ｜ ＋ ｜ H8 ｜) / 2   │H8 '｜ ＝ (｜ H7 ｜ ＋ ｜ H8 ｜) / 2… (3)

The absolute values of the transmission line response average values H0 'to H8' are the nine pilot signals SP0 to SP8 shown in FIG.
Of two or more predetermined pilot signals SP0 to SP
8 is calculated as the average value of the absolute values of the transmission path responses.

The respective transmission line response average values H0 'to H8' are sent to the selection unit 106 in the order of H0 ', H1', ... H8 'at a predetermined timing. The input data H0, from the delay circuit 104, is input to the selection unit 106 in synchronization with the timing at which the transmission path response average values H0 ′, H1 ′, ... H8 ′ are input.
H1, ... H8 are input.

FIGS. 14 and 15 respectively show the transmission line response average value H0 'corresponding to H0 when the data H0 and the data H1 are represented in the IQ coordinate system.

The average power calculation unit 102 is 9 shown in FIG.
The transmission line responses H0 to H8 corresponding to the individual pilot signals SP0 to SP8 are set as one unit, and these transmission line responses H0 are set.
The average value of the electric power of ~ H8 is calculated by the following equation (4).

Power average value = {(power of H0) + (power of H1) + ... + (power of H8)} / 9 However, power of Hi (i = 0,1, ..., 8) = (of Hi I axis component) ² + (Hi Q axis component) ² … (4)

The unit power calculation unit 103 determines each transmission line response H.
Calculate power from 0 to H8. This unit power calculation unit 103
And each transmission line response H0 in the average power calculation unit 102.
It can be shared with the circuit used to calculate the power of ~ H8.

The average power value calculated by the average power calculation unit 102 and the power of each transmission line response H0 to H8 calculated by the single power calculation unit 103 are sent to the comparison unit 105. The comparison unit 105 determines each transmission line response Hi (i =
0, 1, ..., 8) power (individual power value) is compared with the power average value, and if the individual power value is within a predetermined range around the power average value, the selecting unit 106 delay circuit When the input data Hi sent from 104 is selected and the individual power value is out of the predetermined range centered on the power average value, the selecting unit 106 sends the transmission path response sent from the average value creating unit 101. The selection unit 106 is controlled so as to select the average value Hi ′.

Therefore, when a certain pilot signal SP largely fluctuates due to noise or the like, the transmission line response average value is sent to the carrier filter section 44 instead of the transmission line response calculated from the pilot signal SP.
The accuracy of the equalization process performed by the carrier filter unit 44 is improved.

The transmission line response average value H for each transmission line response H0 to H8 calculated by the average value generation unit 101
The absolute values of 0 ′ to H8 ′ may be obtained by averaging the absolute values of the transmission line responses H0 to H8 corresponding to the nine pilot signals SP0 to SP8, as shown in the following equation (5).

[0064]   ｜ H0 '｜ ~ ｜ H8' ｜ ＝ (｜ H0 ｜ ＋ ｜ H1 ｜ ＋… + ｜ H8 ｜） / 9… (5)

Also, on the right side of the above equation (3) or equation (5), |
Instead of H0 ｜ ～ ｜ H8 ｜, its power value (H0 power value ～ H8
Power value of) may be used. As a circuit for obtaining the power value, it is possible to use a circuit used to calculate the power of each of the transmission line responses H0 to H8 in the single power calculation unit 103 or the average power calculation unit 102.

FIG. 16 shows the carrier filter preprocessing unit 10.
0 shows another configuration example. In the figure, the same parts as those in FIG. 12 are designated by the same reference numerals and the description thereof will be omitted.

In this carrier filter preprocessing unit 100, an absolute average value calculation unit 202 is used in place of the average power calculation unit 102 of FIG. 12, and the single unit power calculation unit 1 of FIG.
12 is different from the carrier filter preprocessing unit 100 in FIG. 12 in that a single unit absolute value calculation unit 203 is used instead of 03.

The absolute average value calculating section 202 calculates the average of the absolute values of the transmission line responses H0 to H8 (absolute average value) as shown in the following equation (6).

[0069]   Absolute average value = (| H0 | + | H1 | + ... + | H8 |) / 9… (6)

The single unit absolute value calculation unit 203 calculates the absolute values | H0 | to | H8 | of the transmission line responses H0 to H8.

The comparison unit 105 includes a single unit absolute value calculation unit 203.
The absolute value (individual absolute value) of each of the transmission line responses H0 to H8 calculated by the above is compared with the absolute average value calculated by the absolute average value calculation unit 202, and the individual absolute value is centered around the absolute average value. If it is within the range, the selection unit 106
Selects the input data Hi sent from the delay circuit 104, and when the individual absolute value is out of a predetermined range around the absolute average value, the selecting unit 106 sends it from the average value creating unit 101. The selection unit 106 is controlled so as to select the transmission path response average value Hi ′.

[0072]

According to the present invention, the accuracy of the equalization process performed for the synchronous demodulation of the signal transmitted by the orthogonal frequency division multiplexing system can be improved.

[Brief description of drawings]

FIG. 1 OFDM received by a terrestrial digital broadcasting receiver
It is a schematic diagram for demonstrating the structure of the data of a system.

FIG. 2 is a schematic diagram showing the structure of one OFDM symbol.

FIG. 3 is a schematic diagram showing the structure of one OFDM segment.

FIG. 4 is a schematic diagram for explaining the mode dependence of the configuration of one OFDM segment.

FIG. 5 is a diagram showing a distribution of pilot signals SP of a synchronous demodulation system in one OFDM segment.

FIG. 6 is a block diagram showing a configuration of a conventional OFDM receiver 1000.

7 is a block diagram showing a configuration of a demodulation unit 15. FIG.

FIG. 8 is a block diagram showing a configuration of a synchronous demodulation unit 33.

FIG. 9 is a schematic diagram showing a pilot signal SP used in the first method of interpolating the transmission path response on the carrier axis using only the transmission path response obtained from the pilot signal SP in the same symbol as the received symbol.

FIG. 10 is a pilot signal S used in the second method of holding the transmission path response of the pilot SP up to three symbols before the received symbol and interpolating the transmission path response on the carrier axis.
It is a schematic diagram which shows P.

FIG. 11 is a block diagram showing a configuration of a synchronous demodulation unit of the digital broadcast receiving apparatus according to the embodiment of the present invention.

FIG. 12 is a block diagram showing a configuration of a carrier filter preprocessing unit 100.

FIG. 13 is a diagram showing nine pilot signals SP0 to S of the synchronous demodulation system in one OFDM segment in the case of mode 1;
It is a schematic diagram which shows P8.

FIG. 14 is a schematic diagram showing a transmission line response average value H0 ′ corresponding to H0 when the data H0 and the data H1 are expressed in the IQ coordinate system.

FIG. 15 is a schematic diagram showing a transmission line response average value H0 ′ corresponding to H0 when the data H0 and the data H1 are represented in the IQ coordinate system.

16 is a block diagram showing the configuration of another example of the carrier filter preprocessing unit 100. FIG.

[Explanation of symbols]

44 Carrier filter section 100 Carrier filter pre-processing unit 101 Average Value Creation Section 102 average power calculation unit 103 Unit power calculation unit 104 delay circuit 105 comparison section 106 Selector 202 Absolute average value calculator 203 Single unit absolute value calculation unit

   ─────────────────────────────────────────────────── ─── Continued front page    F-term (reference) 5C025 AA13 DA01                 5K004 AA05 AA08 FA05 FC02 FG00                       FH03 JA03 JC02 JG00 JH02                 5K022 DD01 DD13 DD18 DD19 DD23                       DD33 DD34 DD42                 5K047 AA03 CC08 DD01 DD02 EE02                       EE04 GG11 MM12 MM43

Claims (3)

[Claims] 1. A synchronous demodulation circuit of a digital signal receiving apparatus for receiving a signal transmitted by an orthogonal frequency division multiplexing system, wherein a received pilot signal is received for each received pilot signal arranged in the same symbol as a received symbol. By a known complex amplitude to calculate a first transmission path response corresponding to each received pilot signal, first transmission path response calculation means, and first transmission path response calculation means Second transmission path response calculation means for calculating a second transmission path response corresponding to each reception data signal existing in the same symbol as the reception symbol, and each reception data signal, based on one transmission path response A synchronous demodulation circuit of a digital signal receiving apparatus having means for calculating data after equalization by dividing by a second transmission line response corresponding to the received data signal. A pre-processing unit is provided between the first transmission line response calculation unit and the second transmission line response calculation unit, and the pre-processing unit includes:
For each first transmission path response corresponding to each reception pilot signal, a value relating to the magnitude of the first transmission path response corresponds to two or more predetermined reception pilot signals in the same symbol as the reception symbol. A determining means for determining whether or not a value related to the average value of the magnitude of the transmission path response is within a predetermined range, and a value related to the magnitude of the first transmission path response within the predetermined range. Outputs the first transmission path response to the second transmission path response calculation means, and when the value related to the magnitude of the first transmission path response is outside the predetermined range, substitutes for the reception pilot signal. And a selection means for outputting to the second transmission path response calculation means an average value of the first transmission path responses corresponding to two or more predetermined reception pilot signals in the same symbol as the reception symbol. Digital signal receiver Synchronous demodulation circuit of the device. 2. The determining means, for each first transmission path response corresponding to each reception pilot signal, has an absolute value of the first transmission path response of two or more predetermined reception pilots within the same symbol as the reception symbol. The selection means determines whether or not the absolute value of the first transmission path response is within a predetermined range around the average value of the absolute values of the first transmission path response. If it is within the predetermined range, the first transmission line response is output to the second transmission line response calculation means, and if the absolute value of the first transmission line response is outside the predetermined range, Instead of the received pilot signal, a predetermined number of 2
The synchronous demodulation of the digital signal receiving apparatus according to claim 1, wherein the average value of the first transmission path response corresponding to the received pilot signal is output to the second transmission path response calculating means. circuit. 3. The determination means, for each first transmission path response corresponding to each reception pilot signal, has a power value of the first transmission path response of two or more predetermined reception pilots within the same symbol as the reception symbol. The selection means determines whether or not the power value of the first transmission path response corresponding to the signal is within a predetermined range around the average value of the power values of the first transmission path response. If it is within the predetermined range, the first transmission path response is output to the second transmission path response calculation means, and if the power value of the first transmission path response is outside the predetermined range, Instead of the received pilot signal, a predetermined number of 2
The synchronous demodulation of the digital signal receiving apparatus according to claim 1, wherein the average value of the first transmission path response corresponding to the received pilot signal is output to the second transmission path response calculating means. circuit.