JP2003258694A - W-cdma radio base station and delay time correction method therefor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To highly accurately detect the position of a mobile communication terminal device in position information service by enabling setting of delay time deviation to zero, even when output signals to be transmitted are different in a 0-system and a 1-system. <P>SOLUTION: In a radio device 6-2 of the 0-system, an input signal S1IN is divided into two, and a signal S1IN<SB>b</SB>is provided to a delay time detection control circuit 6-4. Also, an output signal S1OUT is divided into two, and a signal S1OUT<SB>b</SB>is provided to the circuit 6-4. In the circuit 6-4, the amplitude fluctuation pattern of S1IN<SB>b</SB>is compared with the amplitude fluctuation pattern of S1OUT<SB>b</SB>, matching timing difference is detected as a delay time TD1 of S1OUT with respect to S1IN, and a delay-adjusting time Td1 in the device 6-2 is controlled so that TD1 is set at TD1SET (set value). Similarly, in the 1-system, a delay-adjusting time Td2 in a radio device 7-2 is controlled. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a W-CDMA (Wideband Code Divisio) having at least two transmitters.
n Maltiple Access: Wideband code division multiple access) The present invention relates to a wireless base station and its delay time correction method.

[0002]

2. Description of the Related Art FIG. 9 shows a conventional transmission diversity system W.
-A schematic of a CDMA radio base station is shown. In the figure, 1
Is a 0-system transmitter, 2 is a 1-system transmitter, and a 0-system transmitter 1 has a delay adjustment circuit 1-1, an RF circuit 1-2, and an antenna 1-3, and 1-system transmission Machine 2 is delay adjustment circuit 2-1
And an RF circuit 2-2 and an antenna 2-3.

In the 0-system transmitter 1, the delay adjustment circuit 1
-1 is a 0-system input signal S1_INIs preset to
The delay of the total adjustment time Td1 is given, and it is sent to the RF circuit 1-2.
It The RF circuit 1-2 receives the input from the delay adjustment circuit 1-1.
Signal S1_INTo the required radio frequency and the required power
Output signal S1_OUTAnd This output signal S1
_OUTAre transmitted from antennas 1-3.

In the 1-system transmitter 2, the delay adjustment circuit 2
-1 is the input signal S2 of system 1_INIs preset to
The delay of the total adjustment time Td2 is given, and it is sent to the RF circuit 2-2.
It The RF circuit 2-2 receives the input from the delay adjustment circuit 2-1.
Signal S2_INTo the required radio frequency and the required power
Output signal S2_OUTAnd This output signal S2
_OUTIs transmitted from the antenna 2-3.

The transmission diversity is a technique in which output signals are simultaneously transmitted from a plurality of transmitters and reception timings of these output signals match at a receiving point to obtain diversity gain. It is desirable that the plurality of transmitters used for such a purpose have no deviation in the delay time of each output signal to be transmitted. The cause of the deviation in the delay time of the output signal is that the delay times of the circuit components vary. In particular, a passive element such as a SAW filter having a large variation in delay time is mounted in the RF circuit, and the delay time also changes due to temperature fluctuation during operation and aging.

The W-CDMA radio base station 10 shown in FIG.
At 0, the output signal S1 _OUT from the 0-system transmitter 1
In order to eliminate the deviation of the delay time between the output signal S2 _OUT from the transmitter 1 and the transmitter 2 of the 1-system, a measuring instrument such as a transmitter tester or a high-frequency oscilloscope is used as the output terminal P1 of the transmitter 1 of the 0-system and the transmission of the 1-system The output signal S1 by connecting to the output terminal P2 of the machine 2.
The delay time deviation ΔTd between _OUT and the output signal S2 _OUT is measured, and the delay adjustment times Td1 and Td2 in the delay adjustment circuits 1-1 and 1-2 are periodically set so that the measured delay time deviation ΔTd becomes zero. The method was to adjust to.

However, in this method, the delay time deviation ΔT
It is necessary to prepare an expensive measuring device to measure d. Further, since the delay time deviation ΔTd is regularly adjusted, there is a problem that maintenance cost is required.

Therefore, in order to solve this problem, reference 1
In the delay time control method shown in Japanese Patent Laid-Open No. 2001-358623, the output signal of the 0-system transmitter and the output signal of the 1-system transmitter are compared to detect the delay time deviation ΔTd. The delay adjustment time Td1 for the 0-system input signal and the delay adjustment time Td2 for the 1-system input signal are automatically controlled so that the delay time deviation ΔTd becomes zero.

The technique disclosed in Document 1 will be described with reference to FIG. In this W-CDMA radio base station 200, a directional coupler 1-is provided at a stage subsequent to the RF circuit 1-2 of the 0-system transmitter 1.
4 is provided, a directional coupler 2-4 is provided at the subsequent stage of the RF circuit 2-2 of the transmitter 2 of the 1-system, and one of the output signals S1 _OUT of the 0-system (2) distributed by the directional coupler 1-4 ( S1 _OUTa )
To the antenna 1-3 and the other (S1 _OUTb ) to the detector 3-1.
One of the output signals S2 _OUT of the 1-system (S2 _OUTa ) sent to the comparator 4 via the directional coupler 2-4 and distributed by the directional coupler 2-4.
To the antenna 2-3, and the other (S2 _OUTb ) to the detector 3-2
It is sent to the comparator 4 via.

The comparator 4 outputs the 0-system output signal S1 _OUTb (detection signal a) from the detector 3-1 and 1 from the detector 3-2.
The output signal S2 _OUTb (detection signal b) of the system is compared to generate a comparison signal c, which is sent to the CPU 5. The CPU 5 sends a control signal to the 0-system delay adjusting circuit 1-1 and the 1-system delay adjusting circuit 2-1 so that the comparison signal c from the comparator 4 becomes zero (the delay time deviation ΔTd is zero). So that the delay adjustment times Td1 and 1 for the 0-system input signal S1 _IN
The delay adjustment time Td2 for the system input signal S2 _IN is controlled.

[0011]

However, as shown in FIG.
In the W-CDMA radio base station 200 shown in FIG. 3, the transmission diversity TSTD (Time Switched Transmit Diversi) is used.
ty) method and STTD (Space Time block coding based)
When the output signals transmitted by the 0-system and the 1-system are different, such as the Transmit antenna Diversity method, the delay time deviation ΔTd cannot be detected by the comparator 4, and the 0-system output signal S1 _OUT and the 1-system It could not be zero delay time deviation ΔTd between the output signal S2 _{OU T.}

The delay time TD1 of the output signal S1 _OUT with respect to the 0-system input signal S1 _IN and the 1-system input signal S2 _IN
However, the delay time TD2 of the output signal S2 _OUT cannot be detected, and the delay times TD1 and TD2 cannot be made constant. Keeping the delay times TD1 and TD2 constant is an essential item for performing the position information service, and if the delay times TD1 and TD2 change, an error will occur in the position detection of the mobile communication terminal device.

That is, in the position information service, the position is measured from the arrival time of the transmission signal to the mobile communication terminal device. Therefore, it is necessary to use the delay time generated at the base station as a correction value and correct the arrival time of the transmission signal to the mobile communication terminal device by this correction value. In this case, if the correction value is set to a constant value, the position of the mobile communication terminal device cannot be accurately detected due to the change in the delay time generated at the base station.

The present invention has been made to solve such a problem, and its object is to make the delay time deviation zero even when the output signals transmitted by the 0-system and the 1-system are different. (EN) A W-CDMA radio base station and a delay time correction method therefor, which are capable of performing a position information service and can accurately detect the position of a mobile communication terminal device during a position information service.

[0015]

In order to achieve the above object, the present invention provides an input signal with a delay of a preset delay adjustment time, amplifies the delayed input signal, and outputs the output signal. In a W-CDMA radio base station having first and second transmitters for transmitting as an input signal to the first and second transmitters based on the amplitude level of the input signal and the amplitude level of the output signal, Delay time detecting means for detecting the delay time of the output signal, and delay adjusting time control for controlling the delay adjusting time for the input signal so that the delay time detected by the delay time detecting means is a preset delay time. And means are provided. According to the present invention, in the first and second transmitters (the 0-system transmitter and the 1-system transmitter), the delay of the output signal with respect to the input signal is delayed based on the amplitude level of the input signal and the amplitude level of the output signal. time (TD1, TD2) is detected, this detected by the delay time (TD1, TD2) is a delay time which is set in advance (TD1 _sET, TD2 _{SE T)} and the delay adjustment time for the input signal such that (Td1, Td2) is controlled. Here, the set value TD1 of the 0 system delay time
_{If the SET} and the delay time set value TD2 _SET of the 1-system are equal, the detection value TD1 of the delay time of the 0-system and the detection value TD2 of the delay time of the 1-system become equal, and The delay time deviation becomes zero.

The delay time of the output signal with respect to the input signal in the first and second transmitters is detected by the following method, for example. The fluctuation pattern of the amplitude level of the input signal is compared with the fluctuation pattern of the amplitude level of the output signal, and the timing difference at which the fluctuation pattern of the amplitude level matches is detected as the delay time of the output signal with respect to the input signal. The amplitude level of the input signal is compared with the amplitude level of the output signal, and the delay time of the output signal with respect to the input signal is detected from the timing difference that minimizes the difference in the amplitude levels.

[0017]

BEST MODE FOR CARRYING OUT THE INVENTION The present invention will be described below in detail with reference to the drawings. FIG. 1 is a block diagram showing the outline of an embodiment of a transmission diversity type W-CDMA radio base station according to the present invention. In the figure, 6 is a 0-system transmitter, 7 is a 1-system transmitter, and the 0-system transmitter 6 is a modulator 6-1, a radio 6-2, an antenna 6-3, and a delay time detection control. And a circuit 6-4, and the transmitter 7 of the 1 system is a modulator 7-
1, a wireless device 7-2, an antenna 7-3, and a delay time detection control circuit 7-4.

In this W-CDMA radio base station 300, the modulator 6-1 of the 0-system transmitter 6 gives the 0-system input signal S1 _IN to the radio device 6-2. The radio 6-2 is shown in FIG.
The internal structure of the first directional coupler 6-
21, delay adjustment circuit 6-22, RF circuit 6-23, and second
Directional coupler 6-24.

In the radio 6-2, the directional coupler 6-
The reference numeral 21 divides the input signal S1 _IN from the modulator 6-1 into two, sends one (S1 _INa ) to the delay adjustment circuit 6-22, and sends the other (S1 _INb ) to the delay time detection control circuit 6-4. send. The delay adjustment circuit 6-22 includes a directional coupler 6-21.
The input signal S1 _{INa from} is delayed by the delay adjustment time Td1 and is sent to the RF circuit 6-23. The delay adjustment circuit 6
The delay adjustment time Td1 at −22 is controlled by the control signal S3 from the delay time detection control circuit 6-4 described later.

The RF circuit 6-23 is a delay adjustment circuit 6-2.
The input signal S1 _INa from 2 is set to a required radio frequency and amplified to a required power to be an output signal S1 _OUT . The directional coupler 6-24 _divides the output signal S1 _OUT from the RF circuit 6-23 into two, sends one (S1 _OUTa ) to the antenna 6-3, and the other (S1 _OUTb ) the delay time detection control circuit. Send to 6-4.

The delay time detection control circuit 6-4 has a first detector 6-41 and a second detector 6-42, and a first A / D converter, as shown in the internal configuration of FIG. 6-
43 and the second A / D converter 6-44, and the CPU
6-45 and a memory 6-46.

In the delay time detection control circuit 6-4, the detector 6-41 converts the input signal S1 _INb from the directional coupler 6-21 of the wireless device 6-2 into a DC voltage signal and A / D.
Send to converter 6-43. The detector 6-42 outputs the output signal S1 _OUTb from the directional coupler 6-24 of the wireless device 6-2.
Is converted into a DC voltage signal and sent to the A / D converter 6-44. The A / D converter 6-43 converts the input signal S1 _INb from the wave detector 6-41 into a digital signal, and the CPU
Send to 6-45. The A / D converter 6-44 converts the output signal S1 _OUTb from the detector 6-42 into a digital signal and sends it to the CPU 6-45.

The CPU 6-45 operates according to the program stored in the memory 6-46, and the fluctuation pattern of the amplitude level of the input signal S1 _INb from the A / D converter 6-43 and the A / D converter 6-44. Output signal S
1 _OUTb is compared with the fluctuation pattern of the amplitude level, and the timing difference at which the fluctuation pattern of the amplitude level is matched is determined by the output signal S with respect to the input signal S1 _IN of the 0-system transmitter 6.
It is detected as the delay time TD1 of 1 _OUT . In addition, the detected delay time TD1 is the preset delay time TD
The delay adjustment circuit 6- of the wireless device 6-2 is set so that it becomes 1 _SET.
A control signal S for controlling the delay adjustment time Td1 in 22.
3 is generated. It should be noted that the delay time TD1 _{SE T} is, the memory 6
It is stored at -46.

The 1-system transmitter 7 has the same structure as the 0-system transmitter 6. FIG. 4 shows the internal configuration of the wireless device 7-2 in the 1-system transmitter 7, and FIG. 5 shows the internal configuration of the delay time detection control circuit 7-4 in the 1-system transmitter 7. The 1-system radio 7-2, like the 0-system radio 6-2, includes the first directional coupler 7-21, the delay adjustment circuit 7-22, and the RF.
It has a circuit 7-23 and a second directional coupler 7-24. Similarly to the 0-system delay time detection control circuit 6-4, the 1-system delay time detection control circuit 7-4 also includes the first detector 7-
41, a second detector 7-42, a first A / D converter 7-43, a second A / D converter 7-44,
It has a CPU 7-45 and a memory 7-46.

In the delay time detection control circuit 7-4 of the 1-system, the CPU 7-45 operates according to the program stored in the memory 7-46, and the A / D converter 7-4
The fluctuation pattern of the amplitude level of the input signal S2 _INb from _{No. 3} and the fluctuation pattern of the amplitude level of the output signal S2 _OUTb from the A / D converter 7-44 are compared, and the timing difference at which the fluctuation pattern of the amplitude level is matched is determined. It is detected as the delay time TD2 of the output signal S2 _OUT with respect to the input signal S2 _IN in the 1-system transmitter 7. Further, the detected delay time TD2 is a preset delay time TD2.
The delay adjustment circuit 7-2 of the wireless device 7-2 is set so that it becomes _SET.
Control signal S4 for controlling the delay adjustment time Td2 in 2
To generate. In addition, the delay time TD2 _SET is set in the memory 7-
It is stored in 46. In the present embodiment, the delay time set value TD stored in the 1-system memory 7-46.
2 _SET and the delay time set value TD1 _SET stored in the 0-system memory 6-46 are made equal.

[Operation of 0-system transmitter 6] 0-system transmitter 6
In, the 0-system input signal S1 from the modulator 6-1
_IN is given to the directional coupler 6-21 of the radio device 6-2. The directional coupler 6-21 divides the 0-system input signal S1 _IN from the modulator 6-1 into two, sends one (S1 _INa ) to the delay adjustment circuit 6-22, and sends the other (S1 _INb ). It is sent to the delay time detection control circuit 6-4.

The delay adjusting circuit 6-22 includes a directional coupler 6
The input signal S1 _INa from -21 is delayed by the delay adjustment time Td1 and sent to the RF circuit 6-23. RF circuit 6-2
Reference numeral 3 designates the input signal S1 _INa from the delay adjustment circuit 6-22 as a required radio frequency (for example, 2110 to 2170 MHz).
And amplify to the required power (for example, 20W),
Output signal S1 _OUT .

Output signal S1 _OUT from RF circuit 6-23
Is input to the directional coupler 6-24. Directional coupler 6
-24 _divides the output signal S1 _OUT from the RF circuit 6-23 into two _parts , one (S1 _OUTa ) is sent to the antenna 6-3, and the other (S1 _OUTb ) is sent to the delay time detection control circuit 6-4. .

In the delay time detection control circuit 6-4, the input signal S1 from the directional coupler 6-21 of the radio device 6-2 is input.
_INb is given to the first detector 6-41, and the wireless device 6-2
Output signal S1 _OUTb from the directional coupler 6-24 of
To the detector 6-42. The detector 6-41 converts the input signal S1 _INb into a DC voltage signal and sends it to the A / D converter 6-43. The detector 6-42 outputs the output signal S1.
_OUTb is converted to DC voltage signal and A / D converter 6-4
Send to 4.

The A / D converter 6-43 is a CPU 6-
In order to match the interface with 45, the detector 6-
The input signal S1 _INb from 41 is converted into a digital signal. The A / D converter 6-44 converts the output signal S1 _OUTb from the detector 6-42 into a digital signal in order to match the interface with the _{CPU 6-45} .

The CPU 6-45 operates according to the program stored in the memory 6-46, and the fluctuation pattern of the amplitude level of the input signal S1 _INb from the A / D converter 6-43 and the A / D converter 6-44. Output signal S
1 _OUTb is compared with the fluctuation pattern of the amplitude level, and the timing difference at which the fluctuation pattern of the amplitude level is matched is determined by the output signal S with respect to the input signal S1 _IN of the 0-system transmitter 6.
It is detected as the delay time TD1 of 1 _OUT . In addition, the detected delay time TD1 is the preset delay time TD
The delay adjustment circuit 6- of the wireless device 6-2 is set so that it becomes 1 _SET.
A control signal S for controlling the delay adjustment time Td1 in 22.
3 is generated.

The delay time T in the CPU 6-45 will be described below.
The detection processing operation of D1 and the generation processing operation of the control signal S3 will be specifically described with reference to FIGS. 6 and 7.
FIG. 6A shows an input signal S1 input to the CPU 6-45.
The fluctuation of the amplitude level of _INb is shown, and FIG.
The fluctuation of the amplitude level of the output signal S1 _OUTb input to -45 is shown. Since the transmission rate (chip rate) of W-CDMA is 260.4 ns (3.8 Mcps), the horizontal axis is the time normalized by the transmission rate unit (chip). That is, one scale on the horizontal axis is the time for one chip (260.4n
s) is shown. The vertical axis indicates the voltage level.

The CPU 6-45 finely measures the amplitude level of the input signal S1 _INb during one chip (for example, 1 /
(Every 8 chips), the detection point of the largest amplitude level of the input signal S1 _INb is set as the reference timing (step 701 shown in FIG. 7). Then, the amplitude level of the input signal S1 _INb is detected for each chip (260.4 ns) with this reference timing as a base point (step 7).
02). This makes it possible to clearly detect fluctuations in the amplitude level of the input signal S1 _INb .

In FIG. 6 (a), "7" is detected as the amplitude level value at the time point t1, and the amplitude is changed at the time points t2, t3, t4, t5, t6, t7, t8, t9 each time one chip elapses. As the level value, "3", "5", "4",
"6", "7", "5", "5", "6" are detected.

Similarly, the CPU 6-45 outputs the output signal S1.
_It also detects fluctuations in the _OUTb amplitude level. In FIG. 6 (b),
The amplitude level value is detected as "1" at the time point t1, and the following time points t2, t3, t4, t5, t each time one chip elapses.
At 6, t7, t8, and t9, the amplitude level values are “8”, “7”, “3”, “5”, “4”, “6”,
"7" and "5" are detected.

The CPU 6-45 then outputs the fluctuation pattern of the amplitude level of the detected input signal S1 _INb and the output signal S1.
1 _OUTb is compared with the fluctuation pattern of the amplitude level, and the timing difference at which the fluctuation pattern of the amplitude level is matched is determined by the output signal S with respect to the input signal S1 _IN of the 0-system transmitter 6.
It is detected as the delay time TD1 of 1 _OUT (step 70).
3).

In the example of FIG. 6 (b), 2 with respect to the amplitude level of the variation pattern of the output signal S1 _OUTb the amplitude level of the variation pattern of the input signal S1 _INb chip (520.8N
s) When the timings are delayed and compared, the fluctuation patterns of the amplitude levels of the both agree with each other. Therefore, in this case, the delay time TD1 is detected as 520.8 ns.

Here, the set value T of the delay time of the output signal S1 _OUT with respect to the input signal S1 _IN in the 0-system transmitter 6 is set.
If D1 _SET is 781.2 ns (3 chips), the difference between the set value TD1 _SET and the detected value TD1 is TD1 _SET −TD
1 = 260.4ns (1 chip), 260.4n
The delay time is insufficient by s. In this case, CPU 6-
Reference numeral 45 denotes a delay adjustment time Td1 (old delay adjustment time Td in the delay adjustment circuit 6-22 in the wireless device 6-2).
1 _old ) and a short delay time of 260.4 ns are added to obtain a new delay adjustment time Td1 (new delay adjustment time Td
1 _new ), the control signal S3 is set to the delay adjustment circuit 6
-22 (step 704).

As a result, the delay adjustment time Td1 in the delay adjustment circuit 6-22 is increased by 260.4 ns, and the delay time of the output signal S1 _OUT output from the RF circuit 6-2 is 2
Increase by 60.4 ns. In this state, when the fluctuation pattern of the amplitude level of the input signal S1 _INb and the fluctuation pattern of the amplitude level of the output signal S1 _OUTb are compared, as shown in FIG. _6C , the fluctuation pattern of the amplitude level of the output signal S1 _OUTb. Is delayed by 3 chips (781.2 ns) with respect to the fluctuation pattern of the amplitude level of the input signal S1 _INb , and the detected delay time TD1 and the set delay time TD1
Matches _SET .

A passive element such as a SWA filter is mounted in the RF circuit 6-23. For example, as shown in FIG.
As shown in (d), the delay time TD1 is 32.5 ns (1
/ 8 chip), the CPU 6-45 determines that the variation pattern of the amplitude level of the output signal S1 _OUTb is the input signal S1.
813.75 for the fluctuation pattern of the amplitude level of _INb
It detects that it is delayed by ns (25/8 chips).

Therefore, the CPU 6-45 sets the set value TD1.
_SET= 781.2 ns and detection value TD1 = 813.75 n
Difference with s (TD1_SET-TD1 = -32.55 ns)
At the time of delay adjustment in the current delay adjustment circuit 6-22
Interval Td1 (old delay adjustment time Td1_old) To excess
New delay adjustment time after subtracting the total time of 32.55 ns
Td1 (Td1 between new delay adjustments_new) And slow
The control signal S3 is sent to the delay adjustment circuit 6-22. By this
Output signal S1 output from the RF circuit 6-2 _OUTof
Delay time reduced by 32.55ns, delay time TD1 delayed
Time TD1_SETTo match.

In this embodiment, the input signal S1
In order to be able to detect _INb and an output signal S1 _OUTb delay time by comparing the amplitude level of the variation pattern of TD1, the average amplitude level of the average amplitude level of the input signal S1 _INb and an output signal S1 _OUTb is input CPU6-45 Are the same, and the directional couplers 6-21 to C
PU 6-45 and directional coupler 6-24 to CPU 6
The transmission line and the detector with the same characteristics are connected so that the delay time deviation up to -45 does not occur. In addition, the modulator 6-
1 and the higher-order circuit (baseband signal generator) are digitally processed with an accurate clock, and variations in delay time can be ignored.

[Operation of 1-system transmitter 7] 1-system transmitter 7
Also performs the same operation as the 0-system transmitter 6. That is, also in the 1-system transmitter 7, as in the 0-system transmitter 6, the fluctuation pattern of the amplitude level of the input signal S2 _INb and the output signal S
The variation pattern of the amplitude level of 2 _OUTb is compared, and the timing difference at which the variation pattern of the amplitude level is matched is the delay time TD of the output signal S2 _OUT with respect to the input signal S2 _IN .
2 and the input signal S2 is set so that the delay time TD2 becomes the preset delay time TD2 _SET.
The delay adjustment time Td2 for _INa is controlled.

In this embodiment, the delay time set value TD1 _SET in the 0-system transmitter 6 and the delay time set value TD2 _SET in the 1-system transmitter 7 are made equal. Therefore, the delay time TD in the 0-system transmitter 6 is
The delay time TD2 in the transmitter 7 of the 1st and 1st systems becomes equal, and the delay time deviation ΔTd of the 0th system and 1st system becomes zero. This allows the output signals S1 _OUT and S2 _{OUT at} the receiving point.
The reception timings of and match, and the effect of transmission diversity can be obtained.

Further, in this embodiment, the 0-system transmitter 6 and the 1-system transmitter 7 are independent of the delay times TD1 and TD.
Since the adjustment of No. 2 is performed, the delay time deviation ΔTd is zero even when the output signals transmitted by the 0-system and the 1-system are different from each other without being influenced by each other's system, such as the TSTD system or STTD system of transmission diversity. Can be

Further, in this embodiment, the delay time TD1 in the 0-system transmitter 6 is adjusted to the preset delay time TD1 _SET, and the delay time TD2 in the 1-system transmitter 7 is preset. Since the delay time TD2 _SET is adjusted, the delay times TD1 and TD2 are kept constant, and the position of the mobile communication terminal device can be accurately detected during the position information service.

[Second Embodiment] FIG. 8 shows another example of the delay time detection control circuit 6-4 in the 0-system transmitter 6. The delay time detection control circuit 6-4 'applies the delay adjustment time td1 to the input signal S1 _INb from the A / D converter 6-43.
Of the input signal S1 _INb from the A / D converter 6-43 and the delay adjusting circuit 6-47 for giving the delay of the input signal S1 _INb and the A / D converter 6-44.
Output signal S1 _OUTb from the
Comparator 6-48 for generating comparison signal S5 to U6-45
And is added. The delay adjusting circuit 6-
The delay adjustment time td1 at 47 is controlled by the control signal S6 from the CPU 6-45.

In the delay time detection control circuit 6-4 ', the comparator 6-48 has the A / D and the amplitude level of the input signal S1 _INb from the A / D converter 6-43 via the delay adjustment circuit 6-47. Output signal S from converter 6-44
The amplitude level of 1 _OUTb is compared, and a comparison signal S5 corresponding to the difference in the amplitude level is generated. This comparison signal S5 is C
Given to PU 6-45.

The CPU 6-45 controls the difference between the amplitude levels of the input signal S1 _INb and the output signal S2 _OUTb input to the comparator 6-48 so that the comparison signal S5 is minimized. The delay adjustment time td1 in the delay time adjustment circuit 6-47 is controlled so that Then, the delay adjustment time td1 in the delay time adjustment circuit 6-47 that minimizes this amplitude level is detected as the delay time TD1 of the output signal S2 _OUT with respect to the input signal S1 _IN , and the radio device is based on this detected delay time TD1. The control signal S3 to 6-2 is generated.

That is, the CPU 6-45 has the comparator 6-
The amplitude level of the input signal S1 _INb input to 48 is compared with the amplitude level of the output signal S2 _OUTb , and the delay time T is determined by the timing difference that minimizes the level difference between the amplitude levels.
D1 is detected, and the control signal S3 to the wireless device 6-2 is generated based on the detected delay time TD1.

Although FIG. 8 shows another example of the delay time detection control circuit 6-4 in the 0-system transmitter 6, the delay time detection control circuit 7-4 in the 1-system transmitter 7 also delays. The time detection control circuit 6-4 'may have the same configuration. Further, in the above-described embodiment, the W-CDMA wireless base station having the two transmitters of the 0-system transmitter 6 and the 1-system transmitter 7 has been described. The number of transmitters is not limited to one, and a transmitter having the same configuration may be further provided.

[0052]

As is apparent from the above description, according to the present invention, in the first and second transmitters, the output signal with respect to the input signal is output based on the amplitude level of the input signal and the amplitude level of the output signal. The delay adjustment time for the input signal is controlled so that the detected delay time becomes the preset delay time, and the output signal for the input signal is independently set for each transmitter. Since the delay time is adjusted, the delay time deviation can be set to zero even when the output signals transmitted by the 0-system and the 1-system are different, such as the TSTD method and STTD method of transmission diversity. Become. Further, in each transmitter, since the delay time of the output signal with respect to the input signal is adjusted to the set delay time, the delay time of the output signal with respect to the input signal is made constant, and the mobile communication terminal device can be accurately operated at the time of location information service. Will be able to detect the position of.

[Brief description of drawings]

FIG. 1 is a transmission diversity system WC according to the present invention.
It is a block diagram which shows the outline of one Embodiment of a DMA radio base station.

FIG. 2 is a diagram showing an internal configuration of a radio of a 0-system transmitter in this W-CDMA radio base station.

FIG. 3 is a diagram showing an internal configuration of a delay time detection control circuit of a 0-system transmitter in the W-CDMA wireless base station.

FIG. 4 is a diagram showing an internal configuration of a radio of a 1-system transmitter in this W-CDMA radio base station.

FIG. 5 is a diagram showing an internal configuration of a delay time detection control circuit of a 1-system transmitter in the W-CDMA wireless base station.

FIG. 6 is a diagram illustrating a delay time detection processing operation and a control signal generation processing operation executed by the CPU of the delay time detection control circuit of the 0-system transmitter in the W-CDMA wireless base station.

FIG. 7 is a flowchart illustrating a delay time detection processing operation and a control signal generation processing operation executed by the CPU of the delay time detection control circuit of the 0-system transmitter in the W-CDMA wireless base station.

FIG. 8 is a diagram showing another example of the delay time detection control circuit in the 0-system transmitter.

FIG. 9 is a conventional transmission diversity W-CDMA system.
It is a block diagram which shows the outline of a wireless base station.

FIG. 10 is a block diagram showing an outline of a transmission diversity type W-CDMA radio base station to which the technique shown in Document 1 is applied.

[Explanation of symbols]

6 ... 0 transmitter, 6-1 ... modulator, 6-2 ... radio,
6-3 ... Antenna, 6-4 ... Delay time detection control circuit, 6
-21, 6-24 ... Directional coupler, 6-22 ... Delay adjustment circuit, 6-23 ... RF circuit, 6-41, 6-42 ... Detector, 6-43, 6-44 ... A / D converter , 6-45
... CPU, 6-46 ... Memory, 6-47 ... Delay adjustment circuit, 6-48 ... Comparator, 7 ... 0-system transmitter, 7-1 ... Modulator, 7-2 ... Radio, 7-3 ... Antenna, 7-4 ... Delay time detection control circuit, 7-21, 7-24 ... Directional coupler, 7-22 ... Delay adjustment circuit, 7-23 ... RF circuit, 7
-41, 7-42 ... Detector, 7-43, 7-44 ... A /
D converter, 7-45 ... CPU, 7-46 ... memory,
300 ... W-CDMA radio base station.

Claims (6)

[Claims] 1. An input signal is delayed by a preset delay adjustment time, and the delayed input signal is amplified,
In a W-CDMA radio base station including first and second transmitters that transmit as output signals, the first and second transmitters have an amplitude level of the input signal and an amplitude level of the output signal. A delay time detecting means for detecting a delay time of the output signal with respect to the input signal based on the delay time; and a delay adjustment for the input signal so that the delay time detected by the delay time detecting means becomes a preset delay time. A W-CDMA radio base station, comprising: delay adjustment time control means for controlling time. 2. The W-CDMA radio base station according to claim 1, wherein the delay time detecting means compares the variation pattern of the amplitude level of the input signal with the variation pattern of the amplitude level of the output signal. Then, the W-CDMA radio base station is characterized in that the timing difference at which the fluctuation patterns of the amplitude levels match is detected as the delay time of the output signal with respect to the input signal. 3. The W-CDMA radio base station according to claim 1, wherein the delay time detecting means compares the amplitude level of the input signal with the amplitude level of the output signal, A W-CDMA radio base station, wherein a delay time of an output signal with respect to the input signal is detected based on a timing difference that minimizes a level difference. 4. An input signal is delayed by a preset delay adjustment time, and the delayed input signal is amplified,
A delay time correction method for a W-CDMA radio base station comprising first and second transmitters transmitting as an output signal, wherein the amplitude level of the input signal and the amplitude level of the input signal are included in the first and second transmitters. A first step of detecting a delay time of the output signal with respect to the input signal based on an amplitude level of the output signal, and a delay time detected by the first step to be a preset delay time. And a second step of controlling the delay adjustment time with respect to the input signal, the delay time correction method of the W-CDMA radio base station. 5. The delay time correction method for a W-CDMA radio base station according to claim 4, wherein in the first step, a variation pattern of the amplitude level of the input signal and a variation of the amplitude level of the output signal. W is characterized in that a pattern difference is compared with a pattern, and a timing difference at which the variation pattern of the amplitude level matches is detected as a delay time of the output signal with respect to the input signal.
-A delay time correction method for a CDMA radio base station. 6. The delay time correction method for a W-CDMA radio base station according to claim 4, wherein in the first step, the amplitude level of the input signal is compared with the amplitude level of the output signal, A delay time correction method for a W-CDMA radio base station, wherein a delay time of an output signal with respect to the input signal is detected from a timing difference that minimizes the level difference of the amplitude levels.