JP2003249848A - Activating method of signal transmission circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide activating method of a signal transmission circuit that can be activated with low voltage and low electric power consumption, used for a shift register for activating a liquid crystal display or a MOS imaging device. <P>SOLUTION: In the shift register for a dynamic circuit using a bootstrap, it is configured such that a high voltage side terminal with a capacity for the bootstrap is connected to the gate of a charge transistor for charging the bootstrap capacity for the shift register on the next stage to high, to make a drain of a charge transistor on the subsequent tier to be low voltage. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a driving method of a signal transmission circuit which can be used in a shift register for driving a liquid crystal display and a MOS type image pickup device and can be driven with low voltage and low power consumption.

[0002]

2. Description of the Related Art FIG. 3 is an example showing a configuration of a conventional signal transmission circuit. Output transistor 1, bootstrap capacitor 2, and bootstrap capacitor charging transistor 3
A discharge transistor 4, a VDD power supply 5, a driving pulse 6 for V1 and V2, and a start pulse VST7. When the start pulse VST7 of the signal transmission circuit is input to the gate of the bootstrap capacitor charging transistor T11, the bootstrap capacitor C1 is charged in the positive direction of the VDD power supply 5 and the output transistor T12 is turned on. After that, when V1 is input to the drain of the output transistor T12, the V1 potential and the potential difference between the both ends of the bootstrap capacitance C1 are applied to the gate of the output transistor T12 in a form of being added, and the potential below the gate of the output transistor T12 is applied. When the potential can be made higher than V1, V1 pulse can be output to the contact N12. This output is used as the output OUT1 of the signal transmission circuit. At the same time, the voltage of the contact N12 is applied to the gate of the bootstrap capacitance charging transistor T21 at the next stage, the bootstrap capacitance C2 is charged, and the output transistor T22 is turned on.

After that, when V2 is input to the drain of the output transistor T22, the V2 potential and the potential difference between both ends of the bootstrap capacitor C2 are applied to the gate of the output transistor T22 in a positive form, and the output transistor T22 has a potential difference. When the potential under the gate can be made higher than V2, the V2 pulse can be output to the contact N22. This output is used as the output OUT2 of the signal transmission circuit. At the same time, the voltage of the contact N22 is applied to the gate of the bootstrap capacitance charging transistor T31 in the next stage, the bootstrap capacitance C3 is charged, and the output transistor T32 is turned on. At this time, the contact N2 is simultaneously
The voltage of 2 is applied to the gates of the discharge transistors T13 and T14 to discharge the bootstrap capacitance C1 in the preceding stage.

By repeating such an operation, the signal transmission circuit can enable the operation of sequentially outputting outputs such as OUT3 and OUT4.

[0005]

FIG. 4 shows a conventional drive and output using only NMOS. This circuit is 5V
Of the drive pulse 6 of V1 and V2, the voltage amplitude of the start pulse VST7, and VDD5.
The case where all the voltages are 5V is shown.

At time t0, the voltage 5V of the start pulse VST7 changes to the bootstrap capacitance charging transistor T.
By inputting to the gate of 11, the bootstrap capacitance C1 is charged in the positive direction of 5V of VDD5. However, when the bootstrap capacitance charging transistor T11 is an enhancement type NMOS, the threshold voltage Vt of T11 Because of the influence, the potential under the gate of T11 does not become 5V, so that C1 becomes a voltage lower than 5V of VDD5 by ΔH0, and the output transistor T12 is turned on. Next, at time t1, when V1 is input to the drain of the transistor T12, V1 is applied to the gate of the output transistor T12.
1 potential and the potential difference (5
The HB1 voltage to which (V−ΔH0) is added is applied, and the pulse having the amplitude of H1 is output to the contact N12.
Further, by inputting the pulse amplitude H1 of the contact N12 to the gate of the bootstrap capacitance charging transistor T21 at the next stage, the bootstrap capacitance C2 becomes (H1-ΔH).
It will be charged in 1).

Similarly, at times t2, t3, and t4, the operation at time t1 is repeated.

In the case of this circuit, since the voltage of less than 5 V is applied to the gate of the bootstrap capacitor charging transistor 3 at the maximum, the charging voltage of the bootstrap capacitor 2 can be charged only to a voltage lower than 5 V of the power supply VDD5. It will be. Therefore, N21, N31, N4
The potential of 1 gradually decreases, and the signal transmission circuit does not output any number of stages later.

In particular, lowering the voltage of the power supply system of the circuit, for example, 3
The operation becomes more difficult with a V-type circuit or the like.

[0010]

A method for driving a signal transmission circuit according to the present invention is a method for driving a signal transmission circuit which is composed of a plurality of unit circuits and in which pulse voltages are sequentially output from the unit circuits according to drive pulses. So, the unit circuit is
In order to charge the output transistor that inputs the drive pulse into the drain and outputs the pulse voltage from the source as the pulse voltage, the bootstrap capacitance connected between the gate and the source of the output transistor, and the bootstrap capacitance A source transistor connected to the gate of the output transistor and a drain connected to a power source line, a ground line, or a charging pulse line, and a unit circuit (N-2 stages) before the unit circuit of the Nth stage. In the period in which the pulse voltage is output from the source of the output transistor of the eye unit circuit), when the charging transistor of each unit circuit is an N-type transistor, the output of the unit circuit of the previous stage (N-1th stage unit circuit) The drain voltage of the transistor is Hi
If the drain voltage of the output transistor of the Nth stage unit circuit is Low level at the gh level and the charging transistor of each unit circuit is a P-type transistor, the output transistor of the preceding unit circuit (N-1th stage unit circuit) Is at a low level, and the drain of the output transistor of the Nth stage unit circuit is at a high level.

Therefore, the potential of the gate of the output transistor connected to the plus side of the bootstrap capacitance is connected to the gate of the bootstrap capacitance charging transistor of the next stage, so that the bootstrap capacitance charging transistor of the next stage is connected. Since a voltage higher than the conventional voltage is applied to the gate, the potential under the gate of the bootstrap capacitance charging transistor can be made higher than the VDD power supply voltage. This allows the bootstrap capacitor in the next stage to be charged with the VDD power supply voltage and prevents the charging voltage from dropping to the capacitor. Then, it is possible to prevent the output of N21, N31, and N41 from being lowered and the output from being stopped due to the increase in the number of transmission stages.

[0012]

1 is a block diagram of a signal transmission circuit according to an embodiment of the present invention. Output transistor 1
A bootstrap capacitor 2, a bootstrap capacitor charging transistor 3, a discharging transistor 4, and V
1, V2, V3 drive pulse 6 and start pulse VS
And T7. When the start pulse VST7 of the signal transmission circuit is input to the gate of the bootstrap capacitance charging transistor T11, the bootstrap capacitance C1 is charged in the positive direction and the output transistor T12 is turned on. After that, V1 is the output transistor T
Input to the drain of the output transistor T12
The gate of V1 potential and bootstrap capacitance C1
When the potential under the gate of the output transistor 12 can be made higher than V1, the V1 pulse can be output to the contact N12. This output is the output OUT1 of the signal transmission circuit.
Used as.

In particular, the advantage of this circuit is that the voltage at the contact N11, which is the positive terminal of the bootstrap capacitance C1, is the bootstrap capacitance charging transistor T of the next stage.
Since it is applied to the gate of 21, the high voltage can be applied to the gate of the bootstrap capacitance charging transistor T21 in the next stage. Therefore, even if the bootstrap capacitance charging transistor T21 in the next stage is an enhancement type NMOS, the bootstrap capacitance C2 can be reliably charged to the VDD power supply voltage, and the output transistor T22 can be turned on.

After that, when V2 is input to the drain of the output transistor T22, the gate of the output transistor T22 is applied in such a manner that the potential difference between the V2 potential and the bootstrap capacitance C2 is added, and the output transistor T22 is applied. The potential under the gate of can be made higher than V2, and V2 pulse can be output to the contact N22. This output is used as the output OUT2 of the signal transmission circuit.

At the same time, the bootstrap capacitance C2
The voltage of the contact N21, which is the terminal on the positive side of, is applied to the gate of the bootstrap capacitance charging transistor T31 at the next stage, the bootstrap capacitance C3 is reliably charged to the VDD power supply voltage, and the output transistor T32 turns on.

In this manner, in all the signal transmission stages, the plus side terminal voltage of the bootstrap capacitance 2 is applied to the gate of the bootstrap capacitance charging transistor 3 of the next stage, so that the bootstrap capacitance of the next stage is obtained. Since the VDD power supply voltage can be surely charged, it is possible to realize a signal transmission circuit with low voltage, low voltage, and low power consumption.

In this circuit, as described above, the output O
While the drain voltage V1 of the output transistor T12 is output to UT1, the bootstrap capacitance C2 of the next stage is charged to 3V of the drain voltage VDD of the bootstrap capacitance charging transistor T21, so that the threshold voltage of T31 is low. In this case, the bootstrap capacitance charging transistor T31 may be turned on. When the bootstrap capacitance charging transistor T31 is turned on, the bootstrap capacitance C3 is charged in the positive voltage direction of the VDD power supply voltage. When the bootstrap capacitance C3 is charged, the output transistor T32 is turned on, and the output OUT
Since there is a possibility of malfunction that part of the drain voltage V1 of the output transistor T32 appears at 3, the V3 pulse needs to be at the Low level.

At this time, in particular, if the Low level of the V3 pulse is set to 0 V, the number of input voltages from the outside of the element can be reduced, the circuit scale can be reduced, and the stability can be achieved.

Therefore, in the signal transmission circuit, with respect to the required output OUT1, the pulse of the drain of the output transistor related to the output OUT3 of the next stage is Low.
Just set it to a level. Similarly, in the signal transmission circuit,
While the required output of the Nth stage is being output, by setting the pulse of the drain of the output transistor related to the output of the next stage (N + 2nd stage) prior to that output to the Low level,
It is possible to prevent a malfunction of the output of the (N + 2nd) stage of the signal transmission circuit.

In order to realize such a means, in order to minimize the number of types of drain pulse of the output transistor, it is sufficient to have three types of pulses. Therefore, the drain pulse of the output transistor is three-phase driven. In this case, the number of drive circuits can be reduced.

Further, as a means for discharging the voltage charged in the bootstrap capacitor 2, as a method for reducing the number of transistors and power supplies in the circuit, the bootstrap capacitor C is used.
In the case of 1, the source side of the discharge transistor T13 is connected to the plus side of the bootstrap capacitance C1, and the source side of the discharge transistor T14 is connected to the bootstrap capacitance C1.
Connected to the negative side of the discharge transistors T13, T1
The contact N on the source side of the next stage output transistor is connected to the gate of 4.
By connecting 22 the bootstrap capacitor C1 is discharged when a V2 pulse is output to the contact N22.

With this configuration, it is possible to discharge by simply adding two discharge transistors, and it is possible to realize a signal transmission circuit with a small-scale circuit configuration without other external input pulses.

FIG. 2 shows driving and output in the embodiment of the present invention using only NMOS. This circuit is V
Voltage amplitude of drive pulse 6 of 1, V2, V3 and VDD
The case where the power supply voltage is 3V and the voltage amplitude of the start pulse VST7 is 5V is shown.

Referring to FIG. 1, the bootstrap capacitance charging transistor T1 to which the start pulse VST7 is input.
Only in the case of 1, the terminal voltage on the plus side of the bootstrap capacitor C11 cannot be supplied, so the start pulse VST
It is possible to charge the bootstrap capacitance C1 to the VDD power supply voltage of 3V by driving only 7 with 5V, which is higher than the drive voltages of V1 and V2. Therefore, by making the voltage of the start pulse VST7 higher than the drive voltage of V1 and V2, it is possible to prevent the voltage drop in the input transistor of the start pulse VST7.

At time t0, the voltage of the start pulse VST7 is the threshold voltage Vt of the bootstrap capacitance charging transistor T11 which is an enhancement type NMOS.
Even if there was, 5 V was applied so that the voltage under the gate of T11 would be 3 V or more. As a result, the bootstrap capacitor C1 is charged to the VDD power supply voltage of 3V.

Next, at time t1, when V1 is input to the drain of the output transistor T12, the output transistor T12
The HB1 voltage, which is a high voltage obtained by adding the V1 potential of 3 V and the potential difference of 3 V across the bootstrap capacitor C1 to the gate of 12, is applied, so that the V1 pulse of 3 V amplitude is surely output to the contact N12. Become. Also, the contact N1 which is the positive terminal of the bootstrap capacitor C1.
By inputting the pulse HB1 of 1 to the gate of the bootstrap capacitance charging transistor T21 at the next stage, the bootstrap capacitance C2 is reliably charged to 3V of the VDD power supply voltage. At this time, the voltage of the bootstrap capacitance C2 is input to the gate of the bootstrap capacitance charging transistor T31 at the next stage, so that the bootstrap capacitance C3 is positively charged.
The low level of V3 is set to 0 V so as to prevent a malfunction that an output appears at 3.

Similarly, at times t2, t3, and t4, the operation at time t1 is repeated. In the case of this figure, V1 is High and V3 is Low at time t1, V2 is High and V1 is Low at time t2, V3 is High and V2 is Low at time t3, and at time t4. , Same as time t1, V1 is High, V3
Is Low to prevent malfunction.

As described above, in the case of the present embodiment, since the positive terminal voltage of the bootstrap capacitor 2 is always applied to the gate of the bootstrap capacitance charging transistor 3 of the next stage, the bootstrap capacitor of the next stage is used. Certainly 3V
As a result, a signal transmission circuit with a low voltage of 3 V and low power consumption can be realized without voltage drop.

Further, in the above embodiment, the N-type MOS is
Although the case of the transistor is shown, the same effect can be obtained also in the case of all P-type MOS.

[0030]

As described above, according to the driving method of the signal transmission circuit of the present invention, the potential of the gate of the output transistor to which the plus side of the bootstrap capacitor is connected is set to the gate of the bootstrap capacitance charging transistor of the next stage. By connecting to, the higher voltage than before is applied to the gate of the bootstrap capacitance charging transistor, and the potential under the gate of the bootstrap capacitance charging transistor is set to the drain of the bootstrap capacitance charging transistor. It can be higher than the voltage. As a result, the bootstrap capacitance of the next stage can be reliably charged with the drain voltage of the bootstrap capacitance charging transistor of the next stage, and a drop in the charging voltage to the capacitance can be prevented. Therefore, it is possible to prevent the output from decreasing and the output from not being output due to the increase in the number of transmission stages, and it is possible to realize low voltage driving.

Further, by operating the drain voltage with a pulse for three-phase driving, it is possible to prevent malfunction of the circuit and at the same time,
The number of drive pulses can be minimized.

The driving method of the signal transmission circuit of the present invention realizes the low voltage by using the signal transmission circuit for the shift register in accordance with the demand for realizing the low voltage driving of the liquid crystal display and the MOS type image pickup device. Therefore, it is extremely useful industrially.

[Brief description of drawings]

FIG. 1 is a diagram showing a signal transmission circuit according to an embodiment of the present invention.

FIG. 2 is a diagram illustrating driving and output in the embodiment of the present invention.

FIG. 3 is a diagram showing a conventional signal transmission circuit.

FIG. 4 is a diagram illustrating conventional driving and output.

[Explanation of symbols]

1 output transistor 2 Bootstrap capacity 3 Capacitance charging transistor for bootstrap 4 discharge transistor 5 VDD power supply 6 drive pulse 7 Start pulse

   ─────────────────────────────────────────────────── ─── Continued front page    F term (reference) 5J056 AA05 BB17 BB18 CC29 DD13                       DD27 DD51 EE03 EE07 FF10                       GG09

Claims (4)

[Claims] 1. A method of driving a signal transmission circuit comprising a plurality of unit circuits, wherein pulse voltages are sequentially output from the unit circuits according to drive pulses, wherein the unit circuits input the drive pulses to a drain. An output transistor that outputs from the source as the pulse voltage, a bootstrap capacitance connected between the gate and the source of the output transistor, and a source connected to the gate of the output transistor to charge the bootstrap capacitance. A charging transistor having a drain connected to a power supply line, a ground line, or a charging pulse line, the output transistor of a unit circuit in a stage before the Nth unit circuit (N-2 stage unit circuit) During the period when the pulse voltage is output from the source, the charging transistor of each unit circuit is an N-type transistor. The front of the unit circuits (N-1
The drain voltage of the output transistor of the stage unit circuit) is H
When the drain voltage of the output transistor of the Nth stage unit circuit is Low level and the charging transistor of each unit circuit is a P-type transistor at the high level, the output transistor of the unit circuit of the preceding stage (N-1th stage unit circuit) And a drain voltage of the output transistor of the N-th stage unit circuit is at a high level. 2. The same voltage as the drain of the output transistor of the next-stage unit circuit (N + 1-th stage unit circuit) is applied to the drain of the output transistor of the preceding-preceding stage unit circuit (N-2-th stage unit circuit). The method for driving a signal transmission circuit according to claim 1, wherein: 3. The drain voltage of the output transistor of the unit circuit of the previous stage before (N-2 stage unit circuit) and the drain voltage of the output transistor of the unit circuit of the next stage (N + 1 stage unit circuit) are the same. Voltage Va, the drain voltage of the output transistor of the preceding unit circuit (N-1th stage unit circuit) and the drain voltage of the output transistor of the next-stage unit circuit (N + 2nd stage unit circuit) are the same voltage Vb. so,
The drain voltage of the output transistor of the unit circuit of the Nth stage and the drain voltage of the output transistor of the unit circuit of the next stage unit (N + th stage unit circuit) are the same voltage Vc,
The driving method of the signal transmission circuit according to claim 1 or 2, wherein the drain of the output transistor is a three-phase drive of Va, Vb, and Vc. 4. The method according to claim 1, wherein the drain voltage of the charging transistor is 0 V when the drain voltage is at a low level.
A method for driving a signal transmission circuit according to any one of 1.