JP2003249092A - Sample-and-hold circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a sample-and-hold circuit in which circuit constitution is simple, the number of circuit elements is small, and the cost is reduced. <P>SOLUTION: This circuit is a sample-and-hold circuit to which an image signal alternating an image section and a non-image section which is different in voltage from the image section is supplied and in which the image section is subjected to sample-and-hold to be outputted, and the circuit constitution can be made simple, the number of circuit elements can be decreased, and the cost can be reduced, by constituting of a diode (D1) turned on in only an image section, a capacitor (C1) discharging by an on-state of the diode (1), and a resistor (R4) charging the capacitor (C1) at an off-state. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a sample and hold circuit, and more particularly to a sample and hold circuit that samples and holds an image signal read by an image sensor.

[0002]

2. Description of the Related Art In recent years, computerization of information and networking have made great progress, and management of corporate information and personal information has become important. In particular, to authenticate whether or not a user has the authority to access important confidential information, for example,
A fingerprint authentication device for authenticating a fingerprint as a physical characteristic of the person has been developed.

A line sensor type image sensor is used in the fingerprint reading portion of the fingerprint authentication device, and a finger is slid in a direction orthogonal to the longitudinal direction of the image sensor to obtain fingerprint data from an image signal read by the image sensor. Authentication may be performed by comparing with registered fingerprint data. In this case, since the image signal includes reset noise and a reference black level, it is necessary to remove the reset noise section and the reference black level section in the image signal and sample and hold only the image section.

FIG. 1 is a circuit diagram showing an example of a conventional sample hold circuit. In the figure, an image signal read by an image sensor is supplied to a terminal 10. As shown in FIG. 2A, this image signal has a signal waveform in which a reset noise section, a reference black level section, and an image section are repeated.

An image signal is impedance-converted by an npn transistor Q1 having an emitter follower structure whose base is connected to a terminal 10 and then taken out from an emitter of the transistor Q1 and supplied to sample and hold sections 12 and 14, respectively.

The sample-hold section 14 samples and holds the reference black level section of the image signal with the sampling pulse shown in FIG. Sample hold unit 1
Reference numeral 6 is a sampling pulse shown in FIG. 2C supplied from the terminal 17 to sample and hold the output of the sample and hold unit 14 to input the sample and hold value of the reference black level section of the image signal to the inverting input terminal of the differential amplifier 18. Supply.

The sample-hold section 12 samples and holds the image section of the image signal with the sampling pulse shown in FIG. 2C supplied from the terminal 17 and supplies it to the non-inverting input terminal of the differential amplifier 18. The differential amplifier 18 obtains the difference between the image value and the black level value of the image signal and outputs the difference from the terminal 20.

Here, the sample and hold units 12, 14,
16 are each an analog switch 2 as shown in FIG.
2, a capacitor 23, and a FET that constitutes a buffer
(Field effect transistor) 24.

[0009]

The conventional sample and hold circuit has an analog switch 22, a capacitor 23 and an F.
There are problems that the circuit scale is large and the cost is high because three circuits are required for the sample hold unit composed of the ET24 and the circuit for generating the sampling pulse shown in FIGS. 2B and 2C is required. It was

The present invention has been made in view of the above points, and an object of the present invention is to provide a sample hold circuit having a simple circuit configuration, a small number of circuit elements, and a low cost.

[0011]

According to a first aspect of the present invention, an image signal is repeatedly supplied between an image section and a non-image section having a different voltage from the image section, and the image section is sample-held and output. A sample and hold circuit, which includes a diode (D1) that is turned on only in the image section, a capacitor (C1) that is discharged by turning on the diode (D1), and a resistor that charges the capacitor when the diode (D1) is off. With the configuration (R4), the circuit configuration is simple, the number of circuit elements can be reduced, and the cost can be reduced.

According to a second aspect of the present invention, in the sample hold circuit according to the first aspect, the image signal is
It is a read image of a fingerprint and the time constant of the capacitor (C1) and the resistor is determined according to the spatial frequency of the fingerprint, so that the spatial frequency component of the fingerprint included in the image signal when the capacitor (C1) is charged. Can be prevented from being lost.

It should be noted that the reference numerals in the above parentheses are given for easy understanding and are merely examples, and the present invention is not limited to the illustrated modes.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 4 shows a circuit configuration diagram of an embodiment of a sample hold circuit according to the present invention. In the figure, terminal 30
The image signal read by the image sensor is supplied to. This image signal is, as shown in FIG.
It is a signal waveform in which a reset noise section, a reference black level section serving as a reference, and an image section are repeated.

The terminal 30 is connected to the base of the pnp transistor Q2 via the resistor R2, the emitter of the transistor Q2 is connected to the power source Vcc via the resistor R3, the collector is grounded, and the input buffer is connected by the emitter follower circuit. Are configured.

The emitter of the transistor Q2 is connected to the cathode of the diode D1, and the anode of the diode D1 is connected to one end of the resistor R4, one end of the capacitor C1 and the gate of the N-channel FET M1. The black level (= Vblk) of the image signal is applied to the other end of the resistor R4 via the terminal 32, and the other end of the capacitor C1 is grounded. The drain of the FET M1 is connected to the power supply Vcc, and the source is grounded via the resistor R5 to form a drain-grounded circuit that constitutes a buffer. The output terminal 34 is connected to the source of the FET M1.

Here, the forward voltage between the base and the emitter of the transistor Q2 and the conduction voltage of the diode D1 are respectively set to Vf (≈0.6V). Since the diode D1 is turned off while the image signal level is higher than Vblk-2 · Vf, the capacitor C1 changes from the resistor R4 to the time constant C1.
・ It is charged by R4.

When the image signal level becomes lower than Vblk-2Vf in the image section, the diode D1
Is turned on, the capacitor C1 is rapidly discharged, and when the image signal level is Ve, the voltage across the capacitor C1 is represented by Ve + 2 · Vf. Therefore, the output signal waveform at the terminal 34 is as shown in FIG.

When the image signal is a fingerprint read image, the spatial frequency of the ridges and valleys of the fingerprint is within a predetermined range, so the time constants C1 and R4 of the capacitor C1 and the resistor R4 are set to the fingerprint ridge. And the same as the spatial frequency of the valley. As a result, it is possible to prevent the spatial frequency component of the fingerprint included in the image signal from being lost when the capacitor C1 is charged.

According to the present embodiment, the conventional sample and hold unit and sampling pulse generating circuit are not required, and the simple circuit configuration of the diode D1, the capacitor C1 and the resistor R4 allows the number of circuit elements to be greatly reduced. The cost can be reduced.

[0021]

As described above, the invention according to claim 1 is
A sample and hold circuit, which is supplied with an image signal in which an image section and a non-image section having a different voltage from the image section are supplied, samples and holds the image section, and outputs the diode (D1). And a capacitor (C1) that discharges when the diode (D1) is turned on and a resistor (R4) that charges the capacitor (C1) when the diode (D1) is turned off, thereby simplifying the circuit configuration. The number of circuit elements can be reduced, and the cost can be reduced.

According to a second aspect of the present invention, in the sample hold circuit according to the first aspect, the image signal is
It is a read image of a fingerprint and the time constant of the capacitor (C1) and the resistor is determined according to the spatial frequency of the fingerprint, so that the spatial frequency component of the fingerprint included in the image signal when the capacitor (C1) is charged. Can be prevented from being lost.

[Brief description of drawings]

FIG. 1 is a circuit configuration diagram of an example of a conventional sample hold circuit.

FIG. 2 is a signal waveform diagram of each part of a conventional circuit.

FIG. 3 is a circuit diagram of a sample hold unit.

FIG. 4 is a circuit configuration diagram of an embodiment of a sample hold circuit of the present invention.

FIG. 5 is a signal waveform diagram of each part of the circuit of the present invention.

[Explanation of symbols]

D1 diode C1 capacitor Q2 npn transistor R2-R5 resistance M1 FET (field effect transistor)

Claims (2)

[Claims] 1. A sample and hold circuit, which is supplied with an image signal in which an image section and a non-image section whose voltage is different from that of the image section, are sampled and output to sample and hold the image section, and is turned on only in the image section. And a capacitor that discharges when the diode is turned on, and a resistor that charges the capacitor when the diode is turned off. 2. The sample and hold circuit according to claim 1, wherein the image signal is a fingerprint read image, and the time constants of the capacitor and the resistor are determined according to the spatial frequency of the fingerprint. Sample hold circuit.