JP2003243635A - Semiconductor device and method for manufacturing the same - Google Patents
Semiconductor device and method for manufacturing the sameInfo
- Publication number
- JP2003243635A JP2003243635A JP2002035822A JP2002035822A JP2003243635A JP 2003243635 A JP2003243635 A JP 2003243635A JP 2002035822 A JP2002035822 A JP 2002035822A JP 2002035822 A JP2002035822 A JP 2002035822A JP 2003243635 A JP2003243635 A JP 2003243635A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor
- solid
- curved surface
- package
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 60
- 238000004519 manufacturing process Methods 0.000 title claims description 8
- 238000000034 method Methods 0.000 title description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 14
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 14
- 239000010703 silicon Substances 0.000 claims abstract description 14
- 238000003384 imaging method Methods 0.000 claims description 16
- 239000000758 substrate Substances 0.000 claims description 9
- 239000000853 adhesive Substances 0.000 claims description 3
- 230000001070 adhesive effect Effects 0.000 claims description 3
- 238000007789 sealing Methods 0.000 claims 1
- 229910021645 metal ion Inorganic materials 0.000 abstract description 14
- 239000013078 crystal Substances 0.000 abstract description 7
- 230000007547 defect Effects 0.000 abstract description 6
- 239000012535 impurity Substances 0.000 description 5
- 239000003822 epoxy resin Substances 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- 230000035515 penetration Effects 0.000 description 3
- 229920000647 polyepoxide Polymers 0.000 description 3
- 239000003566 sealing material Substances 0.000 description 3
- 241000519995 Stachys sylvatica Species 0.000 description 2
- 230000004913 activation Effects 0.000 description 2
- 238000005452 bending Methods 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000006837 decompression Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 229910003460 diamond Inorganic materials 0.000 description 1
- 239000010432 diamond Substances 0.000 description 1
- 238000010348 incorporation Methods 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
- 239000011800 void material Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1203—Rectifying Diode
- H01L2924/12036—PN diode
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
- Light Receiving Elements (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、表面に受光部を有
する固体撮像素子等の素子を半導体パッケージに収容し
てなる半導体装置およびその製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device in which an element such as a solid-state image sensor having a light receiving portion on its surface is housed in a semiconductor package, and a method of manufacturing the same.
【0002】[0002]
【従来の技術】一般に、CMOS(Complementary Meta
l Oxide Semiconductor)、CCD(Charge Coupled Dev
ice)などの固体撮像装置は、図3に示したように、パッ
ケージ111の底部に固体撮像素子113を接着剤によ
り固定し、この固体撮像素子113の配線部分をボンデ
ィングワイヤ114を介して外部への配線と電気的に接
続した構造を有している。なお、パッケージ111は、
上部に開口を有するパッケージ本体111Aと、このパ
ッケージ本体111Aの上部開口に接合されたガラス板
からなる蓋体111Bとにより構成されている。2. Description of the Related Art Generally, CMOS (Complementary Meta
l Oxide Semiconductor), CCD (Charge Coupled Dev)
As shown in FIG. 3, a solid-state image pickup device such as ice) has a solid-state image pickup device 113 fixed to the bottom of a package 111 with an adhesive, and the wiring portion of the solid-state image pickup device 113 is exposed to the outside via a bonding wire 114. It has a structure electrically connected to the wiring. The package 111 is
The package main body 111A has an opening in the upper part, and a lid body 111B made of a glass plate bonded to the upper opening of the package main body 111A.
【0003】ところで、このような従来の固体撮像装置
では、画像信号をディスプレイ上に出力させると、画像
中に白点、黒点等が観察されることがある。これらの画
像欠陥はほんの小さなものでも非常に目立ち、応用上さ
まざまな障害を引き起こしている。このような画像欠陥
の一つの原因として不純物としての金属イオンがあり、
この金属イオンは、半導体素子プロセスの基本となるシ
リコン基板の作製時に基板内にすでに侵入していること
が知られている。特に、これに関わる画像欠陥では、シ
リコン基板の表面に近い受光部(PN接合)に、シリコ
ン基板に最初から含まれていた金属イオンが侵入し、こ
の金属イオンに電荷がノイズとして発生して、このノイ
ズが白点などの画像劣化を引き起こしていることが現在
問題となっている。In such a conventional solid-state image pickup device, when an image signal is output on a display, white spots, black spots, etc. may be observed in the image. These image defects, even the smallest ones, are very noticeable and cause various obstacles in application. One of the causes of such image defects is metal ions as impurities,
It is known that this metal ion has already penetrated into the substrate when the silicon substrate, which is the basis of the semiconductor device process, is manufactured. In particular, in image defects related to this, metal ions originally contained in the silicon substrate penetrate into the light receiving portion (PN junction) near the surface of the silicon substrate, and charges are generated as noise in the metal ions, It is currently a problem that this noise causes image deterioration such as white spots.
【0004】[0004]
【発明が解決しようとする課題】ところで、このような
シリコン基板に金属イオンが取り込まれる本質的な原因
は、基板を構成するシリコン結晶はダイヤモンド型の結
晶構造であり、従って、シリコン結晶の原子間の空隙が
非常に大きいことにある。このため、金属イオンの不純
物がシリコン結晶に侵入するための活性化エネルギーが
小さく、特にシリコンよりも原子半径の小さい金属原子
は少ない活性化エネルギーでシリコン結晶に侵入可能で
ある。更に、これらの金属イオンは、シリコン基板がP
N接合等の不純物勾配を有するとき、PN接合の不純物
勾配を緩和するように移動する性質がある。従って、シ
リコン基板や半導体層として、極めて金属イオンの不純
物濃度が低いものを形成しない限り、この問題を解決す
ることは難しかった。By the way, the essential cause of the incorporation of metal ions into such a silicon substrate is that the silicon crystal constituting the substrate is of a diamond type crystal structure, and therefore, the interatomic atoms of the silicon crystal. The void is very large. Therefore, the activation energy for impurities of metal ions to enter the silicon crystal is small, and in particular, metal atoms having an atomic radius smaller than that of silicon can enter the silicon crystal with a small activation energy. Furthermore, these metal ions are not
When it has an impurity gradient such as an N junction, it has a property of moving so as to relax the impurity gradient of the PN junction. Therefore, it is difficult to solve this problem unless a silicon substrate or a semiconductor layer having an extremely low impurity concentration of metal ions is formed.
【0005】本発明はかかる問題点に鑑みてなされたも
ので、その目的は、簡単な構成で、金属イオンの受光部
への侵入を抑制し、画像欠陥等の発生を防止することが
できる半導体装置およびその製造方法を提供することに
ある。The present invention has been made in view of the above problems, and an object thereof is a semiconductor which, with a simple structure, can suppress the entry of metal ions into the light receiving portion and prevent the occurrence of image defects and the like. An object is to provide a device and a manufacturing method thereof.
【0006】[0006]
【課題を解決するための手段】本発明の半導体装置は、
底部に素子配設領域を有し、素子配設領域に弯曲面が形
成された半導体パッケージと、表面に機能部を有すると
共に底面が半導体パッケージの素子配設領域に密着して
接合された半導体素子とを備えた構成を有している。The semiconductor device of the present invention comprises:
A semiconductor package having an element disposition area on the bottom and a curved surface formed on the element disposition area, and a semiconductor element having a functional portion on the surface and a bottom surface closely adhered to the element disposition area of the semiconductor package. And has a configuration including.
【0007】また、本発明の半導体装置の製造方法は、
底部に素子配設領域を有し、素子配設領域に弯曲面が形
成されると共に、底部に外部に連通する吸引孔を有する
半導体パッケージの素子配設領域に接着剤を塗布する工
程と、半導体パッケージの素子配設領域に、表面に機能
部を有する半導体素子を配置する工程と、半導体素子と
半導体パッケージの弯曲面との間の間隙部を吸引孔を通
じて減圧させることにより、半導体素子を半導体パッケ
ージの弯曲面に密着して接合させる工程とを含むもので
ある。A method of manufacturing a semiconductor device according to the present invention is
A step of applying an adhesive to the element disposition area of a semiconductor package having an element disposition area at the bottom, a curved surface being formed in the element disposition area, and a suction hole communicating with the outside at the bottom; The step of disposing a semiconductor element having a functional portion on the surface in the element disposition region of the package, and decompressing the gap between the semiconductor element and the curved surface of the semiconductor package through a suction hole, thereby making the semiconductor element a semiconductor package. And a step of closely adhering to the curved surface of the above and joining.
【0008】本発明の半導体装置では、固体撮像素子等
の半導体素子は半導体パッケージ部の素子配設領域に弯
曲面にそって密着して接合されているので、その表面の
機能部には圧縮応力が働き、格子原子間距離が短かくな
っている。これにより格子間のポテンシャルが大きくな
り、金属イオンの機能部への侵入が抑制される。In the semiconductor device of the present invention, since the semiconductor element such as the solid-state image pickup element is closely adhered to the element mounting region of the semiconductor package along the curved surface, a compressive stress is applied to the functional portion of the surface. Works, and the interatomic distance between lattice atoms is becoming shorter. This increases the potential between the lattices and suppresses the penetration of metal ions into the functional part.
【0009】本発明の半導体装置の製造方法では、半導
体パッケージの底部に形成された吸引孔を通じて、半導
体素子と半導体パッケージの弯曲面との間の間隙部が減
圧されることにより、半導体素子が半導体パッケージの
弯曲面に密着して接合される。これにより半導体素子の
表面の機能部に圧縮応力が働く。In the method of manufacturing a semiconductor device according to the present invention, the gap between the semiconductor element and the curved surface of the semiconductor package is decompressed through the suction hole formed at the bottom of the semiconductor package, so that the semiconductor element becomes a semiconductor. Bonded closely to the curved surface of the package. As a result, compressive stress acts on the functional portion on the surface of the semiconductor element.
【0010】[0010]
【発明の実施の形態】以下、本発明の実施の形態につい
て図面を参照して詳細に説明する。BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
【0011】図1は本発明の一実施の形態に係る固体撮
像装置の断面構成を表すものである。この固体撮像装置
は、半導体パッケージ11の底部に固体撮像素子13を
固着剤により固定し、この固体撮像素子13の配線部分
をボンディングワイヤ14を介して外部への配線と電気
的に接続したものである。固体撮像素子13は例えばC
MOSセンサであり、シリコン基板の表面にPN接合
(フォト・ダイオード)からなる受光部(光電変換部)
13aが形成されている。半導体パッケージ11は、例
えばセラミックにより形成されたパッケージ本体11A
の上部開口を例えばガラス板により形成された蓋体11
Bにより封止したものである。FIG. 1 shows a sectional structure of a solid-state image pickup device according to an embodiment of the present invention. In this solid-state imaging device, the solid-state imaging device 13 is fixed to the bottom of the semiconductor package 11 with a fixing agent, and the wiring portion of the solid-state imaging device 13 is electrically connected to an external wiring via a bonding wire 14. is there. The solid-state image sensor 13 is, for example, C
It is a MOS sensor and is a light receiving part (photoelectric conversion part) consisting of a PN junction (photo diode) on the surface of a silicon substrate.
13a is formed. The semiconductor package 11 is a package body 11A made of, for example, ceramic.
Lid 11 whose upper opening is formed of, for example, a glass plate
It is sealed with B.
【0012】以上の基本的な構成は従来構造と同様であ
るが、本実施の形態では、パッケージ本体11Aの底部
の素子配設領域Aの断面形状が弯曲面Rを有する構造と
なっている。弯曲面Rは、半径が一定の球形状の一部分
と均等な曲面で形成されている。固体撮像素子13は、
その裏面側がパッケージ11の弯曲面Rに密着して接合
されている。パッケージ本体11Aの底部には、また、
後述の減圧工程において用いられる吸引孔12が形成さ
れており、この吸引孔12は例えばエポキシ系樹脂から
なるシール材15により封止されている。Although the basic structure described above is the same as the conventional structure, in the present embodiment, the cross section of the element disposing region A at the bottom of the package body 11A has a curved surface R. The curved surface R is formed by a curved surface that is equal to a part of a spherical shape having a constant radius. The solid-state image sensor 13 is
The back side of the package 11 is closely attached to the curved surface R of the package 11 and is joined thereto. At the bottom of the package body 11A,
A suction hole 12 used in a decompression process described later is formed, and the suction hole 12 is sealed with a sealing material 15 made of, for example, an epoxy resin.
【0013】固体撮像素子13は、次のような工程を経
て半導体パッケージ11に組み込まれる。まず、図2
(A)に示したように、素子配設領域Aに弯曲面Rを有
する共に底部に吸引孔12が設けられたパッケージ本体
11Aを用意し、図2(B)に示したように、素子配設
領域A(弯曲面R)の全面に、例えばエポキシ系樹脂か
らなる熱硬化性の固着材16を塗布する。その後、表面
に受光部13aが形成された固体撮像素子13をその裏
面側が弯曲面Rに対向するようにして設置する。この段
階では必ずしも固体撮像素子13の裏面とパッケージ本
体11Aの弯曲面Rとが完全に接合されている必要はな
いが、位置ずれを起こさない程度に固定されていること
は必要である。このときに固体撮像素子13が均一な平
面を有するのに対し、パッケージ本体11Aの底部は弯
曲面Rであるので、固体撮像素子13と弯曲面Rとの間
には間隙部が存在する。The solid-state image pickup device 13 is incorporated into the semiconductor package 11 through the following steps. First, FIG.
As shown in (A), a package body 11A having a curved surface R in the element disposition region A and having a suction hole 12 at the bottom is prepared, and as shown in FIG. A thermosetting fixing material 16 made of, for example, an epoxy resin is applied to the entire surface of the installation area A (curved surface R). After that, the solid-state imaging device 13 having the light receiving portion 13a formed on the front surface is installed so that the back surface side faces the curved surface R. At this stage, the back surface of the solid-state image pickup device 13 and the curved surface R of the package body 11A do not necessarily have to be completely joined, but they need to be fixed to such an extent that no positional deviation occurs. At this time, the solid-state imaging device 13 has a uniform flat surface, whereas the bottom of the package body 11A has the curved surface R, and therefore, there is a gap between the solid-state imaging device 13 and the curved surface R.
【0014】次に、図2(C)に示したように、コンプ
レッサー装置(図示せず)により、パッケージ本体11
Aの底部に設けられた吸引孔12を通じて固体撮像素子
13と弯曲面Rとの間の間隙部を減圧し真空状態に近づ
ける。これにより固体撮像素子13の裏面全体が弯曲面
Rに密着される。その後、裏面から例えば温度130〜
140℃程度で加熱すると、固体撮像素子13の裏面が
弯曲面Rに完全に接合される。続いて、パッケージ本体
11Aの底部の吸引孔12を、例えばエポキシ系樹脂か
らなるシール材15で封止する。Next, as shown in FIG. 2C, the package body 11 is compressed by a compressor device (not shown).
The gap between the solid-state image sensor 13 and the curved surface R is decompressed through the suction hole 12 provided at the bottom of A to bring it into a vacuum state. As a result, the entire back surface of the solid-state image sensor 13 is brought into close contact with the curved surface R. Then, from the back side, for example, a temperature of 130-
When heated at about 140 ° C., the back surface of the solid-state image sensor 13 is completely bonded to the curved surface R. Then, the suction hole 12 at the bottom of the package body 11A is sealed with a sealing material 15 made of, for example, an epoxy resin.
【0015】その後は、従来の方法と同様に、固体撮像
素子13の配線部分をボンディングワイヤ14により外
部への配線部(図示せず)に電気的に接続させ、更に、
ガラス板からなる蓋体11Bををパッケージ本体11A
の開口部に接合させることにより、図1に示した固体撮
像装置が完成する。After that, similarly to the conventional method, the wiring portion of the solid-state image pickup device 13 is electrically connected to the wiring portion (not shown) to the outside by the bonding wire 14, and further,
The lid 11B made of a glass plate is attached to the package body 11A.
The solid-state imaging device shown in FIG. 1 is completed by joining the solid-state imaging device to the opening.
【0016】以上の工程により製造された固体撮像装置
では、吸引孔12による減圧工程において、固体撮像素
子13の裏面全体が弯曲面Rに密着されると、固体撮像
素子13の表面の受光部13aに均一に曲げ応力が加わ
り、その状態で固体撮像素子13が弯曲面Rに固定され
る。すなわち、固体撮像素子13の受光部13aには圧
縮応力が均等に加わっている状態であり、受光部13a
では、従来に比べてシリコン結晶の格子原子間の距離が
短くなり、これにより格子間のポテンシャルが大きくな
っている。このため、PN接合からなる受光部13aへ
の金属イオンの侵入が抑制され、画像が改善される。In the solid-state image pickup device manufactured by the above steps, when the entire back surface of the solid-state image pickup element 13 is brought into close contact with the curved surface R in the depressurizing step using the suction holes 12, the light receiving portion 13a on the front surface of the solid-state image pickup element 13 is formed. The bending stress is evenly applied to the solid-state imaging device 13 and the solid-state imaging device 13 is fixed to the curved surface R in this state. That is, the light receiving portion 13a of the solid-state imaging device 13 is in a state in which the compressive stress is evenly applied, and the light receiving portion 13a
Then, the distance between the lattice atoms of the silicon crystal is shorter than in the conventional case, and the potential between the lattices is increased accordingly. Therefore, the penetration of metal ions into the light receiving portion 13a formed of the PN junction is suppressed, and the image is improved.
【0017】以上実施の形態を挙げて本発明を説明した
が、本発明は上記実施の形態に限定されるものではな
く、種々変形可能である。例えば、素子としては、その
他、CCDなどの固体撮像素子に限らず、表面に素子の
主要機能を果たす部分(機能部)が形成された半導体素
子一般にも適用可能である。Although the present invention has been described with reference to the embodiments, the present invention is not limited to the above-mentioned embodiments, and various modifications can be made. For example, the element is not limited to a solid-state image sensor such as a CCD, but can be applied to a general semiconductor element having a surface on which a portion (functional portion) that performs the main function of the element is formed.
【0018】[0018]
【発明の効果】以上説明したように本発明の半導体装置
によれば、半導体素子が半導体パッケージ部の素子配設
領域の弯曲面にそって接合されるようにしたので、半導
体素子の表面の機能部には圧縮応力が働き、格子原子間
距離が短かくなる。これにより格子間のポテンシャルが
大きくなり、金属イオンの機能部への侵入が抑制され
る。よって、画像欠陥のない固体撮像装置等を実現する
ことができる。As described above, according to the semiconductor device of the present invention, since the semiconductor element is bonded along the curved surface of the element mounting region of the semiconductor package portion, the function of the surface of the semiconductor element is improved. A compressive stress acts on the part, and the inter-lattice atom distance becomes short. This increases the potential between the lattices and suppresses the penetration of metal ions into the functional part. Therefore, it is possible to realize a solid-state imaging device or the like having no image defect.
【0019】また、本発明の半導体装置の製造方法で
は、半導体パッケージの底部に形成された吸引孔を通じ
て、半導体素子と半導体パッケージの弯曲面との間の間
隙部を減圧させるようにしたので、半導体パッケージの
弯曲面に半導体素子が密着して接合された本発明の半導
体装置を容易に製造することができる。Further, in the method of manufacturing a semiconductor device of the present invention, the gap between the semiconductor element and the curved surface of the semiconductor package is decompressed through the suction hole formed in the bottom of the semiconductor package. It is possible to easily manufacture the semiconductor device of the present invention in which the semiconductor element is intimately bonded to the curved surface of the package.
【図1】本発明の一実施の形態に係る固体撮像装置の断
面図である。FIG. 1 is a cross-sectional view of a solid-state imaging device according to an embodiment of the present invention.
【図2】図1に示した固体撮像装置の工程毎の断面図で
ある。FIG. 2 is a sectional view of each step of the solid-state imaging device shown in FIG.
【図3】従来の固体撮像装置の断面図である。FIG. 3 is a sectional view of a conventional solid-state imaging device.
【符号の説明】
11…パッケージ、11A…パッケージ本体、11B…
蓋体、12…吸引孔、13…固体撮像素子、14…ボン
ディングワイヤ、15…シール材[Explanation of Codes] 11 ... Package, 11A ... Package body, 11B ...
Lid, 12 ... Suction hole, 13 ... Solid-state image sensor, 14 ... Bonding wire, 15 ... Sealing material
Claims (5)
設領域に弯曲面が形成された半導体パッケージと、 表面に機能部を有すると共に、裏面が前記半導体パッケ
ージ部の素子配設領域に密着して接合された半導体素子
とを備えたことを特徴とする半導体装置。1. A semiconductor package having an element disposition region on the bottom and a curved surface formed on the element disposition region; and a functional part on the front surface, and the back surface having the element disposition region of the semiconductor package part. A semiconductor device comprising: a semiconductor element that is in intimate contact with and bonded to the semiconductor device.
る固体撮像素子であることを特徴とする請求項1記載の
半導体装置。2. The semiconductor device according to claim 1, wherein the semiconductor element is a solid-state image pickup element having a light receiving portion on a surface thereof.
にフォト・ダイオードが形成された固体撮像素子である
ことを特徴とする請求項1記載の半導体装置。3. The semiconductor device according to claim 1, wherein the semiconductor element is a solid-state imaging element having a photodiode formed on the surface of a silicon substrate.
設領域に弯曲面が形成されると共に、底部に外部に連通
する吸引孔を有する半導体パッケージの前記素子配設領
域に接着剤を塗布する工程と、 前記半導体パッケージの素子配設領域に、表面に機能部
を有する半導体素子を配置する工程と、 前記半導体素子と前記半導体パッケージの弯曲面との間
の間隙部を前記吸引孔を通じて減圧させることにより、
前記半導体素子を前記半導体パッケージの弯曲面に密着
して接合させる工程とを含むことを特徴とする半導体装
置の製造方法。4. An adhesive is provided on the element disposition region of a semiconductor package, which has an element disposition region at the bottom, a curved surface is formed in the element disposition region, and a suction hole communicating with the outside at the bottom. And a step of disposing a semiconductor element having a functional portion on the surface in the element disposition region of the semiconductor package, and a gap between the semiconductor element and the curved surface of the semiconductor package is formed into the suction hole. By reducing the pressure through
And a step of closely bonding the semiconductor element to a curved surface of the semiconductor package.
ことを特徴とする請求項4記載の半導体装置の製造方
法。5. The method of manufacturing a semiconductor device according to claim 4, further comprising the step of sealing the suction hole.
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JP2002035822A JP2003243635A (en) | 2002-02-13 | 2002-02-13 | Semiconductor device and method for manufacturing the same |
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JP2002035822A JP2003243635A (en) | 2002-02-13 | 2002-02-13 | Semiconductor device and method for manufacturing the same |
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Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP2063629A1 (en) * | 2006-10-05 | 2009-05-27 | Panasonic Corporation | Imaging device, method for manufacturing the imaging device and cellular phone |
US7675016B2 (en) | 2006-08-21 | 2010-03-09 | Hitachi, Ltd. | Solid-state image pickup device and method of producing the same |
JP2012182243A (en) * | 2011-02-28 | 2012-09-20 | Sony Corp | Method for manufacturing solid state imaging device, solid state imaging device and electronic equipment using the same |
US8878116B2 (en) | 2011-02-28 | 2014-11-04 | Sony Corporation | Method of manufacturing solid-state imaging element, solid-state imaging element and electronic apparatus |
CN105489620A (en) * | 2014-10-03 | 2016-04-13 | 株式会社东芝 | Method for manufacturing solid-state imaging device and method for manufacturing camera module |
-
2002
- 2002-02-13 JP JP2002035822A patent/JP2003243635A/en active Pending
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7675016B2 (en) | 2006-08-21 | 2010-03-09 | Hitachi, Ltd. | Solid-state image pickup device and method of producing the same |
EP2063629A1 (en) * | 2006-10-05 | 2009-05-27 | Panasonic Corporation | Imaging device, method for manufacturing the imaging device and cellular phone |
EP2063629A4 (en) * | 2006-10-05 | 2012-02-22 | Panasonic Corp | Imaging device, method for manufacturing the imaging device and cellular phone |
JP2012182243A (en) * | 2011-02-28 | 2012-09-20 | Sony Corp | Method for manufacturing solid state imaging device, solid state imaging device and electronic equipment using the same |
US8878116B2 (en) | 2011-02-28 | 2014-11-04 | Sony Corporation | Method of manufacturing solid-state imaging element, solid-state imaging element and electronic apparatus |
CN105489620A (en) * | 2014-10-03 | 2016-04-13 | 株式会社东芝 | Method for manufacturing solid-state imaging device and method for manufacturing camera module |
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