JP2003229544A - Magnetic storage - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a magnetic storage that can achieve a sufficiently high S/N ratio, a fine cell area, and low electric power consumption. <P>SOLUTION: The magnetic storage has two tunnel magnetoresistance effect elements 1a and 1b that are laminated each other so that activation can be detected. The respective tunnel magnetic resistance effect elements 1a and 1b have sticking layers 11a and 11b where a magnetization direction is fixed, recording layers 13a and 13b where the magnetization direction is changed by injecting an electron that is subjected to spin polarization, and tunnel insulating layers 12a and 12b that are arranged between the sticking layers 11a and 11b and the recording layers 13a and 13b. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a magnetic storage device, and more particularly to a magnetic storage device that stores data by the tunnel magnetoresistive effect.

[0002]

2. Description of the Related Art The magnetoresistive (MR) effect is a phenomenon in which electric resistance changes when a magnetic field is applied to a magnetic body, and is used in magnetic field sensors, magnetic heads and the like. In recent years, artificial giant lattice films such as Fe / Cr and Co / Cu have been found in, for example, the following Documents 1 and 2 as giant magnetoresistance (GMR) effect materials exhibiting a very large magnetoresistance effect. There is.

Reference 1: DH Mosca et al., “Oscillator
y coupling coupling and giant magnetoresistance i
n Co / Cu multilayers ”, Journal of Magnetism and Ma
gnetic Materials 94 (1991) pp.L1-L5 Reference 2: SSPParkin et al., “Oscillatory Magnetic
Exchange Coupling through Thin Copper Layers ”, P
hysical Review Letters, vol.66, No.16, 22April 199
1, pp.2152-2155 In addition, the structure consisting of a ferromagnetic layer / nonmagnetic layer / ferromagnetic layer / antiferromagnetic layer having a nonmagnetic metal layer that is thick enough to eliminate the exchange coupling between ferromagnetic layers causes A so-called spin valve film is known, in which the layer / antiferromagnetic layer is exchange-coupled to fix the magnetic moment of the ferromagnetic layer and only the spin of the other ferromagnetic layer can be easily inverted by an external magnetic field. ing. As the antiferromagnetic material, FeMn, IrMn, P
tMn or the like is used. In this case, since the exchange coupling between the two ferromagnetic layers is weak and the spin can be reversed in a small magnetic field, a magnetoresistive element having a higher sensitivity than that of the above exchange coupling film can be provided, and thus it is used as a reproducing head for high-density magnetic recording. ing. The spin valve film is used by passing an electric current in the in-plane direction.

On the other hand, it is known, for example, from the following Document 3 that a larger magnetoresistive effect can be obtained by utilizing the perpendicular magnetoresistive effect of passing a current in a direction perpendicular to the film surface.

Reference 3: WPPratt et al., “Perpendicul
ar Giant Magnetoresistances of Ag / Co Multilayer
s ”, Physical Review Letters, vol.66, No.23, 10 Ju
ne 1991, pp.3060-3063 Furthermore, in a three-layer film consisting of a ferromagnetic layer / insulating layer / ferromagnetic layer, the spins of the two ferromagnetic layers are made parallel or antiparallel to each other by an external magnetic field. Utilizing the fact that the tunnel current in the direction perpendicular to the plane is different,
Tunnel Magnetoresistance (TMR: Ferromagnetic Tunnel Junction)
The tunneling magneto-resistive) effect is also known, for example, from Document 4 below.

Reference 4: T. Miyazaki et al., “Giant mag
netic tunneling effect in Fe / Al ₂ O ₃ / Fe junction ”,
Journal of Magnetism and Magnetic Materials 139 (1
995), pp.L231-L241 In recent years, GMR and TMR elements have been incorporated into nonvolatile magnetic memory semiconductor devices (MRAM: magnetic random access memory).
Utilization for y) has been studied, for example, in References 5 and 6 below.

Reference 5: S. Tehrani et al., “High densit
y submicron magnetoresistive random access memory
(invited) ”, Journal of Applied Physics, vol.85, N
o.8,15 April 1999, pp.5822-5827 Reference 6: SSP Parkin et al., “Exchange-biased magn
etic tunnel junctions and application to nonvolati
le magnetic random access memory (invited) ”, Jour
nal of Applied Physics, vol.85, No.8, 15 April 199
9, pp.5828-5833 In this case, a pseudo-spin valve element or a ferromagnetic tunnel effect element in which a non-magnetic metal layer is sandwiched between two ferromagnetic layers having different coercive forces has been studied. When used for MRAM, these elements should be arranged in a matrix, and a magnetic field should be applied by passing an electric current through a separate wiring to control the two magnetic layers forming each element in parallel or antiparallel. Due to
"1" and "0" are recorded. Readout is GMR or TMR
It is done using the effect.

In the MRAM, the T is against the GMR effect.
Since using the MR effect consumes less power, it has been mainly studied to use a TMR element. Since the MRAM using the TMR element has a large MR change rate of 20% or more at room temperature and a large resistance in the tunnel junction, a larger output voltage can be obtained, and spin reversal is not required at the time of reading. It is characterized by being readable with a small current, and is expected as a low power consumption non-volatile semiconductor memory device capable of high-speed writing / reading.

However, in the TMR element, the MR change rate greatly decreases with the bias voltage, and usually 300 to 400 m.
When a bias voltage of about V is applied, the TMR effect is halved. Since the MRAM is a current drive type, a method is used in which a constant read current is passed to obtain a signal voltage. Therefore, at least 10 sense currents are required for high-speed reading.
It is expected that it will need to be in the order of μA. In addition, from the size of the junction resistance of the tunnel magnetoresistive effect element,
It is unavoidable that a bias of about 0 mV is applied, and the reduction of the TMR effect due to the bias voltage has been a serious problem.

For the above problems, ferromagnetic layer / insulating layer /
The use of a ferromagnetic double tunnel junction element having a structure of ferromagnetic layer / insulating layer / ferromagnetic layer has been proposed, for example, in Document 7 below.

Reference 7: Y. Saito et al., “Correlation b
etween Barrier Width, Barrier Height, and DC Bias
Voltage Dependences on the Magnetoresistance Ratio
inIr-Mn Exchange Biased Single and Double Tunnel
Junctions ”, Jpn. J. Appl. Phys. Vol.39 (2000) pp.
L1035-L1038

[0012]

However, even if the multiple tunnel junction is used, the output voltage is still insufficient in the conventional MRAM architecture. This will be described below.

In the conventional MRAM architecture, FIG.
As shown in FIG. 3, the memory cells each including the element selection transistor 106 and the ferromagnetic tunnel junction element 101 are arranged in a matrix by being located near each intersection of the plurality of bit lines 102 and the plurality of word lines 103. ing.

Source of element selecting transistor 106 /
One of the drains is electrically connected to the bit line 102, and the other is electrically connected to the ferromagnetic tunnel junction element 101. The gate of the element selection transistor 106 is electrically connected to the word line 103. A digit line 109 for rewriting data is arranged so as to extend near the ferromagnetic tunnel junction element 101.

At the time of writing, a magnetic field is generated by passing a current through the digit line 109 and the like, and the two magnetic layers constituting the ferromagnetic tunnel junction element 101 are magnetized by the magnetic field so as to be parallel and antiparallel to each other. hand,
"0" and "1" are recorded.

At the time of reading, a predetermined word line 103
Is selectively driven, the element selecting transistor 106 connected to the word line 103 is turned on. Further, by passing a current through a predetermined bit line 102, a tunnel current is passed through the ferromagnetic tunnel junction element 101 connected to the element selecting transistor 106 in the ON state. The storage state is determined based on the resistance of the ferromagnetic tunnel junction element 101 at this time. In other words, the ferromagnetic tunnel junction element 101 has the property that the resistance is small when the magnetization directions are parallel, and the resistance is large when the magnetization directions are antiparallel. Therefore, the output signal of the selected memory cell is smaller than the output signal of the reference cell by utilizing this property. The storage state “0” or “1” of the selected memory cell is determined depending on whether the value is larger.

In the above architecture, the storage state is determined based on the output signal of the reference cell, as described above, depending on whether the output signal of the selected memory cell is smaller or larger than the output signal. That is, in the ferromagnetic tunnel junction element 101, the resistance when the magnetization directions are parallel is Rp
And the resistance in the antiparallel state is Rap, the difference between the resistance values of the selected memory cell and the reference cell is | Rap−Rp | /
Since it is about 2, the resistance change due to the TMR effect | Rap
It means that the memory state is determined by using half of −Rp |.

Further, in the above architecture, it is necessary to pass a current through the element selecting transistor 106 of the selected memory cell at the time of reading, and the element selecting transistor 10 is required.
If the characteristic of 6 is not constant, noise due to it will be given to the output voltage. Therefore, in the above architecture, the signal-to-noise ratio (S / N ratio) is 30 dB.
It was small and small.

A technique for improving this S / N ratio has been proposed by the following document 8, for example.

Reference 8: R. Scheuerlein et al., "A 10ns
Read and Write Non-Volatile Memory Array Using a
Magnetic Tunnel Junction and FET Switch in each Ce
ll ”, 2000 IEEE International Solid-State Circuits
Conference The architecture proposed in Document 8 has the configuration shown in FIG. Referring to FIG. 8, the two element selection transistors 206a and 206b and the two ferromagnetic tunnel junction elements 201a and 201b are 1 bit, and one of the two ferromagnetic tunnel junction elements 201a and 201b is always parallel. , The other is written so as to be anti-parallel, and the memory state is read by the operation detection method. That is, the storage state is determined by the difference between the output signal of one of the two ferromagnetic tunnel junction elements 201a and 201b and the output signal of the other.

In this system, since the data is read by the operation detection method, the resistance change | Rap-Rp accompanying the TMR effect
It means that the judgment of the memory state is made by using the whole |. Therefore, the magnitude of the output signal can be increased to more than twice that in the case of the architecture shown in FIG. 7, and the S / N ratio can be improved. However, since 2 bits form 1 bit, the cell size per 1 bit becomes large,
This is a problem in realizing a large capacity MRAM.

Further, the MRAM in which the above research has been advanced
In, the spin reversal at the time of writing is performed by an external magnetic field. Therefore, with the miniaturization of the TMR element, a large external magnetic field inversely proportional to the tunnel junction width is required to perform spin inversion at the time of writing. Therefore, even in the wiring for selecting a memory cell and applying an external magnetic field at the time of writing,
It is necessary to flow a large current corresponding to this. This is a problem from the viewpoint of electromigration resistance, power consumption, and selection of write memory cells.

As described above, in the MRAM architecture conventionally proposed, as described above, the sufficiently high S
It was not possible to realize the / N ratio, a fine cell area, and low power consumption.

Therefore, the purpose of the present invention is to obtain a sufficiently high S
An object of the present invention is to provide a magnetic memory device that can realize an / N ratio, a fine cell area, and low power consumption.

[0025]

A magnetic storage device of the present invention comprises a pinned layer whose magnetization direction is fixed, a recording layer whose magnetization direction changes by injection of spin-polarized electrons, a pinned layer and a recording layer. At least two of the tunnel magnetoresistive effect elements having a tunnel insulating layer disposed between the two are laminated so that the operation can be detected.

According to the magnetic memory device of the present invention, since the magnetization direction of the recording layer can be changed by injection of spin-polarized electrons, the demagnetizing field is smaller than that in the case where the magnetization direction is changed by an external magnetic field. Even if the element size becomes small, the magnetization direction can be changed with low power consumption. Further, since the operation can be detected only by the two stacked tunnel magnetoresistive elements, the memory cell does not need a transistor, and a fine cell area can be realized. Further, since the stored data can be read by detecting the operation, a sufficient S / N ratio can be obtained. Therefore, it is possible to obtain a magnetic storage device that can realize a sufficient S / N ratio, a fine cell area, and low power consumption.

In the above magnetic storage device, preferably
The fixed layer is made of a material having a higher spin polarizability than the recording layer.

This facilitates injection of spin-polarized electrons in the fixed layer into the recording layer.

In the above magnetic storage device, preferably,
A wiring layer and a transistor are further provided. The wiring layer is electrically connected to each of the recording layers of the at least two tunnel magnetoresistive effect elements stacked. The transistor is electrically connected to the wiring layer and is controlled so that a current for reversing the magnetization of the recording layer is caused to flow through the wiring layer by injection of spin-polarized electrons at the time of writing data.

This makes it possible to inject spin-polarized electrons into the recording layer when writing data, and change the magnetization direction of the recording layer.

In the above magnetic storage device, preferably
A first data line electrically connected to the tunnel magnetoresistive effect element arranged on one side of the wiring layer and a second data line electrically connected to the tunnel magnetoresistive effect element arranged on the other side of the wiring layer. And a data line.

Thus, by passing a current through the data line, spin-polarized electrons can be injected into the recording layer of the tunnel magnetoresistive element at the time of writing data, and its storage state can be read at the time of reading data. it can.

In the above magnetic storage device, preferably
The recording layer of one tunnel magnetoresistive effect element and the recording layer of another tunnel magnetoresistive effect element are antiferromagnetically coupled with each other with a nonmagnetic layer interposed therebetween.

Thus, by changing the magnetization direction of the recording layer of one tunnel magnetoresistive effect element by injection of spin-polarized electrons, the magnetization direction of the recording layer of another tunnel magnetoresistive effect element is antiferromagnetically coupled. Can automatically change it in the opposite direction.

In the above magnetic storage device, preferably
The recording layer is composed of a first non-magnetic layer and an antiferromagnetically coupled first layer.
It has a ferromagnetic layer and a second ferromagnetic layer.

Thus, by changing the magnetization direction of the first ferromagnetic layer by injecting spin-polarized electrons, the magnetization direction of the second ferromagnetic layer is automatically changed to the opposite direction by antiferromagnetic coupling. be able to.

[0037]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings.

(Embodiment 1) FIG. 1 is a circuit diagram of a magnetic memory device according to Embodiment 1 of the present invention. With reference to FIG. 1, in the present embodiment, the memory cell MC of the MRAM is
Has two tunnel magnetoresistive effect elements 1a and 1b connected in series with each other. A word line 3 is electrically connected between the two tunnel magnetoresistive effect elements 1a and 1b. Bit lines (data lines) 2a and 2b are electrically connected to the respective ends of the two tunnel magnetoresistive effect elements 1a and 1b connected in series. Such memory cells MC are arranged in a matrix by being located near each intersection of the plurality of word lines 3 and the plurality of bit lines 2a.

The word line 3 is electrically connected to either the source or the drain of the transistor 5. The bit line 2a is electrically connected to the amplifier 4 via the transistor 8a, and the bit line 2b is electrically connected to the amplifier 4 via the transistor 8b.

FIG. 2 is a perspective view schematically showing the structure of the magnetic memory device shown in FIG. Referring to FIG. 2, bit lines 2a and 2b extend in directions orthogonal to each other, and wiring 2
2 extends between the bit lines 2a and 2b in the same direction as the bit line 2b. Each of the two tunnel magnetoresistive effect elements 1a and 1b constituting the memory cell MC is laminated on each other. The tunnel magnetoresistive effect element 1a is arranged between the bit line 2a and the wiring 22, and the tunnel magnetoresistive effect element 1b is arranged between the wiring 22 and the bit line 2b.

FIG. 3 shows one of the magnetic storage devices shown in FIG.
It is a schematic sectional drawing which shows the structure of one memory cell. Referring to FIG. 3, the tunnel magnetoresistive effect element 1a includes a fixed layer 11a whose magnetization direction is fixed and a tunnel insulating layer 12a.
And a recording layer 13a whose magnetization direction is changed by injection of spin-polarized electrons are stacked in order from the bottom.

In the tunnel magnetoresistive element 1b, a recording layer 13b whose magnetization direction changes by injection of spin-polarized electrons, a tunnel insulating layer 12b, and a pinned layer 11b whose magnetization direction is fixed are laminated in order from the bottom. It has a configured configuration. The fixed layer 11a is made of a material having a higher spin polarizability than the recording layer 13a, and the fixed layer 11b is made of a material having a higher spin polarizability than the recording layer 13b.

Two tunnel magnetoresistive effect elements 1a, 1
Two tunnel magnetoresistive elements 1a, 1
Wirings 22 electrically connected to each of b are formed. The wiring 22 is formed of a nonmagnetic layer, and is thin enough to couple the two ferromagnetic layers (recording layers) 13a and 13b antiferromagnetically. As a result, the recording layers 13a and 13b are always magnetized in opposite directions. Further, either one of the recording layers 13a and 13b has a structure that is more easily magnetized than the other.

Since the wiring 22 is formed thin, the wiring 2
The wiring resistance of 2 may increase. Therefore, wiring 2
2 and the word line 3 are provided in different layers and the film thickness of the word line 3 is increased to reduce the wiring resistance. The wiring 22 and the word line 3 are electrically connected by the conductive layer 21.

Each of the pinned layers 11a and 11b has a fixed magnetization direction by, for example, a laminated structure of an antiferromagnetic layer and a ferromagnetic layer. That is, since the antiferromagnetic layer fixes the spin direction of the ferromagnetic layer, the magnetization direction of the ferromagnetic layer is kept constant. This antiferromagnetic layer is formed between the ferromagnetic layer and the bit line 2a. This ferromagnetic layer is made of, for example, a CoFe layer, and the antiferromagnetic layer is made of, for example, an IrMn layer. Tunnel insulating layer 12
Each of a and 12b is formed of, for example, an AlO _x layer, and each of bit lines 2a and 2b is formed of, for example, a Cu layer.

Next, the write operation of the magnetic memory device of this embodiment will be described. 4 and 5 are schematic cross-sectional views for explaining the data write operation of one memory cell of the magnetic memory device according to the first embodiment of the present invention. Referring to FIG. 4, at the time of writing data, for example, arrow 51 is provided from wiring 22 to each of bit lines 2a and 2b.
A tunnel current flows in the directions indicated by a and 51b. As a result, the arrow 52a is moved from the fixed layer 11a to the recording layer 13a.
Electrons spin-polarized in the direction flow in. Further, the fixing layer 11
Electrons spin-polarized in the direction of arrow 52b flow from b to the recording layer 13b. Due to the injection of the spin-polarized electrons, the magnetization direction of the recording layer (for example, the recording layer 13b) which is easily magnetized among the two recording layers 13a and 13b is indicated by the arrow 53.
It changes from b ₁ to the direction shown by the arrow 53b ₂ , and then the magnetization direction of the recording layer (for example, the recording layer 13a) which is hard to magnetize is opposite to the recording layer which is easily magnetized by antiferromagnetic coupling, that is, the arrow 53a ₁ To the direction indicated by the arrow 53a ₂ .

On the other hand, each of the pinned layers 11a and 11b is magnetized in advance in the directions of arrows 52a and 52b. Therefore, in the tunnel magnetoresistive effect element 1a, the magnetization directions of the pinned layer 11a and the recording layer 13a are antiparallel, whereas in the tunnel magnetoresistive effect element 1b, the pinned layer 11b and the recording layer 13b are respectively antiparallel. The magnetization directions are parallel. This state is a storage state of "0", for example.

When changing the storage state, referring to FIG. 5, a tunnel current is passed from bit line 2b to bit line 2a in the direction indicated by arrow 51c. As a result, spin-polarized electrons flow in the direction of arrow 53a ₂ from the recording layer 13a to the recording layer 13b. By the injection of the spin-polarized electrons, the magnetization direction of the recording layer 13b changes from the direction indicated by the arrow 53b ₂ to the direction indicated by the arrow 53b ₁ , and thereafter, the magnetization direction of the recording layer 13a becomes antiferromagnetically coupled to the recording layer 13b. Changes from the opposite side, that is, from the arrow 53a ₂ to the direction shown by the arrow 53a ₁ .

In this case, the magnetization directions of the pinned layer 11a and the recording layer 13a of the tunnel magnetoresistive effect element 1a are parallel to each other, and the magnetization directions of the pinned layer 11b and the recording layer 13b of the tunnel magnetoresistive effect element 1b are parallel to each other. Anti-parallel to each other. This state is, for example, a storage state of "1".

Here, the tunnel magnetoresistive element has a small resistance value when the magnetization directions of the recording layer and the pinned layer are parallel, and the magnetization directions of the pinned layer and the recording layer are antiparallel. In this case, it has a characteristic that the resistance value becomes large. Therefore, the resistance value of the tunnel magnetoresistive effect element 1a is larger than the resistance value of the tunnel magnetoresistive effect element 1b in the memory state of "0", and the resistance value of the tunnel magnetoresistive effect element 1a is in the memory state of "1". It becomes smaller than the resistance value of the tunnel magnetoresistive effect element 1b.

Next, the read operation of the magnetic memory device of this embodiment will be described. Referring to FIG. 1, at the time of reading, a predetermined transistor 5 is turned on, and the word line 3 connected to the transistor 5 in the on state is selected. As a result, the word line 3 is connected to each of the tunnel magnetoresistive effect elements 1a and 1b connected to the selected word line 3.
Tunnel current is sent from. Each tunnel current or each load voltage at that time is input to the amplifier 4 via the bit lines 2a and 2b and the transistors 8a and 8b. Then, the storage state is determined by the operation method depending on whether the tunnel current or the load voltage of one of the two tunnel magnetoresistive effect elements 1a and 1b is higher or lower than the tunnel current or the load voltage of the other.

When the storage state is specifically determined by the signal voltage, the resistance of the tunnel magnetoresistive effect elements 1a and 1b on the side in which the magnetization directions are parallel is Rp,
Assuming that the resistance on the antiparallel side is Rap and the tunnel current is Id, the signal voltage is ΔV (= (Rap−Rp) Id), −ΔV corresponding to the memory states “1” and “0”.
Becomes

In this embodiment, since the memory state is read by the operating method, the resistance change due to the TMR effect | Rap
The memory state is determined using the entire −Rp |. Therefore, the signal voltage is more than doubled as compared with the case of the architecture shown in FIG. Further, since the memory cell MC does not include the element selection transistor, it is not affected by noise due to the transistor. Therefore, the S / N ratio is 10 times or more larger than that of the architecture shown in FIG.

Further, in the memory cell MC of the present embodiment,
An element selecting transistor such as the architecture shown in FIG. 8 is unnecessary, a reference cell like the architecture shown in FIG. 7 is not necessary, and two tunnel magnetoresistive effect elements 1a and 1b are further formed by stacking. Therefore, the cell area can be made smaller than that of the architecture shown in FIGS.

Furthermore, since the magnetization direction of the recording layer can be changed by injecting spin-polarized electrons, the demagnetizing field is smaller than that in the case where the magnetization direction is changed by an external magnetic field, and is small even when the element size is small. The magnetization direction can be changed by power consumption.

As described above, in this embodiment, a sufficiently high S / N ratio, a fine cell area, and low power consumption can be realized.

(Second Embodiment) FIG. 6 is a sectional view schematically showing a structure of one memory cell MC of a magnetic memory device according to a second embodiment of the present invention. Referring to FIG. 6, the structure of the present embodiment is different from the structure of the first embodiment shown in FIGS. 1 to 3 in that each of recording layers 13a and 13b has a ferromagnetic layer, a non-magnetic layer and a strong layer. It is different in that it is formed of a multi-layer structure with a magnetic layer, and that the ferromagnetic layers of the recording layers 13a and 13b are antiferromagnetically coupled to each other.

The recording layer 13a has a laminated structure in which a ferromagnetic layer 13c, a nonmagnetic layer 13d and a ferromagnetic layer 13e are laminated in order from the bottom. These ferromagnetic layers 13c and 13e
And are antiferromagnetically coupled to each other, and are thus fixed in a state where they are magnetized in opposite directions.

The recording layer 13b has a laminated structure in which a ferromagnetic layer 13f, a non-magnetic layer 13g and a ferromagnetic layer 13h are laminated in order from the bottom. These ferromagnetic layers 13f and 13h
And are antiferromagnetically coupled to each other, and are thus fixed in a state where they are magnetized in opposite directions.

Further, the ferromagnetic layer 13e and the ferromagnetic layer 13
f is also antiferromagnetically coupled to each other with the nonmagnetic layer 13i interposed therebetween. The wiring 22 is formed so as to be electrically connected to both the ferromagnetic layer 13e and the ferromagnetic layer 13f.

Ferromagnetic layers 13c, 13e, 13f, 13h
One of the ferromagnetic layers 13c and 13h is set to be magnetized most easily, and the other is set to be harder to magnetize than the other.

Since the other structures are almost the same as those of the first embodiment described above, the same members are designated by the same reference numerals and the description thereof will be omitted.

The write operation of this embodiment is performed according to the same principle as that of the first embodiment. Referring to FIG. 6, first, a current is caused to flow from wiring 22 to each of bit lines 2a and 2b, so that spin-polarized electrons of pinned layers 11a and 11b are injected into ferromagnetic layers 13c and 13h. As a result, the magnetization direction of the ferromagnetic layer (for example, the ferromagnetic layer 13h) on the easily magnetized side of the ferromagnetic layers 13c and 13h changes from the solid arrow to the dotted arrow, and the other ferromagnetic layers are antiferromagnetically coupled. The magnetization direction of (for example, the ferromagnetic layers 13f, 13e, 13c) sequentially changes from the solid arrow to the dotted arrow. This state is a storage state of "0", for example.

When changing the storage state, the first embodiment
Similarly to, a tunnel current is passed from the bit line 2b to the bit line 2a. This causes spin-polarized electrons to flow from the ferromagnetic layer 13f into the ferromagnetic layer 13h. By the injection of electrons, the magnetization direction of the ferromagnetic layer 13h changes from the dotted arrow to the solid arrow, and the magnetization directions of the other ferromagnetic layers (for example, the ferromagnetic layers 13f, 13e, and 13c) change due to antiferromagnetic coupling. It changes sequentially from the dotted arrow to the solid arrow.
This state is, for example, a storage state of "1".

The read operation of this embodiment is also the same as that of the first embodiment.
The same is done as. First, referring to FIG. 6, at the time of reading, a predetermined transistor 5 is turned on, and the word line 3 connected to the transistor 5 in the on state is selected. As a result, the word line 3 is connected to each of the tunnel magnetoresistive effect elements 1a and 1b connected to the selected word line 3.
Tunnel current is sent from. Each tunnel current or each load voltage at that time is input to the amplifier 4 via the bit lines 2a and 2b and the transistors 8a and 8b. Then, the storage state is determined by the operation method depending on whether the tunnel current or the load voltage of one of the two tunnel magnetoresistive effect elements 1a and 1b is higher or lower than the tunnel current or the load voltage of the other.

In this embodiment, since the memory state is read by the operating method, the memory state is determined by using the entire resistance change caused by the TMR effect, as in the first embodiment. Therefore, the signal voltage is more than doubled as compared with the case of the architecture shown in FIG. Further, since the memory cell MC does not include the element selection transistor, it is not affected by noise due to the transistor. Therefore, the S / N ratio is 10 times or more larger than that of the architecture shown in FIG.

Further, in the memory cell MC of the present embodiment,
An element selecting transistor such as the architecture shown in FIG. 8 is unnecessary, a reference cell like the architecture shown in FIG. 7 is not necessary, and two tunnel magnetoresistive effect elements 1a and 1b are further formed by stacking. Therefore, the cell area can be made smaller than that of the architecture shown in FIGS.

Furthermore, since the magnetization direction of the recording layer can be changed by injecting spin-polarized electrons, the demagnetizing field is smaller than that in the case where the magnetization direction is changed by an external magnetic field. The magnetization direction can be changed by power consumption.

As described above, in this embodiment, a sufficiently high S / N ratio, a fine cell area, and low power consumption can be realized.

In Embodiments 1 and 2 described above, it is desirable to use a material having a large tunnel magnetoresistive effect in order to increase the read sensitivity, and therefore each magnetic film is made of Co, Fe, Co--Fe alloy, Co--. Ni alloy, Co-Fe-Ni alloy, a magnetic material such as Fe-Ni alloy, and NiMnSb, such as a half metal such as Co ₂ MnGe can be used. Since the half metal has an energy gap in one spin band, a larger magnetoresistive effect can be obtained by using this and a large signal output can be obtained.

As antiferromagnetic materials, FeMn, IrMn,
What is obtained by a normal spin valve GMR, such as PtMn, can be used. As the insulating film, Al
₂ O ₃ , Ta ₂ O ₅ , SiO ₂ , MgO or the like can be used. The preferred range of these film thicknesses is 0.5 to 3 nm
Is.

Such a thin film for a magnetic element is formed by a molecular beam epitaxy (MBE) method, various sputtering methods, and chemical vapor deposition (CVD).
ition) method, a vapor deposition method, and the like, which can be used for the production.

The manufacturing process can be simplified by electrically connecting a transistor utilizing the Coulomb blockade effect to each of the recording layers 13a and 13b. In the above, MR
Although the semiconductor device of AM has been described, the present invention is not limited to the semiconductor device and can be widely applied to magnetic storage devices.

In the above MRAM, the memory cell MC including the two tunnel magnetoresistive effect elements 1a and 1b has been described, but the memory cell MC includes two or more tunnel magnetoresistive effect elements. Well,
The memory cells MC may be stacked on each other.

The embodiments disclosed this time are to be considered as illustrative in all points and not restrictive. The scope of the present invention is shown not by the above description but by the claims, and is intended to include meanings equivalent to the claims and all modifications within the scope.

[0076]

As described above, according to the magnetic memory device of the present invention, the magnetization direction of the recording layer can be changed by the injection of spin-polarized electrons. Therefore, when the magnetization direction is changed by an external magnetic field. Demagnetizing field is smaller than
Even if the element size becomes small, the magnetization direction can be changed with low power consumption. Further, since the operation can be detected only by the two tunnel magnetoresistive effect elements stacked,
A transistor is not required in the memory cell, and a fine cell area can be realized. Further, since the stored data can be read by detecting the operation, a sufficient S / N ratio can be obtained. Therefore, it is possible to realize a magnetic memory device that satisfies both a sufficient S / N ratio and a fine cell area.

In the above magnetic storage device, preferably,
The fixed layer is made of a material having a higher spin polarizability than the recording layer. This facilitates injection of spin-polarized electrons in the fixed layer into the recording layer.

In the above magnetic storage device, preferably
A wiring layer and a transistor are further provided. The wiring layer is electrically connected to each of the recording layers of the at least two tunnel magnetoresistive effect elements stacked. The transistor is electrically connected to the wiring layer and is controlled so that a current for reversing the magnetization of the recording layer is caused to flow through the wiring layer by injection of spin-polarized electrons at the time of writing data. As a result, spin-polarized electrons can be injected into the recording layer during data writing, and the magnetization direction of the recording layer can be changed.

In the above magnetic storage device, preferably
A first data line electrically connected to the tunnel magnetoresistive effect element arranged on one side of the wiring layer and a second data line electrically connected to the tunnel magnetoresistive effect element arranged on the other side of the wiring layer. And a data line. Thus, by passing a current through the data line, spin-polarized electrons can be injected into the recording layer of the tunnel magnetoresistive element at the time of writing data, and its storage state can be read at the time of reading data.

In the above magnetic storage device, preferably,
The recording layer of one tunnel magnetoresistive effect element and the recording layer of another tunnel magnetoresistive effect element are antiferromagnetically coupled with each other with a nonmagnetic layer interposed therebetween. As a result, by changing the magnetization direction of the recording layer of one tunnel magnetoresistive effect element by injection of spin-polarized electrons, the magnetization direction of the recording layer of another tunnel magnetoresistive effect element is automatically changed by antiferromagnetic coupling. It can be changed in the opposite direction.

In the above magnetic storage device, preferably
The recording layer is composed of a first non-magnetic layer and an antiferromagnetically coupled first layer.
It has a ferromagnetic layer and a second ferromagnetic layer. This makes the first
By changing the magnetization direction of the ferromagnetic layer by injecting spin-polarized electrons, the magnetization direction of the second ferromagnetic layer can be automatically changed to the opposite direction by antiferromagnetic coupling.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a magnetic memory device according to a first embodiment of the present invention.

FIG. 2 is a perspective view schematically showing the configuration of the magnetic storage device of FIG.

3 is a cross-sectional view schematically showing a configuration of one memory cell of the magnetic memory device shown in FIG.

FIG. 4 is a first diagram for explaining how data is written in one memory cell.

FIG. 5 is a second diagram for explaining how data is written in one memory cell.

FIG. 6 is a sectional view schematically showing a configuration of one memory cell of the magnetic memory device according to the second embodiment of the present invention.

FIG. 7 is a circuit diagram of a conventional magnetic memory device.

FIG. 8 is a circuit diagram of a conventional magnetic memory device that performs differential detection.

[Explanation of symbols]

1a, 1b Tunnel magnetoresistive effect element, 2a, 2b
Bit line, 3 word line, 4 amplifier, 5 transistor, 8a, 8b transistor, 11a, 11b fixed layer, 12a, 12b tunnel insulating layer, 13a, 13b
Recording layer, 13c, 13e, 13f, 13h Ferromagnetic layer, 13d, 13g, 13i Non-magnetic layer, 21 Conductive layer, 22 Wiring.

   ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor Takeharu Kuroiwa             2-3 2-3 Marunouchi, Chiyoda-ku, Tokyo             Inside Ryo Electric Co., Ltd. (72) Inventor Yutaka Takada             2-3 2-3 Marunouchi, Chiyoda-ku, Tokyo             Inside Ryo Electric Co., Ltd. (72) Inventor Koichiro Inomata             12-1-7 Kuryu, Aoba-ku, Sendai City, Miyagi Prefecture F term (reference) 5F083 FZ10 GA05 GA12 LA12

Claims (6)

[Claims] 1. A pinned layer whose magnetization direction is fixed, a recording layer whose magnetization direction changes by injection of spin-polarized electrons, and a tunnel insulating layer which is arranged between the pinned layer and the recording layer. A magnetic memory device, wherein at least two of the tunnel magnetoresistive effect elements having: are laminated so that an operation can be detected. 2. The fixed layer is made of a material having a higher spin polarizability than the recording layer.
The magnetic storage device according to 1. 3. A wiring layer electrically connected to the recording layer of each of the stacked at least two tunnel magnetoresistive elements, and a spin layer electrically connected to the wiring layer and writing data. 3. The magnetic storage device according to claim 1, further comprising a transistor controlled to flow a current for reversing the magnetization of the recording layer by injecting polarized electrons into the wiring layer. . 4. A first data line electrically connected to the tunnel magnetoresistive effect element arranged on one side of the wiring layer, and the tunnel magnetoresistive effect element arranged on the other side of the wiring layer. 4. The magnetic storage device according to claim 3, further comprising a second data line electrically connected to the magnetic recording medium. 5. The one recording layer of the tunnel magnetoresistive effect element and the other recording layer of the tunnel magnetoresistive effect element are antiferromagnetically coupled with a nonmagnetic layer interposed therebetween. The magnetic storage device according to claim 1, wherein the magnetic storage device is a magnetic storage device. 6. The recording layer according to claim 1, wherein the recording layer has a first ferromagnetic layer and a second ferromagnetic layer antiferromagnetically coupled with each other with a non-magnetic layer interposed therebetween. The magnetic storage device according to claim 1.