JP2002299574A - Magnetic storage element, magnetic storage device and portable terminal - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve power consumption, crosstalk and EM at the time of writing, in a magnetic storage element or a magnetic storage device. SOLUTION: Two write lines 2 and 3 are arranged in parallel in the vicinity of a TMR cell 1 and the easy axis of magnetization of the TMR cell 1 is inclined 45 deg. against the write lines. Two write lines 2 and 3 are provided with a magnetic shield 4 for interrupting the influence of external magnetic field at least in the vicinity of the TMR cell 1.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a magnetic storage element, a magnetic storage device, and a portable terminal device using the same.

[0002]

2. Description of the Related Art In recent years, in a sandwich film in which one layer of dielectric is inserted between two magnetic metal layers, a tunnel current is caused to flow in a direction perpendicular to the film surface, and the resistance change is read using the tunnel current. A possible magnetoresistive element, a so-called ferromagnetic tunnel junction element (TMR element) has been found.

[0003] The ferromagnetic tunnel junction can obtain a magnetoresistance ratio of 20% or more (J. Appl.
Phys. 79, 4724 (1996)), and the possibility of application to magnetic heads and magnetoresistive storage devices (see US Pat. Nos. 5,640,343 and 5,734,605) has increased. This ferromagnetic tunnel junction is formed by forming a thin Al layer having a thickness of 0.4 nm to 2.0 nm on a ferromagnetic electrode and then exposing the surface to pure oxygen or an oxygen glow discharge or oxygen radicals. _x
Is formed.

Further, a ferromagnetic single tunnel junction having a structure in which an antiferromagnetic layer is provided on one of the ferromagnetic layers of the above ferromagnetic single tunnel junction and one of the ferromagnetic layers is a fixed magnetization layer has been proposed. (See Japanese Patent Application Laid-Open No. 10-4227). However, even with this ferromagnetic tunnel junction device (ferromagnetic single tunnel junction), when the voltage value applied to the ferromagnetic tunnel junction device is increased to obtain a desired output voltage value, the magnetoresistance ratio (MR ratio) is considerably reduced. The problem of doing so also exists.

Also, a ferromagnetic tunnel junction or a ferromagnetic double tunnel junction via magnetic particles dispersed in a dielectric has been proposed (Japanese Patent Application No. 9-260743, Phys.
Rev.B 56 (10), R5747 (1997), Journal of the Japan Society of Applied Magnetics 23,4-2, (1
999), Appl. Phys. Lett. 73 (19), 2829 (1998)).
Also in these, since a magnetoresistance change rate of 20% or more can be obtained, the possibility of application to a magnetic head or a magnetoresistance storage device has emerged.

[0006] These ferromagnetic double tunnel junctions are characterized in that a large output is obtained because the MR ratio is less reduced with a bias voltage than a ferromagnetic single tunnel junction.

The magnetic storage element using these ferromagnetic single and double tunnel junctions is nonvolatile, has a fast write / read time of 10 nsec or less, and has a rewrite frequency of 10 ^15.
More than once, the cell size has the potential to be as small as DRAM.

In particular, as described above, in a magnetic memory element using a ferromagnetic double tunnel junction, even if the voltage value applied to the ferromagnetic tunnel junction element is increased in order to obtain a desired output voltage value, the rate of change in magnetoresistance is increased. Is suppressed, a large output voltage can be obtained, and the magnetic storage element exhibits preferable characteristics.

However, since the magnetic storage element using the ferromagnetic single and double tunnel junctions uses a ferromagnetic material, if the capacity is increased and the cell width of the ferromagnetic tunnel junction is reduced, FeRAM, flash memory There is a problem that power consumption at the time of writing is larger than that of competing memories such as.

When the switching magnetic field increases, not only does the power consumption at the time of writing increase, but also when the density of the magnetic random access memory (MRAM) is increased and the design rule is reduced, a word line and a bit line are required to invert the spin. The density of the current flowing through the electrodes increases, and a problem of electro-migration (EM) occurs.

[0011] TM when the design rule is 0.1 μm
From the results of the electromagnetic field simulation of the current magnetic field distribution and the strength in the R cell plane direction, the current density flowing through the wiring was 5 × 10 ⁶
It can be seen that even when A / cm ² is assumed, the intensity of the current magnetic field is at most on the order of 10 Oe.

Further, when the capacity of the MRAM becomes about 1 Gbit and the space between adjacent cells becomes about 0.1 μm, the magnetic field applied to the adjacent cells reaches about 80% of the magnetic field applied to the cells on the wiring. Inter-cell interference, so-called crosstalk, also occurs.

In order to solve these crosstalk problems, it has been proposed to make the easy axis directions between adjacent cells different from each other (see US Pat. No. 6,005,800). In order to use this method, it is necessary to form the cell shape accurately and without variation. However, when the capacity of the MRAM is increased and the cell size is reduced, there is a problem that it is difficult to control the processing accuracy, the switching magnetic field of the cell varies, and it becomes difficult to eliminate crosstalk.

The magnitude of the switching magnetic field is TM
R depends on the cell size, cell shape, magnetization characteristics of the material, film thickness, and the like. For example, as described above, when the cell size of the TMR is reduced, the reversal magnetic field of the spin increases due to the influence of the demagnetizing field.

Regarding the cell shape, in the case of a rectangular cell shape, magnetic domains are generated at the ends, the squareness ratio of hysteresis is deteriorated, and a step-like jump is generated. In addition, the switching magnetic field varies depending on how the magnetic domains are formed.
When the cell shape is made elliptical, a single domain structure is obtained and the MR ratio does not decrease, but the switching magnetic field greatly increases with the cell size.

In order to solve these problems, a magnetic memory cell is provided at a portion where a bit line and a word line which are substantially perpendicular to each other intersect, and the shape of the cell is asymmetric with respect to the axis of easy magnetization. A structure in which the axis is slightly inclined from the wiring direction has been proposed (see US Pat. No. 6,104,633).

However, the shape control is performed by the MRAM as described above.
When the cell size is increased and the cell size is reduced, the processing accuracy cannot be controlled, and the switching magnetic field of the cell varies.

Although the switching magnetic field is reduced in the structure in which the easy axis of the cell is slightly inclined from the wiring direction, the problem of crosstalk becomes serious when the capacity is increased.

In order to solve these problems (crosstalk and increase in switching magnetic field due to decrease in cell width), it is considered that it is necessary to provide a magnetic shield to the wiring. When a magnetic shield is added to wiring (USP 5,65
9,499, US Pat. No. 5,940,319, and WO 200010172), because not only the value of the current magnetic field increases, but also the problem of the crosstalk can be solved.

Assuming that the cross-sectional aspect ratio of the bit line and the word line is 1: 2, and the distance between the bit line and the word line and the recording layer is 10 nm and 50 nm, respectively. Assuming 5 × 10 ⁶ A / cm ² , the current magnetic field generated in the TMR cell is 87 Oe. However, Co with a large MR ratio
Even if Co ₉₀ Fe ₁₀ , which is the softest among Fe, is used and the cell width is 0.1 μm or less, the switching magnetic field is about
200 Oersted (Oe), 1 Gbit MRAM
To realize this, a new cell structure and memory structure are required.

When a ferromagnetic tunnel junction is used as a magnetic head material for an HDD, a structure in which a hard bias layer is provided adjacent to the ferromagnetic tunnel junction in order to reduce Barkhausen noise (USP 5,729,410, USP 5,966,012).
See). However, it is not preferable to use a hard bias layer to reduce the switching magnetic field.

[0022]

SUMMARY OF THE INVENTION As described above, the MR
When the capacity of the AM is increased, there is a problem that power consumption at the time of writing is large, a problem of crosstalk, and a problem of electromigration (EM) as compared with competing memories such as FeRAM and flash memory.

The present invention has been made to solve these problems, and has a magnetic memory having a memory structure and a wiring structure which reduce power consumption at the time of writing, have no crosstalk, and do not cause the problem of EM. It is an object to provide an element, a magnetic storage device, and a portable terminal device using the same.

[0024]

In order to solve the above-mentioned problems, a first magnetic storage element of the present invention is provided with a first write line and at least one of the first write line and the first write line. A ferromagnetic tunnel junction film having a tunnel barrier layer, at least two ferromagnetic layers, and at least one antiferromagnetic layer, wherein an easy axis of magnetization has an angle of about 45 ° with the first write line; A second write line connected to the upper surface of the ferromagnetic tunnel junction film and parallel to the first write line at least near the ferromagnetic tunnel junction film is provided.

According to a second magnetic memory element of the present invention, there is provided a ferromagnetic tunnel having at least one tunnel barrier layer, at least two ferromagnetic layers including a magnetic recording layer, and at least one antiferromagnetic layer. It is characterized by comprising a bonding film, and a soft magnetic bias layer that is softer than the magnetic recording layer and is provided at both ends of the ferromagnetic tunnel junction film in the easy axis direction.

[0026]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Prior to the description of the embodiments, the gist of the present invention will be described. A first magnetic storage element according to the present invention includes a recording cell having at least one tunnel barrier layer, a ferromagnetic tunnel junction having at least two ferromagnetic layers and at least one antiferromagnetic layer, and a recording cell parallel to the recording cell. And the long axis (easy axis of magnetization) of the two write wirings and the recording cell are approximately 45 degrees.
°. further,
The above two write wirings are surrounded by a magnetic shield material.

In the magnetic storage element of the present invention, as shown in FIG. 1, the upper and lower wirings (bit line 2 and write word line 3) of the ferromagnetic tunnel junction (TMR) cell 1 are at least positioned above and below the TMR cell 1. And the TMR cell 1 is arranged such that the easy axis of magnetization of the TMR cell 1 is oriented at approximately 45 ° with respect to the wiring direction. Also,
A shield material 4 is provided above and below the TMR cell 1 of the wiring over a wiring length of 1.2 times or more the longitudinal direction of the TMR cell.
Is given. Reference numeral 5 denotes a read word line orthogonal to the bit line 2 or a wiring connected to a conduction control element such as a transistor or a diode. Reference numeral 6 denotes an insulating layer that insulates the wiring 5 from the write word line. The TMR element 1 is sandwiched and connected between the bit line 2 and the wiring 5.

On the other hand, the conventional magnetic storage element is shown in FIG.
As shown in FIG.
3 are orthogonal to each other, and the TMR cell 1 is connected to the bit line 102 and the wiring 105 so that the axis of easy magnetization is oriented in the bit line direction.
And are connected between them. Reference number 10
5 is a wiring connected to a read word line or a conduction control element such as a transistor or a diode, and 106 is a wiring 1
An insulating layer that insulates the write word line 103 from the write word line 05.

In the case of using the structure of the present invention, when pulse currents in opposite directions are supplied to the upper and lower parallel wirings, the switching magnetic field curve is deformed as shown in FIG. Writing can be performed with a small magnetic field.

More specifically, in the conventional cross-point architecture as shown in FIG. 16, the asteroid curve becomes a curve as shown in FIG. 2B. When a magnetic field outside this curve is applied, a spin reversal occurs. As is clear from FIG. 2, when the combined magnetic field of the magnetic field generated by the upper wiring and the magnetic field generated by the lower wiring is in the 45 ° direction, the spin reversal occurs with the smallest magnetic force. Therefore, as in the present invention, when the bit line 1 and the write word line 3 are made parallel and the easy axis of the TMR element 1 is inclined by 45 °,
As shown by A in FIG. 2, the switching magnetic field curve can be reduced.

In the case of the structure of the present invention, even if the wiring rule is reduced to 0.1 μm and the space between adjacent cells is narrowed, the shielding material 4 is provided on the wirings 2 and 3 and the switching magnetic field curve shows a crossover. There is no need to worry about cross talk because it has a more advantageous shape for talk.

In the case of this structure, the length of the shielding material 4 applied to the wirings 2 and 3 is preferably at least 1.2 times the length of the TMR cell 1 in the longitudinal direction. If the length is longer than this, the shield material 4 can also have the effect of enhancing the current magnetic field, and thus the switching magnetic field curve can be reduced in the direction in which the switching magnetic field becomes smaller.

A specific embodiment for realizing the above structure will be described below.

(First Embodiment) FIG. 3 shows a first embodiment of the present invention.
FIG. 10 is a schematic connection diagram illustrating a configuration of a memory cell array (magnetic storage device) using a magnetic storage element according to the embodiment of the present invention. The memory cell has a simple matrix architecture without switching elements such as diodes and transistors. is there.

A plurality of bit lines BL (second write line)
And a plurality of read word lines WL intersect substantially vertically, and at each intersection, a TMR cell 1 is connected between the bit line BL and the read word line WL. A write word line WL '(first write line) is provided in parallel with each bit line, and the write word line WL' and the bit line BL
It intersects the easy axis direction of the MR cell at an angle of about 45 degrees. These bit lines BL and write word lines WL
′ Is provided with a magnetic shield as shown in FIG. Outside the memory cell array, a column decoder 11 for selecting a read word line WL and a row decoder 12 for selecting a bit line BL and a write word line WL 'are provided.

Although only three bit lines BL, read word lines WL, and write word lines WL 'are shown in FIG. 3, any desired plural lines can be provided. The same applies to a connection diagram in an embodiment described later.

With the above-described structure, writing can be performed with a smaller magnetic field than conventional ones, so that power consumption during writing is reduced, electromigration is suppressed, and a memory and a wiring structure without crosstalk are provided. be able to.

When using this architecture,
TM from the resistance of the bit line BL and the write word line WL '
Since the resistance of the R cell must be large, the memory 1
The number of TMR cells per block is preferably less than 10 Kbit, more preferably less than 3 Kbit.

(Second Embodiment) FIG. 4 shows a second embodiment of the present invention.
FIG. 11 is a schematic connection diagram showing a configuration of a memory cell array (magnetic storage device) using the magnetic storage elements according to the embodiment. In the second embodiment, the bit line BL and the read word line WL intersecting the bit line BL are provided in the matrix of the memory cell including the TMR cell 1 and the diode 7 connected in series to the TMR cell 1 as in the first embodiment. , Bit line B
This is an architecture in which write word lines WL 'parallel to L are arranged.

Also in the second embodiment, the bit line BL and the write word line WL 'make an angle of approximately 45 degrees with the direction of the easy axis of magnetization of the TMR cell 1, and the bit line B
L, a write word line WL 'is provided with a magnetic shield (not shown).

As a result, the same effect as that of the first embodiment can be obtained, and an active matrix type memory cell array can be realized by adding the diode 7 in series with the TMR element 1.

(Third Embodiment) FIG. 5 shows a third embodiment of the present invention.
FIG. 13 is a schematic connection diagram showing a configuration of a memory cell array (magnetic storage device) using the magnetic storage elements according to the embodiment. In the third embodiment, the TMR cell 1 and the MOSFET
As in the first embodiment, a memory cell matrix composed of eight memory cells includes a bit line BL, a read word line WL crossing the bit line BL, and a write word line WL ′ parallel to the bit line BL.

Also in this architecture, the bit line BL and the write word line WL 'make an angle of approximately 45 degrees with the direction of the easy axis of magnetization of the TMR cell 1;
The write word line WL ′ is provided with a magnetic shield (not shown).

As a result, the same effects as those of the first embodiment can be obtained, and the addition of the MOSFET 8 to the TMR element 1 can realize an active matrix type memory cell array.

Next, as a specific example, MOSFET and TM
An example in which a 3 × 3 cell matrix test element (TEG1) is manufactured using the memory cell of the present embodiment of the R cell. For comparison, the normal MOS shown in FIG.
A test element (TEG2) having a 3 × 3 cell matrix structure was fabricated using the FET and TMR cell architecture, and the switching magnetic field characteristics were compared. Wiring is Al-C
The u-wiring was used, the wiring rule was 0.175 μm, the aspect ratio of the wiring cross section was 1: 2, and the vertically long wiring was used.

Both TMR cells have an elliptical shape, and the TEG 1 using the structure of the present invention (FIG. 1) has the easy axis of magnetization of the TMR cell in the direction of 45 ° with respect to the wiring (bit line, write word line). It is inclined. N as shielding material
Fabricated by a CVD method using i-Fe. Before forming each wiring, a CMP process is performed, and the TMR cell and the bit line BL,
The distance between the write word lines WL 'was designed to be the same for both test elements.

Both TMR cells have a ferromagnetic double tunnel junction (Ta / Ir-Mn / (CoFe / Ru / CoF
_{e) / AlO x / Ni-} Fe / AlO x / (CoFe /
Ru / CoFe) / Ir-Mn / Ta).

The TMR cell was formed by using an ultra-high vacuum sputtering apparatus, and AlO _x was formed by forming Al and then performing plasma oxidation. FIG. 6 shows a switching magnetic field curve C using the architecture of the present embodiment.
17 and a switching magnetic field curve D when the normal architecture of FIG. 16 is used. As shown in FIG. 6, it was confirmed that the switching magnetic field curve of the present embodiment was significantly reduced, the power consumption at the time of writing was reduced, and a memory structure free from crosstalk and free from the problem of electromigration could be provided. .

(Fourth Embodiment) FIG. 7 shows a fourth embodiment of the present invention.
FIG. 13 is a schematic connection diagram showing a configuration of a memory cell array (magnetic storage device) using the magnetic storage elements according to the embodiment. In the fourth embodiment, the TMR cell 1 and the MOSFET
8, a bit line BL and a read word line WL which are substantially orthogonal to each other are arranged, and a write word line WL 'is arranged in parallel with the read word line WL, and is above or below the TMR cell 1. Only at positions passing through the bit line BL and the write word line WL '.
Is a parallelized architecture.

FIG. 8 is a schematic plan view showing the wiring state of the portion VIII in FIG. 7, and in this case, the word line WL
′ Is a lower wiring, a bit line BL is an upper wiring, and TMR
The element 1 is connected to the lower surface of the bit line BL, and the axis of easy magnetization is arranged at an angle of about 45 ° with respect to the bit line BL and the portion of the word line WL ′ insulated therebelow. .

FIG. 9 is a schematic cross-sectional view of one memory cell portion of FIG. 7, and the upper half shows the positional relationship between the upper wiring (BL) and the lower wiring (WL ') shown in FIG. Is shown. That is, the lower wiring (WL ′) is arranged perpendicular to the upper wiring (BL) in the right part of FIG. 9, but is parallel to the upper wiring (BL) in the center part of FIG. To TM
R1 and diode 9 are sandwiched. However,
The diode 9 is unnecessary when the resistance of the TMR element 1 is about 5 times or more larger than the on-resistance of the MOSFET 8. Although not clear in the cross-sectional view, the TMR 1 is arranged such that the axis of easy magnetization is inclined by approximately 45 ° with respect to the upper wiring and the lower wiring.

With the above configuration, the same effects as those of the third embodiment can be obtained, and the read word line WL
And the write word line WL 'may be wired in the same direction, so that the arrangement of the word line drive circuit (decoder) can be simplified.

In the first to fourth embodiments, a column decoder 11 and a row decoder 12 for selecting a bit line BL, a read word line WL, and a write word line WL 'are arranged around the memory cell array. , "1" or "0" is determined depending on whether the signal voltage from the TMR cell is higher or lower than a reference cell (not shown) arranged for each memory block.

The voltage value of the reference cell is the same as the voltage value of the TMR cell in which the adjacent spin arrangement having a high signal voltage is in an anti-equilibrium state.
It is preferable to use a reference cell in which the spin arrangement between adjacent signals having a small signal voltage has a voltage value that is approximately halfway between the voltage values in an equilibrium state.

Next, the outline of the second magnetic storage element of the present invention will be described. A second aspect of the present invention is that at least one
A soft magnetic bias layer is provided in a storage cell having a ferromagnetic tunnel junction having one tunnel barrier layer, at least two ferromagnetic layers and at least one antiferromagnetic layer, in the direction of the easy axis of magnetization of the storage cell. The magnetic storage element described above.

FIG. 10 shows a drawing of a TMR cell viewed from above. In the present invention, the soft magnetic bias layer 10 is provided adjacent to the storage layer of the TMR cell 1. When there is no magnetic field (H = 0), the edge layer has an edge domain in the bias layer 10, but the spin is reversed when the bias magnetic field is applied. As described above, since the soft bias layer is first inverted according to the current magnetic field, the switching magnetic field of the TMR cell 1 is reduced by the bias magnetic field from the soft magnetic layer.

Although FIG. 10 shows a rectangular TMR cell shape and FIG. 1 shows an elliptical TMR cell shape, the cell shape need not be rectangular or elliptical. For example, FIG.
Various cell shapes can be used as shown in 1 (a) to (d). FIGS. 11A and 11B show the above-mentioned elliptical and circular shapes, respectively, and FIGS. 11C and 11D show examples of a rhombus and a parallelogram, respectively. Any shape may be used for the soft bias layer.For example, when an elliptical shape, a circular shape, a parallelogram, or a rhombus is used, a bias magnetic field is effectively applied because the shape is close to a single magnetic domain structure, and malfunction may occur. Few. A circular shape is preferable because the cell structure can be minimized.

When the soft magnetic layer and the TMR cell are controlled to a submicron or less, magnetostatic coupling occurs between the TMR cell and the soft magnetic layer. For this reason, as shown in FIG. 11B, the easy axis of magnetization can be defined in the direction of the soft magnetic layer without making the TMR cell 1 elongated. Besides,
Since the cell area can be reduced, a larger capacity magnetic storage device (MRAM) can be manufactured. In these structures,
The circular structure in FIG. 11B shows the smallest switching magnetic field.

When the first and second embodiments of the present invention are used in combination, the switching magnetic field is the smallest. In this case, the axial direction connecting the soft bias layers is substantially equal to the wiring direction.
It is preferable to incline in the direction of 5 °. The fifth embodiment is such an example.

(Fifth Embodiment) In the fifth embodiment, a 3 × 3 cell matrix having the structure of the third embodiment (FIG. 5) having a TMR cell 1 having the structure of FIG. 3 according to the third embodiment (FIG. 5) with test element (TEG3) and a simple elliptical TMR cell
× 3 cell matrix test element (TEG
4) was prepared and the switching magnetic field characteristics were compared.

The wiring used was an Al-Cu wiring, the wiring rule was 0.25 μm, the cross-sectional aspect ratio of the wiring was 1: 2, and the wiring had a vertically long cross section. TM for both test elements
Connect the R cell (bit line BL, write word line WL
') Inclined at 45 ° to the direction. Ni—Fe was used as a shield material and was produced by a CVD method. Before forming each wiring, a CMP process was performed, and the distance between the TMR cell, the bit line BL and the write word line WL 'was designed to be the same for both test elements. Both TMR cells have a strong magnetic double tunnel junction (Ta / Ni-Fe / Pt-
Mn / (CoFe / Ru / CoFe) / AlOx / (C
o-Fe-Ni / Cu / Co-Fe-Ni) / AlOx
/ (CoFe / Ru / CoFe) / Pt-Mn / Ta)
Is used.

[0062] TMR cell 1 performs film formation using a ultra-high vacuum sputtering system, the production of AlO _x is, after the formation of the Al,
It was manufactured by a method of performing plasma oxidation. FIG. 12 shows the fifth
The switching magnetic field curves when the architecture (TEG3) of the third embodiment is used (E) and when the structure (TEG4) of the third embodiment is used (F) are shown. As shown in FIG. 12, the switching magnetic field curve of the fifth embodiment is significantly smaller than that of the third embodiment. As a result, it has been confirmed that a memory structure with reduced power consumption during writing, no crosstalk, and no problem of EM can be provided.

The magnetic storage devices described in the first to fifth embodiments are suitable for being mounted on a memory section of a mobile phone or the like.

Note that T through the first to fifth embodiments.
The structure of the MR element (cell) is preferably a so-called spin valve type in which the antiferromagnetic layers 21 and 31 are provided as shown in FIGS. In FIG. 13, reference numerals 22 and 24 denote ferromagnetic layers, 23 denotes a tunnel barrier layer, and a tunnel junction having at least one tunnel barrier layer, at least two ferromagnetic layers, and at least one antiferromagnetic layer. Structure. In FIG. 14, reference numerals 32, 34, and 36 indicate ferromagnetic layers, and 33 and 35.
Is a tunnel barrier layer, and 31 and 37 are antiferromagnetic layers.

The ferromagnetic layer (magnetic pinned layer) 32
As shown in FIG. 15, (the ferromagnetic layer 32-1 / nonmagnetic layer 3
8 / ferromagnetic layer 32-2) can be replaced by a so-called antiferromagnetic coupling layer that has antiferromagnetic coupling via a nonmagnetic layer with a three-layer structure.

By using this three-layer structure as a pin (magnetic pinned) layer, the spin of the pinned layer can be more firmly pinned. The problem that the output is gradually reduced due to rotation is completely eliminated,
There are merits such as a reduction in the thickness of the antiferromagnetic film and an increase in processing accuracy, and variations in the switching magnetic field are reduced.

It is preferable that the magnetic recording layer also has a three-layer structure of (ferromagnetic layer / nonmagnetic layer / ferromagnetic layer). In this case, it is preferable that there is a ferromagnetic layer coupling between the ferromagnetic layers. When this structure is used for the magnetic recording layer, the dependence of the switching magnetic field on the cell width is small (the increase in the switching magnetic field is small even if the cell width is reduced, and the capacity of the MRAM is increased.
Increase in power consumption even if the cell width of the TMR element is reduced,
There is no need to worry about electromigration of wiring at the time of writing, and an even larger capacity MRAM can be manufactured. The strength of the ferromagnetic coupling is preferably weak, and the weaker the strength, the smaller the switching magnetic field.

The element and type of the ferromagnetic layer of the present invention are not particularly limited, and may be Fe, Co, Ni, or an alloy thereof, magnetite having a large spin polarizability, CrO 2, R
XMnO _3-y (R: rare earth, X: Ca, Ba, Sr ) other NiMnSb, Heusler alloys such as PtMnSb of oxides such as, Zn-Mn-O, Ti -Mn-O, CdM
A magnetic semiconductor such as nP ₂ or ZnMnP ₂ can be used.

The thickness of the ferromagnetic layer of the present invention must be such that it does not become superparamagnetic, and is preferably 0.4 nm or more. Also, if the switching field is too thick,
Since the leakage magnetic field becomes large, it is preferable to be 3.0 nm or less. In addition, Ag, C
u, Au, Al, Mg, Si, Bi, Ta, B, C,
Even if a small amount of a non-magnetic element such as O, N, Pd, Pt, Zr, Ir, W, Mo, or Nb is contained, it is sufficient as long as ferromagnetism is not lost.

The antiferromagnetic film is made of Fe-Mn, Pt-Mn,
Pt-Cr-Mn, Ni-Mn, Ir-Mn, Ru-M
n or the like can be used. When a three-layer film of a ferromagnetic layer / a nonmagnetic layer / a ferromagnetic layer is used as the free (recording) layer, the nonmagnetic layer may be formed of Cu, Au, Ru, Ir, Rh, Rh,
g or the like can be used.

As the dielectric or insulating layer, Al ₂ O ₃ ,
SiO ₂ , MgO, AlN, AlON, GaO, Bi ₂ O
Various dielectrics such as ₃ , SrTiO ₂ , AlLaO ₃ can be used. These may have some oxygen and nitrogen deficiencies.

The thickness of the dielectric layer depends on the junction area of the TMR element, and is preferably 3 nm or less. The substrate material is not particularly limited, and it can be manufactured on various substrates such as Si, SiO ₂ , Al ₂ O ₃ , and AlN. On top of that, Ta, Ti, Pt, Pd, Au, Ti / Pt,
It is preferable to use Ta / Pt, Ti / Pd, Ta / Pd, or the like.

Such a magnetoresistive element can be manufactured by using an ordinary thin film forming apparatus such as various sputtering methods, vapor deposition methods, molecular beam epitaxy methods and the like.

[0074]

As described above, according to the present invention,
A high-density magnetic device in which the power consumption during writing can be significantly reduced and the conventional magnetic storage device (MRAM) has a large power consumption problem, a crosstalk problem, an electromigration (EM) problem, etc. A storage element or a magnetic storage device can be provided.

[Brief description of the drawings]

FIG. 1 is a perspective view showing a basic form of a first magnetic storage element of the present invention.

FIG. 2 is a diagram comparing a switching magnetic field curve (A) when the first basic mode of the present invention is used with a conventional switching magnetic field curve (B).

FIG. 3 is a circuit diagram showing the architecture of the magnetic storage device according to the first embodiment of the present invention.

FIG. 4 is a circuit diagram showing the architecture of a magnetic storage device according to a second embodiment of the present invention.

FIG. 5 is a circuit diagram showing an architecture of a magnetic storage device according to a third embodiment of the present invention.

FIG. 6 is a diagram comparing a switching magnetic field curve (C) of the magnetic storage device according to the third embodiment with a conventional switching magnetic field curve (D).

FIG. 7 is a circuit diagram showing the architecture of a magnetic storage device according to a fourth embodiment of the present invention.

FIG. 8 shows an upper wiring, a lower wiring,
FIG. 3 is a schematic plan view showing the arrangement of TMR elements.

FIG. 9 is a schematic cross-sectional view of one memory cell according to a fourth embodiment.

FIG. 10 is a schematic plan view showing a basic form of a second magnetic storage device of the present invention.

FIG. 11 is an example of a cell shape (plan view) of a second magnetic storage device of the present invention.

FIG. 12 is a diagram showing a switching magnetic field curve (E) of a magnetic storage device according to a fifth embodiment of the present invention in comparison with a switching magnetic field curve (F) of the magnetic storage device of the third embodiment;

FIG. 13 is a sectional view of an element showing an example of a layer structure of a TMR cell used in the present invention.

FIG. 14 is an element cross-sectional view showing another example of the layer configuration of the TMR cell used in the present invention.

FIG. 15 is an element cross-sectional view showing still another example of the layer structure of the TMR cell used in the present invention.

FIG. 16 is a schematic perspective view showing the arrangement of conventional cross-point TMR cells.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... TMR cell 2 ... Bit line 3 ... Write word line 4 ... Magnetic shield 5 ... Wiring 6 ... Insulating layer 7, 9 ... Diode 8 ... MOSFET 10 ... Soft magnetic bias layer 11 ... Column decoder 12 ... Row decoder 21, 31, 37 antiferromagnetic layers 22, 24, 32, 32-1, 32-2, 34, 36 ...
Ferromagnetic layers 23, 33, 35: Tunnel barrier layer 38: Non-magnetic layer

 ──────────────────────────────────────────────────続 き Continuing from the front page (72) Inventor Minoru Amano 1 Toshiba-cho, Komukai Toshiba-machi, Saiwai-ku, Kawasaki-shi No. 1 in the Toshiba R & D Center (72) Inventor Shigeki Takahashi 1 in Komukai Toshiba-cho in Sachi-ku, Kawasaki-shi, Kanagawa Prefecture In-Toshiba R & D Center (72) Inventor Tatsuya Kishi Kawasaki-shi, Kanagawa 1F, Komukai Toshiba-cho, Tokyo Toshiba R & D Center F-term (reference) 5F083 FZ10 GA05 GA11 GA30 JA36 JA60 LA12 LA16 PR21 PR22

Claims (6)

[Claims] A first write line, provided immediately above the first write line, at least one tunnel barrier layer, at least two ferromagnetic layers,
A ferromagnetic tunnel junction film having at least one antiferromagnetic layer, an easy axis having an angle of about 45 ° with the first write line, and being connected to an upper surface of the ferromagnetic tunnel junction film; A second write line parallel to the first write line near the ferromagnetic tunnel junction film. 2. The method according to claim 1, wherein the first and second write lines include a magnetic shield at least in the vicinity of the ferromagnetic tunnel junction film to block an influence of an external magnetic field. 3. The magnetic storage element according to 2. 3. At least one tunnel barrier layer;
A ferromagnetic tunnel junction film having at least two ferromagnetic layers including a magnetic recording layer, and at least one antiferromagnetic layer; and the magnetic field provided at both ends in the easy axis direction of the ferromagnetic tunnel junction film. And a soft magnetic bias layer exhibiting softer magnetism than the recording layer. 4. The semiconductor device according to claim 1, wherein at least one of said ferromagnetic layers is replaced by a laminated layer including a three-layer structure of a ferromagnetic layer / a non-magnetic metal layer / a ferromagnetic layer. 4. The magnetic storage element according to 3. 5. A plurality of bit lines each comprising the second write line; a plurality of read word lines intersecting with the plurality of bit lines; and a plurality of intersections between the bit lines and the word lines. 5. A magnetic storage device comprising the magnetic recording element according to claim 1 and a transistor or a diode. 6. A portable terminal device comprising the magnetic storage device according to claim 5.