JP2003224109A - Method for manufacturing semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To ensure high selectivity for an insulation film becoming a mask material while suppressing the generation of a conical pattern defect in dry etching for machining a silicon substrate. <P>SOLUTION: In dry etching employing a resist pattern 13 for patterning a silicon nitride film 12 and a silicon oxide film 11, a defect introduced into a silicon substrate 10 at the time of growth to cause a conical pattern defect is removed by digging down the surface of an isolation trench forming region on a silicon substrate at the time of overetching. Subsequently, the silicon substrate 10 is dry-etched using a patterned silicon nitride film 12A as a mask, thus forming an isolation trench. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention reduces conical pattern defects when etching a silicon substrate,
The present invention relates to a method for manufacturing a semiconductor device capable of obtaining a good processed shape.

[0002]

2. Description of the Related Art In the element isolation formation of a fine semiconductor element in recent years, a groove is formed in a silicon substrate, a silicon oxide film is embedded in the groove, and then the surface of the silicon oxide film is flattened to form an element. STI forming a separation
(Shallow Trench Isolation) method is used.

A conventional method of manufacturing a semiconductor device, specifically, a conventional element isolation forming method will be described below with reference to the drawings.

9A to 9D are sectional views showing the steps of a conventional method for manufacturing a semiconductor device.

First, as shown in FIG. 9A, after a silicon oxide film 81 is formed on a silicon substrate 80 by thermal oxidation, a silicon nitride film 82 is formed on the silicon oxide film 81 by a CVD method or the like. Then, a resist pattern 83 corresponding to a desired element isolation pattern is formed on the silicon nitride film 82 by a photolithography technique.

Next, the silicon nitride film 82 and the silicon oxide film 81 are sequentially dry-etched using the resist pattern 83 as a mask, and then the resist pattern 8 is ashed and washed as shown in FIG. 9B.
3 is peeled from the silicon substrate 80. As a result, the patterned silicon oxide film 81A and the patterned silicon nitride film 82A are formed. That is, a desired element isolation pattern is transferred to the silicon nitride film 82 and the silicon oxide film 81. Further, at this time, in order to accurately stop the etching of the silicon nitride film 82 and the silicon oxide film 81, it is necessary to maintain a high selection ratio of the silicon oxide film 81 or the silicon nitride film 82 with respect to the silicon substrate 80. For example, the selection ratio of the silicon oxide film 81 to the silicon substrate 80 (= (silicon oxide film 81
(Etching rate of) / (etching rate of silicon substrate 80)) needs to be maintained at 5 or more. Therefore, in dry etching the silicon nitride film 82 and the silicon oxide film 81, CF ₄ is used as an etching gas.
Or CHF ₃ is used.

Next, as shown in FIG. 9C, dry etching is performed on the silicon substrate 80 using the patterned silicon nitride film 82A as a mask, and then the deposits formed during the dry etching are removed. By performing cleaning for removing, the separation groove 84 is formed in the silicon substrate 80. At this time, in the dry etching of the silicon substrate 80, a high selection ratio is required for the silicon nitride film 82 that is a mask material. In particular,
It is required that "(etching rate of silicon substrate 80) / (etching rate of silicon nitride film 82)" be 15 or more. Therefore, in the dry etching of the silicon substrate 80, a mixed gas containing halogen such as chlorine or hydrogen bromide is used as the process gas.
In general, such dry etching of a silicon substrate also increases the selection ratio of the silicon substrate to the silicon oxide film.

By the way, before starting the dry etching process shown in FIG. 9C, the silicon substrate 8
Since a natural oxide film (not shown) is formed on the surface of 0, if dry etching is started on the silicon substrate 80 in this state, the etching stops. Therefore, after the natural oxide film is removed with hydrofluoric acid, the silicon substrate is dry-etched, or at the beginning of the dry etching of the silicon substrate, a gas (CF ₄ or SF ₆₎ having a high etching rate of the silicon oxide film is used.
Etching is performed on the natural oxide film using plasma of (1), and then the silicon substrate is dry-etched.

Next, in order to reduce the surface level of the wall surface of the isolation trench 84 (hereinafter referred to as the trench side wall), the silicon substrate 80 on the trench side wall is oxidized by thermal oxidation. After that, a silicon oxide film is buried in the isolation trench 84 by the CVD method, the silicon oxide film is flattened by the CMP method, and then the remaining silicon nitride film 82 (patterned silicon nitride film 82A) is wet-etched. To remove. As a result, the element isolation insulating film 85 made of a silicon oxide film is completed as shown in FIG.

[0010]

However, in the conventional method for manufacturing a semiconductor device, as shown in FIG. 10, when the silicon substrate 80 is dry-etched to form the separation groove 84, the separation groove 84 is separated. There is a problem that a conical pattern defect 86 occurs in the use groove 84 and the element isolation becomes insufficient. On the other hand, it is known that the conical pattern defect can be reduced by reducing the selection ratio with respect to the silicon nitride film during the dry etching of the silicon substrate. However, in this case,
When the silicon substrate is dry-etched, the silicon nitride film that functions as a mask becomes thin, which causes a problem that the processing accuracy of the silicon substrate deteriorates. Further, since the silicon nitride film becomes thin, the silicon nitride film does not function sufficiently as a CMP stopper during element isolation formation, resulting in a problem that the surface of the silicon substrate is shaved and polishing abnormalities occur.

In view of the above, according to the present invention, in dry etching for processing a silicon substrate, it is possible to secure a high selection ratio for an insulating film serving as a mask material while suppressing the occurrence of conical pattern defects. The purpose is to

[0012]

In order to achieve the above object, the inventor of the present application investigated the cause of occurrence of a conical pattern defect 86 as shown in FIG. At that time, it was confirmed that as a result of defects existing in the silicon substrate serving as nuclei and acting as a mask, conical pattern defects were generated. Hereinafter, a specific description will be given with reference to the drawings.

FIGS. 11A and 11B are schematic views showing the mechanism of occurrence of a conical pattern defect. Incidentally, FIG.
In FIGS. 9A and 9B, the same members as those of the conventional semiconductor device shown in FIGS. 9A to 9D are designated by the same reference numerals and the description thereof will be omitted. In addition, FIG. 11A shows that the resist pattern 8 is formed after the silicon nitride film 82 and the silicon oxide film 81 are patterned by the dry etching technique.
3 shows a state immediately after removing 3 (see FIG. 9B), and FIG. 11B shows a state immediately after the separation groove 84 is formed by dry etching the silicon substrate 80 (see FIG. 9B). 9 (c)).

As shown in FIG. 11 (a), an octahedral defect (void) 80a called a defect introduced during growth is formed on the surface of the silicon substrate 80 during crystal growth. Further, silicon oxide 80b, which is considered to be caused by abnormal oxidation, is formed at the corner of the octahedral void 80a. When the silicon substrate 80 in such a state is dry-etched, as shown in FIG.
While the planar voids 80a disappear, the silicon oxide 80b is not removed and the conical pattern defects 86 are formed because the silicon oxide 80b is not removed because the selection ratio of the silicon substrate 80 to the silicon oxide film in the dry etching is high. At this time, the pattern defect has a conical shape because the sidewall protective film is formed in order to taper the trench sidewall in the dry etching of the silicon substrate 80.

That is, in order to suppress the occurrence of a conical pattern defect in the dry etching for processing the silicon substrate, the inventor of the present application, the growth included in the surface portion of the silicon substrate before performing the dry etching. We have found that it is necessary to remove the defect introduced at the time. still,
The defects introduced during growth containing silicon oxide are buried in the silicon substrate, and the above-mentioned natural oxide film removal treatment (see FIG. 9) is performed.
It cannot be removed by a process of removing the natural oxide film formed on the surface of the silicon substrate 80 with hydrofluoric acid or the like before starting the dry etching step of the silicon substrate 80 shown in (c). Therefore, in order to remove defects introduced during growth, particularly silicon oxide in the silicon substrate, it is necessary to dig into the surface portion of the silicon substrate in a state where silicon and silicon oxide can be simultaneously etched. .

The present invention has been made on the basis of the above findings. Specifically, in the method for manufacturing a semiconductor device according to the present invention, the defects introduced during growth included in the surface portion of the silicon substrate are removed. The method includes a step and a step of forming a recess in a region of the silicon substrate from which a defect introduced during growth is removed by dry etching using a mask pattern. In the method for manufacturing a semiconductor device of the present invention, the defects introduced during growth may be removed only in a predetermined region (that is, a recess formation region) of the surface portion of the silicon substrate, or in the entire surface of the silicon substrate. May be done. In the latter case, a recess is formed in a predetermined region of the "region where the defects introduced during growth in the silicon substrate are removed", that is, "the entire surface of the silicon substrate".

According to the method of manufacturing a semiconductor device of the present invention, before the dry etching of the silicon substrate for forming the concave portion, the introduction defect during growth in the silicon substrate which causes the conical pattern defect is removed. It is not necessary to consider a constraint for reducing pattern defects as a dry etching condition for the substrate. Therefore, in the dry etching of the silicon substrate, it is possible to secure a high selection ratio with respect to the insulating film serving as the mask material while suppressing the occurrence of conical pattern defects, and thus the silicon substrate can be processed with high accuracy.

In the method of manufacturing a semiconductor device of the present invention,
By forming an insulating film on a silicon substrate and performing dry etching using a resist pattern on the insulating film before the step of removing the defects introduced during growth,
A step of patterning the insulating film to form a mask pattern is provided, and the step of removing defects introduced during growth is performed by dry etching the silicon substrate using the resist pattern, thereby forming a recess in the silicon substrate. It is preferable to include a step of digging down the surface portion of the region to remove defects introduced during growth.

By doing so, it is possible to remove the defect introduced during growth in the silicon substrate, which causes the pattern defect, before the dry etching of the silicon substrate without damaging the mask pattern used for the dry etching of the silicon substrate.

In this case, the ratio of the etching rate of the silicon oxide film to the etching rate of the silicon substrate in the step of removing the defects introduced during growth is preferably 0.5 or more and 5.0 or less.

In this way, since it is possible to simultaneously etch silicon and silicon oxide, defects introduced during growth in the silicon substrate, specifically, silicon oxide formed at the corners of the octahedral voids. Can reliably remove things.

Alternatively, in this case, the depth at which the silicon substrate is dug in the step of removing the defects introduced during growth is preferably 25 nm or more.

By doing so, it is possible to surely remove the defect introduced during growth which causes the pattern defect.

Alternatively, in this case, the insulating film is preferably made of at least one of a silicon oxide film, a silicon nitride film and a silicon oxynitride film.

In this way, the recess can be formed in the silicon substrate with high accuracy.

In the method of manufacturing a semiconductor device of the present invention,
The method includes a step of forming a mask pattern made of at least one of a silicon nitride film and a silicon oxynitride film before the step of removing the defect introduced during growth, and the step of removing the defect introduced during growth is performed on the silicon substrate. A dry etching using a mask pattern for the step of digging the surface portion of the region of the silicon substrate where the concave portion is formed to remove the defects introduced during growth,
The ratio of the etching rate of the silicon oxide film to the etching rate of the silicon substrate in the step of removing the introduced defects during growth is 0.5 or more and 5.0 or less, and the silicon substrate in the step of removing the introduced defects during growth The ratio of the etching rate of the insulating film serving as the mask pattern to the etching rate of is preferably 10 or more.

By doing so, it is possible to remove the defect introduced during growth in the silicon substrate which causes the pattern defect before the dry etching of the silicon substrate without damaging the mask pattern used for the dry etching of the silicon substrate.

In this case, it is preferable that the step of removing the defects introduced during growth includes a step of performing dry etching on the silicon substrate using plasma of C ₄ F ₈ gas or C ₅ F ₈ gas.

By doing so, the ratio of the etching rate of the insulating film serving as the mask pattern to the etching rate of the silicon substrate can be reliably maintained at 10 or more.

Alternatively, in this case, the depth at which the silicon substrate is dug in the step of removing the defects introduced during growth is preferably 25 nm or more.

By doing so, it is possible to surely remove the defect introduced during growth, which causes the pattern defect.

In the method of manufacturing a semiconductor device of the present invention,
The step of removing the defect introduced during growth includes the step of removing the defect introduced during growth by oxidizing the surface portion of the silicon substrate and removing the oxide layer formed thereby, and the defect introduced during growth is removed. Between the step and the step of forming the recess, after forming an insulating film on a silicon substrate, dry etching is performed on the insulating film using a resist pattern to pattern the insulating film to form a mask pattern. It is preferable to include a step of

In this way, the defects introduced during growth in the silicon substrate, which cause pattern defects, can be removed before forming the mask pattern used for dry etching of the silicon substrate. Therefore, it is not necessary to consider the restriction for reducing the conical pattern defects under the dry etching conditions of the insulating film to be the mask pattern and the silicon substrate. In addition, the insulating film serving as the mask pattern is not damaged by the process of removing the defects introduced during growth.

In this case, the thickness of the oxide layer is preferably 50 nm or more.

By doing so, it is possible to reliably incorporate the defects introduced during growth, which cause pattern defects, into the oxide layer.

Alternatively, in this case, the insulating film is preferably made of at least one of a silicon oxide film, a silicon nitride film and a silicon oxynitride film.

In this way, the recess can be formed in the silicon substrate with high accuracy.

Alternatively, in this case, the step of removing the defects introduced during growth may include the step of performing dry etching on the oxide layer using a plasma containing a gas containing carbon and fluorine, or hydrofluoric acid. The method may include a step of performing wet etching on the oxide layer by using a solution containing the above or a solution containing hydrofluoric acid and nitric acid. When performing wet etching on the oxide layer using a solution containing hydrofluoric acid and nitric acid, the surface portion of the silicon substrate (non-oxidized portion) below the oxide layer can also be removed, so that defects introduced during growth can be further reduced. Can be reliably removed.

In the method of manufacturing a semiconductor device of the present invention,
The step of removing the introduced defects during growth removes the introduced defects during growth by oxidizing the surface portion of the silicon substrate and removing the upper part of the region where the concave portion is formed in the oxide layer formed thereby. It is preferable to include a step of forming a mask pattern made of the remaining oxide layer.

By doing so, it is not necessary to consider the constraint for reducing the conical pattern defects under the dry etching conditions of the insulating film to be the mask pattern and the silicon substrate. Moreover, since the oxide layer formed at the time of removing the defects introduced during growth is used as a mask material for dry etching of the silicon substrate, the process can be simplified.

In this case, the thickness of the oxide layer is preferably 50 nm or more.

By doing so, it is possible to surely remove the defect introduced during growth, which causes the pattern defect.

[0043]

BEST MODE FOR CARRYING OUT THE INVENTION (First Embodiment) A method for manufacturing a semiconductor device according to a first embodiment of the present invention will be described below with reference to the drawings.

FIGS. 1A to 1D are sectional views showing each step of the method for manufacturing a semiconductor device according to the first embodiment.

First, as shown in FIG. 1A, a silicon oxide film 11 having a thickness of about 10 nm is formed on a silicon substrate 10 by thermal oxidation, and then a silicon film having a thickness of about 150 nm is formed on the silicon oxide film 11. The nitride film 12 is formed by a film forming method such as a CVD method, and then a resist pattern 13 corresponding to a desired element isolation pattern is formed on the silicon nitride film 12 by a photolithography technique.

Next, as shown in FIG. 1B, dry etching is sequentially performed on the silicon nitride film 12 and the silicon oxide film 11 using the resist pattern 13 as a mask. As a result, the patterned silicon oxide film 11 is formed.
A and a patterned silicon nitride film 12A are formed. That is, a desired element isolation pattern is transferred to the silicon nitride film 12 and the silicon oxide film 11.

In the first embodiment, the silicon nitride film 12
And in the dry etching of the silicon oxide film 11,
The selection ratio of the silicon oxide film 11 to the silicon substrate 10 during over-etching (= (silicon oxide film 1
1 etching rate) / (etching rate of silicon substrate 10)) in the range of about 0.5 to about 5.0, and the separation groove forming region (resist pattern 13 or patterned) of the silicon substrate 10 is adjusted. The surface portion of the substrate region under the opening of the silicon nitride film 12A) is removed. Specifically, for example, parallel plate type RIE (Reacti
ve Ion Etching) equipment, which is the process gas C
The flow rate of HF ₃ , CF ₄ and O ₂ is 50 ml / min each
(Standard condition), 150 ml / min (standard condition) and 20 ml / m
Set to in (standard state) and set process pressure and high frequency power (for plasma generation) to 30 Pa and 40, respectively.
The silicon nitride film 12 and the silicon oxide film 11 are dry-etched at 0 W. The selection ratio of the silicon oxide film 11 to the silicon substrate 10 under the dry etching condition is about 2. In the first embodiment, the separation groove forming region of the silicon substrate 10 is formed on the substrate surface side at the time of overetching under this condition. From 3
Shave off about 0 nm. As a result, defects introduced during growth in the silicon substrate 10 that cause conical pattern defects during dry etching of the silicon substrate 10 (FIG. 1C) are removed.

In the dry etching of the silicon nitride film 12 and the silicon oxide film 11, the main etching conditions may be the same as or different from the over etching conditions. The degree of over-etching is about 15 to 20%, though it depends on the depth of the silicon substrate 10.

Next, as shown in FIG. 1C, after the resist pattern 13 is removed from the silicon substrate 10 by ashing and cleaning, the patterned silicon nitride film 12A is used as a mask for the silicon substrate 10, for example. Dry etching is performed until the etching depth reaches about 400 nm. At this time, a high selection ratio is required for the silicon nitride film 12 that is the mask material. Specifically, "(etching rate of silicon substrate 10) / (etching rate of silicon nitride film 12)" is required to be 15 or more. Therefore, for example, in an inductively coupled plasma etching apparatus, C that becomes a process gas is used.
The flow rates of l ₂ and O ₂ are set to 150 ml / min (standard state) and 8 ml / min (standard state), respectively, and the process pressure, source power and bias power are set to 1.
The silicon substrate 10 is set to 3 Pa, 600 W and 200 W, and the silicon substrate 10 is dry-etched for 45 seconds, for example. In the first embodiment, immediately before the dry etching of the silicon substrate 10 under these conditions, the natural oxide film (shown in the figure) formed on the exposed portion of the silicon substrate 10 (see FIG. 1B) is shown. In order to remove (abbreviation), in the above-mentioned inductively coupled plasma etching apparatus, the flow rate of Cl ₂ as a process gas is set to 150 ml / min (standard state), and the process pressure, source power and bias power are each 0 67 Pa, 150 W and 20
It is set to 0 W and etching is performed for about 5 seconds.

Next, as shown in FIG. 1C, the silicon substrate 1 is cleaned by performing cleaning to remove deposits formed during dry etching of the silicon substrate 10.
The separation groove 14 is formed at 0. Then, in order to reduce the surface state of the wall surface of the isolation trench 14, that is, the trench sidewall, the silicon substrate 10 on the trench sidewall is oxidized by thermal oxidation. After that, a silicon oxide film is applied to the isolation trench 14 by CV.
After embedding by the D method, the silicon oxide film is flattened by the CMP method, and then the remaining silicon nitride film 12 is formed.
(Patterned silicon nitride film 12A) is removed by wet etching. As a result, as shown in FIG. 1D, the element isolation insulating film 1 made of a silicon oxide film is formed.
5 is completed.

According to the first embodiment, the silicon substrate 1
After removal of the growth-introduced defects contained in the surface portion of 0, the separation groove 14 is formed in the region of the silicon substrate 10 from which the growth-introduced defects are removed by dry etching using the patterned silicon nitride film 12A as a mask. To form. That is, before the dry etching of the silicon substrate 10, in order to remove the defect introduced during the growth in the silicon substrate 10 which causes the conical pattern defect, the dry etching condition of the silicon substrate 10 has a restriction for reducing the pattern defect. Eliminates the need to consider. Therefore, in the dry etching of the silicon substrate 10, a high selection ratio can be secured for the silicon nitride film 12 serving as a mask material while suppressing the occurrence of a conical pattern defect, so that the separation groove 14 can be formed with high accuracy.

Further, according to the first embodiment, in the dry etching using the resist pattern 13 for patterning the silicon nitride film 12 and the silicon oxide film 11, the separation groove formation region in the silicon substrate 10 is overetched. Defects introduced during growth are removed by digging the surface portion of. Therefore, the silicon substrate 1
Silicon substrate 1 without damaging the silicon nitride film 12 used as a mask during dry etching
Before the dry etching of 0, the defects introduced during growth in the silicon substrate 10 which cause pattern defects can be removed.

FIG. 2 shows a selection ratio of the silicon oxide film 11 to the silicon substrate 10 (= (etching rate of the silicon oxide film 11) in the dry etching process of the silicon nitride film 12 and the silicon oxide film 11 shown in FIG. 1B).
The result of examining the dependency of the number of conical pattern defects (per 1 cm ² ) on / (etching rate of the silicon substrate 10) is shown. As shown in FIG. 2, the selection ratio of the silicon oxide film 11 to the silicon substrate 10 (hereinafter referred to as the silicon selection ratio) is about 0.5 to 5.
It can be seen that the number of pattern defects is significantly reduced in the range of up to about 0. On the other hand, when the selection ratio to silicon is about 0.5 or less, the defects introduced during growth (specifically, silicon oxide) in the silicon substrate 10 can be removed because the etching rate of the silicon oxide film 11 is too low. As a result, the silicon oxide acts as a mask to generate a conical pattern defect. When the selection ratio to silicon is about 5.0 or more, the silicon substrate 10
Because the etching rate of silicon is too low
The embedded silicon oxide cannot be dug up, and as a result, the silicon oxide acts as a mask to generate a conical pattern defect.

That is, in the first embodiment, the selection ratio of the silicon oxide film 11 to the silicon substrate 10 is 0.5 or more and 5.0 or less at the time of over-etching for removing the defects introduced during growth. Preferably there is. By doing this, since it is possible to simultaneously etch silicon and silicon oxide, defects introduced during growth in the silicon substrate 10, specifically, silicon oxide formed at the corners of the octahedral voids can be removed. It can be surely removed, thereby suppressing the occurrence of pattern defects.

FIG. 3 shows the number of conical pattern defects (per 1 cm ² ) with respect to the amount of shaving of the surface portion of the silicon substrate 10 in the dry etching process of the silicon nitride film 12 and the silicon oxide film 11 shown in FIG. 1B. The result of examining the dependency of is shown. As shown in FIG. 3, it can be seen that the number of pattern defects can be reduced by setting the shaving amount of the surface portion of the silicon substrate 10 to 25 nm or more.

That is, in the first embodiment, the depth to which the silicon substrate 10 is dug is 25 during overetching for removing defects introduced during growth.
It is preferably at least nm. In this way, defects introduced during growth in the silicon substrate 10 can be reliably removed,
Thereby, the generation of pattern defects can be suppressed.

In the first embodiment, the silicon nitride film 12 (more precisely, a laminated film of the silicon nitride film 12 and the silicon oxide film 11) is used as a mask during the dry etching of the silicon substrate 10. However, a single layer film of a silicon nitride film, a silicon oxide film or a silicon nitride oxide film may be used, or a silicon nitride film,
A laminated film of two or more insulating films of a silicon oxide film and a silicon oxynitride film may be used.

In the first embodiment, the case where the STI isolation groove 14 is formed in the silicon substrate 10 by dry etching is targeted, but instead of this,
Similar effects can be obtained even when a recess for forming a capacitor or a deep trench is formed in the silicon substrate 10 by dry etching.

(Second Embodiment) A method for manufacturing a semiconductor device according to a second embodiment of the present invention will be described below with reference to the drawings.

FIGS. 4A to 4E are sectional views showing each step of the method for manufacturing a semiconductor device according to the second embodiment.

First, as shown in FIG. 4A, a silicon oxide film 21 having a thickness of about 10 nm is formed on a silicon substrate 20 by thermal oxidation, and then a silicon film having a thickness of about 150 nm is formed on the silicon oxide film 21. The nitride film 22 is formed by a film forming method such as a CVD method, and then a resist pattern 23 corresponding to a desired element isolation pattern is formed on the silicon nitride film 22 by a photolithography technique.

Next, the silicon nitride film 22 and the silicon oxide film 21 are sequentially dry-etched using the resist pattern 23 as a mask, and then the resist pattern 2 is ashed and washed as shown in FIG. 4B.
3 is peeled from the silicon substrate 20. As a result, the patterned silicon oxide film 21A and the patterned silicon nitride film 22A are formed. That is, a desired element isolation pattern is transferred to the silicon nitride film 22 and the silicon oxide film 21. In the second embodiment,
Since the etching is accurately stopped by the dry etching of the silicon oxide film 21 and the silicon nitride film 22, a high selection ratio with respect to the silicon substrate 20 is secured. Specifically, for example, in a parallel plate type RIE device, the flow rates of CHF ₃ and O ₂ which are process gases are 50 ml / min, respectively.
(Standard state) and 5 ml / min (standard state), process pressure and high frequency power (for plasma generation) are set to 60 Pa and 400 W, respectively, to dry the silicon nitride film 22 and the silicon oxide film 21. Etch. The selection ratio of the silicon oxide film 21 to the silicon substrate 20 under this dry etching condition is about 8.

Next, the patterned silicon nitride film 2 is formed.
2A is used as a mask to dry-etch the silicon substrate 20 to form the separation groove 24 (FIG. 4).
As shown in FIG. 4C, as a pretreatment of (d), the silicon substrate 20 is dry-etched using the patterned silicon nitride film 22A as a mask.
The natural oxide film (not shown) on the isolation trench formation region (the substrate region below the opening of the patterned silicon nitride film 22A) and the surface portion of the isolation trench formation region are removed. Thereby, the step of forming the separation groove 24 (see FIG.
(D)), defects introduced during growth (octahedral voids and silicon oxides formed at the corners thereof) in the silicon substrate 20 which cause the conical pattern defects can be removed.
Specifically, for example, in an inductively coupled plasma etching apparatus, the flow rates of C ₄ F ₈ and O ₂ as process gases are set to 20 ml / min (standard state), and the process pressure, source power and bias power are set. Are set to 0.67 Pa, 300 W and 200 W, respectively, and dry etching is performed for 30 seconds, for example. Here, when C ₄ F ₈ gas is used as the process gas, the ratio of the etching rate of the silicon oxide film (silicon oxide) to the etching rate of the silicon substrate 20 in the above-described pretreatment is about 0.5 to 5.0. You can set up to a range of
This allows simultaneous etching of silicon and silicon oxide. Further, the ratio of the etching rate of the silicon nitride film 22 to the etching rate of the silicon substrate 20 in the pretreatment is set high (specifically, 1).
It can be set to 0 or more). In the second embodiment, under this condition, the separation groove forming region of the silicon substrate 20 is removed by about 30 nm from the substrate surface side. As a result, during the subsequent dry etching of the silicon substrate 20 (see FIG.
It is possible to reliably remove the natural oxide film on the silicon substrate 20 and the defects introduced during growth in the silicon substrate 20 while preventing damage to the patterned silicon nitride film 22A used as a mask in (d)). .

Next, as shown in FIG. 4D, dry etching is performed on the silicon substrate 20 using the patterned silicon nitride film 22A as a mask until the etching depth reaches about 400 nm, for example. At this time, a high selection ratio is required for the silicon nitride film 22 that is the mask material. Specifically, “(etching rate of silicon substrate 20) / (etching rate of silicon nitride film 22)” is required to be 15 or more. Therefore, for example, in the inductively coupled plasma etching apparatus used for the pretreatment shown in FIG. 4C, the flow rates of Cl ₂ and O ₂ as process gases are 150 ml / min (standard state) and 8 ml / min (standard state), respectively. State) and set the process pressure, source power and bias power to 1.
The silicon substrate 20 is set to 3 Pa, 600 W, and 200 W, and the silicon substrate 20 is dry-etched for 45 seconds, for example. In the second embodiment, the pretreatment shown in FIG. 4C is performed immediately before the dry etching of the silicon substrate 20 under these conditions.

Next, as shown in FIG. 4D, the silicon substrate 20 is cleaned by cleaning the silicon substrate 20 to remove deposits formed during dry etching.
The separation groove 24 is formed at 0. Then, in order to reduce the surface level of the wall surface of the isolation trench 24, that is, the trench sidewall, the silicon substrate 20 on the trench sidewall is oxidized by thermal oxidation. After that, a CV silicon oxide film is formed in the separation groove 24.
After embedding by the D method, the silicon oxide film is flattened by the CMP method, and then the remaining silicon nitride film 22.
(Patterned silicon nitride film 22A) is removed by wet etching. As a result, as shown in FIG. 4D, the element isolation insulating film 2 made of a silicon oxide film is formed.
5 is completed.

According to the second embodiment, the silicon substrate 2
After removal of the growth-introduced defects contained in the surface portion of 0, dry etching is performed using the patterned silicon nitride film 22A as a mask, and the separation groove 24 is formed in the region of the silicon substrate 20 from which the growth-introduced defects are removed. To form. That is, before the dry etching of the silicon substrate 20, in order to remove a defect introduced during growth in the silicon substrate 20 which causes a conical pattern defect, the dry etching condition of the silicon substrate 20 is restricted to reduce the pattern defect. Eliminates the need to consider. Therefore, in the dry etching of the silicon substrate 20, a high selection ratio can be secured for the silicon nitride film 22 serving as a mask material while suppressing the occurrence of conical pattern defects, so that the separation groove 24 can be formed with high accuracy.

Further, according to the second embodiment, the patterned silicon nitride film 22A is used as a mask to perform the dry etching on the silicon substrate 20 to form the isolation groove 24, as a pretreatment for the patterning. By dry etching using the thus-formed silicon nitride film 22A as a mask, the surface portion of the isolation groove forming region in the silicon substrate 20 is dug down to remove the defects introduced during growth.
At this time, the ratio of the etching rate of the silicon oxide film to the etching rate of the silicon substrate 20 is 0.5 or more and 5.0 or less, and the ratio of the etching rate of the silicon nitride film 22 to the etching rate of the silicon substrate 20 is It is 10 or more. Therefore, without introducing damage to the silicon nitride film 22 used as a mask during the dry etching of the silicon substrate 20, before the dry etching of the silicon substrate 20, the defects introduced during growth in the silicon substrate 20 which cause pattern defects are removed. it can.

Incidentally, in the second embodiment, pretreatment for dry etching of the silicon substrate 20 (see FIG. 4C).
Although C ₄ F ₈ gas was used as the etching gas used for the above, it is not limited to this, and other gas capable of simultaneously etching silicon oxide and silicon while maintaining a high selectivity with respect to the silicon nitride film. (Specifically, the ratio of the etching rate of silicon oxide to the etching rate of the silicon substrate is 0.5 or more and 5.0 or less, and the ratio of the etching rate of the silicon nitride film to the etching rate of the silicon substrate is 10 or more. The same effect can be expected by using other etching gas) such as C ₅ F ₈ gas.

Further, in the second embodiment, the depth to which the silicon substrate 20 is dug is preferably 25 nm or more in the pretreatment of the dry etching of the silicon substrate 20, that is, the step of removing the defects introduced during growth. In this way, the defects introduced during growth in the silicon substrate 20 can be reliably removed.

In the second embodiment, the silicon nitride film 22 (accurately, a laminated film of the silicon nitride film 22 and the silicon oxide film 21) is used as a mask during the dry etching of the silicon substrate 20. However, a single layer film of a silicon nitride film or a silicon nitride oxide film may be used, or a laminated film of two or more insulating films of a silicon nitride film, a silicon oxide film and a silicon nitride oxide film may be used. You may use.

In the second embodiment, the case where the STI isolation trench 24 is formed in the silicon substrate 20 by dry etching is targeted, but instead of this,
The same effect can be obtained even when a recess such as a groove for forming a capacitor or a deep trench is formed in the silicon substrate 20 by dry etching.

(Third Embodiment) A method for manufacturing a semiconductor device according to a third embodiment of the present invention will be described below with reference to the drawings.

FIGS. 5A to 5D and 6A to 6A.
(C) is sectional drawing which shows each process of the manufacturing method of the semiconductor device which concerns on 3rd Embodiment.

First, as shown in FIG. 5A, a silicon substrate 30 is prepared. At this time, on the surface portion of the silicon substrate 30, octahedral voids 30a that are defects introduced during growth are formed, and silicon oxides 30b are formed at the corners of the octahedral voids 30a. Octahedral void 3
0a and the silicon oxide 30b are generated when the silicon substrate 30 is crystal-grown.

Next, as shown in FIG. 5B, the surface portion of the silicon substrate 30 is oxidized by thermal oxidation to form an oxide layer 31. At this time, the oxide layer 3 is thermally oxidized so that the defects introduced during growth, that is, the octahedral void 30a and the silicon oxide 30b are taken into the oxide layer 31.
1 is grown to have a thickness of about 50 nm or more (for example, about 75 nm).

Next, as shown in FIG. 5C, a growth-introduced defect (specifically, a defect) which causes a conical pattern defect during dry etching of the silicon substrate 30 (see FIG. 6B). Oxide layer 3 incorporating silicon oxide 30b)
1 is removed using, for example, a plasma containing a gas containing carbon and fluorine. Specifically, for example, in a down-flow type plasma etching apparatus, the flow rates of CF ₄ and O ₂ , which are process gases, are set to 100 ml / min (standard state), and the process pressure and high-frequency power (for plasma generation) are set. 100Pa and 30 respectively
The oxide layer 31 is set to 0 W and dry-etched for 120 seconds, for example.

Next, after the new surface of the silicon substrate 30 from which the oxide layer 31 has been removed is cleaned by ashing and cleaning, as shown in FIG. 5D, silicon having a thickness of about 10 nm is formed on the silicon substrate 30. After the oxide film 32 is formed by thermal oxidation, a silicon nitride film 33 having a thickness of about 150 nm is formed on the silicon oxide film 32 by a film forming method such as a CVD method, and thereafter, a desired silicon nitride film 33 is formed on the silicon nitride film 33. A resist pattern 34 corresponding to the element isolation pattern is formed by a photolithography technique.

Next, the silicon nitride film 33 and the silicon oxide film 32 are sequentially dry-etched using the resist pattern 34 as a mask, and then the resist pattern 3 is ashed and washed as shown in FIG. 6A.
4 is peeled from the silicon substrate 30. As a result, the patterned silicon oxide film 32A and the patterned silicon nitride film 33A are formed. That is, a desired element isolation pattern is transferred to the silicon nitride film 33 and the silicon oxide film 32. In the third embodiment,
Since the etching is accurately stopped by the dry etching of the silicon oxide film 32 and the silicon nitride film 33, a high selection ratio with respect to the silicon substrate 30 is secured. Specifically, for example, in a parallel plate type RIE device, the flow rates of CHF ₃ and O ₂ which are process gases are 50 ml / min, respectively.
(Standard state) and 5 ml / min (standard state), the process pressure and the high frequency power (for plasma generation) are set to 60 Pa and 400 W, respectively, to dry the silicon nitride film 33 and the silicon oxide film 32. Etch. The selection ratio of the silicon oxide film 32 to the silicon substrate 30 under the dry etching condition is about 8.

Next, as shown in FIG. 6B, dry etching is performed on the silicon substrate 30 using the patterned silicon nitride film 33A as a mask until the etching depth reaches about 400 nm, for example. At this time, a high selection ratio is required for the silicon nitride film 33 that is the mask material. Specifically, “(etching rate of silicon substrate 30) / (etching rate of silicon nitride film 33)” is required to be 15 or more. For this reason, for example, in an inductively coupled plasma etching apparatus, the flow rates of Cl ₂ and O ₂ as process gases are 150 ml / min (standard state) and 8 ml / min (standard state), respectively.
And the process pressure, the source power, and the bias power are set to 1.3 Pa, 600 W, and 200 W, respectively, and dry etching is performed on the silicon substrate 30 for 45 seconds, for example. In the third embodiment, immediately before the dry etching of the silicon substrate 30 under these conditions, the exposed portion of the silicon substrate 30 (see FIG. 6) is performed.
In order to remove the natural oxide film (not shown) formed on (a), the flow rate of Cl _{2 used as} the process gas is 150 ml / min (standard state) in the inductively coupled plasma etching apparatus described above. ) And process pressure, source power and bias power of 0.6 each
Etching is performed for about 5 seconds by setting 7 Pa, 150 W and 200 W.

Next, as shown in FIG. 6B, the silicon substrate 3 is washed by removing the deposits formed during the dry etching of the silicon substrate 30.
The separation groove 35 is formed at 0. Then, in order to reduce the surface level of the wall surface of the isolation trench 35, that is, the trench side wall, the silicon substrate 30 on the trench side wall is oxidized by thermal oxidation. After that, a CV is formed on the isolation groove 35 with a silicon oxide film.
After embedding by the D method, the silicon oxide film is flattened by the CMP method, and then the remaining silicon nitride film 33 is formed.
(Patterned silicon nitride film 33A) is removed by wet etching. As a result, as shown in FIG. 6C, the element isolation insulating film 3 made of a silicon oxide film is formed.
6 is completed.

According to the third embodiment, the silicon substrate 3
After removing the defects introduced during growth over the entire surface of 0, the separation groove 35 is formed in a predetermined region of the silicon substrate 30 by dry etching using a mask pattern (patterned silicon nitride film 33A). That is, before the dry etching of the silicon substrate 30, in order to remove the defect introduced during the growth in the silicon substrate 30 which causes the conical pattern defect, the dry etching condition of the silicon substrate 30 is restricted to reduce the pattern defect. Eliminates the need to consider. Therefore, in dry etching of the silicon substrate 30, a high selection ratio can be secured for the silicon nitride film 33 serving as a mask material while suppressing the occurrence of conical pattern defects, so that the separation groove 35 can be formed with high accuracy.

Further, according to the third embodiment, the surface portion of the silicon substrate 30 is oxidized and the oxide layer 31 formed thereby is removed to remove the defect introduced during growth which causes the pattern defect. Then, a silicon oxide film 32 and a silicon nitride film 33 are formed on the silicon substrate 30. After that, the silicon oxide film 32 and the silicon nitride film 3
3 is dry-etched using the resist pattern 34 to form a mask pattern used for dry-etching the silicon substrate 30. That is, before the dry etching of the silicon oxide film 32 and the silicon nitride film 33 to be the mask pattern, the defects introduced during growth in the silicon substrate 30 which cause the pattern defects can be removed. Therefore, in each of the dry etching conditions of the silicon oxide film 32 and the silicon nitride film 33 and the dry etching condition of the silicon substrate 30, it is not necessary to consider the constraint for reducing the conical pattern defects. Further, the silicon oxide film 32 and the silicon nitride film 33 are not damaged by the removal process of the defects introduced during growth.

In the third embodiment, the thickness of the oxide layer 31 formed to remove the defects introduced during the growth is 5
It is preferably about 0 nm or more. By doing so, it is possible to reliably incorporate the defects introduced during growth that cause pattern defects into the oxide layer 31.

In the third embodiment, the silicon nitride film 33 (accurately, a laminated film of the silicon nitride film 33 and the silicon oxide film 32) is used as a mask during the dry etching of the silicon substrate 30. However, a single layer film of a silicon nitride film, a silicon oxide film or a silicon nitride oxide film may be used, or two of a silicon nitride film, a silicon oxide film and a silicon nitride oxide film may be used.
You may use the laminated film of one or more insulating films.

In addition, in the third embodiment, the oxide layer 3
In order to remove 1, the oxide layer 31 was dry-etched by using a plasma containing a gas containing CF ₄ , but instead, a plasma containing another gas containing carbon and fluorine was used. Dry etching may be performed on the oxide layer 31. Alternatively, a solution containing hydrofluoric acid or a solution containing hydrofluoric acid and nitric acid is used to form the oxide layer 3
Wet etching may be performed on 1. When wet etching is performed on the oxide layer 31 using a solution containing hydrofluoric acid and nitric acid, the surface portion of the silicon substrate 30 (non-oxidized portion) below the oxide layer 31 can also be removed. The time introduction defect can be removed more reliably.

In the third embodiment, the case where the STI isolation trench 35 is formed in the silicon substrate 30 by dry etching is targeted, but instead of this,
Similar effects can be obtained even when a recess for forming a capacitor or a deep trench is formed in the silicon substrate 30 by dry etching.

(Modification of Third Embodiment) A method of manufacturing a semiconductor device according to a modification of the third embodiment of the present invention will be described below.

The modification of the third embodiment is different from the third embodiment in the following points. That is, in the third embodiment, the surface portion of the silicon substrate 30 is oxidized, and the oxide layer 31 formed thereby is removed to remove the defects introduced during growth, and then the silicon substrate 3 is removed.
0, an insulating film serving as a dry etching mask of the substrate was formed. On the other hand, in the modification of the third embodiment, the surface portion of the silicon substrate 30 is oxidized, and the upper portion of the isolation groove formation region in the oxide layer 31 formed thereby is removed to grow. The dry etching mask is formed of the remaining oxide layer 31 while removing the introduced defects.

Hereinafter, description will be given with reference to the drawings.

FIGS. 7 (a)-(c) and 8 (a)-
(C) is sectional drawing which shows each process of the manufacturing method of the semiconductor device which concerns on the modification of 3rd Embodiment. In this modification, the same members as those in the third embodiment shown in FIGS. 5A to 5D and 6A to 6C are designated by the same reference numerals and the description thereof will be omitted. To do.

First, as shown in FIG. 7A, a silicon substrate 30 is prepared. At this time, on the surface portion of the silicon substrate 30, octahedral voids 30a that are defects introduced during growth are formed, and silicon oxides 30b are formed at the corners of the octahedral voids 30a. Octahedral void 3
0a and the silicon oxide 30b are generated when the silicon substrate 30 is crystal-grown.

Next, as shown in FIG. 7B, an oxide layer 31 is formed by oxidizing the surface of the silicon substrate 30 by thermal oxidation. At this time, the oxide layer 3 is thermally oxidized so that the defects introduced during growth, that is, the octahedral void 30a and the silicon oxide 30b are taken into the oxide layer 31.
1 is grown to have a thickness of about 50 nm or more (for example, about 75 nm).

Next, as shown in FIG. 7C, the oxide layer 3
1 and the resist pattern corresponding to the desired device isolation pattern.
The turn 34 is formed by photolithography technology.
It Then, oxidation is performed using the resist pattern 34 as a mask.
After dry etching the layer 31, FIG.
As shown in (a), the resist is removed by ashing and washing.
The pattern 34 is peeled off from the silicon substrate 30. this
Of the oxide layer 31 for separation (see FIG. 8B).
The upper part of the formation area of
During dry etching of the silicon substrate 30 (see FIG. 8B)
Introduced during growth, which causes the occurrence of conical pattern defects
Defects can be removed. Also, if the desired element isolation pattern is acid
The patterned oxide layer 31A transferred to the oxidation layer 31
It is formed. In a modification of the third embodiment, oxidation
The dry etching of layer 31 stops the etching exactly.
Ensures a high selection ratio for the silicon substrate 30
To do. Specifically, for example, in a parallel plate type RIE device,
CHF as process gas ₃And O₂The flow rate of it
50 ml / min (standard condition) and 0 ml / min (standard condition) respectively
Set to process pressure and high frequency power (plug
(For tsuma generation) set to 60Pa and 400W respectively
Then, dry etching is performed on the oxide layer 31. This
Of the oxide layer 31 under the dry etching conditions of
The selection ratio with respect to the substrate 30 is about 8. Incidentally, O₂Flow of
The amount may be set to a few ml / min (standard condition).
Yes.

Next, as shown in FIG. 8B, the silicon substrate 30 is patterned using the patterned oxide layer 31A as a mask.
On the other hand, dry etching is performed until the etching depth reaches about 400 nm. At this time, a high selection ratio is required for the oxide layer 31 that is the mask material. Specifically, “(etching rate of silicon substrate 30) /
It is required that "(etching rate of oxide layer 31)" is 15 or more. Therefore, for example, in an inductively coupled plasma etching apparatus, Cl _{2 as a} process gas is used.
And O ₂ flow rates are set to 150 ml / min (standard state) and 4 ml / min (standard state), respectively, and process pressure, source power and bias power are set to 1.3 Pa, respectively.
The silicon substrate 30 is dry-etched for 45 seconds, for example, by setting it to 600 W and 200 W. still,
In the modified example of the third embodiment, immediately before the dry etching of the silicon substrate 30 under these conditions, the natural oxide film (see FIG. 8A) formed on the exposed portion of the silicon substrate 30 (see FIG. 8A) is formed. In order to remove (not shown), in the above-mentioned inductively coupled plasma etching apparatus, the flow rate of Cl ₂ as a process gas is set to 150 ml / min (standard state), and the process pressure, source power and bias power are respectively set. 0.67Pa, 150W and 20
It is set to 0 W and etching is performed for about 5 seconds.

Next, as shown in FIG. 8B, the silicon substrate 3 is cleaned by cleaning to remove deposits formed during the dry etching of the silicon substrate 30.
The separation groove 35 is formed at 0. Then, in order to reduce the surface level of the wall surface of the isolation trench 35, that is, the trench side wall, the silicon substrate 30 on the trench side wall is oxidized by thermal oxidation. After that, a CV is formed on the isolation groove 35 with a silicon oxide film.
After embedding by the D method, the silicon oxide film is planarized by the CMP method, and then the remaining oxide layer 31 (patterned oxide layer 31A) is removed by wet etching. As a result, as shown in FIG. 8C, the element isolation insulating film 36 made of a silicon oxide film is completed.

According to the modification of the third embodiment, after removing the defects introduced during growth included in the surface portion of the silicon substrate 30, the mask pattern (the patterned oxide layer 31) is removed.
The silicon substrate 3 is formed by dry etching using A).
The separation groove 35 is formed in the region where the defects introduced during growth in 0 are removed. That is, before the dry etching of the silicon substrate 30, in order to remove the defect introduced during the growth in the silicon substrate 30 which causes the conical pattern defect, the dry etching condition of the silicon substrate 30 is restricted to reduce the pattern defect. Eliminates the need to consider. Therefore, in the dry etching of the silicon substrate 30, a high selection ratio can be secured for the oxide layer 31 serving as a mask material while suppressing the occurrence of a conical pattern defect, so that the separation groove 35 can be formed with high accuracy.

Further, according to the modification of the third embodiment,
The surface portion of the silicon substrate 30 is oxidized, and the upper portion of the oxide layer 31 thus formed above the region where the isolation trench 35 is formed is removed to remove the defect introduced during growth that causes a pattern defect. At this time, the remaining oxide layer 31 (patterned oxide layer 31A) is used as a mask pattern during dry etching of the silicon substrate 30. Therefore, the oxide layer 31 and the silicon substrate 30
It becomes unnecessary to consider the constraint for reducing the conical pattern defect under each of the dry etching conditions. Further, since the oxide layer 31 formed at the time of removing defects introduced during growth is used as a mask material for dry etching of the silicon substrate 30, the process can be simplified.

In the modification of the third embodiment, it is preferable that the thickness of the oxide layer 31 formed to remove the defects introduced during growth is about 50 nm or more. By doing so, it is possible to reliably incorporate the defects introduced during growth that cause pattern defects into the oxide layer 31.

In the modification of the third embodiment,
Although the case where the STI isolation groove 35 is formed in the silicon substrate 30 by dry etching is targeted, in place of this, when a recess such as a capacitor forming groove or a deep trench is formed in the silicon substrate 30 by dry etching. Similar effects can be obtained by targeting.

[0100]

According to the present invention, before the dry etching of the silicon substrate, the defects introduced during the growth that cause the pattern defects can be removed. Therefore, the dry etching of the silicon substrate can be performed without considering the restriction for reducing the pattern defects. Can be done. Therefore, in dry etching of the silicon substrate, it is possible to secure a high selection ratio for the insulating film serving as a mask material while suppressing the generation of pattern defects, and thereby the silicon substrate can be processed with high accuracy.

[Brief description of drawings]

1A to 1D are cross-sectional views showing each step of a method for manufacturing a semiconductor device according to a first embodiment of the present invention.

FIG. 2 shows a selection ratio of a silicon oxide film to a silicon substrate in a dry etching process of a silicon nitride film and a silicon oxide film shown in FIG. 1B of a method for manufacturing a semiconductor device according to a first embodiment of the present invention, It is a figure which shows the result of having investigated the dependence of the number of conical pattern defects.

FIG. 3 is a diagram showing the results of examining the dependency of the number of conical pattern defects on the shaving amount of the silicon substrate in the dry etching process of the silicon nitride film and the silicon oxide film shown in FIG. 1B.

FIGS. 4A to 4E are cross-sectional views showing each step of the method for manufacturing a semiconductor device according to the second embodiment of the present invention.

5A to 5D are cross-sectional views showing respective steps of a method for manufacturing a semiconductor device according to a third embodiment of the present invention.

6A to 6C are cross-sectional views showing each step of the method for manufacturing a semiconductor device according to the third embodiment of the present invention.

7A to 7C are cross-sectional views showing respective steps of a method for manufacturing a semiconductor device according to a modification of the third embodiment of the present invention.

FIGS. 8A to 8C are cross-sectional views showing respective steps of a method for manufacturing a semiconductor device according to a modification of the third embodiment of the present invention.

9A to 9D are cross-sectional views showing each step of a conventional method for manufacturing a semiconductor device.

FIG. 10 is a diagram showing a state in which a conical pattern defect has occurred in the conventional method of manufacturing a semiconductor device.

11 (a) and (b) are clarified by the inventor of the present application,
It is a schematic diagram which shows the generation mechanism of a conical pattern defect.

[Explanation of symbols]

10 Silicon substrate 11 Silicon oxide film 11A patterned silicon oxide film 12 Silicon nitride film 12A patterned silicon nitride film 13 Resist pattern 14 Separation groove 15 Element isolation insulating film 20 Silicon substrate 21 Silicon oxide film 21A patterned silicon oxide film 22 Silicon nitride film 22A patterned silicon nitride film 23 Resist pattern 24 Separation groove 25 Element isolation insulating film 30 Silicon substrate 30a octahedron void 30b Silicon oxide 31 Oxidized layer 31A patterned oxide layer 32 Silicon oxide film 32A patterned silicon oxide film 33 Silicon nitride film 33A patterned silicon nitride film 34 resist pattern 35 Separation groove 36 Element isolation insulating film 80 Silicon substrate 80a octahedron void 80b Silicon oxide 81 Silicon oxide film 81A patterned silicon oxide film 82 Silicon nitride film 82A patterned silicon nitride film 83 resist pattern 84 separation groove 85 Element isolation insulating film 86 Conical pattern defect

Claims (16)

[Claims] 1. A step of removing a growth-introduced defect contained in a surface portion of a silicon substrate, and a recess is formed in a region of the silicon substrate where the growth-introduced defect is removed by dry etching using a mask pattern. A method of manufacturing a semiconductor device, comprising: 2. An insulating film is formed on the silicon substrate prior to the step of removing the defects introduced during growth, and then dry etching is performed on the insulating film using a resist pattern. A step of patterning an insulating film to form the mask pattern, wherein the step of removing the growth-introduced defects is performed by performing dry etching on the silicon substrate using the resist pattern. The method of manufacturing a semiconductor device according to claim 1, further comprising a step of digging a surface portion of a region where the recess is formed to remove the defect introduced during growth. 3. The ratio of the etching rate of the silicon oxide film to the etching rate of the silicon substrate in the step of removing the defects introduced during growth is 0.5 or more and 5.0 or less. Item 3. A method for manufacturing a semiconductor device according to item 2. 4. The depth at which the silicon substrate is dug in the step of removing the defects introduced during growth is 25 n.
3. The method for manufacturing a semiconductor device according to claim 2, wherein the number is m or more. 5. The insulating film is at least one of a silicon oxide film, a silicon nitride film, and a silicon nitride oxide film.
The method of manufacturing a semiconductor device according to claim 2, wherein the method comprises: 6. The method comprises the step of forming the mask pattern made of at least one of a silicon nitride film and a silicon oxynitride film before the step of removing the defect introduced during growth. In the step of removing, the dry-etching is performed on the silicon substrate using the mask pattern, so that the surface portion of the region where the recess is formed in the silicon substrate is dug down to remove the defect introduced during growth. In the step of removing the defect introduced during growth, the ratio of the etching rate of the silicon oxide film to the etching rate of the silicon substrate is 0.5 or more and 5.0 or less. Insulating film serving as the mask pattern against the etching rate of the silicon substrate in the removing step The method of manufacturing a semiconductor device according to claim 1 ratio of the etch rate, characterized in that 10 or more. 7. The step of removing the defects introduced during growth includes:
7. The method of manufacturing a semiconductor device according to claim 6, further comprising the step of performing dry etching on the silicon substrate using plasma of C ₄ F ₈ gas or C ₅ F ₈ gas. 8. The depth at which the silicon substrate is dug in the step of removing the defects introduced during growth is 25 n.
7. The method for manufacturing a semiconductor device according to claim 6, wherein the number is m or more. 9. The step of removing the defects introduced during growth includes:
The step of oxidizing the surface portion of the silicon substrate and removing the oxide layer formed thereby to remove the defect introduced during growth; the step of removing the defect introduced during growth and the recess And a step of forming an insulating film on the silicon substrate and performing dry etching on the insulating film using a resist pattern to form the mask pattern by patterning the insulating film. The method for manufacturing a semiconductor device according to claim 1, further comprising: 10. The method of manufacturing a semiconductor device according to claim 9, wherein the oxide layer has a thickness of 50 nm or more. 11. The method of manufacturing a semiconductor device according to claim 9, wherein the insulating film is made of at least one of a silicon oxide film, a silicon nitride film, and a silicon nitride oxide film. 12. The step of removing the defects introduced during growth includes the step of performing dry etching on the oxide layer by using a plasma containing a gas containing carbon and fluorine. A method for manufacturing a semiconductor device as described above. 13. The semiconductor device according to claim 9, wherein the step of removing the defects introduced during growth includes the step of performing wet etching on the oxide layer using a solution containing hydrofluoric acid. Manufacturing method. 14. The method according to claim 9, wherein the step of removing the defects introduced during growth includes the step of performing wet etching on the oxide layer using a solution containing hydrofluoric acid and nitric acid. Manufacturing method of semiconductor device. 15. The step of removing the growth-introduced defects is performed by oxidizing a surface portion of the silicon substrate and removing an upper portion of a region where the recess is formed in an oxide layer formed thereby. 2. The method according to claim 1, further comprising the step of removing the defects introduced during growth and forming the mask pattern formed of the remaining oxide layer.
A method of manufacturing a semiconductor device according to item 1. 16. The method of manufacturing a semiconductor device according to claim 15, wherein the oxide layer has a thickness of 50 nm or more.