JP2003223231A - Constant-voltage power source circuit - Google Patents

Constant-voltage power source circuit

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Publication number
JP2003223231A
JP2003223231A JP2002019885A JP2002019885A JP2003223231A JP 2003223231 A JP2003223231 A JP 2003223231A JP 2002019885 A JP2002019885 A JP 2002019885A JP 2002019885 A JP2002019885 A JP 2002019885A JP 2003223231 A JP2003223231 A JP 2003223231A
Authority
JP
Japan
Prior art keywords
power supply
voltage power
constant voltage
transistor
supply circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
JP2002019885A
Other languages
Japanese (ja)
Inventor
Teruo Fukao
照夫 深尾
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Wiring Systems Ltd
Original Assignee
Sumitomo Wiring Systems Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Wiring Systems Ltd filed Critical Sumitomo Wiring Systems Ltd
Priority to JP2002019885A priority Critical patent/JP2003223231A/en
Publication of JP2003223231A publication Critical patent/JP2003223231A/en
Abandoned legal-status Critical Current

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  • Continuous-Control Power Sources That Use Transistors (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a constant-voltage power source circuit capable of using an SMD transistor, even when a lead type transistor with a large loss is required. <P>SOLUTION: In the constant-voltage power source circuit 1 provided with first and second branch paths 3a and 3b provided to a power supply path 3 between a power source B and a load in parallel to each other for temporarily branching a load current from the power source B, first and second constant- voltage power source circuits 5a and 5b provided respectively to the first and second branch paths 3a and 3b for providing transistors Tr1 and Tr2 to the branching paths 3a and 3b, and a resistance R3 provided at the post stage of the first constant-voltage power source circuit 5a on the first branching path 3a, an output voltage V<SB>o</SB>1 of the first constant-voltage power source circuit 5a is set higher than an output voltage V<SB>o</SB>2 of the second constant-voltage power source circuit 5b. <P>COPYRIGHT: (C)2003,JPO

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、給電路にトランジ
スタを介装させた定電圧電源回路に関し、特にそのトラ
ンジスタ1個当たりの負荷電流による損失(発熱)を低
減する技術に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a constant voltage power supply circuit having a transistor interposed in a power supply path, and more particularly to a technique for reducing loss (heat generation) due to a load current per transistor.

【0002】[0002]

【従来の技術】この種の定電圧電源回路は、車載機器の
分野では、例えば10〜16[V]の電源電圧から回路用
の定電圧(例えば9[V])を得るための手段として用い
られている。
2. Description of the Related Art In the field of in-vehicle equipment, a constant voltage power supply circuit of this type is used as a means for obtaining a constant voltage (for example, 9 [V]) for a circuit from a power supply voltage of 10 to 16 [V]. Has been.

【0003】従来の定電圧電源回路100は、例えば図
2に示す如く、コレクタ・エミッタ間が電源Bと負荷と
の間の給電路103に介装されたトランジスタTrと、
トランジスタTrのコレクタ・ベース間に接続された抵
抗Rと、抵抗RとトランジスタTrのベースとの中間点
と接地点との間に逆方向接続されたツェナダイオードD
Zとを備えて構成される。
A conventional constant voltage power supply circuit 100 includes, for example, as shown in FIG. 2, a transistor Tr provided between a collector and an emitter in a power supply path 103 between a power supply B and a load.
A resistor R connected between the collector and the base of the transistor Tr, and a Zener diode D connected in the reverse direction between the ground point and the intermediate point between the resistor R and the base of the transistor Tr.
And Z.

【0004】尚、図中、VBは電源電圧、VD及びVZ
ツェナダイオードDZの両端の電圧及びツェナ電圧、V0
(=VD−VBE)及びI0は回路100の出力電圧及び出
力電流、VBE及びVCE(=VB−V0)はトランジスタT
rのベース・エミッタ間電圧及びコレクタ・エミッタ間
電圧を示す。
In the figure, V B is the power supply voltage, V D and V Z are the voltage across the zener diode D Z and the zener voltage, and V 0
(= V D -V BE) and I 0 is the output voltage and output current of the circuit 100, V BE and V CE (= V B -V 0 ) , the transistor T
The base-emitter voltage and the collector-emitter voltage of r are shown.

【0005】この回路100では、抵抗Rの両端及びツ
ェナダイオードDZの両端に電源電圧VBがVB−VZ
Zの電圧比で掛かり(即ちVD=VZ)、ツェナダイオ
ードDZの両端の電圧VDがトランジスタTrのベース・
エミッタ間を介してエミッタから出力されることで、V
0=VZ−VBEの一定の出力電圧V0が負荷に出力され
る。また、電源Bから抵抗Rを介してトランジスタTr
のベースにベース電流が入力されることで、電源Bから
トランジスタTrのコレクタ・エミッタ間を介して負荷
に出力電流I0が出力可能となる。
In this circuit 100, the power supply voltage V B is applied across the resistor R and the zener diode D Z at a voltage ratio of V B -V Z to V Z (that is, V D = V Z ), and the zener diode D The voltage V D across Z is the base of the transistor Tr.
By being output from the emitter via between the emitters, V
A constant output voltage V 0 of 0 = V Z −V BE is output to the load. In addition, the transistor Tr from the power source B via the resistor R
By inputting the base current to the base of, the output current I 0 can be output from the power supply B to the load via the collector and the emitter of the transistor Tr.

【0006】この出力電流I0(即ち負荷に流れる電
流)の大きさは、負荷自身の抵抗と出力電圧V0(即ち
負荷に掛かる電圧)とからオームの法則により決まる。
例えばV0=9[V]で負荷がバルブやインバータ等の場
合、I0は、例えばI0=0.2[A]程度になる。この場
合、VB=10〜16[V]の範囲ではトランジスタTr
の損失Pは最大でP=I0・VCE=1.4[W]となる。
The magnitude of the output current I 0 (that is, the current flowing through the load) is determined by Ohm's law from the resistance of the load itself and the output voltage V 0 (that is, the voltage applied to the load).
For example, when V 0 = 9 [V] and the load is a valve, an inverter, or the like, I 0 is, for example, about I 0 = 0.2 [A]. In this case, in the range of V B = 10 to 16 [V], the transistor Tr
The maximum loss P is P = I 0 · V CE = 1.4 [W].

【0007】[0007]

【発明が解決しようとする課題】近年、車載機器の分野
では、電子部品のSMD(Surface Mounted Devices)
化に伴い、その他部品と同様に、定電圧電源回路100
で使用されるトランジスタTr及びツェナダイオードD
ZもSMD化することが検討されている。
In recent years, in the field of in-vehicle equipment, SMD (Surface Mounted Devices) of electronic parts has been developed.
The constant voltage power supply circuit 100, as well as other components,
Transistor Tr and Zener diode D used in
It is also considered to make Z into SMD.

【0008】通常、SMD化されたトランジスタの許容
損失は例えば1[W]以下と小さい。その為、上記の様
に、トランジスタTrの損失Pが1[W]を越える使用環
境では、トランジスタTrをSMD化した場合トランジ
スタTrの許容損失が不足する為、許容損失の大きいリ
ードタイプのものを使用せざるを得ず、トランジスタT
rのSMD化が困難という問題がある。
Normally, the allowable loss of the SMD transistor is as small as 1 [W] or less. Therefore, as described above, in a usage environment in which the loss P of the transistor Tr exceeds 1 [W], the allowable loss of the transistor Tr becomes insufficient when the transistor Tr is made into an SMD. There is no choice but to use the transistor T
There is a problem that it is difficult to convert r into SMD.

【0009】そこで、この発明の課題は、損失が大きく
リードタイプのトランジスタが必要なときでも、SMD
化したトランジスタが使用できる定電圧電源回路を提供
することにある。
Therefore, an object of the present invention is to provide an SMD even when a lead-type transistor with a large loss is required.
The purpose of the present invention is to provide a constant voltage power supply circuit that can use a transistor that has been made into a computer.

【0010】[0010]

【課題を解決するための手段】上記課題を解決するため
には、電源から負荷に至る給電路上に互いに並列に介装
され、電源からの負荷電流を一時的に分流する第1及び
第2の分流路と、各々前記第1,第2の分流路に設けら
れ、その分流路にトランジスタを介装させた第1,第2
の定電圧電源回路と、を備えるものである。
In order to solve the above-mentioned problems, first and second devices which are interposed in parallel with each other on a power feeding path from a power source to a load and temporarily divide a load current from the power source are provided. A shunt channel and first and second shunt channels respectively provided in the first and second shunt channels and having a transistor interposed in the shunt channel.
And a constant voltage power supply circuit.

【0011】請求項2に記載の発明は、更に、前記第1
の分流路上の前記第1の定電圧電源回路の後段に抵抗が
設けられ、前記第1の定電圧電源回路の出力電圧が前記
第2の定電圧電源回路の出力電圧よりも高く設定される
ものである。
The invention according to claim 2 is further the above-mentioned first
A resistor is provided at a stage subsequent to the first constant voltage power supply circuit on the shunt flow path, and the output voltage of the first constant voltage power supply circuit is set higher than the output voltage of the second constant voltage power supply circuit. Is.

【0012】請求項3に記載の発明は、第1,第2の定
電圧電源回路は各々、その主電極間が前記第1,第2の
分流路に介装された前記トランジスタと、前記トランジ
スタの上流側主電極・制御電極間に接続された抵抗と、
前記抵抗と前記トランジスタの制御電極との中間点と接
地点との間に逆方向接続されたツェナダイオードとを備
えるものである。
According to a third aspect of the present invention, in the first and second constant voltage power supply circuits, the transistor in which the main electrodes are interposed between the first and second branch channels, and the transistor, respectively. A resistor connected between the upstream main electrode and the control electrode of
A zener diode reversely connected is provided between an intermediate point between the resistor and the control electrode of the transistor and a ground point.

【0013】[0013]

【発明の実施の形態】図1は、本発明の実施の形態に係
る定電圧電源回路の構成図である。
1 is a block diagram of a constant voltage power supply circuit according to an embodiment of the present invention.

【0014】この実施の形態に係る定電圧電源回路1
は、図1に示す如く、電源Bから負荷に至る給電路3上
に並列に介装され、電源Bからの負荷電流を一時的に分
流する第1及び第2の分流路3a,3bと、各々第1,
第2の分流路3a,3bに設けられ、その分流路3a,
3bにトランジスタTr1,Tr2を介装させた第1,
第2の定電圧電源回路5a,5bと、第1の分流路3a
上の第1の定電圧電源回路5aの後段に設けられた抵抗
R3とを備えて構成される。
Constant voltage power supply circuit 1 according to this embodiment
As shown in FIG. 1, the first and second branch flow paths 3a and 3b are provided in parallel on the power supply path 3 from the power source B to the load, and temporarily divide the load current from the power source B, Each 1st
The second branch channels 3a and 3b are provided with the branch channels 3a and 3b.
3b in which transistors Tr1 and Tr2 are interposed
Second constant voltage power supply circuits 5a and 5b, and first branch flow path 3a
And a resistor R3 provided in the subsequent stage of the first constant voltage power supply circuit 5a.

【0015】この回路1では、その出力電流I0(即ち
負荷電流)は、第1及び第2の定電圧電源回路5a,5
bの各出力電流I01,I02の和(即ちI0=I01+I
02)となり、その出力電圧V0は、第2の定電圧電源回
路5bの出力電圧V02と等しくなる(即ちV0=V
02)。
In this circuit 1, the output current I 0 (that is, load current) of the circuit 1 is the first and second constant voltage power supply circuits 5a and 5a.
sum of output currents I 0 1 and I 0 2 of b (that is, I 0 = I 0 1 + I
0 2), and its output voltage V 0 becomes equal to the output voltage V 0 2 of the second constant voltage power supply circuit 5b (that is, V 0 = V
0 2).

【0016】第1及び第2の定電圧電源回路5a,5b
は、例えば従来回路100と同じ回路構成に構成され
る。つまり、第1(第2)の定電圧電源回路5a(5
b)は各々、コレクタ・エミッタ間が第1(第2)の分
流路3a(3b)に介装されたトランジスタTr1(T
r2)と、トランジスタTr1(Tr2)のコレクタ・
ベース間に接続された抵抗R1(R2)と、抵抗R1
(R2)とトランジスタTr1(Tr2)のベースとの
中間点と接地点との間に逆方向接続されたツェナダイオ
ードDZ1(DZ2)とを備えて構成される。
First and second constant voltage power supply circuits 5a and 5b
Are configured in the same circuit configuration as the conventional circuit 100, for example. That is, the first (second) constant voltage power supply circuit 5a (5
b) shows a transistor Tr1 (T1) in which the collector-emitter is interposed in the first (second) shunt channel 3a (3b).
r2) and the collector of the transistor Tr1 (Tr2)
A resistor R1 (R2) connected between the bases and a resistor R1
(R2) and the base of the transistor Tr1 (Tr2) and a Zener diode D Z 1 (D Z 2) connected in the reverse direction between the ground point and the ground point.

【0017】但し、第1の定電圧電源回路5aの出力電
圧V01は、第2の定電圧電源回路5bの出力電圧V0
よりも高く設定される。即ち、ツェナダイオードDZ
のツェナ電圧VZ1は、ツェナダイオードDZ2のツェナ
電圧VZ2よりも高く設定される。
[0017] However, the output voltage V 0 1 of the first constant-voltage power supply circuit 5a, the output voltage V 0 2 of the second voltage regulator 5b
Set higher than. That is, Zener diode D Z 1
Zener voltage V Z 1 is set higher than Zener voltage V Z 2 of Zener diode D Z 2.

【0018】これにより、抵抗R3の両端にはV01−
02の電圧が順方向(下流に向けて電圧降下する方
向)に掛かる為、オームの法則により、抵抗R3には固
定的にI 01=(V01−V02)/R3の電流が下流に
向けて流れる。これにより、第1の分流路3aには、電
源Bからの負荷電流(即ち出力電流I0)のうちのI0
=(V01−V02)/R3の電流がI0の変動に対して
固定的に分流され、第2の分流路3bには、残りのI0
2=I0−I01の電流がI0の変動に応じて変動的に分
流される。
As a result, V is applied across the resistor R3.01-
V0The voltage of 2 is the forward direction (the one where the voltage drops toward the downstream)
Therefore, according to Ohm's law, resistance R3 is fixed.
Definitely I 01 = (V01-V02) / R3 current goes downstream
It flows toward. As a result, in the first branch flow path 3a, there is no electric current.
Load current from source B (ie output current I0) Out of01
= (V01-V02) / R3 current is I0Against the fluctuation of
The flow is fixedly divided, and the remaining I0
2 = I0-I0The current of 1 is I0Variably according to
Shed

【0019】ここで、I01とI02との分流比は、例え
ば、VBの値がVBの変動の上限値の時に、各トランジス
タTr1,Tr2の損失P1(=I01・VCE1),P
2(=I02・VCE2)が、それらの間で均等に分散す
る様(即ちP1=P2)に設定されることが望ましい。
この様に設定すれば、各トランジスタTr1,Tr2の
損失P1,P2を共にVBの変動に対して余裕をもって
許容損失以下に制限できる。
[0019] Here, the shunt ratio between I 0 1 and I 0 2, for example, when the value of V B is the upper limit value of the variation of V B, the loss of transistors Tr1, Tr2 P1 (= I 0 1 · V CE 1), P
2 (= I 0 2 · V CE 2) is preferably set so as to be evenly distributed among them (that is, P1 = P2).
With this setting, both the losses P1 and P2 of the transistors Tr1 and Tr2 can be limited to the allowable loss or less with a margin for the fluctuation of V B.

【0020】尚、図1では、VB=10〜16[V],V0
2(=V0)=9[V](即ちVZ2=9.7[V]),I0
=0.2[A]の場合に、大凡I01=I02=0.1[A]
となる様に、例えばV01=10[V](即ちVZ1=1
0.7[V]),R3=10Ωに設定されている。この数
値設定では、VB=16[V](上限値)の時で、各トラ
ンジスタTr1,Tr2の損失P1,P2は、P1=
0.6[W],P2=0.7[W]となり大凡均等に分散さ
れ、共に余裕をもって1[W]以下(許容損失以下)に保
たれる。
In FIG. 1, V B = 10 to 16 [V], V 0
2 (= V 0 ) = 9 [V] (that is, V Z 2 = 9.7 [V]), I 0
= 0.2 [A], I 0 1 = I 0 2 = 0.1 [A]
So that, for example, V 0 1 = 10 [V] (that is, V Z 1 = 1
0.7 [V]) and R3 = 10Ω. With this numerical setting, when V B = 16 [V] (upper limit value), the losses P1 and P2 of the transistors Tr1 and Tr2 are P1 =
0.6 [W], P2 = 0.7 [W], and the particles are distributed approximately evenly, and both are kept at 1 [W] or less (allowable loss or less) with a margin.

【0021】次に、図1の数値設定(VB=10〜16
[V],VZ1=10.7[V],VZ2=9.7[V],VCE
1=0.7[V],VCE2=0.7[V],R3=10Ω,
0=0.2[A])に基づき定電圧電源回路1の動作を
説明する。以下の説明では、便宜上、ベース電流による
抵抗R1,R2での電圧降下は無視する。
Next, the numerical value setting of FIG. 1 (V B = 10 to 16)
[V], V Z 1 = 10.7 [V], V Z 2 = 9.7 [V], V CE
1 = 0.7 [V], V CE 2 = 0.7 [V], R3 = 10Ω,
The operation of the constant voltage power supply circuit 1 will be described based on I 0 = 0.2 [A]). In the following description, for convenience, the voltage drop across the resistors R1 and R2 due to the base current is ignored.

【0022】10.7[V]≦VB≦16[V]の範囲で
は、各ツェナダイオードDZ1,DZ2の両端の電圧VD
1,VD2は共にツェナ電圧VZ1,VZ2となる為、第
1及び第2の定電圧電源回路5a,5bからは各々V0
1(=VZ1−VBC1)=10[V],V02(=VZ2−
BC2)=9[V]の出力電圧が出力される。
In the range of 10.7 [V] ≦ V B ≦ 16 [V], the voltage V D across the Zener diodes D Z 1 and D Z 2 is
Since both 1 and V D 2 become the zener voltages V Z 1 and V Z 2, respectively, V 0 from the first and second constant voltage power supply circuits 5a and 5b, respectively.
1 (= V Z 1-V BC 1) = 10 [V], V 0 2 (= V Z 2−
An output voltage of V BC 2) = 9 [V] is output.

【0023】これにより、定電圧電源回路1からはV0
(=V02)=9[V]の出力電圧が負荷に出力される。
また、抵抗R3にはVR(=V01−V02)=1[V]の
定電圧が掛かり、オームの法則により、抵抗R3(即ち
第1の分流路3a)に流れる電流I01がI01(=VR
/R3)=0.1[A]に固定される。これにより、電源
Bからの負荷電流(従来回路100と同様0.2[A]と
する)のうち、第1の分流路3aに、I01=0.1
[A]の電流が分流されてトランジスタTr1及び抵抗R
3を介して出力され、第2の分流路3bに、その残りの
02(=I0−I01)=0.1[A]の電流が分流され
てトランジスタTr2から出力され、各々合流して、I
0(=I01+I02)=0.2[A]の出力電流が負荷に
出力される。
As a result, the constant voltage power supply circuit 1 outputs V 0
An output voltage of (= V 02 ) = 9 [V] is output to the load.
Further, a constant voltage of V R (= V 0 1-V 0 2) = 1 [V] is applied to the resistor R3, and according to Ohm's law, a current I 0 that flows in the resistor R3 (that is, the first branch flow path 3a). 1 is I 0 1 (= V R
/R3)=0.1 [A] is fixed. As a result, of the load current from the power supply B (0.2 [A] as in the conventional circuit 100), I 0 1 = 0.1 in the first branch flow path 3a.
The current of [A] is shunted and the transistor Tr1 and the resistor R
3, the remaining current I 0 2 (= I 0 −I 0 1) = 0.1 [A] is shunted to the second branch flow path 3b and output from the transistor Tr2. Join me, I
An output current of 0 (= I 0 1 + I 0 2) = 0.2 [A] is output to the load.

【0024】このVBの範囲では、各トランジスタTr
1,Tr2には各々、I01=I02=0.1[A]の定電
流が流れ、VCE1=VB−10[V],VCE2=VB−9
[V]のVBに応じて変動するベース・エミッタ間電圧が
掛かる。従って、各トランジスタTr1,Tr2には各
々、P1=0.1×(VB−10)[W],P2=0.1
×(VB−9)[W]のVBの増減に応じて増減する損失が
発生するが、このVBの範囲では、P1≦0.6[W],
P2≦0.7[W]となり共に1[W]以下(許容損失以
下)に制限される。
In this V B range, each transistor Tr
A constant current of I 0 1 = I 0 2 = 0.1 [A] flows through 1 and Tr 2, respectively, and V CE 1 = V B −10 [V], V CE 2 = V B −9
A base-emitter voltage that varies depending on V B of [V] is applied. Therefore, in each of the transistors Tr1 and Tr2, P1 = 0.1 × (V B −10) [W] and P2 = 0.1, respectively.
A loss that increases / decreases in accordance with the increase / decrease in V B of × (V B −9) [W] occurs, but in the range of V B , P1 ≦ 0.6 [W],
P2 ≦ 0.7 [W] and both are limited to 1 [W] or less (tolerable loss or less).

【0025】10[V]≦VB<10.7[V]の範囲で
は、ツェナダイオードDZ2の両端の電圧VD2はツェナ
電圧VZ2となるが、ツェナダイオードDZ1の両端の電
圧VD1はツェナ電圧VZ1未満となり電源電圧VBとな
る。その為、第1及び第2の定電圧電源回路5a,5b
からは各々V01=VB−0.7[V],V02=9[V]の
出力電圧が出力される。
In the range of 10 [V] ≦ V B <10.7 [V], the voltage V D 2 across the Zener diode D Z 2 becomes the Zener voltage V Z 2, but the voltage across the Zener diode D Z 1 is across. voltage V D 1 of the supply voltage V B becomes a Zener voltage V Z less than 1. Therefore, the first and second constant voltage power supply circuits 5a and 5b
Output voltage of V 0 1 = V B −0.7 [V] and V 0 2 = 9 [V], respectively.

【0026】これにより、このVBの範囲でも、定電圧
電源回路1からはV0=9[V]の出力電圧が負荷に出力
される。しかし、このVBの範囲では、抵抗R3の両端
の電圧VRはVR=VB−9.7[V]となる為、オームの
法則により、抵抗R3に流れる電流I01はI01(=V
R/R3)=0.1×VB−0.97[A]のVBに応じて
変動する電流に固定される。これにより、電源Bからの
負荷電流(0.2[A])のうち、第1の分流路3aに、
01=0.1×VB−0.97[A]のVBに応じて変動
する電流が固定的に分流されてトランジスタTr1及び
抵抗R3を介して出力され、第2の分流路3bに、その
残りのI02=1.17−0.1×VB[A]の電流が分流
されてトランジスタTr2から出力され、各々合流し
て、I0=0.2[A]の出力電流として負荷に出力され
る。
As a result, even in this V B range, the constant voltage power supply circuit 1 outputs an output voltage of V 0 = 9 [V] to the load. However, in this range of V B , the voltage V R across the resistor R3 is V R = V B −9.7 [V]. Therefore, according to Ohm's law, the current I 0 1 flowing through the resistor R 3 is I 0. 1 (= V
R / R3) = 0.1 × V B −0.97 [A], which is fixed to a current that fluctuates according to V B. As a result, of the load current (0.2 [A]) from the power source B, to the first branch flow path 3a,
The current that fluctuates according to V B of I 0 1 = 0.1 × V B −0.97 [A] is fixedly shunted and output via the transistor Tr1 and the resistor R3. The remaining current of I 0 2 = 1.17−0.1 × V B [A] is shunted and output from the transistor Tr2. The respective currents are merged to output I 0 = 0.2 [A]. It is output to the load as a current.

【0027】このVBの範囲では、各トランジスタTr
1,Tr2には各々、I01=0.1×VB−0.97
[A],I02=1.17−0.1×VB[A]のVBの増減
に応じて増減,減増する電流が流れ、VCE1=0.7
[V],VCE2=VB−9[V]のVBの増減に応じて一定,
増減するベース・エミッタ間電圧が掛かる。従って、各
トランジスタTr1,Tr2には各々、P1=(0.1
×VB−0.97)×0.7[W],P2=(1.17−
0.1×VB)×(VB−9)[W]のVBに応じて増減す
る損失が発生するが、このVBの範囲でも、P1<0.
6[W],P2<0.7[W]となり共に1[W]以下(許容
損失以下)に制限される。
In this range of V B , each transistor Tr
1, Tr2 respectively to, I 0 1 = 0.1 × V B -0.97
[A], I 0 2 = 1.17-0.1 × V B [A] increases / decreases in accordance with the increase / decrease in V B , and V CE 1 = 0.7.
[V], V CE 2 = V B −9 [V] constant according to increase or decrease of V B ,
A base-emitter voltage that increases or decreases is applied. Therefore, P1 = (0.1
× V B −0.97) × 0.7 [W], P2 = (1.17−
0.1 × V B) × (V B -9) but losses increase or decrease occurs in response to V B of [W], in the scope of this V B, P1 <0.
Since 6 [W] and P2 <0.7 [W], both are limited to 1 [W] or less (allowable loss or less).

【0028】因みに、9.7[V]≦VB<10[V]の範
囲も、10[V]≦VB<10.7[V]の範囲と同じ結論
となる。
Incidentally, the range of 9.7 [V] ≦ V B <10 [V] has the same conclusion as the range of 10 [V] ≦ V B <10.7 [V].

【0029】更に因みに、VB<9.7[V]の範囲で
は、各ツェナダイオードDZ1,DZ2の両端の電圧VD
1,VD2は共にツェナ電圧VZ1,VZ2未満となり、
共に電源電圧VBとなる。その為、第1及び第2の定電
圧電源回路5a,5bからは各々V01=V02=VB
0.7[V]の出力電圧が出力される。
Further, in the range of V B <9.7 [V], the voltage V D across the Zener diodes D Z 1 and D Z 2 is
1 and V D 2 are both less than zener voltages V Z 1 and V Z 2,
Both become the power supply voltage V B. Therefore, V 0 1 = V 0 2 = V B − from each of the first and second constant voltage power supply circuits 5a and 5b.
An output voltage of 0.7 [V] is output.

【0030】これにより、このVBの範囲では、定電圧
電源回路1からはV0=VB−0.7[V]の出力電圧が負
荷に出力される。これにより、出力電圧V0が9[V]未
満となる為、負荷に流れる電流I0は0.2[A]未満と
なる(I0<0.2[A])。また、抵抗R3の両端の電
圧VRはVR=0となる為、オームの法則により抵抗R3
には電流が流れない(即ちI01=0)。これにより、
電源Bからの負荷電流(<0.2[A])の全てが第2の
分流路3bに流れてトランジスタTr2から出力され、
0=I02<0.2[A]の出力電流が負荷に出力され
る。
As a result, in this V B range, the constant voltage power supply circuit 1 outputs an output voltage of V 0 = V B -0.7 [V] to the load. As a result, the output voltage V 0 becomes less than 9 [V], and the current I 0 flowing through the load becomes less than 0.2 [A] (I 0 <0.2 [A]). Since the voltage V R across the resistor R3 is V R = 0, according to Ohm's law, the resistor R3 is
Current does not flow through (ie, I 0 1 = 0). This allows
All of the load current (<0.2 [A]) from the power source B flows to the second branch flow path 3b and is output from the transistor Tr2,
An output current of I 0 = I 0 2 <0.2 [A] is output to the load.

【0031】このVBの範囲では、トランジスタTr1
には電流は流れず(I01=0)にトランジスタTr2
に全ての電流I02=I0(<0.2[A])の電流が流れ
るが、トランジスタTr2のベース・エミッタ間電圧V
CE2はVCE2=0.7[V]である為、P2<0.14
[W]となり、このVBの範囲でも、P1<0.6[W],
P2<0.7[W]となり共に1[W]以下(許容損失以
下)に制限される。
In this range of V B , the transistor Tr1
Current does not flow to the transistor Tr2 (I 0 1 = 0).
Current of all current I 0 2 = I 0 (<0.2 [A]) flows, but the base-emitter voltage V of the transistor Tr2 is
CE 2 is V CE 2 = 0.7 [V], so P2 <0.14
[W], and even within this V B range, P1 <0.6 [W],
P2 <0.7 [W] and both are limited to 1 [W] or less (tolerable loss or less).

【0032】尚、以上の説明は、説明の便宜上ベース電
流による抵抗R1,R2での電圧降下を無視したが、そ
の電圧降下を考慮すれば、その分、各VBの範囲は若干
シフトする場合があることは言うまでもないことであ
る。
Although the voltage drop in the resistors R1 and R2 due to the base current is neglected in the above description for the sake of convenience of description, when the voltage drop is taken into consideration, the range of each V B is slightly shifted. It goes without saying that there is.

【0033】以上のように構成された定電圧電源回路1
によれば、電源Bから負荷に至る給電路3上に第1及び
第2の分流路3a,3bが互いに並列に介装され、第
1,第2の分流路3a,3bに各々その分流路3a,3
bにトランジスタTr1,Tr2を介装させた第1,第
2の定電圧電源回路5a,5bが設けられて構成される
為、電源Bからの負荷電流が分流されて各トランジスタ
Tr1,Tr2に流され、1個当たりのトランジスタT
r1,Tr2に流れる負荷電流が低減でき、1個当たり
のトランジスタTr1,Tr2の損失(即ち温度上昇)
が低減できる。従って、トランジスタTr1,Tr2を
SMD化しても許容損失が不足することが防止できる。
Constant voltage power supply circuit 1 configured as described above
According to this, the first and second branch channels 3a and 3b are provided in parallel on the power supply path 3 from the power source B to the load, and the branch channels are respectively provided in the first and second branch channels 3a and 3b. 3a, 3
Since the first and second constant voltage power supply circuits 5a and 5b in which the transistors Tr1 and Tr2 are interposed are provided in b, the load current from the power supply B is shunted and flows to the transistors Tr1 and Tr2. And each transistor T
The load current flowing through r1 and Tr2 can be reduced, and the loss of each transistor Tr1 and Tr2 (that is, temperature rise)
Can be reduced. Therefore, it is possible to prevent the allowable loss from being insufficient even if the transistors Tr1 and Tr2 are SMD.

【0034】更に、第1の分流路3a上の第1の定電圧
電源回路5aの後段に抵抗R3が設けられ、第1の定電
圧電源回路5aの出力電圧V01が第2の定電圧電源回
路5bの出力電圧V02よりも高く設定される為、電源
Bからの負荷電流が第1及び第2の分流路3a,3bの
一方に集中して流れることが防止できる。
Further, a resistor R3 is provided at the subsequent stage of the first constant voltage power supply circuit 5a on the first shunt flow path 3a, and the output voltage V 0 1 of the first constant voltage power supply circuit 5a is the second constant voltage. Since it is set higher than the output voltage V 0 2 of the power supply circuit 5b, it is possible to prevent the load current from the power supply B from concentrating and flowing in one of the first and second branch flow paths 3a and 3b.

【0035】更に、第1,第2の定電圧電源回路3a,
3bは各々、トランジスタTr1,Tr2、抵抗R1,
R2及びツェナダイオードDZ1,DZ2により構成され
る為、簡易な回路構成で構成できる。
Further, the first and second constant voltage power supply circuits 3a,
3b are transistors Tr1 and Tr2, resistors R1 and
R2 and Zener diode D Z 1, because it is constituted by a D Z 2, it can be constructed with a simple circuit configuration.

【0036】なお、この実施の形態の数値設定は、一例
でありこの数値設定に限定されるものではない。
The numerical setting of this embodiment is an example, and the present invention is not limited to this numerical setting.

【0037】[0037]

【発明の効果】請求項1に記載の発明によれば、電源か
ら負荷に至る給電路上に第1及び第2の分流路が互いに
並列に介装され、第1,第2の分流路に各々その分流路
にトランジスタを介装させた第1,第2の定電圧電源回
路が設けられて構成される為、電源からの負荷電流が分
流されて各トランジスタに流され、1個当たりのトラン
ジスタに流れる負荷電流が低減でき、1個当たりのトラ
ンジスタの損失(即ち温度上昇)が低減できる。従っ
て、トランジスタTr1,Tr2をSMD化しても許容
損失が不足することが防止できる。
According to the first aspect of the present invention, the first and second branch flow paths are provided in parallel with each other on the power feeding path from the power supply to the load, and the first and second branch flow paths are respectively provided. Since the first and second constant voltage power supply circuits with transistors interposed in the shunt flow path are provided, the load current from the power supply is shunted to each transistor, and each transistor is supplied to each transistor. The flowing load current can be reduced, and the loss per transistor (that is, temperature rise) can be reduced. Therefore, it is possible to prevent the allowable loss from being insufficient even if the transistors Tr1 and Tr2 are SMD.

【0038】請求項2に記載の発明によれば、第1の分
流路上の第1の定電圧電源回路の後段に抵抗が設けら
れ、第1の定電圧電源回路の出力電圧が第2の定電圧電
源回路の出力電圧よりも高く設定される為、負荷電流が
第1及び第2の分流路の一方に集中して流れることが防
止できる。
According to the second aspect of the invention, the resistor is provided at the subsequent stage of the first constant voltage power supply circuit on the first branch flow path, and the output voltage of the first constant voltage power supply circuit is the second constant voltage. Since it is set higher than the output voltage of the voltage power supply circuit, it is possible to prevent the load current from concentrating and flowing in one of the first and second branch flow paths.

【0039】請求項3に記載の発明によれば、第1,第
2の定電圧電源回路は各々、トランジスタ、抵抗及びツ
ェナダイオードにより構成される為、簡易な回路構成で
構成できる。
According to the third aspect of the invention, each of the first and second constant voltage power supply circuits is composed of a transistor, a resistor and a zener diode, so that the circuit can be constructed with a simple circuit configuration.

【図面の簡単な説明】[Brief description of drawings]

【図1】この発明の実施の形態に係る定電圧電源回路の
構成図である。
FIG. 1 is a configuration diagram of a constant voltage power supply circuit according to an embodiment of the present invention.

【図2】従来の定電圧電源回路の構成図である。FIG. 2 is a configuration diagram of a conventional constant voltage power supply circuit.

【符号の説明】[Explanation of symbols]

1 定電圧電源回路 3 給電路 3a 第1の分流路 3b 第2の分流路 5a 第1の定電圧電源回路 5b 第2の定電圧電源回路 DZ1,DZ2 ツェナダイオード R1,R2,R3 抵抗 Tr1,Tr2 トランジスタ V01 第1の定電圧電源回路の出力電圧 V02 第2の定電圧電源回路の出力電圧1 Constant Voltage Power Supply Circuit 3 Power Supply Line 3a First Shunt Flow Path 3b Second Shunt Flow Path 5a First Constant Voltage Power Supply Circuit 5b Second Constant Voltage Power Supply Circuit D Z 1, D Z 2 Zener Diodes R 1, R 2, R 3 Resistors Tr1 and Tr2 Transistor V 0 1 Output voltage of first constant voltage power supply circuit V 0 2 Output voltage of second constant voltage power supply circuit

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 電源から負荷に至る給電路上に互いに並
列に介装され、電源からの負荷電流を一時的に分流する
第1及び第2の分流路と、 各々前記第1,第2の分流路に設けられ、その分流路に
トランジスタを介装させた第1,第2の定電圧電源回路
と、を備えることを特徴とする定電圧電源回路。
1. A first and a second shunt flow path, which are interposed in parallel on a power supply path from a power supply to a load, for temporarily shunting a load current from the power supply, and the first and second shunts, respectively. A constant voltage power supply circuit, which is provided in a path and has a first flow path and a second constant voltage power supply circuit in which a transistor is interposed in the flow path.
【請求項2】 更に、前記第1の分流路上の前記第1の
定電圧電源回路の後段に抵抗が設けられ、 前記第1の定電圧電源回路の出力電圧が前記第2の定電
圧電源回路の出力電圧よりも高く設定されることを特徴
とする請求項1に記載の定電圧電源回路。
2. A resistor is provided at a subsequent stage of the first constant voltage power supply circuit on the first branch flow path, and an output voltage of the first constant voltage power supply circuit is the second constant voltage power supply circuit. The constant voltage power supply circuit according to claim 1, wherein the constant voltage power supply circuit is set higher than the output voltage of the constant voltage power supply.
【請求項3】 第1,第2の定電圧電源回路は各々、そ
の主電極間が前記第1,第2の分流路に介装された前記
トランジスタと、前記トランジスタの上流側主電極・制
御電極間に接続された抵抗と、前記抵抗と前記トランジ
スタの制御電極との中間点と接地点との間に逆方向接続
されたツェナダイオードとを備えることを特徴とする請
求項1又は請求項2に記載の定電圧電源回路。
3. A first constant voltage power supply circuit and a second constant voltage power supply circuit, wherein the main electrodes of the transistor are interposed between the first and second branch flow paths, and the upstream main electrode / control of the transistor. 3. A resistor connected between electrodes, and a Zener diode connected in a reverse direction between an intermediate point between the resistor and a control electrode of the transistor and a ground point. Constant voltage power supply circuit described in.
JP2002019885A 2002-01-29 2002-01-29 Constant-voltage power source circuit Abandoned JP2003223231A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2002019885A JP2003223231A (en) 2002-01-29 2002-01-29 Constant-voltage power source circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002019885A JP2003223231A (en) 2002-01-29 2002-01-29 Constant-voltage power source circuit

Publications (1)

Publication Number Publication Date
JP2003223231A true JP2003223231A (en) 2003-08-08

Family

ID=27743560

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002019885A Abandoned JP2003223231A (en) 2002-01-29 2002-01-29 Constant-voltage power source circuit

Country Status (1)

Country Link
JP (1) JP2003223231A (en)

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