JP2003216680A - Clearance check method in cad for printed circuit board and computer program - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a clearance check method to suppress any cross-talk noises between copper foil patterns including not only between same layers but also between dissimilar layers. <P>SOLUTION: The copper foil pattern in which a current of a high-speed digital signal of a frequency higher than a predetermined value runs is extracted as an element to be inspected (#102), and the copper foil pattern for a signal in proximity to the element to be inspected in the same copper foil layer as the element to be inspected and the copper foil pattern for signal in proximity to the element to be inspected in the copper foil layer dissimilar from the element to be inspected are extracted as proximity elements, and the minimum distance between the element to be inspected and the proximity elements is obtained (#103). If the minimum distance is smaller than the preset violation distance, the length of the copper foil pattern of the element to be inspected or the proximity elements included in a range in which the distance between the element to be inspected and the proximity element is shorter than the violation distance is obtained as the proximity pattern length (#105), and if the proximity pattern length is larger than the present violation length, the proximity pattern length is detected as a clearance violation (#106 and #107). <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed circuit board CAD for designing a printed wiring board with computer support.
Relates to a clearance check method and a computer program.

[0002]

2. Description of the Related Art A printed circuit board CAD (computer-aided design) program, which is a dedicated computer program, is generally used for designing a printed wiring board of an electronic circuit, particularly a digital circuit. As one of the functions of the printed board CAD program,
There is a clearance check function for checking whether or not the distance (gap) between the conductive foil patterns (generally copper foil patterns) is secured. The copper foil pattern referred to here means a copper foil line having a predetermined width that is left in the copper foil layer of the printed wiring board after undergoing resist exposure, etching, etc. in the process of manufacturing the printed wiring board. There are conductive foils other than copper foil, for example, conductive foils such as gold and silver, but the most common copper foil pattern will be described below.

If a sufficient distance (gap) between the copper foil patterns is not ensured, bridging defects between the copper foil patterns are likely to occur in the manufacturing process of the printed circuit board (etching process etc.). In some cases, the minimum distance between copper foil patterns is defined in the product standard from the viewpoint of electrical insulation performance.

In recent years, along with the speeding up of digital signals, not only electrical insulation performance but also crosstalk noise between adjacent wiring patterns is apt to become a problem. From the viewpoint of suppressing this, it is possible to control the distance between copper foil patterns. Getting important. If the distance between the copper foil patterns is too small, the product may malfunction due to crosstalk noise generated between adjacent wiring patterns.

Further, with the spread of portable devices, in particular, printed wiring boards used therein are rapidly becoming smaller and thinner. A printed circuit board for a digital circuit often uses a multilayer substrate in which a plurality of copper foil layers and a plurality of insulating layers are laminated. In the case of a conventional multi-layered board having a relatively large layer thickness, the distance between copper foil patterns between layers does not matter, and therefore the clearance check function in the conventional printed circuit board CAD program is used to measure the distance between adjacent patterns in the same layer. It was to check (clearance).

[0006]

However, as the printed wiring board becomes smaller and thinner and the layer thickness of the multilayer substrate becomes smaller, and as the speed of digital signals increases, copper foils of different copper foil layers are formed. Crosstalk noise between patterns may be a problem.

The present invention has been made in view of the above problems, and in a printed circuit board CAD, a clearance check is performed from the viewpoint of suppressing crosstalk noise between copper foil patterns not only in the same layer but also in different layers. It is an object to provide a method and a computer program.

[0008]

A clearance check method in a printed circuit board CAD according to the present invention is a computer-aided method for designing a multilayer printed wiring board in which a plurality of conductive foil layers and a plurality of insulating layers are alternately laminated. ,
A method for checking the distance between conductive foil patterns,
(A) A conductive foil pattern through which a current of a high-speed digital signal having a frequency higher than a predetermined value flows is extracted as an inspection target element, and (b) for a signal which is adjacent to the inspection target element in the same conductive foil layer as the inspection target element. In the conductive foil pattern and the conductive foil layer different from the inspection target element, the signal conductive foil pattern adjacent to the inspection target element is extracted as a proximity element, and (c) the shortest distance between the inspection target element and the proximity element is obtained. (D) When the shortest distance is smaller than a predetermined violation distance, the inspection target element or the conductive foil of the proximity element included in the range in which the distance between the inspection target element and the proximity element is shorter than the violation distance. The pattern length is obtained as the proximity pattern length, and (e) if the proximity pattern length is longer than a predetermined violation length, it is detected as a design violation. It is characterized in.

Further, the computer program according to the present invention checks the distance between the conductive foil patterns when computer-aided design of a multilayer printed wiring board in which a plurality of conductive foil layers and a plurality of insulating layers are alternately laminated. (A) extracting a conductive foil pattern in which a current of a high-speed digital signal having a frequency higher than a predetermined value flows as an inspection target element, and (b) in the same conductive foil layer as the inspection target element. A signal conductive foil pattern adjacent to the inspection target element and a signal conductive foil pattern adjacent to the inspection target element in a conductive foil layer different from the inspection target element are extracted as proximity elements, (c)
Obtaining the shortest distance between the inspection target element and the proximity element,
(D) When the shortest distance is smaller than a predetermined violation distance, the inspection target element or the conductive foil pattern of the proximity element included in a range in which the distance between the inspection target element and the proximity element is shorter than the violation distance. Is calculated as the proximity pattern length, and (e) the computer is caused to execute a process of detecting a design violation when the proximity pattern length is longer than a predetermined violation length.

According to the above-described clearance check method and computer program, the distance between three-dimensional conductive foil patterns including not only the same layer but also different layers is checked, and two conductive foil patterns simply intersect. However, the clearance violation is detected only when the areas are close to each other in a section longer than a predetermined length (violation length) (shorter than the violation distance). As a result, crosstalk noise between the conductive foil patterns including not only the same layer but also different layers can be suppressed. In addition to the clearance check between the conductive foil patterns, a clearance check between via holes (also referred to as through holes) which are conductive connections between layers and a clearance check between the conductive foil patterns and the via holes may be included.

Preferably, after the step (c),
Does the condition under which the inspection target element and the proximity element are present in different conductive foil layers and the ground conductive foil element connected to the ground potential is present between the inspection target element and the proximity element is satisfied? If the condition is satisfied, it is determined whether or not the distance between the inspection target element and the adjacent element is increased more than the actual distance or the violation distance is decreased, and then the step (d) is performed. ) And (e) are executed. In other words, it is known that crosstalk noise between conductive foil patterns is reduced when there is a ground conductive foil element that is connected to the ground potential between the conductive foil patterns. It is preferable to loosen the standard.

The above computer program is
For example, it is supplied by being recorded in a computer-readable recording medium such as a CD-ROM, and this computer program can be installed and executed in a personal computer or the like.

[0013]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing an example of a computer system for carrying out a clearance check method in a printed circuit board CAD according to the present invention. Printed circuit board CAD dedicated to computer systems such as personal computers and workstations
The printed board CAD system is realized by installing the program, and the clearance check method of the present invention is realized as one function thereof.

For example, the check program is installed in the auxiliary storage device (hard disk drive HDD) 13 of the computer main body 1 from the recording medium 5 such as a CD-ROM (optical disk) on which the printed board CAD program is recorded via the drive device 4. To do.

The check program installed in the auxiliary storage device 13 is loaded into the main memory 12 and executed. The computer main body 1 includes an input unit 11 and a display output unit 14 in addition to the main memory 12 and the auxiliary storage device 13. An input device 2 such as a keyboard and a mouse is connected to the input unit 11, and a display device 3 such as a CRT (cathode ray tube) and an LCD (liquid crystal display device) is connected to the display output unit 14.

In addition to various programs such as an operating system and a check program, the auxiliary storage device 13 stores a data file 6 such as design information of the printed wiring board and clearance check rules. The printed wiring board design information includes the type of multilayer printed circuit board,
It includes net-specific information (also referred to as net identification information) such as the thickness between layers, the net name of each signal line, and the net number.

FIG. 2 is a printed circuit board CAD according to the present invention.
5 is a flowchart showing a first example of a clearance check process executed in. In step # 101, the constraint condition is read from the data file 6. These constraint conditions include the conditions of the copper foil pattern to be inspected, the distance (violation distance) to be secured between adjacent patterns, and the allowable pattern length (violation length) of the inter-pattern distance shorter than the violation distance. included.

In the next step # 102, the copper foil pattern to be inspected is searched. The copper foil patterns forming the printed wiring board are separated into nets having the same potential, but the number of nets may reach several thousands in a complicated printed wiring board. If the distances between these nets are set for all combinations, the processing time required for them will be too long. Therefore, the elements to be inspected are searched (extracted) by narrowing down to the line (net) of the high-speed digital signal that easily causes crosstalk noise. For example, a clock signal line, a data bus line, or the like through which a signal current having a frequency exceeding 30 MHz flows is an inspection target element.

Three types of methods can be used as the method of designating the element to be inspected. In the first specification method, the inspection target element is specified by using the net name or the net number. In the external file (data file) 6, the identification information (net unique information such as net name and net number) of the net to be inspected is described.

In the second designating method, the element to be inspected is designated using the net type. That is, the external file (data file) 6 has information about the type of the net to be inspected (clock, data bus, etc.).

In the third designating method, the element to be inspected is designated by using the product number or pin number of the component (IC or the like) mounted on the printed wiring board. That is, these pieces of information are described in the external file (data file) 6, and the net connected to the pin number of the corresponding component is extracted as the inspection target element.

In the next step # 103, the copper foil pattern (proximity element) adjacent to the inspection target element is searched, and the shortest distance d between the inspection target element and the proximity element is calculated. At this time, not only the proximity element in the same copper foil layer as the inspection target element but also the proximity element in the copper foil layer different from the inspection target element are searched to calculate the shortest distance d. The shortest distance d in the same layer is
It is simply calculated from the distance information in the two-dimensional plane.

The shortest distance d between different layers can be obtained by the Pythagorean theorem from the distance information in plan view and the thickness information (layer thickness information) between layers. The layer thickness information is stored in the auxiliary storage device 13 as the data file 6 together with the information regarding the type of the printed circuit board. FIG. 3 shows an example of layer thickness information in the case of a 6-layer build-up board.

In the next step # 104, it is checked whether or not the above-mentioned shortest distance d is smaller than a predetermined violation distance. If the shortest distance d is not smaller than the violation distance, it is determined that there is no problem and the process returns to step # 103 to search for the next adjacent element. If the shortest distance d is smaller than the violation distance,
Then, the process proceeds to step # 105. In the case of the shortest distance d between different layers, if the distance in plan view is larger than the violation distance, the three-dimensional distance including the layer thickness is further increased.
Therefore, in the step of calculating the shortest distance d in step # 103, if the distance in plan view is larger than the violation distance, there is no problem and it is possible to shift to the search for the next adjacent element.

In step # 105, the proximity pattern length L
Ask for. The proximity pattern length means the length of the copper foil pattern of the inspection target element or the proximity element included in the range where the distance between the inspection target element and the proximity element is shorter than the violation distance.

FIG. 4 is a schematic diagram showing an example of the shortest distance d between adjacent copper foil patterns and the adjacent pattern length L between different layers.
In this example, the copper foil pattern P1 formed in the upper layer and the copper foil pattern P2 formed in the lower layer face each other over the length L at the shortest distance d (extend in parallel).
Therefore, when the shortest distance d is smaller than the violation distance,
The length L corresponds to the proximity pattern length.

In this example, the shortest distance d is equal to the layer interval (layer thickness) between the copper foil layer of the copper foil pattern P1 and the copper foil layer of the copper foil pattern P2. That is, the copper foil pattern P1 in plan view
And the copper foil pattern P2 overlap each other over the length L. When the copper foil pattern P1 and the copper foil pattern P2 do not overlap each other in a plan view and extend parallel to each other with a distance d1 from each other, the shortest distance d ′ between the copper foil pattern P1 and the copper foil pattern P2. When the layer thickness is t, d ′ = (t ² + d1 ² ) ^{1/2 according} to the Pythagorean theorem.

In the next step # 106, it is checked whether or not the proximity pattern length L is longer than a predetermined violation length. If the proximity pattern length L is not longer than the violation length, it is determined that there is no problem and the process returns to step # 103 to search for the next proximity element. If the proximity pattern length L is longer than the violation length, it is recorded in the violation report in step # 107.
Thereby, for example, when the copper foil pattern of the inspection target element and the copper foil pattern of the adjacent element simply intersect,
Even if the shortest distance d is smaller than the violation distance, it is determined that there is no problem. This is because in such a case, crosstalk noise is unlikely to occur. That is, when the two copper foil patterns are close to each other and extend substantially parallel to each other over a certain length (violation length or more), crosstalk noise between them is likely to occur.

In the next step # 108, it is checked whether or not all the adjacent elements have been checked for the current inspection target element. The processing from step # 103 to step # 108 is repeated until the check of all the proximity elements is completed.

When all the adjacent elements have been checked, it is checked in the next step # 109 whether all the check target elements have been checked. Step through until you have checked all the inspected elements #
The processing from step 102 to step # 109 is repeated. When all the inspection target elements have been checked, a violation report is output in step # 110 and the clearance check processing is ended.

FIG. 5 is a printed circuit board CAD according to the present invention.
6 is a flowchart showing a second example of the clearance check process executed in. In this example, step # 103 in the flowchart of the first example shown in FIG.
Between step # 104 and step # 104, the processing from step # 151 to step # 153 is added.

That is, after calculating the shortest distance d between the inspection target element and the proximity element in step # 103, it is determined in step # 151 whether the inspection target element and the proximity element are on the same copper foil layer. Check. If they are in the same copper foil layer, the process proceeds to step # 104 as they are, so there is no difference from the first example shown in FIG.

If they are not in the same copper foil layer, that is, if the element to be inspected and the adjacent element are in different copper foil layers, the ground copper foil element is placed between the element to be inspected and the adjacent element in step # 152. Check if exists. By grounded copper foil element is meant a copper foil that is connected to ground potential.

FIG. 6 is a schematic diagram showing an example in which a grounding copper foil element is present between copper foil patterns between different layers. In this example, the copper foil pattern P1 formed on the upper layer and the copper foil pattern P2 formed on the lower layer are opposed to each other at the shortest distance d over the length L, and the ground copper foil element P3 is provided therebetween.
Exists.

If a grounded copper foil element is present, the effect is that crosstalk noise between the element under test and the adjacent element is reduced by the grounded copper foil element. Therefore, in this case, in step # 153, correction is performed by setting the value obtained by multiplying the shortest distance d by the correction coefficient k larger than 1 as the new shortest distance d. That is, the correction for relaxing the clearance violation determination condition is performed. If the ground copper foil element does not exist between the inspection target element and the adjacent element, the process directly proceeds to step # 104.

Instead of multiplying the shortest distance d by a correction coefficient k greater than 1, correction may be performed by dividing the violation distance by a correction coefficient k greater than 1. Alternatively, a correction for dividing the shortest distance d by a correction coefficient smaller than 1 or a correction for multiplying the violation coefficient by a correction coefficient smaller than 1 may be performed. Instead of correction by multiplication / division, correction may be performed by adding or subtracting a predetermined correction amount to the shortest distance d or the violation distance. In short, the correction condition for the clearance violation may be relaxed by any correction calculation. Further, the correction for shortening the proximity pattern length L or the correction for increasing the violation distance may be adopted as the correction for relaxing the determination condition for the clearance violation.

As a condition for relaxing the clearance violation determination condition, it may be added that the area of the grounding copper foil element existing between the inspection target element and the adjacent element is equal to or larger than a predetermined value. This is because when the area is small, the effect of reducing crosstalk noise between the inspected element and the adjacent element is hardly obtained or is negligibly small.

FIG. 7 is a table showing a description example for designating the clearance check condition as described above. In FIG. 7, the description example of Example 1 is the net name (signal name) “DATA
This is a case where the distance between the copper foil pattern of "0" and the copper foil pattern of the net name "DATA1" is inspected to determine whether or not 0.2 mm is secured. That is, this corresponds to the case where the inspection target element and the proximity element are “DATA0” and “DATA1” and the violation distance is 0.2 mm.

In the description example of Example 2, the distance between the copper foil patterns having a net name starting with "DATA" is inspected, and the distance is 0.2 m.
It is determined whether or not m is secured. And if the two copper foil patterns are on different copper foil layers with a ground copper foil element in between, the violation distance is mitigated from 0.2 mm to 0.18 mm.

In the description example of Example 3, the distance between the copper foil pattern having the net name starting with "CLK" and another arbitrary copper foil pattern is inspected to determine whether or not 0.2 mm is secured. Then, if the two copper foil patterns are on different copper foil layers with a ground copper foil element in between, the violation distance is mitigated by 5% from 0.2 mm to 0.19 mm. Further, the violation length is 30 mm, and if the distance between the two copper foil patterns is shorter than the violation distance over the length exceeding 30 mm, it is determined that the clearance is in violation.

In the description example of Example 4, the net type is "DAT.
The distance between the copper foil pattern “A” and any other copper foil pattern is inspected to determine whether 0.2 mm is secured.

In the description example of Example 5, the part name "PENTIU
The distance between the copper foil pattern of the signal line connected to the pin number 112 of "M (registered trademark) 3" and the copper foil pattern of which the net type is "DATA" is inspected, and whether 0.2 mm is secured or not. To determine. And if the two copper foil patterns are on different copper foil layers and there is a ground copper foil element between them, the violation distance is from 0.2 mm to 0.18 m.
relaxed to m.

In the above embodiment, the case where both the inspection target element and the proximity element are copper foil patterns has been described. However, when carrying out the clearance check method of the present invention, not only the clearance check between copper foil patterns but also the clearance check between via holes (also referred to as through holes) that are conductive connections between layers and between copper foil patterns and via holes are performed. Clearance check may be included. Furthermore, the clearance check may be performed including the jumper wires mounted on the printed wiring board. Further, the clearance check method of the present invention can also be applied to the conductive foil pattern other than the copper foil pattern, for example, the conductive foil pattern using a metal such as gold, silver or aluminum.

Although the embodiment of the present invention has been described with reference to some specific examples, the present invention is not limited to the above embodiment and can be implemented in various forms.

[0045]

As described above, according to the clearance check method and the computer program for the printed circuit board CAD of the present invention, not only the distance between the copper foil patterns in the same copper foil layer but also the different copper foil layers exist. The distance between three-dimensional copper foil patterns including the distance between the copper foil patterns to be checked is checked, and if two copper foil patterns are simply intersecting, the distance is longer than the specified length. Is detected as a clearance violation. As a result, crosstalk noise between copper foil patterns including not only the same layer but also different layers can be suppressed.

[Brief description of drawings]

FIG. 1 is a block diagram showing an example of a computer system for implementing a clearance check method in a printed circuit board CAD according to the present invention.

FIG. 2 is a flowchart showing a first example of a clearance check process executed in the printed circuit board CAD according to the present invention.

FIG. 3 is a chart showing an example of layer thickness information in the case of a 6-layer build-up board.

FIG. 4 is a schematic view showing an example of a shortest distance between copper foil patterns and different pattern lengths between different layers.

FIG. 5 is a flowchart showing a second example of clearance check processing executed in the printed circuit board CAD according to the present invention.

FIG. 6 is a schematic diagram showing an example in which a grounding copper foil element is present between copper foil patterns between different layers.

FIG. 7 is a chart showing a description example that specifies clearance check conditions.

[Explanation of symbols]

d Shortest distance L Proximity pattern length P1 First copper foil pattern (inspection target element or proximity element) P2 Second copper foil pattern (inspection target element or proximity element) P3 Grounding copper foil element

   ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor Ryoji Makino             2-2-1 Hyakudohama, Sawara-ku, Fukuoka, Fukuoka               Fujitsu Kyushu System Engineer Co., Ltd.             In the ring (72) Inventor Shohei Miwa             1-228 Goshodori, Hyogo-ku, Kobe-shi, Hyogo               Within Fujitsu Ten Limited F-term (reference) 5B046 AA08 BA06 JA01                 5E346 AA12 AA15 AA35 BB02 BB03                       BB04 BB06 GG12 GG31 HH01

Claims (5)

[Claims] 1. A method of checking a distance between conductive foil patterns when designing a multilayer printed wiring board in which a plurality of conductive foil layers and a plurality of insulating layers are alternately laminated by computer assistance, comprising: a) A conductive foil pattern through which a current of a high-speed digital signal having a frequency higher than a predetermined value flows is extracted as an element to be inspected, and (b) Conduction for signals that is adjacent to the element to be inspected in the same conductive foil layer as the element to be inspected Extracting a signal conductive foil pattern close to the inspection target element in a foil pattern and a conductive foil layer different from the inspection target element as a proximity element, (c) obtaining a shortest distance between the inspection target element and the proximity element, (D) If the shortest distance is smaller than a predetermined violation distance, the distance between the inspection target element and the adjacent element is included in a range shorter than the violation distance. The length of the conductive foil pattern of the inspection target element or the proximity element to be obtained is determined as a proximity pattern length, and (e) the design violation is detected when the proximity pattern length is longer than a predetermined violation length. Clearance check method in printed circuit board CAD. 2. After the step (c), the element to be inspected and the proximity element are present in different conductive foil layers, and are connected to the ground potential between the element to be inspected and the proximity element. It is determined whether or not the ground conductive foil element to be satisfied satisfies the condition, and if the condition is satisfied, a correction for increasing the distance between the inspection target element and the adjacent element from the actual value, or the violation. The clearance check method in a printed circuit board CAD according to claim 1, wherein the steps (d) and (e) are executed after the correction for reducing the distance is performed. 3. A computer program for checking a distance between conductive foil patterns when a computer-aided design of a multilayer printed wiring board in which a plurality of conductive foil layers and a plurality of insulating layers are alternately laminated is performed. (A) A conductive foil pattern through which a current of a high-speed digital signal having a frequency higher than a predetermined value flows is extracted as an inspection target element, and (b) is adjacent to the inspection target element in the same conductive foil layer as the inspection target element. A signal conductive foil pattern and a signal conductive foil pattern adjacent to the inspection target element in a conductive foil layer different from the inspection target element are extracted as a proximity element, and (c) the shortest distance between the inspection target element and the proximity element. (D) If the shortest distance is smaller than a predetermined violation distance, the distance between the inspection target element and the adjacent element is the difference. The length of the conductive foil pattern of the inspection target element or the proximity element included in the range shorter than the anti-distance is determined as the proximity pattern length, and (e) it is a design violation when the proximity pattern length is longer than a predetermined violation length. A computer program that causes a computer to execute a process of detecting. 4. The step (c) and the step (d)
Between the element to be inspected and the adjacent element are in different conductive foil layers, and there is a ground conductive foil element connected to the ground potential between the element to be inspected and the adjacent element. Determining whether or not the condition is satisfied, and if the condition is satisfied, performing a correction to increase the distance between the inspection target element and the adjacent element from the actual value or a correction to decrease the violation distance. The computer program according to claim 3, further comprising: 5. A computer program for checking the distance between conductive foil patterns when computer-aided design of a multilayer printed wiring board in which a plurality of conductive foil layers and a plurality of insulating layers are alternately laminated is recorded. (A) a conductive foil pattern through which a current of a high-speed digital signal having a frequency higher than a predetermined value flows is extracted as an inspection target element, and (b) the same conductive foil layer as the inspection target element is used. The signal conductive foil pattern adjacent to the inspection target element and the signal conductive foil pattern adjacent to the inspection target element in a conductive foil layer different from the inspection target element are extracted as the adjacent elements, and (c) the inspection target element and the above (D) If the shortest distance is smaller than a predetermined violation distance, the inspection target element and the proximity are obtained. The length of the conductive foil pattern of the inspection target element or the proximity element included in the range in which the distance to the element is shorter than the violation distance is determined as the proximity pattern length, and (e) the proximity pattern length is determined from the predetermined violation length. A computer-readable recording medium having recorded thereon a computer program for causing a computer to execute a process of detecting a design violation when it is long.