JP2003208124A - Display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To eliminate the occurrence of visual persistence phenomenon which is observed when high luminance data being set on optical elements are rewritten into low luminance data. <P>SOLUTION: When a signal on a second scanning line SL20 becomes high, a third transistor Tr20 is turned on, luminance data are set on the gate electrode of a fourth transistor Tr21 and light emission is made by a second OLED20. When the signal on the line SL20 becomes low and the transistor Tr20 is turned off, the luminance data are held at the gate of the transistor Tr21 and therefore, the OLED20 maintains its light emission. When a first scanning line SL10 becomes high, the gate potential of the transistor Tr21 is raised and the OLED20 is turned off. When the signal on the line SL20 becomes high, light emission is made by the OLED20 again. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention relates to a display device. The present invention particularly relates to a technique for improving the display quality of an active matrix type display device.

[0002]

2. Description of the Related Art The spread of notebook personal computers and portable terminals has been rapidly increasing. Currently, liquid crystal displays are mainly used for these display devices.
Organic E is expected as a next-generation flat display panel
It is an L (Electro Luminescence) display. The active matrix drive system is central to the display method of these displays. A display using this method is called an active matrix display, in which a large number of pixels are arranged vertically and horizontally to show a matrix shape, and a switch element is arranged in each pixel. Video data is sequentially written for each scanning line by the switch element.

The practical design of an organic EL display is in its infancy, and various pixel circuits have been proposed. As an example of such a circuit, a pixel circuit disclosed in Japanese Patent Laid-Open No. 11-219146 will be briefly described with reference to FIG.

This circuit includes first and second transistors Tr50 and Tr51 which are two n-channel transistors.
And OLED50 which is an optical element, and storage capacitor C50
, A scanning line SL50 for sending a scanning signal, and a power supply line Vd
d50 and a data line DL50 for transmitting luminance data.

The operation of this circuit is such that, for writing the brightness data of the OLED 50, the scan signal of the scan line SL50 becomes high, the first transistor Tr50 is turned on, and the brightness data input to the data line DL50 is obtained. The second transistor Tr51 and the storage capacitor C50 are set, and a current according to the brightness data flows to cause the OLED 50 to emit light. When the scan signal of the scan line SL50 becomes low, the first transistor Tr50 is turned off, but the gate voltage of the second transistor Tr51 is maintained, and light emission is continued according to the set brightness data.

[0006]

When the brightness data of the optical element is large, even if an attempt is made to set a small brightness data by rewriting the brightness data, the charge corresponding to the previous large brightness data will escape from the optical element. In some cases, the residual image does not remain, and accurate luminance data cannot be set, and an afterimage phenomenon may occur. In particular, it may be difficult to view when displaying a moving image.

The present invention has been made in view of these circumstances, and an object thereof is to propose a new circuit for reducing the above-mentioned afterimage phenomenon.

[0008]

One embodiment of the present invention is a display device. This device is provided with an optical element, a drive element for driving the optical element, and a switch element for controlling a timing of setting luminance data for setting the drive capability of the drive element to the drive element, the switch element being a scanning element. The dummy luminance data is set in the driving element controlled by the signal by the scanning signal for the optical element which is temporally controlled before the driving element.

As an "optical element", an organic light emitting diode (Organic Light Emitting Diode), hereinafter simply referred to as "OLE"
Notated as "D". ) Can be assumed, but is not limited to this. Metal oxide film (MOS) transistors and thin film transistors (TFTs) are used as "driving elements" and "switch elements".
or) can be assumed, but not limited to this. The “luminance data” is data relating to the luminance information set in the driving element and is distinguished from the light intensity emitted by the optical element.

The "selection signal" is directly or secondarily processed and used for on / off control of the switch element, and its signal line is individually provided for each pixel line. Hereinafter, this selection signal is also referred to as "scanning signal". The “dummy brightness data” is a value different from the brightness data to be originally set in the drive element, and is temporarily set before the original brightness data is set. For example, a value that sets the optical element to the off state is set.

The path of the scanning signal controlled in advance in time and the path of the luminance data set in the driving element may be capacitively coupled, in which case scanning for the optical element controlled in time earlier. When the signal is activated, the value of the luminance data that is in a floating state between the switch element and the driving element is changed in the direction of dummy luminance data via the capacitance.

It should be noted that any combination or combination of the above components is also effective as an aspect of the present invention.

[0013]

BEST MODE FOR CARRYING OUT THE INVENTION In the embodiments, an active matrix type organic EL display is assumed as a display device. In the following, we propose a new circuit that reduces the afterimage phenomenon.

(First Embodiment) In the present embodiment,
Prior to setting the brightness data to the drive element, zero or a sufficiently low value is set in advance as the dummy brightness data to change the gate voltage of the drive element to a value at which the optical element is turned off. To set the dummy luminance data, a scanning signal for a pixel that is temporally controlled before the pixel is used. As a result, immediately before the brightness data is set in the driving element, the optical element and the power source are temporarily shut off and the optical element is turned off, so that the electric charge remaining in the optical element is eliminated.

FIG. 1 shows a display device 2 according to the present embodiment.
It is a figure which shows the circuit structure for a pixel. First pixel Pix1
The 0 and second pixels Pix20 are circuits for one pixel, respectively. The first pixel Pix10 includes a first transistor Tr10 as a switch element, a second transistor Tr11 as a drive element, a first capacitor C10 as a storage capacitor, and a first OLED1 as an optical element.
Including 0. Similarly, the second pixel Pix20 includes a third transistor Tr20 as a switching element, a fourth transistor Tr21 as a driving element, a second capacitor C20 as a storage capacitor, and a second transistor C20 as an optical element.
Including OLED 20 of.

The power supply line Vdd is connected to the first and second OLEDs.
A voltage for supplying light to 10 and 20 is supplied. The data line DL passes a signal of brightness data to be set in the second transistor Tr11 and the fourth transistor Tr21.
The first scanning line SL10 and the second scanning line SL20 flow a scanning signal for activating the first and second transistors Tr10, Tr20 at the timing of causing the first and second OLEDs 10, 20 to emit light, respectively. In this embodiment,
First transistor Tr10, second transistor Tr
It is activated in the order of 20.

The first transistor Tr10 is an n-channel transistor. The first transistor Tr10 is
The gate electrode is connected to the first scanning line SL10, the source electrode (or drain electrode) is connected to the data line DL, and the drain electrode (or source electrode) is connected to the gate electrode of the second transistor Tr11. The third transistor Tr20 is also an n-channel transistor, the gate electrode is connected to the second scanning line SL20, and the source electrode (or drain electrode) is the data line DL.
The drain electrode (or source electrode) is connected to the fourth
Connected to the gate electrode of the transistor Tr21.

The second transistor Tr11 is a p-channel transistor, the source electrode is connected to the power supply line Vdd, and the drain electrode is the first OLED10.
Connected to the anode electrode of. Fourth transistor Tr
21 is also a p-channel transistor and has a source electrode connected to the power supply line Vdd and a drain electrode connected to the anode electrode of the second OLED 20. The cathode electrodes of the first and second OLEDs 10 and 20 have the same potential as the ground potential.

One end of the first capacitor C10 is connected to the path between the drain electrode (or source electrode) of the first transistor Tr10 and the gate electrode of the second transistor Tr11, and the other end thereof is not shown. It is connected to a scan line which sends a scan signal to the pixel to be controlled immediately before. One end of the second capacitor C20 has a third transistor Tr2
0 is connected to the path between the drain electrode (or source electrode) and the gate electrode of the fourth transistor Tr21,
The other end is connected to a first scanning line SL10 that sends a scanning signal to the first pixel Pix10.

The operation procedure performed by the above configuration will be described below by taking the second pixel Pix20 as an example. First, the scanning signal on the second scanning line SL20 becomes high, and the third transistor Tr20 is turned on. After that, when the negative logic luminance data to be set in the fourth transistor Tr21 flows in the data line DL, the third transistor Tr20
Is on, the potential of the brightness data flowing through the data line DL and the gate potential of the fourth transistor Tr21 become the same potential, and the brightness data is set. A current corresponding to the gate-source voltage of the fourth transistor Tr21 flows from the power supply line Vdd to the drain electrode side, and the second OLED 20 emits light according to the amount of the current. Even when the scan signal of the second scan line SL20 is in the low state and the third transistor Tr20 is turned off, the luminance data thereof has the drain electrode (or source electrode) of the third transistor Tr20 and the fourth transistor Tr20. Since it is held in a floating state between the gate electrodes of the Tr 21, the light emission of the second OLED 20 according to the brightness data is maintained.

At the next scanning timing, the first pixel Pix1 which is controlled immediately before the second pixel Pix20
When the scan signal to 0 becomes high, the gate electrode of the fourth transistor Tr21 and the third transistor Tr20
Since the drain electrode (or the source electrode) is floating, the gate potential of the fourth transistor Tr21 is raised. As a result, the state becomes the same as the value in which the gate-source voltage of the fourth transistor Tr21 is reduced is set as the dummy luminance data.
Since the second OLED 20 is separated from the power supply line Vdd, the second OLED 20 is turned off.

When the scan signal of the first scan line SL10 becomes low, the first scan line SL10 of the second capacitor C20 is turned on.
The potential at one end on the side decreases, and almost simultaneously with this, the second scanning line SL20 goes high and the third transistor Tr20
Is turned on, and the luminance data from the data line DL is set to the gate electrode of the fourth transistor Tr21. Since the second OLED 20 is turned off immediately before the setting of the brightness data, it is possible to eliminate the electric charge remaining in the optical element.

FIG. 2 is a time chart showing the relationship between the state of the scanning signal and the light emitting period and the extinguishing period in the display device of this embodiment. In the figure, the first scanning line SL1
0, the states of the scanning signals of the second scanning line SL20 are indicated by high and low. The first and second OLEDs 10 and 20 emit light at a degree according to the brightness data, but the light emission and the light extinction are simply indicated by high and low in the figure.

When the scanning signal of the first scanning line SL10 becomes high, the first OLED 10 emits light, and the light emitting state is maintained even when the scanning signal becomes low. Similarly, when the scan signal of the second scan line SL20 becomes high, the second OLED
20 emits light, and the light emitting state is maintained even when the scanning signal becomes low. When the scanning for one frame is completed, the first
When the scanning signal of a scanning line (not shown) that scans one scanning line before the scanning line SL10 becomes high, the first OLED 10 is turned off, and the first scanning line SL10 becomes high and light is emitted again at the same time. Similarly, when the first scan line SL10 goes high, the second OLED 20 is turned off, and the second scan line SL20 goes high and emits light again at the same time.

As described above, most of the light emission period is during the scanning of one frame, but the light is extinguished only for one scan period immediately before the next scan signal goes high.

(Second Embodiment) FIG. 3 is a diagram showing a circuit configuration for one pixel of the display device according to the present embodiment. In the circuit shown in this figure, each element is arranged in a pattern different from that of the circuit shown in FIG. 1, but its configuration and operation are substantially the same as those of the first embodiment. In FIG. 1, the first pixel Pix10 and the second pixel Pix20 are scanned in this order, that is, from the top to the bottom of the drawing, but in FIG. 3, the first pixel Pix11 and the second pixel Pi are scanned.
The scanning is performed in the order of x21, that is, from the bottom to the top of the figure.
One end of the second capacitor C21 of the second pixel Pix21 has a first scanning line SL1 at which the scanning signal becomes high one before.
1 and one end of the first capacitor C11 of the first pixel Pix11 is connected to a scan line (not shown) in which the scan signal goes high the previous time.

(Third Embodiment) FIG. 4 is a diagram showing a circuit configuration of two pixels of the display device according to the present embodiment. This embodiment is different from the first and second embodiments regarding the transistor used in the display device. That is, in the first and second embodiments, the first and third transistors Tr10 and Tr2 are provided.
Although an n-channel transistor is used as 0 and p-channel transistors are used as the second and fourth transistors Tr11 and Tr21, in the present embodiment, p-channel transistors are used as the first and third transistors Tr10 and Tr20. Second and fourth transistors Tr
11 and Tr21 are different from the first and second embodiments in that n-channel transistors are used.

In this case, the signal of the luminance data flowing through the data line DL is of positive logic, and the first and second scanning lines SL10,
The scanning signal flowing through SL20 is a negative logic pulse. When the scanning signal of the second scanning line SL20 becomes low, positive logic luminance data flows from the data line DL and is set in the fourth transistor Tr21, and a current according to the luminance data flows to the second OLED20. It emits light. When the scan signal of the second scan line SL20 becomes high, the third transistor Tr20 is turned off, and the brightness data is held in the gate electrode of the fourth transistor Tr21.

When the scanning signal of the first scanning line SL10 becomes low, the fourth transistor T which is floating
The gate potential of r21 is lowered via the second capacitor C20, and the gate-source voltage of the fourth transistor Tr21 decreases, so that the second OLED 20 turns off. When the scan signal of the second scan line SL20 becomes low, the third transistor Tr20 is turned on, the brightness data is set in the fourth transistor Tr21, and the second OLED20 emits light again.

(Fourth Embodiment) This embodiment is different from the first to third embodiments in the transistor used in the display device. That is, in the present embodiment, the first to fourth
Transistors Tr10, Tr11, Tr20, Tr2
This embodiment differs from the other embodiments in that n-channel transistors are used for all 1's. In this case, the first and second capacitors C
By adding a signal obtained by inverting the scanning signal to one end of the scanning line side of each of C10 and C20, the second and fourth transistors T
Lowering the gate-source voltage of r11 and Tr21,
The OLEDs 10 and 20 are turned off.

(Fifth Embodiment) This embodiment is different from the first to fourth embodiments in the transistors used in the display device. That is, in the present embodiment, the first to fourth
Transistors Tr10, Tr11, Tr20, Tr2
This embodiment differs from the other embodiments in that p-channel transistors are used for all 1's. Also in this case, the gate-source voltage of the second and fourth transistors Tr11 and Tr21 is lowered by applying a signal obtained by inverting the scanning signal to one end of the first and second capacitors C10 and C20 on the scanning line side. The first and second OLEDs 10 and 20 are turned off.

(Sixth Embodiment) In the first to fifth embodiments, the scanning signal is used to set the dummy luminance data to the driving element, but in the present embodiment, a separate control signal is used. This is different from the other embodiments.

FIG. 5 is a diagram showing a circuit configuration for three pixels of the display device of this embodiment. First to third pixels Pix1
0, Pix20, and Pix30 are circuits for one pixel, respectively. The first to sixth transistors Tr10, Tr11,
Tr20, Tr21, Tr30, Tr31, first to third capacitors C10, C20, C30, first to third OLE
D10, 20, and 30 have the same configurations as the corresponding elements in the first embodiment. The first to third pixels Pix10,
Control signals are sent to the Pix20 and Pix30 through the first to third control signal lines CTL10, CTL20, and CTL30, respectively. These control signals are respectively
It is output from the OR circuit OR10, OR20, OR30.

Taking the third pixel Pix30 as an example,
The fifth transistor Tr30 has a gate electrode connected to the third scan line SL30, a source electrode (or drain electrode) connected to the data line DL, and a drain electrode (or source electrode) connected to the gate of the sixth transistor Tr31. Connected to the electrodes. The sixth transistor Tr31 has a source electrode connected to the power supply line Vdd and a drain electrode connected to the anode electrode of the third OLED 30. The potential of the cathode electrode of the third OLED 30 is set to the same potential as the ground potential. One end of the third capacitor C30 is the third
Connected to the control signal line CTL30 of which the other end is the drain electrode (or source electrode) of the fifth transistor Tr30.
And a gate electrode of the sixth transistor Tr31.

The third control signal line CTL30 and the second scanning line SL20 which sends a scanning signal to the pixel Pix20 which is a pixel controlled one time before are controlled two times before in time. It is connected to the first scanning line SL10 that sends a scanning signal to the pixel Pix10 which is a pixel. That is, the control signal of the third control signal line CTL30 is the control signal of the first scanning line SL.
The scan signal of 10 and the scan signal of the second scan line SL20 are output from the third OR circuit OR30 in the form of a logical sum.

When the scanning signal of the third scanning line SL30 becomes high, the fifth transistor Tr30 is turned on, and the negative logic luminance data flowing through the data line DL is set in the gate electrode of the sixth transistor Tr31. This causes the third OLED 30 to emit light. Even if the scan signal becomes low and the fifth transistor Tr30 is turned off, the luminance data is held on the gate electrode side of the sixth transistor Tr31 and the light emitting state of the third OLED30 is maintained.

When either the scanning signal of the first scanning line SL10 or the second scanning line SL20 is made high, the third scanning line SL3
Of the third control signal line CTL by the OR circuit OR30 of
The control signal at 30 also goes high. As a result, the gate potential of the sixth transistor Tr31 is raised,
When the gate-source voltage of the transistor Tr31 is decreased, the sixth transistor Tr31 is turned off and the third OLED 30 is turned off. That is, the sixth transistor Tr is kept in motion while the pixel line two lines before is being scanned and while the pixel line one line before is being scanned.
The gate potential of 31 is raised and the third OLED3
0 goes out. The control signal of the third control signal line CTL30 is the same as the scanning signal of the first scanning line SL10 and the second scanning line S.
It goes low when both scan signals on L20 go low. When the scan signal of the third scan line SL30 becomes high, the fifth transistor Tr30 is turned on, the brightness data is set in the gate electrode of the sixth transistor Tr31, and the third OLED 30 emits light again.

Also according to the structure of this embodiment, the electric charge remaining in the optical element can be eliminated by shutting off the optical element and the power source and turning off the optical element.

The present invention has been described above based on the embodiments. This embodiment is merely an example, and it will be understood by those skilled in the art that various modifications can be made to the combination of each constituent element and each processing process, and such modifications are also within the scope of the present invention. .

In the sixth embodiment, in order to generate the control signal, the scan signal to the pixel controlled one before and the scan signal to the pixel controlled two before are used. The scanning signal to the pixel to be controlled immediately before may be further used. In this case, the logical sum of three scanning signals may be taken and used as the control signal. As another modification, a configuration may be used in which the scanning signal to the pixel controlled three times before is further used.

A transistor T whose gate electrode is connected to a scanning line and is used as a switch element for writing luminance data.
Each of r10, Tr20, and Tr30 may be composed of a combination of a plurality of transistors, or may be composed of any combination with respect to their capabilities.

[0042]

According to the present invention, the afterimage phenomenon can be reduced.

[Brief description of drawings]

FIG. 1 is a diagram showing a circuit configuration of two pixels of a display device according to a first embodiment.

FIG. 2 is a time chart showing the relationship between the state of scanning signals and the timing of light emission in the display device of the first embodiment.

FIG. 3 is a diagram showing a circuit configuration of one pixel of a display device according to a second embodiment.

FIG. 4 is a diagram showing a circuit configuration of two pixels of a display device according to a third embodiment.

FIG. 5 is a diagram showing a circuit configuration of three pixels of a display device according to a sixth embodiment.

FIG. 6 is a diagram showing a circuit configuration for one pixel of a display device in the related art.

[Explanation of symbols]

10, 20, 30 OLED, Vdd power supply line,
DL data line, SL10, SL11 first scan line, SL20, SL21 second scan line, CTL1
0, CTL20 control signal line, Tr10 first transistor, Tr11 second transistor, Tr2
0 third transistor, Tr21 fourth transistor, C10, C11 first capacitor, C20,
C21 second capacitor.

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification code FI theme code (reference) H05B 33/14 H05B 33/14 AF term (reference) 3K007 AB02 AB17 BA06 BB07 DB03 GA04 5C080 AA06 BB05 DD30 EE28 FF11 HH11 JJ03 JJ04

Claims (5)

[Claims] 1. An optical element, a drive element for driving the optical element, and a switch element for controlling a timing of setting luminance data for setting the drive capability of the drive element to the drive element, the switch element comprising: The dummy luminance data is set to the drive element by a selection signal for an optical element that is controlled temporally earlier than the optical element, which is controlled by a selection signal that determines the setting timing. Display device. 2. The display device according to claim 1, wherein a value for turning off the optical element is set in the drive element as the dummy luminance data. 3. The value of the brightness data which is in a floating state between the switch element and the drive element when the selection signal for the optical element controlled in time is activated. 3. The display device according to claim 1, wherein the display device is changed in a direction in which it becomes dummy luminance data. 4. The dummy signal of luminance data is capacitively coupled to a route of a selection signal for the optical element controlled in advance in time and a route of luminance data set to the driving element. The display device according to any one of claims 1 to 3, wherein is set. 5. The dummy luminance data is set by a combination of a plurality of selection signals for a plurality of optical elements controlled in advance in time.
5. The display device according to any one of 4 to 4.