JP2006011401A - Display device and method for driving same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a display device having pixel constitution in which a numerical aperture is not reduced, and a method for driving the display device by which a duty ratio can be improved and the reliability of a light emitting element can be improved. <P>SOLUTION: The display device includes a signal line to which an analog signal is inputted, a first switch to be controlled by a first scanning line, a second switch to be controlled by a second scanning line, and the light emitting element connected to the second switch and constituted so as to select the first and second switches and input an analog signal in a first period in one gate selection period, select the first switch and input a reference signal from the signal line in a second period of the one gate selection period to turn on the light emitting element by the analog signal and the reference signal. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

The present invention relates to a display device including a self-luminous element and a driving method thereof.

A conventional display device including a self-luminous element uses a comparator circuit in a pixel circuit to generate a signal voltage input as a video signal and a voltage of a reference signal that is a triangular wave that changes over one frame period. In comparison, a display method for expressing gradation by controlling the light emission time within one frame time by controlling the light emission time according to the period until the voltage relationship is reversed has been proposed. (See Non-Patent Documents 1 and 2.)
"An Innovative Pixel-Driving Scheme for 64-Level Gray-Scale Full-Color Active Matrix OLED Displays" Hajime Akimoto et alSID'02DIGEST P972-975 "A 3.5-inch OLED Display using a 4-TFT Pixel Circuit with an Innovative Pixel Driving Scheme" Hiroshi Kageyama, Hajime Akimoto SID'03DIGEST P96-99

In Non-Patent Document 1, a sweep line and a data line are provided in order not to provide a light emission period and a signal input period in one frame period. When these are provided, the video signal and the reference signal can be input simultaneously. Accordingly, one frame period is a light emission period. With such a pixel configuration, the duty ratio can be increased. Therefore, the current density of the current flowing through the light emitting portion of the self light emitting element can be reduced, and the reliability of the light emitting element can be improved. However, since the sweep line for inputting the reference signal and the data line for inputting the video signal are provided, the aperture ratio becomes low.

Non-Patent Document 2 discloses a pixel configuration in which no sweep line is provided. Therefore, the aperture ratio can be made larger than that in Non-Patent Document 1. However, in such a pixel configuration, the duty ratio becomes small. This is because the reference signal and the video signal cannot be input at the same time, so that one frame period is divided into a light emission period and a signal input period. As a result, the current density is increased and the reliability of the light emitting element is lowered.

Accordingly, an object of the present invention is to provide a display device having a pixel configuration in which the aperture ratio does not decrease. Furthermore, it is an object of the present invention to provide a display device that increases the duty ratio and increases the reliability of the light-emitting element and a driving method thereof.

In view of the above problems, the present invention is characterized in that a signal line to which a video signal is input and a signal to which a reference signal is input are shared to improve the aperture ratio of the pixel. In addition, since the signal line is shared, driving is performed such that a period for inputting a video signal and a period for inputting a reference signal are provided in one gate selection period. According to the driving method of the present invention, since a video signal and a reference signal can be input in one gate selection period, one frame period is expressed as a gradation display period (also referred to as a lighting period and a light emission period), and a signal input There is no need to divide it into periods.

An example of a method for driving a display device according to the present invention includes a signal line to which an analog signal is input, a first switch controlled by a first scanning line, and a second switch controlled by a second scanning line. And a light emitting element connected to the second switch, in the first period of one gate selection period, the first switch and the second switch are selected, an analog signal is input, and one gate is selected. In the second period of the selection period, the first switch is selected, the reference signal is input from the signal line, and the light-emitting element is turned on (emits light) by the analog signal and the reference signal.

An example of a method for driving a display device according to the present invention includes a signal line to which an analog signal is input, a first switch controlled by a first scanning line, and a second switch controlled by a second scanning line. A first switch and a second switch in a first period of one gate selection period, and an inverter provided on both ends of the inverter and a light emitting element provided on the output side of the inverter. Is selected, an analog signal is input, and in the second period of the one gate selection period, the first switch is selected and a reference signal is input from the signal line, and the analog signal and the reference signal are output from the inverter. A signal is output, and the light-emitting element is turned on based on the signal.

An example of a method for driving a display device according to the present invention includes a signal line to which an analog signal is input, a first switch controlled by a first scanning line, and a second switch controlled by a second scanning line. And a differential amplifier circuit in which the first switch and the second switch are provided on the input side, and a light emitting element provided on the output side of the differential amplifier circuit. In the period, the first switch and the second switch are selected, an analog signal is input, and in the second period of one gate selection period, the first switch is selected and the reference signal is input from the signal line Then, a signal is output from the differential amplifier circuit by the analog signal and the reference signal, and the light emitting element is turned on based on the signal.

In the driving method of the present invention, the inverter or the differential amplifier circuit includes a plurality of thin film transistors, and the thin film transistor connected to the light emitting element among the thin film transistors is operated in a linear region.

An example of the display device of the present invention includes a first switch controlled by a first scanning line, a second switch controlled by a second scanning line, and an inverter provided with both ends of the second switch. A pixel region having a circuit and a light emitting element provided on an output side of the inverter circuit, and a driver for generating a signal to be input to the first scan line and the second scan line, A protective circuit is provided between the driver and the driver.
An element having a temperature compensation function may be provided between the pixel region and the driver.

An example of the display device of the present invention is input to a first switch controlled by a first scanning line, a second switch controlled by a second scanning line, and the first switch and the second switch. A pixel region having a differential amplifier circuit provided on the side and a light emitting element provided on the output side of the differential amplifier circuit, and a signal input to the first scan line and the second scan line are generated And an element having a temperature compensation function is provided between the pixel region and the driver. An element having a temperature compensation function may be provided between the pixel region and the driver.

With such a driving method of the present invention, the number of pixel wirings, specifically, the number of signal lines can be reduced, so that the aperture ratio can be improved. Therefore, it is possible to reduce defects in the manufacturing process due to the provision of a plurality of signal lines. Therefore, the manufacturing yield can be improved and the cost can be further reduced. Further, according to the driving method of the present invention, the duty ratio (ratio of gradation display period in one frame period) can be increased. As a result, the current density flowing through the light-emitting element can be reduced, so that the reliability of the light-emitting element can be increased.

Further, by providing the protection circuit of the present invention, electrostatic breakdown of the element can be prevented. Further, by providing the temperature compensation function of the present invention, the light emitting element can be lit with a predetermined luminance regardless of the temperature change.

Embodiments of the present invention will be described below with reference to the drawings. However, the present invention can be implemented in many different modes, and those skilled in the art can easily understand that the modes and details can be variously changed without departing from the spirit and scope of the present invention. Is done. Therefore, the present invention is not construed as being limited to the description of this embodiment mode. Note that in all the drawings for describing the embodiments, the same portions or portions having similar functions are denoted by the same reference numerals, and repetitive description thereof is omitted.

(Embodiment 1)
In this embodiment mode, a pixel structure is described.

As shown in FIG. 1A, the pixel includes a signal line (Si) 10, a first scanning line (Ga) 11, a second scanning line (Gb) 12, and a first switch (Sw (a)). 13, a second switch (Sw (b)) 14, a first capacitor (Cs (a)) 15, a second capacitor (Cs (b)) 16, an inverter 17, and a light emitting element 18. The first switch 13 and the second switch 14 can be manufactured using, for example, a thin film transistor. A thin film transistor has three terminals of a gate electrode, a source electrode, and a drain electrode. In particular, the source electrode and the drain electrode cannot be clearly distinguished because of the structure of the thin film transistor. Therefore, when describing connection between elements, one of a source electrode and a drain electrode is referred to as a first electrode, and the other is referred to as a second electrode.

The connection relationship of such a pixel configuration will be described. In addition, what is necessary is just to be electrically connected with connecting. That is, other elements such as switches may be provided between the elements. One of the first switches 13 is connected to the signal line 10 and controlled by the first scanning line 11. One end of the first capacitive element 15 is connected to the other end of the first switch 13. The other side of the first capacitive element 15 is connected to an arbitrary wiring. Since any wiring preferably has a fixed potential, an anode line (Vdd line) or a Vss line included in the inverter may be used. Alternatively, the second scanning line included in the preceding pixel can be used. The first capacitor element 15 only needs to have a function of holding charge input from the signal line 10. Specifically, the first capacitor element 15 may hold the reference signal 21 input from the signal line 10. As will be described below, the present invention inputs the video signal and the reference signal in a very short time of one gate selection period, and the reference signal is input again in the period of one gate selection period. The capacitor element 15 can be small. That is, since the reference signal 21 is input in a short time, the period for holding the charge can be shortened, so that the first capacitor element 15 can be small.

The second switch 14 is connected to both ends of the inverter 17 and is controlled by the second scanning line 12. The second capacitive element 16 is connected between one of the first switch 13 and the second switch 14. The second capacitor 16 only needs to have a function of holding charge input from the signal line 10. Specifically, the second capacitor 16 may hold the video signal 20 (more precisely, the voltage difference between the inverter threshold voltage and the video signal) input from the signal line 10.

The light emitting element 18 is connected to the output side of the inverter 17. Note that other elements such as a switch may be provided between the light emitting element 18 and the inverter 17. By providing such a switch, it is possible to prevent the light emitting element 18 from being turned on when the second switch 14 is turned on.

With such a pixel configuration, the video signal 20 and the reference signal 21 can be input from one signal line. As a result, the aperture ratio of the pixel can be increased. Further, when the operation of the present invention is used, the duty ratio can be increased. This is because it is not necessary to separate the gradation display period and the signal input period in one frame period. As a result, the gradation display period can be set during one frame period, and the duty ratio can be increased. The operation of the display device having the pixel structure illustrated in FIG. 1A is described below.

FIG. 2A is a timing chart of one frame period in which, for example, 60 frames of images are rewritten per second, the vertical axis represents the scanning line G (from the first line to the last line), and the horizontal axis Indicates time. In this embodiment, as illustrated in FIG. 2A, a case where a grayscale display period and an AC driving period are provided in one frame period will be described. However, the present invention does not require an AC drive period.

Note that the present embodiment is characterized in that it is not necessary to operate the thin film transistor included in the inverter 17, particularly a p-channel thin film transistor, in a saturation region. In other words, since the thin film transistor can be operated in a linear region, the voltage between the source and the drain of the thin film transistor is reduced, so that it is not necessary to increase the driving voltage and power consumption can be reduced.

In the AC driving period, a reverse voltage (reverse voltage), that is, a voltage at which the light emitting element does not light can be applied to the light emitting element. For example, the counter electrode of the light emitting element and the potential of the high potential side power supply (Vdd) included in the inverter may be changed. Note that the timing at which the reverse voltage is applied to the light-emitting element 18, that is, the AC driving period is not limited to FIG. That is, there is no need to provide an AC drive period for each frame. Further, it is not necessary to provide an AC drive period in the second half of one frame. The operation in the AC driving period will be described in the following embodiment. In addition, the configuration and operation of other reverse voltages will be described in the following embodiments.

As a result of applying the reverse voltage, the state of the light emitting element can be improved and the reliability can be improved, which is preferable. In addition, the light emitting element may have an initial failure in which the anode and the cathode are short-circuited due to adhesion of foreign matters, pinholes due to fine protrusions on the anode or the cathode, and non-uniformity of the electroluminescent layer. When such an initial failure occurs, lighting and non-lighting in accordance with the signal are not performed, and most of the current flows through the short-circuit portion, which may cause a phenomenon that the pixel is extinguished. As a result, there arises a problem that the image is not displayed favorably. Further, this short circuit may occur in any pixel. Therefore, as in the present embodiment, a reverse voltage is applied to the light emitting element. Then, a local current flows only in the short circuit part, the short circuit part generates heat, and the short circuit part can be oxidized or carbonized. As a result, since the short-circuited portion can be insulated, a current flows in a region outside the short-circuited portion, and luminance corresponding to the signal can be obtained. By applying the reverse voltage in this way, even if an initial failure occurs, the failure can be eliminated and an image can be displayed favorably. Such insulation of the short-circuit portion is preferably performed before shipment.

In addition to the initial failure, a new short circuit between the anode and the cathode may occur over time. Such a defect is also called a progressive defect. Therefore, since a reverse voltage can be periodically applied to the light emitting element, even if a progressive defect occurs, the defect can be eliminated and an image can be displayed favorably.

Further, image burn-in can be prevented by applying a reverse voltage. Image burn-in occurs due to the deterioration state of the light-emitting element 18, but the deterioration state can be reduced by applying a reverse voltage. As a result, image burn-in can be prevented.

In general, the deterioration of the light emitting element greatly progresses in the initial stage, and the degree of deterioration progresses with time. That is, in a pixel, once a light emitting element has deteriorated, further deterioration is unlikely to occur. Therefore, the deterioration state of all the pixels can be averaged by lighting all the pixels before the shipment or when not displaying an image and causing the pixels that have not deteriorated to deteriorate. In this way, all pixels may be lit when not displayed.

Next, as shown in FIG. 2B, in the writing period, one vertical scanning period is provided, and in the one vertical scanning period, a vertical blanking period and a gate selection period are provided. In the vertical blanking period, the writing direction can be changed and a signal can be written to a preliminary pixel. In the gate selection period, selection periods corresponding to the number of scanning lines are provided, and this is called one gate selection period (one horizontal period).

FIG. 2C shows waveforms of signals input to the first scanning line Ga and the second scanning line Gb in the i-th to (i + 2) -th rows. In the present embodiment, a reference signal input period T1 and a video signal input period T2 are provided in one gate selection period. These periods are denoted as T (i) to T (i + 6) as shown in FIG. 2C, and the operation of the pixels in these T (i) to T (i + 6) periods will be described.

In the period T (i), the first switch 13 and the second switch 14 are turned on as shown in FIG. In the drawing, it is described so that a straight line is connected when the switch is turned on, and is disconnected when the switch is turned off. Then, the video signal 20 is input from the signal line 10. The potential of the video signal 20 at this time is Vs. Since the second switch 14 is on, the input side and the output side of the inverter 17 are connected. At this time, the potential at the point P becomes Vk. Therefore, (Vk−Vs) of charge is accumulated in the second capacitor element 16. In this way, a video signal is input during the T (i) period.

Note that Vk is a potential in a state where the input side and the output side of the inverter 17 are connected, that is, a potential when the input and output of the inverter 17 are equal, as shown in FIG. As shown in FIG. 35B, when the potential at the point P on the input side of the inverter 17 rises above Vk, the output of the inverter 17, that is, the potential at the point R becomes Low. At this time, the light emitting element 18 is not lit. Conversely, when the potential at the point P falls below Vk, the potential at the point R becomes High. At this time, a voltage is applied to the light emitting element 18 to light it.

Next, in the T (i + 1) period, as shown in FIG. 36A, the first switch 13 is turned on and the second switch 14 is turned off. Then, the reference signal 21 is input from the signal line 10. The reference signal 21 has a triangular wave in one frame period as shown in FIG. It is assumed that the potential of the reference signal 21 is Vr1 during this T (i + 1) period. As shown in FIG. 36B, it is assumed that Vs which is the potential of the video signal is larger than Vr1. If Vs−Vr1 = ΔV1, the potential at the point Q is Vr1 (= Vs−ΔV1), which is lower than Vs by ΔV1. Therefore, the potential at the point P is (Vk−ΔV1). At this time, since the potential at the point P is smaller than Vk, the potential at the point R becomes High. At this time, a voltage is applied to the light emitting element 18 to light it.

Next, in the T (i + 2) period, as shown in FIG. 37, the first switch 13 and the second switch 14 are turned off. Therefore, the potential of Vr1 that is the potential of the point Q is held in the first capacitor element 15. In addition, the second capacitor element 16 holds the charge of (Vk−Vs). Therefore, the potential at the point P is maintained at (Vk−ΔV1), the potential at the point R is maintained high, and a voltage is applied to the light emitting element 18 to light it.

At this time, the first switch 13 and the second switch 14 of the pixel in the (i + 1) th row which is the next row are turned on. A video signal 20 for pixels in the (i + 1) th row is input from the signal line 10.

Next, in the T (i + 3) period, the first switch 13 is turned on and the second switch 14 is turned off. Then, the reference signal 21 is input from the signal line 10. The potential of the reference signal 21 is set to Vr2. Since the potential Vr2 of the reference signal 21 remains lower than the potential Vs of the video signal, the potential at the point P remains lower than Vk. Therefore, the point R maintains High, and a voltage is applied to the light emitting element 18 to light it.

Next, in the T (i + 4) period, the first switch 13 and the second switch 14 are turned off as in the state shown in FIG. However, in the T (i + 4) period, the first capacitor element 15 holds the charge for Vr2, and thus the potential at the point Q is Vr2. In addition, the second capacitor element 16 holds the charge of (Vk−Vs). Therefore, the potential at the point P is held at Vk−ΔV2 (here, ΔV2 = Vs−Vr2). Therefore, since the point P is lower than Vk, the potential at the point R is maintained at High.

  At this time, the first switch 13 and the second switch 14 of the pixel in the (i + 2) th row, which is the next row, are turned on. Then, the video signal 20 for the pixel in the (i + 2) th row is input from the signal line 10.

Next, in the T (i + 5) period, as shown in FIG. 38A, the first switch 13 is turned on and the second switch 14 is turned off. Then, the reference signal 21 is input from the signal line 10. The potential of the reference signal 21 is set to Vr3. As shown in FIG. 38B, Vs−Vr3 = ΔV3 is satisfied. At this time, ΔV3 is a negative value, and Vr3 is higher than Vs. Therefore, the potential at the point P becomes higher than Vk. Point Therefore, the point R becomes Low. At this time, the light emitting element 18 is not lit.

Next, in the T (i + 6) period, the first switch 13 and the second switch 14 are turned off. Then, since Vr3 is held in the first capacitor element 15, the potential at the point Q becomes Vr3. In addition, the second capacitor element 16 holds the charge of (Vk−Vs). Therefore, the potential at the point P is kept at Vk−ΔV3 (ΔV3 = Vs−Vr3). Therefore, the potential at the point R is kept low, and the light emitting element 18 is not lit.

At this time, the first switch 13 and the second switch 14 of the pixel in the (i + 3) th row, which is the next row, are turned on. A video signal 20 for pixels in the (i + 3) th row is input from the signal line 10.

In this way, the writing of the video signal 20 and the reference signal 21 and the storage of the reference signal 21 may be performed alternately. Then, lighting or non-lighting of the light emitting element 18 is controlled depending on whether the potential of the reference signal 21 is higher or lower than the potential of the video signal 20.

Note that as described above, in this embodiment mode, it is not necessary to operate the thin film transistor included in the inverter 17, particularly the p-channel thin film transistor, in the saturation region. Therefore, it is not necessary to increase the drive voltage, and power consumption can be reduced.

Further, this embodiment is characterized in that a reference signal input period T1 and a video signal input period T2 are provided in one gate selection period. As a result, one signal line 10 can be shared, and the aperture ratio can be increased. Furthermore, the duty ratio can be increased. In addition, since the reference signal input period T1 and the video signal input period T2 are provided in one gate selection period, the operating frequency of the scan line driver circuit is preferably increased. When attention is paid to a certain pixel, the order in which the reference signal input period T1 and the video signal input period T2 appear may be any first.

Further, a pixel structure which is different from that in FIG. FIG. 1B illustrates a pixel in which the transistor Tr1 is provided between the inverter 17 and the light-emitting element 18 in the pixel illustrated in FIG. Since other structures are similar to those in FIG. 1A, description thereof is omitted.

1C illustrates a pixel in which the switch Sw1 is provided between the inverter 17 and the light-emitting element 18 in the pixel illustrated in FIG. 1A, and the current source C1 is provided in Sw1. When the current source C <b> 1 passes a constant current, a constant current can be passed through the light emitting element 18. Since other structures are similar to those in FIG. 1A, description thereof is omitted.

Note that this embodiment can be freely combined with any of the other embodiments.

(Embodiment 2)
In the present embodiment, a configuration of an inverter different from an inverter having a normal CMOS configuration will be described. The inverter 17 can be configured to have a transistor with one polarity. In that case, a transistor and a resistance element may be provided, or two transistors having one polarity may be provided. Specific pixel circuits having inverters are shown in FIGS.

In FIG. 39A, a resistance element R and an n-channel transistor Tr6 are provided. The resistance element R and the transistor Tr6 are connected, and one end of the second switch 14 is connected between them. A pixel electrode of the light emitting element 18 is connected to one end of the second switch 14. The resistance element R and the transistor Tr6 function as an inverter. The other structures are the same as those in FIG.

In FIG. 39B, a first n-channel transistor Tr7 and a second n-channel transistor Tr8 are provided. The first n-channel transistor Tr7 and the second n-channel transistor Tr8 are connected, and one end of the second switch 14 is connected between them. A pixel electrode of the light emitting element 18 is connected to one end of the second switch 14. The first n-channel transistor Tr7 is diode-connected. The other structures are the same as those in FIG.

In FIG. 40A, a resistance element R and a p-channel transistor Tr9 are provided. The resistance element R and the transistor Tr9 are connected, and one end of the second switch 14 is connected between them. A pixel electrode of the light emitting element 18 is connected to one end of the second switch 14. The resistance element R and the transistor Tr9 function as an inverter. The other structures are the same as those in FIG.

In FIG. 40B, a first p-channel transistor Tr10 and a second p-channel transistor Tr11 are provided. The first p-channel transistor Tr10 and the second p-channel transistor Tr11 are connected, and one end of the second switch 14 is connected between them. A pixel electrode of the light emitting element 18 is connected to one end of the second switch 14. The second n-channel transistor Tr11 is diode-connected. The other structures are the same as those in FIG.

When the configuration shown in FIG. 39 is compared with the configuration shown in FIG. 40, the anode voltage of the light-emitting element 18 is hardly affected by each element. Therefore, the configuration shown in FIG. 40 is preferable.

(Embodiment 3)
In this embodiment, an example of a layout of a pixel portion of a pixel having the equivalent circuit shown in FIG. 1 is described.

FIG. 3 shows a case where thin film transistors are used as the first switch 13, the second switch 14, and the inverter 17. Note that a case where the inverter 17 is formed using two or more thin film transistors having different polarities will be described.

For the thin film transistor, a semiconductor film patterned into a predetermined shape is formed. A gate insulating film is formed so as to cover the semiconductor film.

After that, a first conductive film is formed, and the first conductive film is patterned to be the first scan line (Ga) 11, the second scan line (Gb) 12, and the gate electrode of the thin film transistor.

An insulating film is formed to cover the first conductive film. After that, a second conductive film is formed, and the second conductive film is patterned to become the signal line (Si) 10, the power supply lines Vss and Vdd, and the source electrode or drain electrode of the thin film transistor.

At this time, the first capacitor element (Cs (a)) 15 is formed using a first conductive film, a gate insulating film or an insulating film, and a second conductive film. Therefore, the first conductive film is formed below the first power supply line Vss and the second power supply line Vdd, and the second conductive film forms the source electrode or the drain electrode of the thin film transistor serving as the first switch and the The first conductive film is connected. The second capacitor element (Cs (b)) 16 is formed using a first conductive film, a gate insulating film or an insulating film, and a second conductive film. Therefore, the first conductive film is formed below the source electrode or the drain electrode of the thin film transistor serving as the first switch. At this time, the first conductive film is connected to a source electrode or a drain electrode of a thin film transistor serving as a second switch.

The pixel electrode 23 of the light emitting element 18 is formed so as to be connected to the source electrode or the drain electrode of the thin film transistor constituting the inverter.

After forming the pixel electrode in this way, an insulating film functioning as a partition is formed, and an electroluminescent layer is formed. Details of the partition walls and the electroluminescent layer will be described in the following embodiments.

Note that this embodiment can be freely combined with any of the other embodiments.

(Embodiment 4)
In this embodiment mode, a cross section of a pixel portion whose example is shown in FIG. 3 will be described.

FIG. 4 shows a cross-sectional view of the first switch 13, the inverter 17, and the light emitting element 18. On the base insulating film provided on the insulating substrate 30, a thin film transistor Tr1, a first thin film transistor Tr2, and a second thin film transistor Tr3 constituting an inverter are provided as the first switch 13. In this embodiment mode, the thin film transistors Tr1 and Tr2 are n-channel type, and Tr3 is p-channel type.

Examples of the insulating substrate include glass substrates such as barium borosilicate glass and alumino borosilicate glass, and quartz substrates. Other substrates having an insulating surface include plastics typified by polyethylene-terephthalate (PET), polyethylene naphthalate (PEN), and polyethersulfone (PES), and flexible synthetic resins such as acrylic. There is a substrate that becomes.

The thin film transistors Tr1 to Tr3 each include a semiconductor film serving as an active layer, a gate insulating film 32 provided over the semiconductor film, and a gate electrode.

The semiconductor film includes an amorphous semiconductor, a SAS in which an amorphous state and a crystalline state are mixed, a microcrystalline semiconductor in which crystal grains of 0.5 nm to 20 nm can be observed in the amorphous semiconductor, and a crystalline semiconductor It may have any state selected from.

In this embodiment, an amorphous semiconductor film is formed and a crystalline semiconductor film crystallized by heat treatment is used. The heat treatment can be a heating furnace, laser irradiation, irradiation of light emitted from a lamp instead of laser light (hereinafter referred to as lamp annealing), or a combination thereof.

In the case of using laser irradiation, a continuous wave laser beam (CW laser beam) or a pulsed laser beam (pulse laser beam) can be used. As laser beams, Ar laser, Kr laser, excimer laser, YAG laser, Y ₂ O ₃ laser, YVO ₄ laser, YLF laser, YAlO ₃ laser, glass laser, ruby laser, alexandride laser, Ti: sapphire laser, copper A laser oscillated from one or a plurality of vapor lasers or gold vapor lasers can be used. By irradiating the fundamental wave of such a laser beam and the second, third, or fourth harmonic of the fundamental wave, a crystal with a large grain size can be obtained. For example, a second harmonic (532 nm) or a third harmonic (355 nm) of an Nd: YVO ₄ laser (fundamental wave 1064 nm) can be used. Energy density of the laser is about 0.01 to 100 MW / cm ² (preferably 0.1 to 10 MW / cm ²⁾ is required. Then, irradiation is performed at a scanning speed of about 10 to 2000 cm / sec.

The continuous wave fundamental laser beam and the continuous wave harmonic laser beam may be irradiated, or the continuous wave fundamental laser beam and the pulsed harmonic laser beam may be irradiated. You may do it. By irradiating a plurality of laser beams, energy can be supplemented.

It is also possible to use a pulse oscillation type laser beam that oscillates the laser at an oscillation frequency that allows irradiation of the next pulse of laser light after the semiconductor film is melted by the laser light and solidifies. it can. By oscillating the laser beam at such a frequency, crystal grains continuously grown in the scanning direction can be obtained. A specific oscillation frequency of the laser beam is 10 MHz or more, and a frequency band that is significantly higher than a frequency band of several tens to several hundreds Hz that is normally used is used.

Further, the laser beam may be irradiated in an inert gas atmosphere such as a rare gas or nitrogen. Thereby, roughness of the semiconductor surface due to laser beam irradiation can be suppressed, flatness can be increased, and variations in threshold values caused by variations in interface state density can be suppressed.

Alternatively, a microcrystalline semiconductor film may be formed using SiH ₄ and F ₂ , or SiH ₄ and H ₂ , and then crystallized by performing laser irradiation as described above.

As another heat treatment, when a heating furnace is used, the amorphous semiconductor film is heated at 500 to 550 ° C. for 2 to 20 hours. At this time, the temperature may be set in multiple stages in the range of 500 to 550 ° C. so that the temperature gradually increases. In the first low-temperature heating step, hydrogen or the like of the amorphous semiconductor film comes out, so that it is possible to perform so-called hydrogen extraction that reduces film roughness during crystallization. Furthermore, it is preferable to form a metal element that promotes crystallization, such as nickel (Ni), over the amorphous semiconductor film because the heating temperature can be reduced. Even crystallization using such a metal element may be heated to 600 to 950 ° C.

However, when a metal element is formed, there is a concern that the electrical characteristics of the semiconductor element may be adversely affected. Therefore, it is necessary to perform a gettering step for reducing or removing the metal element. For example, as a gettering step, a step of capturing a metal element using an amorphous semiconductor film as a gettering sink may be performed.

Alternatively, a crystalline semiconductor film may be formed directly over the base insulating film. In this case, a crystalline semiconductor film is directly formed using heat or plasma using a fluorine-based gas such as GeF ₄ or F ₂ and a silane-based gas such as SiH ₄ or Si ₂ H _6. Can do.

In such a method for manufacturing a semiconductor film, when high temperature treatment is required, a quartz substrate with high heat resistance is preferably used.

A gate insulating film and a gate electrode are sequentially formed on the semiconductor film thus formed. As the gate insulating film, an oxide film containing silicon or a nitride film containing silicon can be used.

Thereafter, an impurity element is added in a self-aligning manner using the gate electrode as a mask. Then, a channel formation region is formed below the source and drain regions to which the impurity element is added and the gate electrode. At this time, a low concentration impurity region (LDD region) can be formed by tapering the end face of the gate electrode. A structure having a low concentration impurity region is called an LDD (lightly doped drain) structure. The LDD structure has a feature that resistance to hot carrier deterioration can be increased and off-leakage current can be reduced. When the low-concentration impurity region has a region overlapping with the gate electrode, it is called a gate overlap LDD structure (GOLD structure). The GOLD structure has a high current driving force and a very excellent feature against hot carrier deterioration resistance. For example, an LDD structure or a GOLD structure can be formed by using a stacked structure of gate electrodes and making the tapered shape of the first gate electrode different from the tapered shape of the second gate electrode. In such a gate electrode, the first conductive film is formed using tantalum nitride (TaN), the second conductive film is formed using tungsten (W), and the first conductive film is formed using tantalum nitride (TaN). A combination in which the second conductive film is made of titanium (Ti), a first conductive film is made of tantalum nitride (TaN), a second conductive film is made of aluminum (Al), and the first conductive film is made It is preferable to form a combination of tantalum nitride (TaN) and copper (Cu) as the second conductive film. Alternatively, a semiconductor film typified by a polycrystalline silicon film doped with an impurity element such as phosphorus (P) or an AgPdCu alloy may be used as the first conductive film and the second conductive film. In order to prevent the short channel effect as the channel formation region is miniaturized, an insulating material is formed on the side surface of the gate electrode, and a low-concentration impurity region is formed below the insulating material. preferable.

After that, the gate insulating film is opened, wirings connected to the source region and the drain region (respectively referred to as source wiring and drain wiring) are formed, and the thin film transistor can be completed.

However, in this embodiment mode, a passivation film 33 is formed so as to cover the gate electrode and the semiconductor film. The passivation film 33 can prevent the gate electrode surface from being oxidized. In addition, the defects (dangling bonds) of the semiconductor film can be terminated by hydrogen contained in the passivation film. As the passivation film 33, an oxide film containing silicon or a nitride film containing silicon, specifically, silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy) (x> y), silicon nitride oxide ( SiNxOy) (x> y) (x, y = 1, 2,...) Can be used. Further, this embodiment mode is characterized in that an interlayer insulating film is provided to improve flatness. An organic material or an inorganic material can be used for the interlayer insulating film. As the organic material, polyimide, acrylic, polyamide, polyimide amide, resist, benzocyclobutene, siloxane, or polysilazane can be used. Siloxane has a skeleton structure formed of a bond of silicon (Si) and oxygen (O). As a substituent, an organic group containing at least hydrogen (for example, an alkyl group or an aromatic hydrocarbon) is used. A fluoro group may be used as a substituent. Alternatively, an organic group containing at least hydrogen and a fluoro group may be used as a substituent. Polysilazane is formed using a liquid material containing a polymer material having a bond of silicon (Si) and nitrogen (N) as a starting material. As the inorganic material, silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy) (x> y), silicon nitride oxide (SiNxOy) (x> y) (x, y = 1, 2,... An insulating film containing oxygen or nitrogen such as ()) can be used. Further, a stacked structure of these insulating films may be used as the interlayer insulating film. For example, when an interlayer insulating film is formed using an organic material, flatness is improved, but moisture and oxygen are easily absorbed. In order to prevent this, an insulating film containing an inorganic material is preferably formed over the organic material. When an insulating film containing nitrogen is used as the inorganic material, intrusion of alkali ions such as Na in addition to moisture can be prevented. In this embodiment, a colored organic material is used for the first interlayer insulating film 34, and a light-transmitting organic material is used for the second interlayer insulating film 35. Color can be obtained by dispersing particles such as carbon black in an organic material. The colored organic material can suppress the wraparound of light due to wiring or the like. A function as a so-called black matrix can be achieved.

Thereafter, openings are formed in the first and second interlayer insulating films 34 and 35, the passivation film 33, and the gate insulating film 32, and source wirings and drain wirings 36 are formed. The source wiring and the drain wiring are formed with a single layer or a stacked layer using a conductive material. For example, a stacked structure of titanium (Ti), aluminum silicon (Al—Si), and Ti, a stacked structure of Mo, Al—Si, and Mo, or a stacked structure of MoN, Al—Si, and MoN is used. be able to. Alternatively, an aluminum alloy (Al (C + Ni)) film containing carbon and nickel (1 to 20 wt%) may be used as the conductive material. The (Al (C + Ni)) film has high heat resistance even after energization or heat treatment, and has a redox potential close to that of the pixel electrode (ITO or ITSO) shown below. It is a material that does not change greatly.

Thereafter, the pixel electrode 23 is connected to the source wiring and drain wiring 36 for connecting the thin film transistors Tr2 and Tr3. The pixel electrode is formed using a light-transmitting or non-light-transmitting material. For example, in the case of translucency, indium tin oxide (ITO), IZO (indium zinc oxide) in which 2 to 20% zinc oxide (ZnO) is mixed with indium oxide, and 2 to 20 in indium oxide. It is also possible to use ITO-SiOx (expressed as ITSO or NITO for convenience), organic indium, organic tin, or the like mixed with 1% of silicon oxide (SiO ₂ ). In addition to silver (Ag), an element selected from tantalum, tungsten, titanium, molybdenum, aluminum, and copper, or an alloy material or a compound material containing the element as a main component is used as the non-translucent material. it can.

An insulating film 37 is formed so as to cover the end of the pixel electrode 23. The insulating film 37 functions as a partition wall (bank) when forming the electroluminescent layer. The insulating film 37 may be formed using either an inorganic material or an organic material, like the interlayer insulating film.

Next, an opening is formed in the insulating film 37, and the electroluminescent layer 24 is formed in the opening. At this time, since the electroluminescent layer is formed so as to be in contact with the insulating film 37, it is preferable to have a shape in which the radius of curvature continuously changes so that no pinhole or the like is generated in the electroluminescent layer. In addition, the heat treatment of the insulating film 37 to the formation of the electroluminescent layer 24 may be continuously performed without being exposed to the atmosphere.

The material of the electroluminescent layer can be used as an organic material (including a low molecule or a polymer) or a composite material of an organic material and an inorganic material. The electroluminescent layer can be formed by a droplet discharge method, a coating method, or a vapor deposition method. The polymer material is preferably a droplet discharge method or a coating method, and the low molecular material is preferably an evaporation method, particularly a vacuum evaporation method. In this embodiment mode, a low molecular material is formed by a vacuum evaporation method as the electroluminescent layer.

Note that the type of molecular excitons formed by the electroluminescent layer can be a singlet excited state or a triplet excited state. The ground state is usually a singlet state, and light emission from the singlet excited state is called fluorescence. In addition, light emission from the triplet excited state is called phosphorescence. The light emission from the electroluminescent layer includes the case where either excited state contributes. Furthermore, fluorescence and phosphorescence may be used in combination, and either fluorescence or phosphorescence can be selected according to the emission characteristics of each RGB (emission luminance, lifetime, etc.). For example, a material in a triplet excited state may be used for the electroluminescent layer for R, and a material in a singlet excited state may be used for G and B.

The detailed electroluminescent layer is laminated in the order of HIL (hole injection layer), HTL (hole transport layer), EML (light emitting layer), ETL (electron transport layer), and EIL (electron injection layer) in this order from the pixel electrode 23 side. Has been. Note that the electroluminescent layer can have a single-layer structure or a mixed structure in addition to the stacked structure.

Specifically, CuPc or PEDOT is used as HIL, α-NPD is used as HTL, BCP or Alq _{3 is used} as ETL, and BCP: Li or CaF ₂ is used as EIL. Further, for example, EML may be Alq ₃ doped with a dopant corresponding to each emission color of R, G, and B (DCM in the case of R, DMQD in the case of G).

Note that the electroluminescent layer is not limited to the above materials. For example, instead of CuPc or PEDOT, an oxide such as molybdenum oxide (MoOx: x = 2 to 3) and α-NPD or rubrene can be co-evaporated to improve the hole injection property. A benzoxazole derivative (shown as BzOS) may be used for the electron injection layer.

Furthermore, when each RGB electroluminescent layer is formed, high-definition display can be performed using a color filter. This is because the color filter can correct a broad peak in the emission spectrum of each RGB so as to be sharp.

The case where the RGB electroluminescent layers are formed has been described above, but an electroluminescent layer exhibiting monochromatic light emission may be formed. In this case, full color display can be performed by combining a color filter and a color conversion layer. For example, when an electroluminescent layer that emits white or orange light is formed, full color display can be performed by providing a color filter or a combination of a color filter and a color conversion layer.

Needless to say, a monochromatic display may be performed by forming an electroluminescent layer that emits monochromatic light. For example, an area color type display can be performed using monochromatic light emission. The area color type is suitable mainly for displaying characters and symbols.

Thereafter, the second electrode 25 of the light emitting element 18 is formed so as to cover the electroluminescent layer 24 and the insulating film 37.

Note that the material of the pixel electrode (referred to as the first electrode for convenience) 23 and the second electrode 25 needs to be selected in consideration of the work function. The first electrode 23 and the second electrode 25 can both be an anode and a cathode depending on the pixel structure. Below, the electrode material used for an anode and a cathode is demonstrated.

As an electrode material used as the anode, it is preferable to use a metal, an alloy, an electrically conductive compound, a mixture thereof, or the like having a high work function (work function of 4.0 eV or more). As specific examples, ITO, ZnO, IZO, ITSO, gold, platinum, nickel, tungsten, chromium, molybdenum, iron, cobalt, copper, palladium, or a nitride of a metal material (for example, titanium nitride) is used. be able to.

Moreover, as an electrode material used as a cathode, it is preferable to use a metal, an alloy, an electrically conductive compound, a mixture thereof, or the like having a low work function (work function of 3.8 eV or less). Specific materials include elements belonging to Group 1 or Group 2 of the periodic table, that is, alkali metals such as lithium and cesium, and magnesium, calcium, strontium, and the like, and alloys containing them (Mg: Ag, Al: Li ) And compounds (LiF, CsF, CaF ₂ ), and transition metals including rare earth metals.

By setting the first electrode or the second electrode to be light-transmitting or non-light-transmitting, the light emission direction from the electroluminescent layer can be selected. For example, in the case where the first electrode and the second electrode are formed using a light-transmitting material, a dual emission display in which light from the electroluminescent layer is emitted to the substrate side 30 and the sealing substrate side is performed. Can do.

When light from the electroluminescent layer is emitted to the substrate 30, the first electrode may be light-transmitting and the second electrode may be non-light-transmitting. As a result, a bottom emission display device can be provided. In addition, when light from the electroluminescent layer is emitted to the sealing substrate side, the first electrode and the second electrode may be light-transmitting, and the second electrode may be light-transmitting. As a result, a top emission display device can be provided. Light can be effectively used by using a highly reflective conductive film for the non-translucent electrode provided on the side that does not correspond to the light emission direction.

In the present embodiment, since a colored organic material is used for the first interlayer insulating film 34, a non-translucent material is used for the first electrode and a translucent material is used for the second electrode. The top emission type. Further, by using a light-transmitting material such as ITO for the first electrode without using a colored organic material for the interlayer insulating film, a bottom emission type can be obtained.

Further, in the present embodiment, when it is necessary to make the first electrode and the second electrode translucent, a metal or an alloy containing these metals is formed very thinly, and ITO, IZO, ITSO or It can be formed by lamination with other transparent conductive films (including alloys).

The pixel portion can be formed as described above.

In order to prevent crosstalk between the signal line and the scanning line, an interlayer insulating film is preferably stacked. At this time, an organic material is preferably used for part of the interlayer insulating film in order to ensure a film thickness that does not cause crosstalk. When an inorganic material is used for the interlayer insulating film, it is preferable to use a low dielectric constant material (low-k material).

In addition, in the case where interlayer insulating films are stacked, when light from a light emitting element is emitted downward, light refraction at an interface between different materials may be prevented. For example, an opening is formed in the first interlayer insulating film, and a second interlayer insulating film is formed so as to fill the opening. As a result, light refraction at the interface between the first interlayer insulating film and the second interlayer insulating film can be prevented, and the light extraction efficiency can be increased.

A configuration example in which such an interlayer insulating film is stacked and an opening is formed in the interlayer insulating film is shown below.

FIG. 4B is different from FIG. 4A in that an interlayer insulating film is stacked and an opening is provided in the first interlayer insulating film. The opening is formed in a region where the electroluminescent layer is provided. A thin film transistor having a multi-gate structure in which a plurality of gate electrodes are formed over a semiconductor film is used as the first switch 13. The description of other structures is omitted because it is similar to that of FIG. As a result, even when a colored organic material is used for the first interlayer insulating film, bottom emission can be performed. Even when a colored organic material is not used, the refraction of light at the interface of the interlayer insulating film or the like can be reduced by providing an opening in the first interlayer insulating film. In addition, when the first electrode and the second electrode are formed using a light-transmitting material, a dual emission type can be obtained. Of course, top emission can be performed by using a non-light-transmitting material for the first electrode and a light-transmitting material for the second electrode.

FIG. 5A is different from FIG. 4A in that the wiring 36 is formed after the pixel electrode 23 is formed. The description of other structures is omitted because it is similar to that of FIG.

FIG. 5B is different from FIG. 5A in that an opening is provided in the first interlayer insulating film. In the region where the electroluminescent layer is provided, an opening is provided in the first interlayer insulating film. A thin film transistor having a multi-gate structure in which a plurality of gate electrodes are formed over a semiconductor film is used as the first switch 13. Since the other structure is the same as that in FIG. 5A, FIG. 4A can be referred to. As a result, even when a colored organic material is used for the first interlayer insulating film, bottom emission can be performed. Even when a colored organic material is not used, the refraction of light at the interface of the interlayer insulating film or the like can be reduced by providing an opening in the first interlayer insulating film. Further, by using a light-transmitting material for the first electrode and the second electrode, a dual emission type can be obtained as shown in FIG. Of course, top emission can be performed by using a non-light-transmitting material for the first electrode and a light-transmitting material for the second electrode.

FIG. 6A differs from FIG. 4A in that the passivation film has a laminated structure, the wiring 36 is formed before the interlayer insulating film is formed, the opening is formed in the interlayer insulating film 34, and the wiring 36 is connected. In short, the pixel electrode 23 is formed. As the passivation film, a silicon oxynitride (SiNO) film can be used for the first layer, and a silicon nitride oxide (SiON) film can be used for the second layer. In the pixel shown in FIG. 6A, a structure in which the first interlayer insulating film 34 and the second interlayer insulating film 35 are stacked may be used. The description of other structures is omitted because it is similar to that of FIG.

FIG. 6B is different from FIG. 6A in that an opening is provided in the first interlayer insulating film. In the region where the electroluminescent layer is provided, an opening is provided in the first interlayer insulating film. A thin film transistor having a multi-gate structure in which a plurality of gate electrodes are formed over a semiconductor film is used as the first switch 13. The other structures are the same as those in FIG. 6A, so that FIG. 4A can be referred to. As a result, even when a colored organic material is used for the first interlayer insulating film, bottom emission can be performed. Even when a colored organic material is not used, the refraction of light at the interface of the interlayer insulating film or the like can be reduced by providing an opening in the first interlayer insulating film. Further, by using a light-transmitting material for the first electrode and the second electrode, a dual emission type can be obtained as shown in FIG. Of course, top emission can be performed by using a non-light-transmitting material for the first electrode and a light-transmitting material for the second electrode.

FIG. 43 shows a cross-sectional view of CD and EF in FIG. In the pixel configuration of the present invention, a structure in which the pixel electrode 23 used as the electrode of the light emitting element and the wiring 36 are connected for each pixel may be applied. In FIG. 43, the pixel electrode 23 and the wiring 36 are directly connected, but they may be connected via a conductive film (typically ITO) formed as the same layer as the pixel electrode 23. When the pixel electrode 23 and the wiring 36 are connected in this way, the wiring 36 can be used as an auxiliary wiring for the pixel electrode 23 by setting the pixel electrode 23 and the wiring 36 to the same potential. Even if the auxiliary wiring causes a high resistance because the pixel electrode 23 is formed thin, a voltage drop can be suppressed.
The auxiliary wiring can be shared with the storage capacitor wiring and the inverter power supply line. As a result, auxiliary wiring can be provided without increasing the number of wirings. With such a configuration, the manufacturing yield can be improved. The configuration of the auxiliary wiring shown in FIG. 43 can be applied to any of the pixel configurations of the present invention.

FIG. 7A is different from FIG. 6A in that the wiring 36 is provided in two layers. That is, an opening is provided in the first interlayer insulating film 34 to form the wiring 36a, then a second interlayer insulating film 35 is formed, and an opening is provided in the second interlayer insulating film 35 to form the wiring 36b. Form. For example, an aluminum alloy (Al (C + Ni)) containing carbon and nickel (1 to 20 wt%) can be used as the wiring 36a, and a laminated structure of Ti, an alloy of Al, Si, and Ti can be used as the wiring 36b. . The other structures are the same as those in FIG. 6A, so the description of FIG. 4A can be referred to.

FIG. 7B is different from FIG. 7A in that an opening is provided in the first interlayer insulating film. In the region where the electroluminescent layer is provided, an opening is provided in the first interlayer insulating film. A thin film transistor having a multi-gate structure in which a plurality of gate electrodes are formed over a semiconductor film is used as the first switch 13. The other structures are the same as those in FIG. 7A, so that FIG. 4A can be referred to. As a result, even when a colored organic material is used for the first interlayer insulating film, bottom emission can be performed. Even when a colored organic material is not used, the refraction of light at the interface of the interlayer insulating film or the like can be reduced by providing an opening in the first interlayer insulating film. Further, by using a light-transmitting material for the first electrode and the second electrode, a dual emission type can be obtained as shown in FIG. Of course, top emission can be performed by using a non-light-transmitting material for the first electrode and a light-transmitting material for the second electrode.

In this way, when the pixel electrode 23 is formed on a flat surface such as an interlayer insulating film, a voltage can be applied uniformly. As a result, a good image display can be performed.

In addition, the display device thus formed may be provided with a polarizing plate and a circular polarizing plate in order to improve contrast. In this case, when the light emission side of the light emitting element is provided with a film having a light emission wavelength band as a central wavelength and polarizing the wavelength region (polarizing film), the contrast is improved and the mirror surface is formed by wiring or the like ( (Reflection) can be prevented.

FIG. 41 is a cross-sectional view of a part of the pixel portion shown in FIG. 6 and a region of the first gate driver 41 and the second gate driver 42. Although not shown in FIG. 6, the first or second capacitor element can be formed using a gate electrode material and a wiring 36 such as an interlayer insulating film 34. A sealing material 408 is provided in the first and second gate driver regions. The counter substrate 406 can be attached to the substrate with the sealing material. A space formed when the counter substrate 406 is attached to the counter substrate 406 may be filled with an inert gas such as nitrogen or a resin material, or a desiccant may be provided. Deterioration of the light emitting element 15 due to moisture or oxygen can be prevented.

In addition, as shown in FIG. 41, by providing the sealing material on the gate driver, it is possible to achieve a narrow frame of the display device. Further, a sealing material may be provided on the source driver. However, since many lead wires are provided, attention is required.

Such a sealing structure can be applied to any pixel configuration shown in FIGS. 4, 5, and 7.

Note that this embodiment can be freely combined with any of the other embodiments.

(Embodiment 5)
In this embodiment, a structure of a display panel including the pixel portion described in the above embodiment will be described.

As shown in FIG. 8, the display panel includes a pixel region 40 in which a plurality of the above-described pixels are arranged in a matrix, a first gate driver 41, a second gate driver 42, and a source driver 43. The first gate driver 41 and the second gate driver 42 may be disposed so as to face each other with the pixel region 40 interposed therebetween, or may be disposed in one of the upper, lower, left, and right sides of the pixel region 40.

The source driver 43 includes a pulse output circuit 44 and a selection circuit 46. The selection circuit 46 includes a switch, and the switch is controlled by a selection signal (select signal) from a wiring (selection wiring) 47. Then, the video signal 20 or the reference signal 21 is input to the signal line (Si) 10 by the switch.

A specific example of the source driver will be described below.

As shown in FIG. 9, the pulse output circuit 44 includes a shift register (S / R) 70, and a start clock pulse (SCK) and an inverted start clock pulse (SCKB) are input to the shift register. The pulse output circuit has a first switch Sw71, and when the switch is selected based on the start clock pulse, the video signal 20 is output. Note that the first analog switch 71 includes a thin film transistor.

As illustrated in FIG. 10, the selection circuit 46 includes a second switch Sw 72, and the second switch 72 includes a first analog switch 73, a second analog switch 74, and an inverter 75. The first and second analog switches 73 and 74 and the inverter circuit 75 have thin film transistors having different polarities. The first analog switch 73 is connected to the first switch 71 of the pulse selection circuit 44 on its input side, and the signal line (Si) 10 is connected to its output side. The second analog switch 74 receives the reference signal 21 on its input side, and is connected to the signal line (Si) 10 on its output side. The inverter 75 is provided so that the first analog switch 73 and the second analog switch 74 are alternately selected.

When the first analog switch 73 is selected by such a source driver 43, the video signal 20 is input to the signal line 10, and when the second analog switch 74 is selected, the reference signal 21 is the signal line 10. Is input. The period during which the first analog switch 73 is selected is the video signal input period T2, and the period during which the second analog switch 74 is selected is the reference signal input period T1.

As shown in FIG. 11, the function of the pulse output circuit 44 and the function of the selection circuit 46 can be shared. A source driver 43 shown in FIG. 11 has a NAND 76 connected to the shift register 70. The first analog switch 77 and an inverter 79 provided so that the first analog switch 77 is selected. The second analog switch 78 to which the reference signal 21 is input and the inverter 80 provided so that the second analog switch 78 is selected. The signal lines 10 are connected to the output sides of the first and second analog switches 77 and 78. Note that one of the first analog switch 77 and the second analog switch 78 is selected by the NAND 76. The period during which the first analog switch 77 is selected is the video signal input period T2, and the period during which the second analog switch 78 is selected is the reference signal input period T1.

The source driver is not limited to the configuration shown in FIGS. 9 to 11, and may be any circuit as long as the video signal 20 and the reference signal 21 are alternately input to the signal line 10.

The first gate driver 41 has a pulse output circuit 54 and a selection circuit 55. The second gate driver 42 has a selection circuit 57. The selection circuits 55 and 57 are connected to the first selection wiring 52a and the second selection wiring 52b, respectively. The pulse signal A (select pulse A) input from the first selection wiring 52a and the pulse signal B (select pulse B) input from the second selection wiring 52b have an inverted relationship. The pulse signal A is input to the first scanning line Ga based on the signal from the first selection circuit 57a. The pulse signal B is input to the first scanning line Ga based on the signal from the second selection circuit 57b. With the pulse signal A and the pulse signal B, a pulse signal input to the first scanning line Ga as shown in FIG. Based on the pulse signal, the first switch 13 is selected.

In addition, a pulse signal as shown in FIG. 2C is input from the pulse output circuit 54 to the second scanning line Gb. In order to generate the pulse signal, the pulse output circuit 54 has a delay flip-flop circuit (DFF) as shown in FIG. A pulse signal is output from each DFF, but in order to create a pulse signal as shown in FIG. 2C, every other output wiring 58 is provided. Based on the pulse signal, the second switch 14 is selected.

A pulse signal (select pulse A) input to the first scanning line (Ga) 11 as shown in FIG. 2C is input from the first selection circuit 57a. At this time, a thin film transistor corresponding to the first switch 13 included in the pixel is selected, and the video signal 20 is input from the signal line 10.

The pulse output circuit 54 included in the first gate driver 41 may be formed using a shift register or a decoder circuit including a plurality of flip-flop circuits. Further, the pulse output circuit 44 included in the source driver 43 may be formed using a shift register or a decoder circuit including a plurality of flip-flop circuits. If a decoder circuit is applied as the pulse output circuits 44, 54 and 56, the source line Sx or the scanning line Gy can be selected at random.

The configuration of the source driver 43 is not limited to the above description, and other circuits such as a level shifter or a buffer may be provided. The configurations of the first gate driver 41 and the second gate driver 42 are not limited to the above description, and other circuits such as a level shifter or a buffer may be provided.

In addition, the source driver 43, the first gate driver 41, and the second gate driver 42 may include a protection circuit. The protection circuit is one or a plurality selected from a resistor element, a capacitor element, and a rectifier element. The rectifying element is a transistor or a diode in which a gate electrode and a drain electrode are connected. Such a protection circuit can prevent electrostatic breakdown due to a large current such as static electricity. Details of the protection circuit will be described in the following embodiments.

The display device of the present invention includes a power supply control circuit 63. The power supply control circuit 63 includes a power supply circuit 61 that supplies power to the light emitting element 18 and a controller 62. The power supply circuit 61 has a power supply 83, and the power supply 83 is connected to the counter electrode of the light emitting element 18.

When a forward voltage (forward voltage) is applied to the light emitting element 18 and current is caused to flow through the light emitting element 18 to emit light, the potential of the power supply 83 is set lower than the potential of the pixel electrode of the light emitting element 18. Set. On the other hand, when a reverse voltage is applied during the AC driving period, the potential of the power source 83 is set to be higher than the potential of the pixel electrode of the light emitting element 18. Such setting of the power supply 83 can be performed by inputting a predetermined signal from the controller 62 to the power supply circuit 61.

Applying a reverse voltage to the light emitting element 18 using the power supply control circuit 63 is preferable because the state of the light emitting element 18 can be improved and reliability can be improved as described above.

Further, the display panel preferably includes a monitor circuit 64 and a control circuit 65 that operate based on ambient temperature (hereinafter referred to as environmental temperature). The monitor circuit 64 includes a monitor light emitting element 66 (hereinafter referred to as a light emitting element 66). The monitor light-emitting element is formed in the same manner as the light-emitting element 18 provided in the pixel, but is not required to be used for image display. The monitor light emitting element 66 can obtain element change information depending on the environmental temperature.

Further, a current is supplied to the monitor light emitting element 66 by a constant current source or the like. At this time, a current similar to that of the light-emitting element 18 provided in the pixel is preferably supplied. In this way, deterioration information of the light emitting element can be obtained.

The control circuit 65 has a constant current source and a buffer. Such a control circuit 65 supplies a signal for changing the power supply potential to the power supply control circuit 63 based on the output of the monitor circuit 64. The power supply control circuit 63 changes the power supply potential supplied to the pixel region 40 based on the signal supplied from the control circuit 65. The present invention having the above-described configuration can improve the reliability by suppressing the fluctuation of the current value caused by the change in the environmental temperature.

As described above, the drive voltage can be corrected by the monitor circuit 64 in accordance with the state of the light emitting element. The detailed configuration of the monitor circuit 64 and the like will be described in the following embodiment.

When the drive voltage exceeds the limit value, that fact may be displayed on the display surface. Alternatively, the luminance of the display surface may be gradually reduced or the display surface may be turned on.

Note that the thin film transistor in this embodiment may be any type of transistor other than a thin film transistor. These transistors may be formed on any substrate. That is, the circuit as shown in FIG. 8 may be formed entirely on a glass substrate, may be formed on a plastic substrate, may be formed on a single crystal substrate, or may be an SOI substrate. It may be formed on the top. Alternatively, part of the circuit in FIG. 8 may be formed on a certain substrate, and another part of the circuit in FIG. 8 may be formed on another substrate. That is, as shown in FIG. 8, it is not necessary that all circuits are formed on the same substrate. For example, in FIG. 8, a pixel region 40 and a gate driver 41 are formed on a glass substrate using a TFT, a source driver 43 (or part thereof) is formed on a single crystal substrate, and the IC chip is formed. You may connect by COG (Chip On Glass) and arrange | position on a glass substrate. Alternatively, the IC chip may be connected to a glass substrate using TAB (Tape Auto Bonding) or a printed board.

Note that this embodiment can be freely combined with any of the other embodiments.

(Embodiment 6)
In this embodiment mode, a structure of the display panel having the pixel portion described in the above embodiment mode and sharing the first and second gate drivers will be described with reference to FIGS.

The source driver 43 includes a pulse output circuit 44 and a selection circuit 46, and has the same configuration as that in FIG.

The gate driver 91 includes a pulse output circuit 92 and a selection circuit 94. The selection circuit 94 includes NANDs 96 and 97, inverters 98, 99, and 111 and a NOR 110 corresponding to each scanning line. The first selection wiring 52 a is connected to one terminal of the NAND gate 96. The other terminal of the NAND 96 is connected to a wiring (G2S1G) to which a pulse signal is input. The second selection wiring 52 b is connected to one terminal of the NAND gate 97. The other terminal of the NAND gate 97 is connected to the pulse output circuit 92. The output side of NAND 96 is connected to the input side of inverter 98. The output side of the NAND 97 is connected to the input side of the inverter 99. The output sides of the inverters 98 and 99 are connected to the input side of the NOR 110, and the output side of the NOR 110 is connected to the input side of the inverter 111.

Similar to the above embodiment, the pulse output circuit 44 included in the source driver 43, the first pulse output circuit 94 included in the gate driver 91, and the second pulse output circuit 92 include a shift register including a plurality of flip-flop circuits, A decoder circuit can be used. If a decoder circuit is applied as the pulse output circuits 44, 92, 93, the source line Sx or the scanning line Gy can be selected at random.

The configuration of the source driver 43 is not limited to the above description, and other circuits such as a level shifter or a buffer may be provided. The configuration of the gate driver 91 is not limited to the above description, and other circuits such as a level shifter or a buffer may be provided. Further, as in the above embodiment, the source driver 43 and the gate driver 91 have a protection circuit. Details of the protection circuit will be described in the following embodiments.

By sharing the gate driver in this way, the area occupied by the pixel region 40 can be increased. As a result, the display panel can be narrowed.

Note that this embodiment can be freely combined with any of the other embodiments.

(Embodiment 7)
In this embodiment mode, an operation of applying a reverse voltage and a pixel configuration for the operation will be described.

As shown in FIG. 18, the inverter 17 will be described based on a pixel provided with a p-channel thin film transistor and an n-channel thin film transistor. In FIG. 18, one voltage of the inverter 17 is denoted as V1, the other voltage of the inverter 17 is denoted as V2, the potential of the counter electrode of the light emitting element 18 is denoted as V3, and the low potential of the first capacitor element 15 is denoted as V4.

In the pixel configuration illustrated in FIG. 18, in order to apply a reverse voltage during the AC driving period, the potential difference between the counter electrode of the light emitting element 18 and the pixel electrode may be set to be inverted.

Therefore, for example, as shown in FIG. 23, the potential V3 of the counter electrode is raised from the potential of the pixel electrode in the AC driving period. That is, a case where the potential of the counter electrode of the light emitting element 18 is changed will be described. In the pixel configuration shown in FIG. 18, the pixel electrode of the light emitting element 18 is turned on when the potential is higher than the potential V3 of the counter electrode. When the potential V3 of the counter electrode is equal to the potential V1 of the inverter 17 as a result of applying the potential of the counter electrode of the light emitting element 18, the n-channel transistor of the inverter 17 is turned on in the AC driving period. As a result, a reverse voltage is applied to the light emitting element connected to the inverter 17. When the potential V3 of the counter electrode is larger than V1 included in the inverter 17, a reverse voltage can be applied to all the pixels in the AC driving period.

Note that, in the AC drive period, as shown in FIG. 23, the potential V3 of the counter electrode may be increased and the one voltage V1 of the inverter 17 may be decreased.

Further, the method of applying the reverse voltage, the circuit configuration, or the timing is not limited to FIG. 23 or FIG. For example, there is another configuration in which the potential of the counter electrode is fixed. The pixel configuration and operation in this case will be described below.

With respect to the pixel shown in FIG. 18, when the potential of the reference signal 21 is lower than the video signal 20 in one frame period as shown in FIG. On the other hand, when the potential of the reference signal 21 is larger than that of the video signal 20, a non-gradation display period is entered. At this time, a reverse voltage is applied and an AC driving period is set.

However, as described above, the potential V3 of the counter electrode of the light emitting element 18 is fixed and is made larger than V2 of the inverter 17. As a result, a reverse voltage can be applied to the light emitting element 18. That is, by satisfying the potential, a reverse voltage can be applied to the light emitting element 18 at all times when the lamp is not lit.

A case where an erasing period Te is provided and a reverse voltage is applied during the erasing period will be described. In this case, this can be achieved by a pixel configuration different from that in FIG. For example, as shown in FIG. 20, a pixel configuration in which a transistor Tr2 is added to the pixel configuration shown in FIG. The transistor Tr2 is provided so as to discharge the charge of the second capacitor element 16, and the light emitting element 18 is not lit when the transistor Tr2 is turned on. In this embodiment mode, the transistor Tr2 is formed using a p-channel thin film transistor. Therefore, as shown in FIG. 21, the transistor Tr2 is turned on when Low is input to the erasing scan line Ge. The transistor Tr2 is controlled by the erasing scan line Ge. A period in which the light emitting element 18 is not lit is called an erasing period.
Note that, during one frame period, the potential of the counter electrode of the light emitting element 18 is fixed to V3 and set to be larger than V2 of the inverter 17. As a result, a reverse voltage can be applied to the light emitting element 18 in the erasing period. That is, when the erasing scan line is selected in order and the transistor Tr2 is turned on, a reverse voltage can be applied to the pixel. In the pixel shown in FIG. 20, a reverse voltage can be applied not only when the transistor Tr2 is turned on but also when the light emitting element 18 is not lit by a video signal.

A timing chart in such a pixel structure is the same as that shown in FIGS. 22B and 22C, and a description thereof will be omitted.

Thus, the effect of preventing an afterimage can be achieved by turning off the light emitting element 18.

Further, as shown in FIG. 22A, in one gate selection period, in addition to the reference signal input period T1 and the video signal input period T2, an erase signal input period T3 is provided, and this erase signal input period has a reverse direction. A voltage can be applied.

In the erasing signal input period T3, the erasing video signal is input from the signal line 10 and is not lit. On the other hand, the potential of the counter electrode of the light emitting element 18 is fixed at V3 and is larger than V2 of the inverter 17. As a result, a reverse voltage can be applied to the light emitting element 18. In this case, a reverse voltage can be sequentially applied to the pixels.

In the timing chart in this case, as shown in FIG. 22B, the erasing period Te starts after the writing period Ta ends in one frame period. For example, when attention is paid to the pixel in the k-th row, as shown in FIG. 22C, a gradation display period and an erasing period, that is, an AC driving period appear in one frame period.

A reverse voltage can be applied with a pixel configuration different from the above. An example thereof will be described with reference to FIG.

FIG. 24 shows a pixel configuration in which a third switch Sw3 and a fourth switch Sw4 are provided in the pixel configuration shown in FIG. In addition, the voltage at one end of the fourth switch Sw4 that is not connected to the light emitting element (simply referred to as one end of the fourth switch) is denoted as Vb. The third switch Sw3 and the fourth switch Sw4 are controlled by the scanning line Gb. Further, since the third switch Sw3 and the fourth switch Sw4 are connected via the inverter INV5, they perform an inverting operation.

In such a pixel configuration, the potential V3 of the counter electrode of the light emitting element 18 is set to be higher than the potential Vb at one end of the fourth switch. In such a configuration, when the fourth switch Sw <b> 4 is selected, a reverse voltage is applied to the light emitting element 18. Note that the potential Lb at one end of the fourth switch may be changed for each row or may be changed for all rows at the same time. Further, the potential V3 of the counter electrode of the light emitting element 18 may be controlled to be higher than the potential Vb at one end of the fourth switch only when the fourth switch Sw4 is selected. Similarly, the potential VbVb at one end of the fourth switch may be set lower than the potential V3 of the counter electrode only when the fourth switch Sw4 is selected. Further, the potential Vb at one end of the fourth switch and the potential V3 of the counter electrode of the light emitting element 18 may be fixed so as to satisfy the voltage.

By applying a reverse voltage to the pixel structure as shown in this embodiment mode, it is preferable that the influence due to the initial failure or the like can be reduced as described above.

In this embodiment, the case where a reverse voltage is applied to the light emitting element 18 has been described. Similarly, the reverse voltage can be applied to the light emitting element 66 for monitoring. As a result, initial deterioration of the light emitting element 66 can be reduced. Further, it is preferable to apply a reverse voltage to the light emitting element 66 simultaneously with applying a reverse voltage to the light emitting element 18. This is because the state of the light emitting element 66 and the state of the light emitting element 18 are approximately the same, and thus the accuracy of the voltage corrected based on the light emitting element 66 can be increased.

Note that this embodiment can be freely combined with any of the other embodiments.

(Embodiment 8)
In this embodiment, a temperature compensation function will be described.

In the present embodiment, the element having a temperature compensation function has a monitor circuit 64 that operates based on the ambient temperature as shown in FIG. 15, and the monitor circuit 64 has a monitor light emitting element 66. One electrode of the light emitting element 66 is connected to a power source maintained at a constant potential (grounded in the configuration shown in the figure), and the other electrode is connected to the control circuit 65. The control circuit 65 includes a constant current source 121 and an amplifier 122. The power supply control circuit 63 includes the power supply circuit 61 and the controller 62 as described above. The power supply circuit 61 is preferably a variable power supply that can change the power supply potential to be supplied. Temperature compensation is performed by the monitor circuit 64, the control circuit 65, and the power supply control circuit 63.

Next, the mechanism in which the light emitting element 66 detects environmental temperature is demonstrated. A constant current is supplied from the constant current source 121 between both electrodes of the light emitting element 66. That is, a constant current is always supplied to the light emitting element 6. In such a light emitting element 66, when the environmental temperature changes, the resistance value of the light emitting element 66 itself changes. When the resistance value of the light emitting element 66 changes, the current value of the light emitting element 66 is always constant, so that the potential difference between both electrodes of the light emitting element 66 changes. A change in the environmental temperature is detected by detecting a change in the potential difference of the light emitting element 66 due to this temperature change. At this time, since the potential of the electrode on the side where the light emitting element 66 is maintained at a constant potential does not change, a change in the potential of the electrode connected to the constant current source 121 is detected. A signal including information on the change in potential of the light emitting element is supplied to the amplifier 122, amplified by the amplifier 122, and then output to the power supply control circuit 63. The power supply control circuit 63 changes the reference signal 21 based on the output of the monitor circuit 64 via the amplifier 122. Specifically, the potential of the reference signal 21 is controlled. As a result, the luminance of the light emitting element 18 can be corrected in accordance with the temperature change.

Note that although a plurality of light emitting elements 66 are provided in FIG. 15, the invention is not limited to this. That is, the number of light emitting elements 66 provided in the monitor circuit 64 is not limited. For example, a monitor light emitting element for each RGB may be provided. This is because temperature characteristics differ depending on each RGB. In this case, the potential of the pixel electrode may be controlled as described above.

Further, a configuration in which a transistor is connected in series to the light emitting element 66 may be applied as a monitoring element. In that case, for example, the transistor is always turned on. The transistor can be used as a limiter. The transistor can be manufactured in a manner similar to that of the transistor included in the pixel. When used as a limiter, it is preferable to increase the channel width or channel length of the transistor.

Although the case where the reference signal is corrected has been described above, the potential of the pixel electrode of the light emitting element 18 and the potential of the counter electrode may be controlled.

A case where the potential of the pixel electrode is controlled will be described with reference to FIGS. In the pixel configuration illustrated in FIG. 25A, a compensation circuit 300a is provided in the pixel electrode through the inverter 17. With this compensation circuit 300a, the potential of the pixel electrode of the light emitting element 18 can be controlled.

In the pixel configuration illustrated in FIG. 25B, the compensation circuit 300a is provided in the pixel electrode through the transistor Tr4. With this compensation circuit 300a, the potential of the pixel electrode of the light emitting element 18 can be controlled.

As described above, when controlling the potential of the pixel electrode, since the pixel electrode is provided in each pixel, a difference in temperature change due to each RGB can be considered, which is preferable.

FIG. 26 shows a specific configuration of the compensation circuit 300a. The compensation circuit 300 a includes a light emitting element 66, an amplifier 301 connected to the pixel electrode of the light emitting element 66, and a constant current source 302. The negative side of the operational amplifier is connected to the output side of the operational amplifier. The positive side of the operational amplifier is connected to the constant current source 302.

With such a compensation circuit, a change in potential difference of the light emitting element 66 due to a temperature change can be detected. More specifically, since the potential of the electrode on the side of the light emitting element 66 maintained at a constant potential does not change, a change in the potential of the electrode connected to the constant current source 302 is detected. A signal including information on the change in pixel potential of the light emitting element is supplied to the amplifier 301 and amplified by the amplifier 301. The amplified signal is input to the pixel electrode of the light emitting element 18 and controlled so as to have a potential corresponding to the temperature change.

A case where the potential of the counter electrode is controlled will be described with reference to FIG. In the pixel configuration shown in FIG. 27, a compensation circuit 300b is provided in the counter electrode. With this compensation circuit 300b, the potential of the counter electrode of the light emitting element 18 can be controlled.

FIG. 28 shows a specific configuration of the compensation circuit 300b. The compensation circuit 300b includes a light emitting element 66, a constant current source 302 connected to the pixel electrode of the light emitting element 66, and an amplifier 301 connected to one end of the constant current source 302 not connected to the pixel electrode. ing. The negative side of the operational amplifier is connected to the output side of the operational amplifier. The positive side of the operational amplifier is connected to the constant current source 302.

With such a compensation circuit, a change in potential difference of the light emitting element 66 due to a temperature change can be detected. More specifically, since the potential of the electrode on the side of the light emitting element 66 maintained at a constant potential does not change, a change in the potential of the electrode connected to the constant current source 302 is detected. A signal including information on the change in the counter potential of the light emitting element is supplied to the amplifier 301 and amplified by the amplifier 301. The amplified signal is input to the counter electrode of the light emitting element 18 and controlled so as to have a potential corresponding to the temperature change.

As described above, the potential of the pixel electrode or the counter electrode of the light-emitting element 18 can be controlled in accordance with the temperature change. As a result, light can be emitted with a predetermined luminance regardless of temperature changes.

A more detailed example of the compensation circuit 300a is shown in FIGS. The pixel portion shown in FIG. 29 includes at least an inverter 17 and a light emitting element 18 as shown in FIG. The monitoring light emitting element 66 is connected to the counter electrode of the light emitting element 18 through the power line 226.

If the current / voltage characteristics of the light emitting element 18 change with respect to temperature, even if a constant voltage is applied, the luminance becomes high at high temperature and low luminance at low temperature. In order to correct this, a constant current is supplied from the constant current source 302 to the light emitting element 66, and a voltage generated there is applied to the power supply line 228 via the amplifier 301 and the transistor 213. The power line 228 is connected to the pixel electrode of the light emitting element 18 via the inverter 17. When such a compensation circuit is used, if the light-emitting element 66 and the light-emitting element 18 are formed of the same material, the temperature characteristic is canceled and the luminance can be kept constant with respect to the temperature.

In addition to the amplifier 301, a switching regulator is provided. The switching regulator includes a first comparator 201, a second comparator 202, an oscillation circuit 204, a smoothing capacitor 205, a diode 206, a switch transistor 208, an inductor 209, and reference power supplies 203 and 207. 224 and an attenuator 210. The reference power source 207 uses a power source having a large current capacity, such as a battery.

The configuration of the switching regulator is not limited to the above, and other configurations may be used. In FIG. 29, the switch transistor is an NPN bipolar transistor, but the present invention is not limited to this.

The output signal of the oscillation circuit 204, the reference voltage 203, and the output signal of the first comparator 201 are compared by the second comparator 202, and the switching transistor 208 is controlled by the output signal of the second comparator 202. When the switch transistor 208 is turned on, a current flows through the inductor 209 and magnetic field energy is held in the inductor 209. When the transistor 208 is turned off, the magnetic field energy changes to a voltage and charges the smoothing capacitor 205 via the diode 206. The DC voltage generated in the smoothing capacitor 205 varies depending on the on / off duty ratio of the switching transistor 208.

The DC voltage of the smoothing capacitor 205 is attenuated by the attenuator 210 and input to the first comparator 201. The first comparator 201 compares the reference voltage 224 with the voltage of the attenuator 210 and inputs the output to the second comparator 202. In this way, feedback is applied and a necessary voltage can be generated in the smoothing capacitor 205. In the configuration shown in FIG. 29, the constant current source 302, the amplifier 301, and the light emitting element 66 are directly connected, but may be connected via another element such as a resistor or a switch.

A configuration of a compensation circuit different from that in FIG. 29 will be described with reference to FIG. In the configuration shown in FIG. 29, the voltage of the smoothing capacitor 205 does not depend on temperature and takes a constant value, but the light emitting element has temperature characteristics. In general, the voltage of a light emitting element is large at a low temperature and small at a high temperature. At high temperatures, the difference between the light emitting element voltage and the smoothing capacitor voltage becomes large, and this amount consumes wasted power. In that case, useless power can be reduced if the switching regulator voltage decreases in conjunction with the light emitting element voltage at a high temperature.

FIG. 30 shows a configuration of a compensation circuit conceived to solve such a problem. The voltage of the light emitting element 66 is also input to the switching regulator, and the switching regulator voltage and the driving voltage of the light emitting element 18 are linked. Let

The specific configuration of the compensation circuit includes an amplifier 214 and an attenuator 215 in addition to the compensation circuit shown in FIG. The driving voltage of the light emitting element 18 is input to the first comparator 201 via the amplifier 214 and the attenuator 215. The DC voltage of the smoothing capacitor 205 is attenuated by the attenuator 210 and input to the first comparator 201. The first comparator 201 compares the voltages of the attenuator 215 and the attenuator 210 and inputs the output to the second comparator 202. In this way, feedback is applied and a necessary voltage can be generated in the smoothing capacitor 205. In the configuration shown in FIG. 30, the constant current source 302, the amplifiers 301 and 214, and the light emitting element 66 are directly connected, but may be connected via another element such as a resistor or a switch.

Further, a configuration different from that of the compensation circuit will be described with reference to FIG. The configuration shown in FIG. 31 is characterized in that the output of the switching regulator is directly connected to the second power supply terminal of the display panel. The driving voltage of the light emitting element 66 is also input to the switching regulator, and the switching regulator voltage and the driving voltage of the light emitting element 18 are linked.

As a specific configuration of the compensation circuit, the amplifier 301 and the transistor 213 are deleted from the compensation circuit shown in FIG. 30, and the output of the switching regulator is directly connected to the power supply line 228. Compared to the compensation circuit shown in FIG. 30, there is an advantage that amplifiers and transistors can be reduced although the stability is lowered. In the configuration shown in FIG. 31, the constant current source 302, the amplifier 214, and the monitor element 66 are directly connected, but may be connected via another element such as a resistor or a switch.

Furthermore, unlike the above compensation circuit, a configuration in which a plurality of light emitting elements 66 are provided will be described with reference to FIG. In the configuration shown in FIG. 32, the voltages of the plurality of light emitting elements 66 a and 66 b are also input to the switching regulator, and the switching regulator voltage and the driving voltage of the light emitting element 18 are linked. If two monitor elements (66a, 66b) are provided on both sides of the pixel portion and averaged by the adder circuit 216 and then connected to the amplifiers 214, 301, more accurate monitoring is possible. Further, in the present invention, the number of light emitting elements 66 can be further increased. By increasing the number of the light emitting elements 66, the characteristic difference between the light emitting elements 66 and the light emitting elements 18 can be reduced.

The voltages of the monitor elements 66a and 66b are input to the first comparator 201 via the adder circuit 216, the amplifier 214, and the attenuator 215. The DC voltage of the smoothing capacitor 205 is attenuated by the attenuator 210 and input to the first comparator 201. The first comparator 201 compares the voltages of the attenuator 215 and the attenuator 210 and inputs the output to the second comparator 202. In this way, feedback is applied and a necessary voltage can be generated in the smoothing capacitor 205. Although the constant current sources 302 and 217, the amplifier 301, and the light emitting elements 66a and 66b are directly connected here, they may be connected via other elements such as resistors and switches.

In the configuration shown in FIGS. 29 to 32, the first power supply line 226 and the second power supply line 228 of the display panel are fixed voltages, but the voltages applied to the first power supply line 226 and the second power supply line 228, respectively. The light emitting element 18 and the light emitting element 66 may be AC driven by periodically switching them by sandwiching a changeover switch or the like. In addition, although temperature compensation has been described with reference to FIGS. 29 to 32, the light emitting element 66 and the light emitting element 18 may be similarly deteriorated to compensate for deterioration of the light emitting element 18. I do not care.

In this embodiment, the case where the light emitting element 66 is used as the monitor circuit 64 has been described. However, the present invention is not limited to this, and a known temperature sensor may be used. When a known temperature sensor is used, it may be provided on the same substrate as the pixel region 40 or may be externally attached using an IC.

Since the temperature compensation function does not require any user operation, the temperature compensation function can be continuously corrected even after the display device is passed to the user. Therefore, the product can have a long life.

Note that this embodiment can be freely combined with any of the other embodiments.

(Embodiment 9)
In the present embodiment, deterioration information obtained from the monitor light emitting element 66 will be described.

In a driving method (voltage driving) in which a voltage is applied to a light emitting element to light up, there is a case where luminance deterioration proceeds more rapidly than in a driving method (current driving) in which a current is applied to a light emitting element to light up. In the case of voltage driving, it is considered that resistance between the cathode and the anode is increased in addition to deterioration of the light emitting element material. Therefore, when voltage driving is used, it is preferable to consider such deterioration in deterioration information obtained from the light emitting element for monitoring.

The monitor light emitting element 66 is connected to a constant current source and always lights up. That is, the lighting duty ratio of the monitor light emitting element 66 is 100%. On the other hand, the light emitting element 18 provided in the pixel is lower than 100%. This is because the light emitting element 18 is not lit when performing black display. This is also because the applied voltage varies according to the gradation display. Therefore, as shown in FIG. 42, at a certain time t, a difference (ΔV) occurs between the voltage obtained from the monitoring light emitting element 66 and the voltage to be applied to the light emitting element 18. As a result, the light emitting element 18 may not be able to obtain a predetermined luminance. Therefore, when voltage driving is used, such information should be taken into consideration in deterioration information obtained from the monitor light emitting element.

Moreover, it demonstrates using a theoretical formula below.

First, when current driving is performed with the initial luminance L ₀ and the current density J ₀ , the current efficiency η (t) decreases with time. This current efficiency η (t) is obtained at the following time t. Expressed as a function.
η (t) = L ₀ / J ₀ × f (t) (1)
Here, it is known that f (t) can be expressed by the following exponential function.
f (t) = exp {-(t / α) β} (2)
Α is a parameter representing medium-term or long-term degradation, β is a parameter representing initial degradation, and these can be obtained experimentally.

On the other hand, when the current density J changes with time t (that is, J = J (t)), the luminance L can be expressed by the following equation.
L = η (t) × J (t) (3)
Therefore, when voltage driving is performed, the following equation (4) must be established by setting L = L ₀ (= constant) in equation (3).
L ₀ = η (t) × J (t) (4)

By substituting equation (4) into equation (1), the following equation can be derived.
J (t) = J ₀ / f (t) (5)
Equation (5) is phenomenonally expressed as “In order to keep the luminance constant, the current density must be gradually increased from J ₀ in consideration of the decrease in current efficiency”. Represents. This is because, from equation (2), f (t) is a monotonically decreasing function.

By the way, in general, the current density is proportional to the power of the voltage (the power of x).
J (t) = C × V ^x (t) (6)
It is. x is a power to be determined by the element, and C is a constant.
Therefore, when the formula (6) is substituted into the formula (5) and the formula (2) is considered, the following formula is established.
V (t) = Const. × [exp (t / α) β] ^{1 / x} (7)
This expression (7) is an expression representing "how should the voltage change for voltage driving". Const. Is a constant (Const. = (J ₀ / C) ^{1 / x} ) determined by the initial current density J ₀ and x.

The drive voltage of the light emitting element 18 may be corrected in consideration of the above voltage rise in the information of the monitor light emitting element 66.

Based on these considerations, information on the material deterioration of the light emitting element may be accumulated and stored in a memory or the like. Further, deterioration information corresponding to the lighting duty ratio of the light emitting element may be accumulated and stored in a memory or the like. Based on the stored deterioration information and the deterioration information from the monitor light emitting element 66, the voltage applied to the light emitting element 18 is corrected. As a result, the luminance of the light emitting element 18 can be corrected in accordance with the temperature change.

Furthermore, information on material deterioration of the light emitting element for each RGB may be accumulated. Further, deterioration information corresponding to the duty ratio of lighting of the light emitting elements for each RGB may be accumulated. In this case, a monitor light emitting element 66 is provided for each of RGB.

As in the present embodiment, the deterioration information obtained from the monitor light emitting element 66 may be corrected by considering the material deterioration of the light emitting element and the lighting duty ratio. As a result, the accuracy of the corrected voltage applied to the light emitting element 18 can be increased.

(Embodiment 10)
In this embodiment, a protection circuit will be described.

The shift register 70 included in the source driver includes a unit circuit 130. As shown in FIG. 16, the unit circuit 130 has a plurality of transistors and a logic circuit. In the unit circuit 130, a resistance element 131 is provided as a protection circuit on a power supply line to which a start clock pulse (SCK) or an inverted start clock pulse (SCKB) is input. Further, a protection circuit may be provided anywhere in the unit circuit 130. Further, a resistance element may be provided as a protection circuit in the power supply line to which the video signal 20 is supplied. Further, a protection circuit may be provided between the selection circuit 46 and the signal line Si. As a result of providing the protective circuit in this way, it is possible to suppress deterioration and destruction of the element due to static electricity. More specifically, a clock signal or data signal input to the input node side may contain noise, and this noise may momentarily give a high voltage or a low voltage to the element. . However, the present invention having a protection circuit can suppress malfunction of the element, deterioration and destruction of the element.

Such a protection circuit can be formed using one or a plurality selected from a resistor element, a capacitor element, and a rectifier element.

Next, a protection circuit provided in the pulse output circuit included in the gate drivers 41, 42, and 91 will be described. As shown in FIG. 17, the pulse output circuit has a configuration in which a plurality of unit circuits (GSR) are connected in cascade, and the unit circuit (GSR) includes a tristate buffer 133 and a protection circuit 132. The tri-state buffer 133 prevents one of the first gate driver 41 and the second gate driver 42 from inputting a signal to the scanning line Ga or Gb so that the output from the other driver does not hinder it. Provide for. Therefore, an analog switch, a clocked inverter, or the like may be used in addition to the tristate buffer as long as it has the above functions. The protection circuit 132 includes element groups 134 and 135. Note that the element group included in the protection circuit includes not only a resistor element and a transistor but also one or a plurality selected from a resistor element, a capacitor element, and a rectifier element. The rectifying element is a transistor or a diode in which a gate electrode and a drain electrode are connected.

Next, the operation of the protection circuit 88 included in the gate driver will be described. First, it is assumed that a signal having a voltage higher than VDD is supplied from the output line of the tristate buffer 133 due to the influence of noise or the like. Then, the element group 134 is turned off and the element group 135 is turned on from the relationship between the gate-source voltages. Then, the charge charged in the tristate buffer 133 is discharged to the power supply line that transmits VDD, and the potential of the scanning line Ga or Gb becomes the potential of VDD or VDD + α. On the other hand, it is assumed that a signal having a voltage lower than VSS is supplied from the output line of the tristate buffer 87. Then, the element group 134 is turned on and the element group 135 is turned off from the relationship between the gate-source voltages. Then, the potential of the scanning line Ga or Gb becomes the potential of VSS or VSS-α. In this way, even if the voltage supplied from the output line of the tristate buffer 133 instantaneously becomes higher than VDD or lower than VSS due to noise or the like, it is given to the scanning line Ga or Gb. The voltage will not be higher than VDD nor lower than VSS. Therefore, malfunction, damage, and destruction of the element due to noise, static electricity, and the like can be suppressed.

Further, the protection circuit of this embodiment may be provided between a connection film such as an FPC (flexible print circuit) and the gate drivers 41 and 42 or the source driver 43.

Note that this embodiment can be freely combined with any of the other embodiments.

(Embodiment 11)
In this embodiment, a pixel structure which is different from that in the above embodiment is described.

13 includes a signal line (Si) 10, a first scanning line (Gc) 211, a second scanning line (Gb) 212, a first switch (Sw (c)) 213, and a second switch. (Sw (d)) 214, first capacitor element (Cs (c)) 215, second capacitor element (Cs (d)) 216, differential amplifier circuit 217, and light-emitting element 18. The first switch 213 and the second switch 214 can be manufactured using thin film transistors, for example. For example, an operational amplifier can be used as the differential amplifier circuit 217.

The connection relationship of such a pixel configuration will be described. One of the first switches 213 is connected to the signal line 10 and controlled by the first scanning line 211. One of the first capacitive elements 215 is connected to the other of the first switches. The other of the first capacitor elements is connected to an arbitrary wiring. Any wiring preferably has a fixed potential. Further, the first capacitor 215 only needs to have a function of holding charge input from the signal line 10. Specifically, the first capacitor 215 may hold the reference signal 21 input from the signal line 10. As described below, since the video signal 20 and the reference signal 21 are input in a very short time of one gate selection period in the present invention, the first capacitor element 15 can be small.

One of the second switches 214 is connected to the signal line 10 and controlled by the second scanning line 212. One of the second capacitive elements 216 is connected to the other of the first switches. The other of the second capacitor elements is connected to an arbitrary wiring. Any wiring preferably has a fixed potential. Further, the second capacitor 216 only needs to have a function of holding charge input from the signal line 10. Specifically, the second capacitor 216 may hold the video signal 20 input from the signal line 10.

On the input side of the differential amplifier circuit 217, the high potential side is connected to the first switch 214, and the low potential side is connected to the second switch 215.

The light emitting element 18 is connected to the output side of the differential amplifier circuit 217. Note that another element such as a switch, a transistor as a switch, or an inverter may be provided between the light emitting element 18 and the differential amplifier circuit 217.

With such a pixel configuration, the video signal 20 and the reference signal 21 can be input from one signal line. As a result, the aperture ratio of the pixel can be increased.

Next, the operation of the display device having the pixel configuration shown in FIG. 13 will be described. In the operation of the pixel configuration shown in FIG. 13, a gradation display period and an AC drive period are provided in one frame period, as in FIG. However, the present invention does not require an AC drive period.

In the gradation display period, a writing period in which scanning lines are sequentially selected is provided. In the writing period, the video signal 20 is input from the signal line 10. Further, the reference signal 21 is input from the signal line 10 in the writing period. These signals are input from the signal line 10 shown in FIG. Which signal is input is controlled by the first switch 213 or the second switch 214. Based on the magnitude relationship between the voltage of the video signal and the voltage of the reference signal 21, a signal is output from the differential amplifier circuit 217, a current is supplied to the light emitting element 18, and the light is turned on. The lighting time of the light emitting element is controlled by a signal from the differential amplifier circuit 217, and as a result, gradation display can be performed.

Note that this embodiment mode is characterized in that it is not necessary to operate a thin film transistor included in the differential amplifier circuit 217, particularly a p-channel thin film transistor, in a saturation region. In other words, since the thin film transistor can be operated in a linear region, it is not necessary to increase the driving voltage, and power consumption can be reduced.

In the AC driving period, a reverse voltage (reverse voltage) is applied to the light emitting element. For example, the counter electrode of the light emitting element and the potential of the low potential power source (Vss) included in the differential amplifier circuit 217 may be changed. As a result of applying the reverse voltage, the state of the light emitting element can be improved and the reliability can be improved, which is preferable.

FIG. 14 shows waveforms input to the first scanning line Gc of all rows and signals input to the second scanning line Gd in the i-th to (i + 2) -th rows. In the present embodiment, a reference signal input period T1 and a video signal input period T2 are provided in one gate selection period.

In the i-th row, a High signal is input to Gc (i) in one gate selection period. At this time, the first switch 213 is selected, the video signal 20 is input from the signal line 10, and electric charge is held in the first capacitor 215. In the one gate selection period, a low signal is input to the reference signal input period T1 and a high signal is input to the video signal input period T2 in Gd (i). When a high signal is input, the second switch 214 is selected, the video signal 20 is input from the signal line 10, and electric charge is held in the second capacitor 215.

Similarly, in the (i + 1) th row, a High signal is input to Gc (i + 1) in one gate selection period. At this time, the first switch 213 is selected, the reference signal 21 is input from the signal line 10, and the charge is held in the first capacitor 215. In the one gate selection period, a low signal is input to Gd (i + 1) in the reference signal input period T1, and a high signal is input in the video signal input period T2. When a high signal is input, the second switch 214 is selected, the video signal 20 is input from the signal line 10, and electric charge is held in the second capacitor 216.

Similarly, in the (i + 2) th row, a High signal is input to Gc (i + 2) in one gate selection period. At this time, the first switch 213 is selected, the reference signal 21 is input from the signal line 10, and the charge is held in the first capacitor 215. In the one gate selection period, a low signal is input to the reference signal input period T1 and a high signal is input to the video signal input period T2 in Gd (i + 2). When a high signal is input, the second switch 214 is selected, the video signal 20 is input from the signal line 10, and electric charge is held in the second capacitor 216.

As described above, the video signal and the reference signal are input. Based on the magnitude relationship between the potential of the video signal and the potential of the reference signal, a signal is output from the differential amplifier circuit 217, current is supplied to the light emitting element 18, and the light is turned on. The lighting time of the light emitting element is controlled by a signal from the differential amplifier circuit 217, and as a result, gradation display can be performed. Note that as described above, in this embodiment mode, the thin film transistor included in the differential amplifier circuit 217 does not need to be operated in the saturation region. Therefore, it is not necessary to increase the drive voltage, and power consumption can be reduced.

As described above, this embodiment is characterized in that the reference signal input period T1 and the video signal input period T2 are provided in one gate selection period. As a result, one signal line 10 can be shared, and the aperture ratio can be increased. In addition, since the reference signal input period T1 and the video signal input period T2 are provided in one gate selection period, the operating frequency of the scan line driver circuit is preferably increased.

The pixel structure described in this embodiment can be manufactured by the manufacturing method described in the above embodiment.

Even in the pixel structure described in this embodiment mode, the structure for applying a reverse voltage, the element having a temperature compensation function, or the protection circuit described in the above embodiment mode may be provided.

(Embodiment 12)
Mobile devices such as television devices (TVs, television receivers), digital cameras, digital video cameras, mobile phone devices (mobile phones), PDAs, and the like as electronic devices using display devices having pixel regions including light-emitting elements Examples thereof include a terminal, a portable game machine, a monitor, a computer, an audio playback device such as a car audio, and an image playback device equipped with a recording medium such as a home game machine. A specific example will be described with reference to FIG.

A portable information terminal using the display device of the present invention illustrated in FIG. 34A includes a main body 9201, a display portion 9202, and the like, and can reduce power consumption according to the present invention. A digital video camera using the display device of the present invention illustrated in FIG. 34B includes display portions 9701 and 9702, and the present invention can reduce power consumption. A portable terminal using the display device of the present invention illustrated in FIG. 34C includes a main body 9101, a display portion 9102, and the like, and can reduce power consumption according to the present invention. A portable television device using the display device of the present invention illustrated in FIG. 34D includes a main body 9301, a display portion 9302, and the like. Power consumption can be reduced by the present invention. A portable computer using the display device of the present invention illustrated in FIG. 34E includes a main body 9401, a display portion 9402, and the like. Power consumption can be reduced by the present invention. A television set using the display device of the present invention illustrated in FIG. 34F includes a main body 9501, a display portion 9502, and the like, and can reduce power consumption according to the present invention. Among the electronic devices mentioned above, those using a battery can extend the usage time of the electronic device by reducing the power consumption, and can save the trouble of charging the battery.

It is the circuit diagram which showed the pixel of this invention FIG. 4 is a diagram illustrating a pixel driving method according to the present invention. It is the top view which showed the pixel of this invention It is sectional drawing which showed the pixel of this invention It is sectional drawing which showed the pixel of this invention It is sectional drawing which showed the pixel of this invention It is sectional drawing which showed the pixel of this invention It is a whole panel view which has a pixel of the present invention. It is a figure which shows the drive circuit of this invention It is a figure which shows the drive circuit of this invention It is a figure which shows the drive circuit of this invention It is a whole panel view which has a pixel of the present invention. It is the circuit diagram which showed the pixel of this invention FIG. 4 is a diagram illustrating a pixel driving method according to the present invention. It is the figure which showed the temperature compensation function of this invention It is the figure which showed the protection circuit of this invention It is the figure which showed the protection circuit of this invention It is the figure which showed the pixel which applies the reverse voltage of this invention It is the figure which showed the operation | movement which applies the reverse voltage of this invention It is the figure which showed the pixel which applies the reverse voltage of this invention It is the figure which showed the operation | movement which applies the reverse voltage of this invention It is the figure which showed the operation | movement which applies the reverse voltage of this invention It is the figure which showed the operation | movement which applies the reverse voltage of this invention It is the figure which showed the pixel which applies the reverse voltage of this invention It is the figure which showed the pixel which has the temperature compensation function of this invention It is the figure which showed the compensation circuit of this invention It is the figure which showed the pixel which has the temperature compensation function of this invention It is the figure which showed the compensation circuit of this invention It is the figure which showed the compensation circuit of this invention It is the figure which showed the compensation circuit of this invention It is the figure which showed the compensation circuit of this invention It is the figure which showed the compensation circuit of this invention It is the figure which showed the structure of the shift register of this invention It is the figure which showed the electronic device of this invention It is the circuit diagram which showed the pixel of this invention It is the circuit diagram which showed the pixel of this invention It is the circuit diagram which showed the pixel of this invention It is the circuit diagram which showed the pixel of this invention It is the circuit diagram which showed the pixel of this invention It is the circuit diagram which showed the pixel of this invention It is sectional drawing which showed the display apparatus of this invention. It is a figure explaining the temperature compensation function of this invention It is sectional drawing which showed the pixel of this invention

Claims (27)

A signal line to which an analog signal and a reference signal are input; and
A first switch controlled by a first scan line;
A second switch controlled by a second scan line;
A light emitting element connected to the second switch,
In the first period of one gate selection period, the first switch and the second switch are selected, and the analog signal is input to the first switch,
In the second period of the one gate selection period, the first switch is selected, and a reference signal is input from the signal line to the first switch.
A driving method of a display device, wherein the light emitting element emits light based on the analog signal and the reference signal. A signal line to which an analog signal and a reference signal are input; and
A first switch controlled by a first scan line;
A second switch controlled by a second scan line;
An inverter provided at both ends of the second switch;
A light emitting element provided on the output side of the inverter;
In the first period of one gate selection period, the first switch and the second switch are selected, and the analog signal is input to the first switch,
In the second period of the one gate selection period, the first switch is selected, and a reference signal is input from the signal line to the first switch.
A display device driving method, wherein a signal is output from the inverter based on the analog signal and the reference signal, and the light emitting element emits light based on the signal. A signal line to which an analog signal and a reference signal are input; and
A first switch controlled by a first scan line;
A first capacitive element connected to one of the first switches;
A second switch controlled by a second scan line;
A second capacitive element provided between one of the first switches and one of the second switches;
An inverter provided with both ends of the second switch;
A light emitting element provided on the output side of the inverter;
In the first period of one gate selection period, the first switch and the second switch are selected, the analog signal is input to the first switch, and the charge corresponding to the analog signal is 2 to the capacitive element,
In the second period of the one gate selection period, the first switch is selected, a reference signal is input from the signal line to the first switch, and a charge corresponding to the reference signal is supplied to the first switch. Held in the capacitive element,
A display device driving method, wherein a signal is output from the inverter based on the analog signal and the reference signal, and the light emitting element emits light based on the signal. In any one of Claims 1 thru | or 3,
When the potential of the analog signal is higher than the potential of the reference signal, a signal is output from the inverter, and the light-emitting element is turned on based on the signal. In any one of Claims 1 thru | or 4,
A display device driving method, wherein a signal is output from the inverter, and gray scale display is performed according to a length of a period during which the light-emitting element is lit based on the signal. In any one of Claims 1 thru | or 5,
The inverter has a plurality of thin film transistors,
A driving method of a display device, wherein a thin film transistor connected to the light emitting element among the plurality of thin film transistors is operated in a linear region. A signal line to which an analog signal and a reference signal are input; and
A first switch controlled by a first scan line;
A second switch controlled by a second scan line;
A differential amplifier circuit in which the first switch and the second switch are provided on the input side;
A light emitting element provided on the output side of the differential amplifier circuit,
In the first period of one gate selection period, the first switch and the second switch are selected, and the analog signal is input to the first switch,
In the second period of the one gate selection period,
The first switch is selected, a reference signal is input from the signal line to the first switch,
A display device driving method, wherein a signal is output from the differential amplifier circuit based on the analog signal and the reference signal, and the light emitting element emits light based on the signal. A signal line to which an analog signal and a reference signal are input; and
A first switch controlled by a first scan line;
A first capacitive element connected to one of the first switches;
A second switch controlled by a second scan line;
A second capacitive element connected to one of the second switches;
A differential amplifier circuit in which the first switch and the second switch are provided on the input side;
A light emitting element provided on the output side of the differential amplifier circuit,
In the first period of one gate selection period, the first switch and the second switch are selected, and the analog signal is input to the first switch and the second switch. The corresponding charge is held in the second capacitor element,
In the second period of the one-gate selection period, the first switch is selected, the reference signal is input from the signal line to the first switch, and the charge corresponding to the reference signal is the first To the capacitive element of
A display device driving method, wherein a signal is output from the differential amplifier circuit based on the analog signal and the reference signal, and the light emitting element emits light based on the signal. In claim 7 or 8,
The differential amplifier circuit includes a plurality of thin film transistors,
A driving method of a display device, wherein a thin film transistor connected to the light emitting element among the plurality of thin film transistors is operated in a linear region. In claims 1 to 9,
A driving method of a display device, wherein a period during which a reverse voltage is applied to the light emitting element is provided in any one frame period in addition to the light emitting element emitting light. In claim 1 to 10,
A display device driving method, wherein the reference signal is controlled in accordance with a change in a monitor light emitting element connected to a counter electrode of the light emitting element. In claim 1 to 10,
A method for driving a display device, comprising: controlling a potential of a pixel electrode of a light emitting element in accordance with a change in a monitoring light emitting element connected to a counter electrode of the light emitting element. In claim 1 to 10,
A method for driving a display device, comprising: controlling a potential of a counter electrode of a light emitting element according to a change of a monitor light emitting element connected to the counter electrode of the light emitting element. A first switch controlled by a first scan line;
A second switch controlled by a second scan line;
An inverter provided with both ends of the second switch;
A light emitting element provided on the output side of the inverter, and a pixel region,
A driver for generating a signal to be input to the first scan line and the second scan line;
A display device, wherein a protection circuit is provided between the pixel region and the driver. A first switch controlled by a first scan line;
A second switch controlled by a second scan line;
An inverter provided with both ends of the second switch;
A light emitting element provided on the output side of the inverter, and a pixel region,
A driver for generating a signal to be input to the first scan line and the second scan line;
A display device, wherein an element having a temperature compensation function is provided between the pixel region and the driver. A first switch controlled by a first scan line;
A first capacitive element connected to one of the first switches;
A second switch controlled by a second scan line;
A second capacitive element provided between one of the first switches and one of the second switches;
An inverter provided at both ends of the second switch;
A light emitting element provided on the output side of the inverter, and a pixel region,
A driver for generating a signal to be input to the first scan line and the second scan line;
A display device, wherein a protection circuit is provided between the pixel region and the driver. A first switch controlled by a first scan line;
A first capacitive element connected to one of the first switches;
A second switch controlled by a second scan line;
A second capacitive element provided between one of the first switches and one of the second switches;
An inverter provided at both ends of the second switch;
A light emitting element provided on the output side of the inverter, and a pixel region,
A driver for generating a signal to be input to the first scan line and the second scan line;
A display device, wherein an element having a temperature compensation function is provided between the pixel region and the driver. A first switch controlled by a first scan line;
A second switch controlled by a second scan line;
A differential amplifier circuit in which the first switch and the second switch are provided on the input side;
A pixel region having a light emitting element provided on the output side of the differential amplifier circuit;
A driver for generating a signal to be input to the first scan line and the second scan line;
A display device, wherein a protection circuit is provided between the pixel region and the driver. A first switch controlled by a first scan line;
A second switch controlled by a second scan line;
A differential amplifier circuit in which the first switch and the second switch are provided on the input side;
A pixel region having a light emitting element provided on the output side of the differential amplifier circuit;
A driver for generating a signal to be input to the first scan line and the second scan line;
A display device, wherein an element having a temperature compensation function is provided between the pixel region and the driver. In any one of Claim 15 or 17,
The display device, wherein the driver has a protection circuit. In any one of claims 14 to 20,
The display device according to claim 1, wherein the protection circuit includes one or a plurality selected from a resistor element, a capacitor element, and a rectifier element. In claim 15, 17 or 19,
The display device, wherein the element having the temperature compensation function includes a light emitting element for monitoring. In claim 22,
The display device, wherein the monitor light emitting element is connected to a pixel electrode of a light emitting element included in a pixel. In claim 23,
The display device, wherein the monitor light emitting element is connected to a counter electrode of a light emitting element included in a pixel. A method according to any one of claims 14 to 24.
The driver has a pulse output circuit;
A signal line is provided in the pixel region,
A display device comprising a shift register connected to the signal line via a third switch and a fourth switch. In claim 25,
The display device, wherein the third switch is an analog switch. In claim 25 or 26,
The display device, wherein the fourth switch includes a first analog switch, a second analog switch, and an inverter.

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