JP2003174143A - Semiconductor device and laminated semiconductor device using the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device which can easily realize accurate positioning on the occasion of stacking semiconductor devices and can surely attain stand-off at the time of mounting into a substrate. <P>SOLUTION: The semiconductor device is provided with a resin package having two external surfaces which are provided opposed to each other to cover a semiconductor chip. One external surface of the semiconductor device includes the projected part of the shape which becomes narrower as it goes to the end point, while the other external surface includes the recessed part of the shape to which a projected part of the same shape as the projected part may be inserted. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a stacked semiconductor device using the semiconductor device, and more particularly to a package shape of the semiconductor device.

[0002]

2. Description of the Related Art In recent years, as information devices such as mobile phones have been downsized, there has been a demand for downsizing and high-density mounting of semiconductor devices mounted on the information devices. Along with this, demand for package-type semiconductor devices such as SOP and QFP and area-array-type package semiconductor devices such as CSP and BGA is increasing.

Further, for the purpose of higher density mounting,
A stacked package in which a plurality of semiconductor chips are built in one semiconductor device and a package stack in which a plurality of thin semiconductor devices are stacked have been developed and mass-produced.
The package stack achieves high-density mounting by stacking the individually manufactured semiconductor devices to reduce the mounting area.

When stacking semiconductor devices in a package stack, it is necessary to align the semiconductor devices with each other. As a method therefor, there are a method of aligning with the outer shape of the semiconductor device as a reference, and a method of aligning using the unevenness formed on the package of the semiconductor device.

In the method of aligning with reference to the outer shape of the semiconductor device, as shown in FIG. 9, a positional deviation preventing jig 109 is used to perform mechanical alignment with the outer shape of the semiconductor device 102 having the same shape as the reference. After that, reflow is performed to join the external electrode terminals 106 of the upper and lower semiconductor devices 102. The external electrode terminal 10
6 is solder-plated, and when it is passed through the reflow furnace, the solder melts and self-alignment works due to the surface tension of the solder. To be done.

However, the alignment based on the outer shape of the semiconductor device 102 is not necessarily sufficient for those in which the pitch of the external electrode terminals 106 is narrow and the alignment at the time of stacking requires high precision. I can't say. In addition, the upper and lower external electrode terminals 106 may be displaced before being fixed by reflow.

In addition, the self-alignment described above does not work as expected during reflow, and the upper and lower external electrode terminals 106 are fixed without being able to correct the positional deviation that occurs during stacking, which may cause a connection failure. is there. Further, the misalignment preventing jig 109 used when stacking the semiconductor devices 102 needs to be removed after the semiconductor devices 102 are mounted on a printed circuit board (not shown), and workability in the assembly process is poor.

On the other hand, in the method of aligning by utilizing the unevenness formed on the resin package of the semiconductor device, the method shown in FIG.
0 and FIG. 11, the alignment is performed by fitting the convex portion 205 formed on the lower surface 203b of the resin package 203 into the concave portion 204 formed on the upper surface 203a of the resin package 203 (for example, the actual opening). 58
-18346). In this method, stacking can be performed without using the misalignment preventing jig 109 (see FIG. 9) as a holder.

However, since the side surface 204a of the concave portion 204 and the side surface 205a of the convex portion 205 are formed perpendicular to the upper surface 203a and the lower surface 203b of the resin package 203, respectively, the convex portion 205 can be fitted into the concave portion 204. Requires precise alignment of the upper and lower semiconductor devices 202, resulting in poor workability in the assembly process.

In order to solve this problem, the recess 20
It is conceivable that the size of 4 is made larger than the size of the convex portion 205 to allow a margin, but if it is made too large, the semiconductor devices 202 cannot be stacked at an accurate position,
The positional deviation between the external electrode terminals 206 becomes large, and in the worst case, the external electrode terminals 206 to be connected may not be connected to each other and a connection failure may occur. In particular, if the number of the external electrode terminals 206 is increased and the resin package 203 is downsized and the pitch of the external electrode terminals 206 is narrowed due to the high performance of the semiconductor chip, the possibility of the above-mentioned connection failure is further increased.

Further, as shown in FIG. 12, in a laminated semiconductor device 301 including an area grid array type semiconductor device 302 having solder balls as external electrode terminals 306, a laminated semiconductor device when mounted on a printed circuit board 307. Due to the weight of the device 301 and the surface tension of the solder, the solder balls tend to be crushed without forming a spherical shape. This tendency is remarkable when the diameter of the land 308 of the printed board 307 is large. When the solder balls are crushed, the standoff (distance between the lower surface of the package and the surface of the printed circuit board) becomes small, and the mounting reliability is expected to decrease.
When the surface of the printed board 307 and the lower surface of the semiconductor device 302 come into contact with each other, the stacked semiconductor device 30
It becomes difficult to dissipate the heat generated from 1 to the outside.

The present invention has been made in consideration of the above circumstances, and when semiconductor devices are stacked, they can be easily and accurately aligned, and when they are mounted on a substrate. Provided is a semiconductor device capable of reliably ensuring a standoff.

[0013]

According to the present invention, there is provided a resin package having two outer surfaces facing each other and covering a semiconductor chip, one outer surface having a convex portion having a tapered shape, and the other outer surface. It is intended to provide a semiconductor device having an outer surface having a recess having a shape into which a projection having the same shape as that of the projection can be fitted.

That is, since the semiconductor device according to the present invention has a shape in which the convex portion is tapered, the concave portion and the convex portion can be easily fitted to each other without precise alignment when stacking the semiconductor devices, and the concave portion can be easily fitted. Accurate positioning can be achieved when the projections and the projections fit together perfectly. Further, when the semiconductor device according to the present invention is mounted so that the convex portion faces the substrate, the standoff can be reliably ensured by the height of the convex portion.

[0015]

BEST MODE FOR CARRYING OUT THE INVENTION In a semiconductor device according to the present invention, a method for molding a resin package covering a semiconductor chip is
Although not particularly limited, for example, it can be molded by a transfer molding method. Specifically, the semiconductor chip is placed in the cavity of the mold, and the heated and liquefied sealing material is pressed and pushed into the cavity, where the sealing material is solidified to seal the semiconductor chip. Here, the sealing material is not particularly limited, but for example, epoxy resin, silicone resin, polyurethane, polyamide, polyphenylene sulfide, etc. can be used.

In the semiconductor device according to the present invention, it is preferable that the concave portion is provided at a position opposite to the convex portion. This is because when the recesses are provided on the opposite side of the projections, the semiconductor devices can be aligned and stacked on the same axis line, which can reduce the mounting area on the substrate most efficiently. is there.

In the semiconductor device according to the present invention, the recess may have a shape tapering from the opening toward the bottom, and the recess and the protrusion may be formed in complementary shapes corresponding to each other. With such a configuration, it is possible to more reliably hold the aligned state in the state where the concave portion and the convex portion are completely fitted together. Therefore, it is possible to prevent the occurrence of positional deviation between the semiconductor devices being stacked and being joined to each other by reflow.

In the semiconductor device according to the present invention, the concave portion may have a rectangular bottom surface and the convex portion may have a rectangular top surface. The shape of the bottom surface of the concave portion and the top surface of the convex portion can be any shape such as a triangle, a polygon, an L-shape, etc. other than the above-mentioned square.

In the semiconductor device according to the present invention, the concave portion may have a circular bottom surface, the convex portion may have a circular top surface, and the concave portion and the convex portion may be provided in the same number of 2 or more. Further, in the semiconductor device according to the present invention, the resin package may be plate-shaped, and may be formed in a dish shape by the convex portion and the concave portion.

Further, in the semiconductor device according to the present invention, the height of the convex portion may be lower than the depth of the concave portion. According to this structure, a gap is formed between the bottom surface of the concave portion and the top surface of the convex portion when the semiconductor devices are stacked. Therefore, even if a small foreign matter is attached to the bottom surface of the concave portion or the top surface of the convex portion, the upper and lower semiconductor devices can be stacked without a gap.

Further, the semiconductor device according to the present invention may further include an external electrode terminal electrically connected to the semiconductor chip and protruding outward from the resin package. In this case, the semiconductor devices stacked vertically are positioned by fitting the concave portions and the convex portions, and the upper and lower external electrode terminals are fixed by soldering. Therefore, the external electrode terminals are preferably plated with solder that melts by reflow.

From another point of view of the present invention, a plurality of semiconductor devices are stacked, and vertically adjacent semiconductor devices are positioned by fitting one concave portion and the other convex portion to each other. Also provides a stacked semiconductor device which is the above-mentioned semiconductor device.

[0023]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail below with reference to the embodiments shown in the drawings. The present invention is not limited to the embodiments. Further, members common to a plurality of embodiments described below will be described using the same reference numerals.

Embodiment 1 A stacked semiconductor device according to Embodiment 1 of the present invention will be described with reference to FIGS. 1 and 2. 1 is a perspective view of a stacked semiconductor device according to a first embodiment, and FIG. 2 is an explanatory view showing a state in which the stacked semiconductor device shown in FIG. 1 is mounted on a substrate.

As shown in FIGS. 1 and 2, each semiconductor device 2 constituting the stacked semiconductor device 1 according to the first embodiment.
Includes a resin package 3 having an upper surface 3a and a lower surface 3b facing each other and covering a semiconductor chip (not shown), and the lower surface 3b has a convex portion 5 having a shape tapering toward the top surface 5b. The upper surface 3a has a concave portion 4 having a shape into which a convex portion having the same shape as the convex portion 5 can be fitted. The concave portion 4 is provided at a position opposite to the convex portion 5 and has a shape that tapers from the opening toward the bottom surface 4b. The concave portion 4 and the convex portion 5 are formed in complementary shapes corresponding to each other. ing. Then, in the stacked semiconductor device 1 configured by stacking such semiconductor devices 2, vertically adjacent semiconductor devices 2 are positioned by fitting one concave portion 4 and the other convex portion 5 to each other. .

More specifically, in each semiconductor device 2 constituting the laminated semiconductor device 1 according to the first embodiment, a semiconductor chip (not shown) is covered with a resin package 3, and a recess 4 is formed on the upper surface 3a of the resin package 3. , And convex portions 5 are provided on the lower surface 3b. The concave portion 4 and the convex portion 5 are respectively formed at positions where one concave portion 4 and the other convex portion 5 can be fitted to each other when the semiconductor devices 2 having the same shape are overlapped with each other based on their outer shapes. There is.

The resin package 3 can be molded by transfer molding or the like, and the recess 4 has a rectangular bottom surface 4b.
And has a side surface 4a inclined so as to taper toward the bottom surface 4b. On the other hand, the convex portion 5 has a rectangular top surface 5b and side surfaces 5a inclined so as to taper toward the top surface 5b. Thus, since the side surfaces 4a and 5a of the concave portion 4 and the convex portion 5 are respectively inclined, the concave portion 4 and the convex portion 5 are easily fitted to each other without performing precise alignment when stacking the semiconductor devices 2, and Accurate positioning can be achieved when the concave portion 4 and the convex portion 5 are completely fitted together.

Here, an appropriate inclination angle between the side surface 4a of the concave portion 4 and the side surface 5a of the convex portion 5 will be described with reference to FIG. As shown in FIG. 8, the inclination angle θ1 of the side surface 4a of the concave portion 4 and the inclination angle θ2 of the side surface 5a of the convex portion 5 are about 30 with respect to a line extending perpendicularly from the surface of the resin package 3.
About 60 degrees is good. If the inclination angles θ1 and θ2 are large, side slip is likely to occur, and if the inclination angles θ1 and θ2 are small, the concave portions 4 and the convex portions 5 are formed.
It becomes difficult to fit because precise positioning is required when fitting.

In the semiconductor device 2 of Example 1 shown in FIGS. 1 and 2, the side surface 4a of the concave portion 4 and the side surface 5a of the convex portion 5 have the same inclination angle, but as shown in FIG. Further, the inclination angles θ1 and θ2 may be different from each other. Specifically, the inclination angle θ1 of the side surface 4a of the concave portion 4 may be smaller than the inclination angle θ2 of the side surface 5a of the convex portion 5.
In the semiconductor device 2 of Example 1 shown in FIG. 1 and FIG. 2, the depth of the concave portion 4 is the same as the height of the convex portion 5, but as shown in FIG. Height t of convex portion 5
May be small. In this case, even if a small foreign matter adheres to the bottom surface 4b of the concave portion 4 or the top surface 5b of the convex portion 5, the upper and lower semiconductor devices 2 can be stacked without a gap.

The recess 4 formed on the upper surface 3a of the resin package 3 can also function as an index mark, but in this case, the recess 4 is not located at the center of the upper surface 3a of the resin package 3 but at the four corners. It has to be formed close to one of the above.

Since the semiconductor devices 2 are intended to be stacked, each semiconductor device 2 has an external electrode terminal 6 for exchanging an electric signal with the adjacent semiconductor device 2 when stacked, and the semiconductor device 2 has the lowest layer. The external electrode terminal 6 of the semiconductor device 2 located is electrically connected to the land 8 of the printed circuit board 7. The external electrode terminals 6 of the semiconductor device 2 of the first layer and the lands 8 of the printed circuit board 7, and the external electrode terminals 6 of the first layer and the second layer, and the second layer and the third layer are the semiconductor device 2
After being stacked and mounted on the printed circuit board 7, reflow is performed to melt and connect the solder plated on the external electrode terminals 6.

In the first embodiment, the upper surface 3 of the resin package 3 is
Although the concave portion 4 is formed in a and the convex portion 5 is formed in the lower surface 3b, if the standoff and heat dissipation do not matter, the convex portion 5 is formed on the upper surface 3a of the resin package 3 and the concave portion 4 is formed on the lower surface 3b. May be. Each of the semiconductor devices 2 constituting the stacked semiconductor device 1 according to the first embodiment has an L-shaped external electrode terminal 6, a so-called gull-wing-shaped external electrode terminal 6, or a SOP (Small Outline Package) or a QFP.
(Quad Flat Package).

Embodiment 2 A stacked semiconductor device according to Embodiment 2 of the present invention will be described with reference to FIG. FIG. 3 is a sectional view of the stacked semiconductor device according to the second embodiment.

As shown in FIG. 3, the stacked semiconductor device 21 according to the second embodiment of the present invention has a SOJ (Small Outline J-leaded Packag) having a J-shaped external electrode terminal 26.
The semiconductor device 22 such as e) or QFJ (Quad Flat J-leaded Package) is laminated. Semiconductor device 2
In the second resin package 23, two recesses 24 each having a circular bottom surface 24b and two projections 25 each having a circular top surface 25b are formed. Similar to Example 1 above,
Each recess 24 has a side surface 24a that tapers toward its bottom surface 24b, and each projection 25 has a side surface 25a that tapers toward its top surface 25b.

That is, the concave portion 24 and the convex portion 25 are so-called frustoconical, and the concave portion 24 and the convex portion 25 can be easily fitted without precise alignment when stacking the upper and lower semiconductor devices 22. Other configurations are the same as those in the first embodiment described above.
Is the same as. The concave portion 24 and the convex portion 25 are each 1
Two pieces are provided instead of one piece, because the bottom surface 24b of the concave portion 24 and the top surface 25b of the convex portion 25 are circular, respectively. This is because the alignment cannot be done.

Third Embodiment A stacked semiconductor device according to a third embodiment of the present invention will be described with reference to FIGS. 4 and 5. FIG. 4 is a sectional view of the stacked semiconductor device according to the third embodiment.

The stacked semiconductor device 31 according to the second embodiment is
Each semiconductor device 32 constituting the stacked semiconductor device 31 is changed from the semiconductor device 22 (see FIG. 3) in the form of SOJ or QFJ of the above-described second embodiment to a CSP (chip size package).
The semiconductor device 32 is changed to an area array type semiconductor device 32 such as a BGA (ball grid array) or the like, and other configurations are the same as those in the above-described second embodiment.

That is, although the present invention can be applied to the area array type semiconductor device 22, it is not applicable to all the area array type semiconductor devices 22. It is limited to the so-called Fan / Out structure in which the electrode terminals 36 are present. The semiconductor device 32 located in the lowest layer does not necessarily have the Fan / Out structure. Also,
As shown in FIG. 5, the stacked semiconductor device 3 according to the third embodiment
In the case of No. 1, even when the solder balls are crushed and do not form a spherical shape when mounted on the printed circuit board 37, the convex portion 35 can ensure the standoff.

Fourth Embodiment A stacked semiconductor device according to a fourth embodiment of the present invention will be described with reference to FIG. FIG. 6 is a sectional view of the stacked semiconductor device according to the fourth embodiment.

As shown in FIG. 6, the stacked semiconductor device 41 according to the fifth embodiment is the same as the first embodiment except that the concave portion 4 and the convex portion 5 are replaced by a conical concave portion 44 and a convex portion 45, respectively. . The concave portion 44 and the convex portion 45 are formed in pairs for the same reason as in the second embodiment. Other configurations are similar to those of the above-described first embodiment.

Embodiment 5 A stacked semiconductor device according to Embodiment 5 of the present invention will be described with reference to FIG. FIG. 7 is a sectional view of the stacked semiconductor device according to the fifth embodiment. As shown in FIG. 7, in the stacked semiconductor device 51 according to the fifth embodiment, the resin package 53 of each semiconductor device 52 is formed into a dish shape as a whole by the concave portion 54 and the convex portion 55. In the stacked semiconductor device 51, the vertically adjacent semiconductor devices 52 are aligned by overlapping the peripheral edge portions 53 c of the resin package 53. Other configurations are the same as those in the above-described first embodiment.

[0042]

According to the present invention, since the convex portion has a tapered shape, it is easy to fit the concave portion and the convex portion without precise alignment when stacking the semiconductor devices.
Further, when the concave portion and the convex portion are completely fitted to each other, accurate positioning can be performed. Further, if the convex portion is mounted so as to face the substrate, the standoff can be surely secured by the height of the convex portion.

[Brief description of drawings]

FIG. 1 is a perspective view of a stacked semiconductor device according to a first embodiment of the present invention.

2 is a cross-sectional view showing a state in which the stacked semiconductor device shown in FIG. 1 is mounted on a substrate.

FIG. 3 is a cross-sectional view showing a stacked semiconductor device according to a second embodiment of the present invention mounted on a substrate.

FIG. 4 is a sectional view showing a state in which a stacked semiconductor device according to a third embodiment of the present invention is mounted on a substrate.

FIG. 5 is a cross-sectional view showing a state in which a solder ball, which is an external electrode terminal, is mounted on a substrate in a crushed state in a stacked semiconductor device according to a third embodiment.

FIG. 6 is a cross-sectional view showing a stacked semiconductor device according to a fourth embodiment of the present invention mounted on a substrate.

FIG. 7 is a cross-sectional view showing a stacked semiconductor device according to a fifth embodiment of the present invention mounted on a substrate.

FIG. 8 is an enlarged cross-sectional view of a concave portion and a convex portion showing a modification of the concave portion and the convex portion in the stacked semiconductor device according to the present invention.

FIG. 9 is a perspective view of a conventional stacked semiconductor device, illustrating how the semiconductor devices are aligned and stacked with the outer shape of the semiconductor device as a reference.

FIG. 10 is a perspective view of a conventional stacked semiconductor device, which is aligned by utilizing the unevenness formed on each semiconductor device;
Explaining how to stack.

11 is a cross-sectional view of the conventional stacked semiconductor device shown in FIG.

FIG. 12 is a cross-sectional view showing a state in which a conventional stacked semiconductor device is mounted on a substrate.

[Explanation of symbols]

1 ... Stacked semiconductor device 2 ... Semiconductor device 3 ... Resin package 3a ... top surface 3b ... bottom surface 4 ... Recess 4a ... side surface 4b ... bottom surface 5 ... convex part 5a ... side surface 5b ... bottom surface 6 ... External electrode terminals

Claims (9)

[Claims] 1. A resin package having two outer surfaces facing each other and covering a semiconductor chip, wherein one outer surface has a convex portion having a tapered shape, and the other outer surface has the same shape as the convex portion. A semiconductor device having a concave portion having a shape into which the convex portion of FIG. 2. The semiconductor device according to claim 1, wherein the concave portion is provided at a position opposite to the convex portion. 3. The semiconductor device according to claim 1, wherein the recess has a shape tapering from the opening toward the bottom, and the recess and the protrusion are formed in complementary shapes corresponding to each other. 4. The semiconductor device according to claim 1, wherein the concave portion has a rectangular bottom surface and the convex portion has a rectangular top surface. 5. The concave portion has a circular bottom surface, the convex portion has a circular top surface, and the concave portion and the convex portion are provided in the same number of 2 or more, respectively. Semiconductor device. 6. The semiconductor device according to claim 1, wherein the resin package is plate-shaped and is formed in a dish shape by the convex portion and the concave portion. 7. The semiconductor device according to claim 1, wherein the height of the convex portion is lower than the depth of the concave portion. 8. The semiconductor device according to claim 1, further comprising an external electrode terminal electrically connected to the semiconductor chip and protruding outward from the resin package. 9. A plurality of semiconductor devices are stacked, and vertically adjacent semiconductor devices are positioned by fitting one concave portion and the other convex portion to each other, and each semiconductor device is positioned in accordance with any one of claims 1 to 8. Laminated semiconductor device which is the semiconductor device described in 1.