JP2003153070A - Imaging apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent digital noise from mixing in analog signals by operating an analog signal processing circuit and a digital signal processing circuit, by time sharing according to whether processing time or the S/N is given higher priority in an imaging apparatus, having an IC where both the analog signal processing circuit and the digital signal processing circuit are mounted. SOLUTION: In the imaging apparatus, having an analog/digital mixed LSI 100 where both the analog signal processing section 101 and the digital signal processing section 102 are mounted, a signal-photographing mode for photographing a single frame and a continuous photograph mode for continuously photographing a plurality of frames are switched and set by an operation switch 31. When the single-photograph mode is set, power supply to the analog signal processing section and the digital signal processing section is turned on or off alternately by a power switch 34 for time-sharing processing operation. When the continuous photograph mode is set, power supply to the analog signal processing section and the digital signal processing section is turned on constantly for performing simultaneous parallel processing operation.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image pickup apparatus having an IC in which an analog signal processing circuit and a digital signal processing circuit are mounted together.

[0002]

2. Description of the Related Art Conventionally, as an apparatus having an IC in which an analog signal processing circuit and a digital signal processing circuit are mounted together, Japanese Patent Laid-Open No. 8-125533 discloses the following analog-digital conversion control apparatus. ing. That is, the AD conversion operation is started in response to the AD conversion operation start signal, the conversion operation end signal is output when the conversion operation is completed, and the AD conversion circuit enters the standby state while holding the AD conversion output data. It has a function of outputting a read signal for controlling the operation of the conversion circuit for a certain period, a function of fetching AD conversion output data of the AD conversion circuit through a data bus, and a function of stopping a bus cycle by receiving a wait signal. The microcomputer is formed on the same chip as the AD conversion circuit, receives the read signal output from the microcomputer, outputs the AD conversion operation start signal to the AD conversion circuit, and the microcomputer outputs the read signal. And a function to output the wait signal to the microcomputer before the time of performing the wait check, and the AD conversion. A control circuit having a function of releasing the wait signal by receiving a conversion operation end signal from the path and outputting the AD conversion output data of the AD conversion circuit to the data bus. A conversion control device is disclosed.

In the analog-digital conversion control device configured as described above, the microcomputer suspends the bus cycle during the conversion operation of the AD conversion circuit and temporarily operates based on the wait signal from the control circuit. The power supply noise generated from the microcomputer and the switching noise associated with the ON / OFF of the data bus signal can be reduced because the power supply is stopped. In particular, a high-precision AD conversion circuit with more than 10 bits can be provided. Even if it is used, its accuracy does not deteriorate.

[0004]

By the way, in the prior art disclosed in the above publication, although the operation of the microcomputer is stopped during the AD conversion operation, analog processing and digital processing during the AD conversion operation proceed simultaneously. However, there is still a problem that a digital signal is mixed with an analog signal.

The present invention has been made in order to solve the same problems as in the above-described prior art, which occur in an image pickup apparatus having an analog signal processing circuit and a digital signal processing circuit. It is an object of the present invention to provide an image pickup device that prevents digital noise from being mixed in an analog signal by performing the time division. In view of the fact that the closer the analog processing circuit and the digital circuit are to each other, the greater the mutual interference, the present invention provides an imaging device having an IC in which the analog signal processing circuit and the digital signal processing circuit are mounted together. It is an object of the present invention to provide an image pickup device that employs the above configuration. Further, if the time-division processing as described above is adopted, the processing will take more time than if the simultaneous parallel processing is inevitably performed. Therefore, in shooting conditions requiring high-speed processing, high-speed processing is prioritized over noise suppression. Therefore, it is an object of the present invention to provide an imaging device in which the time division processing is not performed.

[0006]

In order to solve the above-mentioned problems, the invention according to claim 1 is for photographing one frame in an image pickup device having an IC in which an analog signal processing circuit and a digital signal processing circuit are mounted together. Switching means for switching between a still image shooting mode to be performed and a continuous shooting mode for continuously shooting a plurality of images, and the analog signal processing circuit and the digital signal processing when the still image shooting mode is selected by the switching means. A first control means for operating the circuit in a time division manner, and a second control means for permitting simultaneous operation of the analog signal processing circuit and the digital signal processing circuit when the continuous shooting mode is selected by the switching means. And a control means of the above.

With this configuration, the normal 1
When the still image shooting mode for shooting frames is selected, it is possible to prevent the noise of the digital signal from being mixed into the analog signal, which is sensitive to noise, and the continuous shooting mode does not impair the high speed. It is possible to realize an image pickup device capable of performing copying.

The invention according to claim 2 is an IS for switching ISO sensitivity in an image pickup apparatus having an IC in which an analog signal processing circuit and a digital signal processing circuit are mounted together.
A first control for operating the analog signal processing circuit and the digital signal processing circuit in a time division manner when the O sensitivity switching means and the ISO sensitivity switched and set by the ISO sensitivity switching means are higher than a predetermined sensitivity. Means and the ISO
When the ISO sensitivity switched and set by the sensitivity switching means is lower than a predetermined sensitivity, it has a second control means for permitting simultaneous operation of the analog signal processing circuit and the digital signal processing circuit. Is.

In general, when the ISO sensitivity is high, the margin is small with respect to the allowable S / N. Therefore, by operating the analog signal processing circuit and the digital signal processing circuit in a time division manner as described above, the analog signal processing circuit is operated. Further, it is possible to prevent the S / N from being lowered due to the noise mixed by the digital signal. Further, in this case, since the ISO sensitivity is high and a high shutter speed can be obtained, there is no problem in the operation time as a whole even if the time division operation is performed. On the other hand, when the ISO sensitivity is low, there is a large margin with respect to the allowable S / N. Therefore, the simultaneous operation of the analog signal processing circuit and the digital signal processing circuit is allowed, and high speed processing is prioritized, so that the ISO sensitivity is low. This can cover the time delay due to the slow shutter speed.

According to a third aspect of the present invention, in an image pickup device having an image pickup device and an IC in which an analog signal processing circuit for processing a video signal output from the image pickup device and a digital signal processing circuit are mounted together, A calculation means for calculating an exposure amount and a calculation for autofocus based on a video signal output from the device, and at least a video signal for calculating the exposure amount from the image pickup device or a video for autofocus It is characterized by having a control means for inhibiting the operation of the digital signal processing circuit while the signal is being read.

With this configuration, the operation of the digital signal processing circuit can be prohibited while the exposure amount is calculated or the video signal for autofocus is read out. Since noise due to a digital signal is not mixed in the video signal for calculation, accurate exposure and autofocus can be performed.

[0012]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, embodiments will be described. FIG. 1 is a block configuration diagram showing an overall configuration of a first embodiment of an image pickup apparatus according to the present invention. In FIG. 1, reference numeral 1 denotes a lens barrel, and a zoom lens 2, a focus lens 3 and a diaphragm 4 are provided in the lens barrel 1. Reference numeral 5 is an image pickup device such as a CCD for converting a subject image obtained through the lens barrel 1 into a video signal, 6 is a CDS circuit 7 for extracting an image signal component from which a noise component is removed from the video signal of the image pickup device 5, and An image pickup circuit including an AGC circuit 8 for adjusting the output signal level of the CDS circuit 7 to a predetermined gain value,
9 is an A / D conversion circuit, 10 is a line memory for temporarily storing the output signal from the A / D conversion circuit 9, 11 is a direct output signal from the A / D conversion circuit 9, and reading from the line memory 10 The changeover switch 11 switches the output signal and outputs it to the signal processing system in the subsequent stage. The changeover switch 11 is, for example, a single shooting mode in which S / N described later has priority and a continuous shooting in which processing time has priority. Switching control is performed via the CPU in accordance with the selection setting of the shooting mode. For example, the time-division processing is performed when the single shooting mode is selected. Therefore, the connection is switched to the A / D conversion circuit side (contact b).

The subsequent signal processing system includes a white balance processing circuit 12 for performing white balance processing of the video signal, an image processing circuit 13 for performing signal processing such as γ correction of the video signal after the white balance processing, a flash memory and the like. A D / A used for sending a video signal to a reproduction / display section 17 such as a compression / expansion circuit 14 and an LCD used for recording to and from the removable recording memory 15 and reproducing from the memory 15.
A conversion circuit 16, an AE processing circuit 18 for generating an integrated value of a video signal for automatically adjusting exposure, and an AF processing circuit 19 for generating a signal for adjusting a focus position from the video signal are provided.

Further, in FIG. 1, 20 is an image pickup device driver for sending a drive signal for driving the image pickup device 5, 21 is a timing generation circuit for generating a timing signal to each section, and 22 is a timing signal generation circuit. A synchronization signal generation circuit that receives a timing signal from the memory 21 and outputs a synchronization signal for memory control to a memory controller 23 that controls the line memory 10.

The image pickup circuit 6, the A / D conversion circuit 9 and the image pickup device driver 20 constitute an analog signal processing section 101, and a white balance processing circuit 12, an image processing circuit 13, a compression / expansion circuit 14, a D / A. The conversion circuit 16, the AE processing circuit 18, and the AF processing circuit 19 constitute a digital signal processing unit 102,
Then, the analog signal processing unit 101 and the digital signal processing unit 102, the line memory 10, the changeover switch 11,
The timing signal generation circuit 21, the synchronization signal generation circuit 22, and the memory controller 23 are integrally configured by the analog / digital mixed LSI 100.

Further, the image pickup apparatus according to this embodiment is provided with a CPU 25 which controls the entire apparatus, and the CPU 25 controls the AE of the AE processing circuit 18.
AGC circuit 8 for performing gain adjustment (ISO sensitivity adjustment) based on processing, timing signal generation circuit 21, synchronization signal generation circuit 22, white balance processing circuit 12, AE processing circuit 18 for performing AE calculation, AF calculation AF to do
The processing circuit 19 is connected. In addition, the CPU 25
The first motor drive circuit 26 that drives the diaphragm 4 based on the AE processing result of the E processing circuit 18, the second motor drive circuit 27 that drives the focus lens 3 based on the AF processing result of the AF processing circuit 19, and the zoom lens 2 3rd motor drive circuit 28 which drives each is connected.

Further, a switching circuit 30 for controlling the light emission of the strobe light emitter 29 is connected to the CPU 25,
Further, an operation switch 31 having a menu button, a release switch, various mode setting switches, and the like, and an EEPROM 32 storing a control program for integrally controlling all circuits including AF (autofocus) operation are connected.

Further, 33 is a battery for supplying electric power to each part including the CPU 25, which is connected to the analog signal processing part 101 and the digital signal processing part 102 of the analog / digital mixed LSI 100 through the power switch 34. Power switch
34 is turned on via the CPU 25 by, for example, the selection of the single-frame single shooting mode or the continuous shooting mode of the operation switch 31.
/ OFF is controlled. That is, for example, when the single shooting mode is selected, the analog signal processing unit 101 and the digital signal processing unit 102 perform the time-division processing.
To alternately turn on the power every 1/2 cycle of the horizontal drive signal HD.
The power switch 34 is controlled to be turned off / on, and when the continuous shooting mode is selected, the power switch 34 is always connected to the analog signal processing unit 101 and the digital signal processing unit 102 for simultaneous parallel processing. To control. The battery 33 is also connected to the other circuit parts of the analog / digital mixed LSI 100, the strobe light emitting part 29, and the like.

Next, the operation of the first embodiment will be described based on the timing chart shown in FIG. The basic operation of this embodiment is, for example, when the time-division processing is performed when the single shooting mode is selected, the horizontal drive signal HD is set to 1
During the cycle, the analog signal processing unit 101 and the digital signal processing unit 102 are alternately operated in a time division manner to prevent mixing of digital noise in the analog signal. Therefore, the H level period and the L level period (blanking period) of the horizontal drive signal (synchronization signal) HD in the time division processing period are set to be the same. That is, as shown in FIG. 2, the horizontal drive signal HD to the image sensor 5 is H
At the time of the level, the analog signal processing unit 101 including the CDS circuit 7, the AGC circuit 8, the A / D conversion circuit 9 and the image sensor driver 20 is turned on, and the white balance processing circuit 12, the image processing circuit 13 and the compression / expansion are performed. The power supply to the digital signal processing unit 102 including the circuit 14, the D / A conversion circuit 16, the AE processing circuit 18, and the AF processing circuit 19 is turned off, and the changeover switch 11 is switched to the a side. Then, the video signal is read from the image pickup device 5, processed by the image pickup circuit 6, and A / D
A / D conversion is performed by the conversion circuit 9, and the data for one line is written in the line memory 10.

After that, when the horizontal drive signal HD is at the L level,
That is, during the horizontal blanking period, the power switch 34 is switched to turn off the power to the analog signal processing unit 101, turn on the power to the digital signal processing unit 102, read one line of data from the line memory 10, The processing is performed by the digital signal processing unit 102 at the subsequent stage.

On the other hand, when the simultaneous and parallel processing is executed as in the conventional case when the continuous shooting mode is selected, the analog signal processing unit 101 and the digital signal processing unit 102 should be continuously supplied with electric power from the battery 33. , The power switch 34 is connected, and the changeover switch 11 is changed over and connected to the b side to
The output signal from the D conversion circuit 9 is directly converted into a digital signal processing unit.
Normal simultaneous parallel processing is performed as input to 102.

As a result, in the present embodiment, the time division processing operation and the simultaneous parallel processing operation of the analog signal processing unit 101 and the digital signal processing unit 102 are changed to S / S by the switching operation of the changeover switch 11 and the power switch 34. It can be switched and executed depending on whether N priority or processing time is prioritized, and mixing of digital noise into an analog signal can be effectively prevented during time division processing.

Next, a second embodiment will be described. In this embodiment, as shown in FIG. 3, the power supply changeover switch 34 in the first embodiment is omitted, and the analog signal processing unit and the digital signal processing unit are connected to each half cycle of the horizontal drive signal HD. The power supply is not configured to be switched alternately, but is configured to continuously supply power to any of the signal processing units. Instead, to the analog signal processing unit and the digital signal processing unit during time division processing, ON / O supply of clock signal from the timing signal generation circuit 21 of
The FF is configured so as to be alternately controlled in every 1/2 cycle of the horizontal drive signal HD in a time division manner. Other configurations are similar to those of the first embodiment shown in FIG. Note that, also in the present embodiment, the H level period and the L level period (blanking period) of the horizontal drive signal are set to be the same during the time division processing.

Next, the operation of the second embodiment will be described based on the timing chart shown in FIG. S /
During the time-sharing process that prioritizes N, the changeover switch 11 is switched to the a side, and when the horizontal drive signal HD is at the H level, the horizontal drive signal (H clock) to the image sensor, C
The CDS pulse and the AD clock for A / D conversion are supplied from the timing signal generation circuit 21 to the DS circuit 7, and the supply of the digital signal processing clock (D clock) to the digital signal processing unit 102 is stopped. As a result, the image signal from the image pickup device is processed by the image pickup circuit 6, A / D-converted, and one line of data is written in the line memory 10.

On the other hand, during the horizontal blanking period in which the horizontal drive signal HD is at the L level, H clock, CDS pulse,
Also, the supply of the AD clock from the timing signal generation circuit 21 is stopped, and the D clock is supplied to the digital signal processing unit 102. As a result, one line of data is read from the line memory 10, and the digital signal processing unit 10 in the subsequent stage is read.
The process in 2 is performed. As a result, it is possible to prevent mixing of digital noise into the analog signal.

Next, in this embodiment, a simultaneous and parallel processing mode in which the analog signal processing section and the digital signal processing section are not time-divided and the processing time is prioritized will be described with reference to the timing chart shown in FIG. Explain. When the time division processing of the analog signal processing unit 101 and the digital signal processing unit 102 is not performed, the changeover switch 11 in FIG. 3 is switched to the b side, and the output from the A / D conversion circuit 9 is directly sent to the digital signal processing system. Then, the line memory 10 is set to the rest state. Then, during the H level period of the horizontal drive signal HD, the H clock, the CDS pulse, and the AD clock are supplied from the timing signal generation circuit 21, and the D clock to the digital signal processing unit is always supplied. , Analog signal processing unit 101 and digital signal processing unit 102
The signal processing operation of is performed in parallel. In the case of this simultaneous parallel processing, the blanking period in which the horizontal drive signal HD is at the L level is a normal short period.

Next, a concrete example of selectively performing time division processing or simultaneous parallel processing of analog signal processing and digital signal processing in the first and second embodiments will be described. First, as a first specific example, a single shooting mode (still image shooting mode) in which one frame is shot and a continuous shooting mode in which a plurality of images are continuously shot are set by switching.
A mode in which the time division processing and the simultaneous parallel processing are switched will be described.

In the case of this specific example, the image pickup apparatus is provided with a single shooting mode and a continuous shooting mode, and the operation switch 31
By setting the mode with, the changeover switch 11 and the power switch 34 are controlled via the CPU 25, or the changeover switch 11 and the timing signal generating circuit 21 are controlled to perform analog signal processing and digital signal processing at the time of setting the single shooting mode. When the continuous shooting mode is set, the analog signal processing and the digital signal processing are simultaneously performed in parallel.

Next, the processing operation when the single shooting mode and the continuous shooting mode are set will be described with reference to the timing charts shown in FIGS. In FIGS. 6A and 6B, VD is a vertical drive signal (synchronization signal), and 1 is from the falling edge of the signal to the next falling edge.
It becomes a cycle. In the illustrated example, the first one cycle is the exposure period, the second is the first field (ODD) period, and the second is the second field (EVEN) period. SUB is a SUB pulse (pulse for discharging charges to the substrate side), and after the generation of this pulse, the accumulation of charges in the exposure period is started. SHUT indicates shutter opening / closing operation,
The exposure time is the period from the SUB pulse stop to the middle of the shutter open state to the closed state. HD is a horizontal drive signal.

When the single shooting mode is set, (A) in FIG.
As shown in FIG. 3, since the time division processing of analog signal processing and digital signal processing is performed, the first and second field periods of the vertical drive signal VD are twice the cycle of the vertical drive signal of other periods. The blanking period of the horizontal drive signal HD in the first and second field periods is the same as the H level period, and the period of the horizontal drive signal in this period is twice as long as that of the other periods.

On the other hand, when the continuous shooting mode is set, as shown in FIG. 6B, the time-division processing of the analog signal processing and the digital signal processing is not performed, and the simultaneous parallel processing is performed. The vertical drive signal VD and the horizontal drive signal have the same short intervals. In the continuous shooting mode, the vertical drive signal VD waits for one field period after the signal reading period of the first and second field periods to wait for the shutter to return from the closed state to the open state. It is provided as a rest period.

As described above, by selectively applying the time-division processing or the simultaneous parallel processing of the analog signal processing and the digital signal processing in the single shooting mode and the continuous shooting mode, noise is generated in the single shooting mode. It is possible to prevent noise of a digital signal from being mixed into an extremely weak analog signal, and it is possible to perform continuous shooting operation in the continuous shooting mode without impairing high speed.

Next, a second specific example for selectively performing time division processing or simultaneous parallel processing of analog signal processing and digital signal processing will be described. In this specific example, the operation of the digital signal processing is stopped during the period of reading the video signal for performing the AE calculation processing and the AF calculation processing, while the reading of the video signal is stopped during the digital signal processing, and the processing is performed in a time division manner. It is configured to perform. Of these, the time division processing operation focusing on the AF operation will be described based on the timing chart shown in FIG.

In FIG. 7, VD is a vertical drive signal, and after the release switch is turned on, the read frame period of the video signal for AF calculation processing (AF data 1, AF data 2, ...) Due to the time division processing, it is set to twice the cycle of other periods. The drive pulse from the second motor drive circuit 27 for driving the focus lens 3 is output in the first part of each read frame period of the video signal for AF calculation, and is set a plurality of times for the AF calculation processing until the focus position is set. The focus lens is driven to read the video signal for AF calculation each time. Note that the AF data 1 is data based on the video signal read first when the focus lens 3 is not driven, and the AF data 2 is based on the video signal read first when the focus lens is driven. The data. Note that the data displayed as through in the data of FIG. 7 is through image data for LCD display.

The SUB pulse is sent so that the exposure time in each frame period becomes equal. That is, in the AF data read period, the period of the vertical drive signal VD is long, and thus the SUB pulse generation period is long. Like the vertical drive signal VD, the horizontal drive signal HD makes the horizontal blanking period the same as the positive period of the H clock in the frame period for AF data reading so that it is the same as the positive period of the H clock. The cycle is long. Although only the AF process is described here, also in the case of the AE process, the digital signal process is stopped during the reading period of the video signal for the AE process due to the time division process. With this configuration, it is possible to perform accurate exposure and autofocus without mixing noise due to a digital signal into the video signal for the exposure amount calculation or the autofocus calculation.

Next, a third method for selectively performing time division processing of analog signal processing and digital signal processing and simultaneous parallel processing is performed.
A specific example of will be described. In this specific example, when the ISO sensitivity is set in the AGC circuit 8, time division processing or normal simultaneous parallel processing is selectively performed depending on whether the sensitivity is standard sensitivity or higher than the standard sensitivity. The operation will be described based on.

First, the time division mode is set by operating the first stage of the release switch to read out the video signal for AE processing and AF processing. Analog signal processing and AE
And AF digital calculation processing are executed in a time-sharing manner, and AE,
After AF processing, the time division mode is released. Next, the second step of the release switch is operated, and at that time, it is judged whether the ISO sensitivity set in the AGC circuit 8 is 100 which is the minimum standard. Shooting is executed. On the other hand, if the set ISO sensitivity is higher than 100, noise is not increased, so the time-division mode in which analog signal processing and digital signal processing are performed in time-division mode is set for shooting, and after shooting, the time-division mode is set. To release.

As described above, by performing the time-division processing when the ISO sensitivity is set high, it is possible to prevent the S / N from being lowered due to the noise due to the digital signal being mixed in the analog signal processing section. On the other hand, when the ISO sensitivity is low, simultaneous parallel processing is performed and high-speed processing is prioritized to reduce the time delay due to the slow shutter speed. In the above description, it has been shown that the time division processing is set based on 100, which has the lowest ISO sensitivity, as a reference. However, based on an arbitrary ISO sensitivity, the value is higher or lower than this. It goes without saying that it may be set whether or not the time division processing is selected depending on the above.

[0039]

As described above with reference to the embodiments, according to the first aspect of the present invention, the noise of the digital signal is mixed with the analog signal which is weak against noise in the single shooting mode selection. In addition, the continuous shooting can be performed without impairing the high speed in the continuous shooting mode. Further, according to the invention of claim 2, since the time division processing is performed when the ISO sensitivity is high, it is possible to prevent the S / N from being lowered due to the mixing of the noise due to the digital signal into the analog signal processing system. In addition, since a high shutter speed can be obtained, there is no problem in the operation time as a whole even if the time division operation is performed. On the other hand, when the ISO sensitivity is low, the simultaneous parallel processing is performed and the high-speed processing is prioritized, so that it is possible to cover the time delay due to the slow shutter speed due to the low ISO sensitivity. Further, according to the invention of claim 3, the operation of the digital signal processing circuit is prohibited while the image signal for the exposure amount calculation or the autofocus is read out. Therefore, the exposure amount calculation or the autofocus calculation is performed. It is possible to perform accurate exposure and autofocus without the noise due to the digital signal being mixed in the video signal for.

[Brief description of drawings]

FIG. 1 is a block configuration diagram showing a first embodiment of an imaging device according to the present invention.

FIG. 2 is a timing chart for explaining the operation of the first exemplary embodiment shown in FIG.

FIG. 3 is a block diagram showing a second embodiment of the present invention.

FIG. 4 is a timing chart for explaining the operation of the second exemplary embodiment shown in FIG.

FIG. 5 is a timing chart showing an operation when performing simultaneous parallel processing in the embodiment shown in FIG.

FIG. 6 is a timing chart for explaining the operation when the time division processing according to the present invention is applied to the switching operation between the single shooting mode and the continuous shooting mode.

FIG. 7 is a timing chart for explaining the operation when the time division processing according to the present invention is applied to the AF processing operation.

FIG. 8 shows the time-division processing according to the present invention, which has an ISO sensitivity of AG.
7 is a flowchart for explaining an operation when applied to setting to a C circuit.

[Explanation of symbols]

1 lens barrel 2 zoom lens 3 focus lens 4 aperture 5 Image sensor 6 Imaging circuit 7 CDS circuit 8 AGC circuit 9 A / D conversion circuit 10 line memory 11 Changeover switch 12 WB processing circuit 13 Image processing circuit 14 Compression / expansion circuit 15 recording memory 16 D / A conversion circuit 17 LCD playback display section 18 AE processing circuit 19 AF processing circuit 20 Image sensor driver 21 Timing signal generator 22 Sync signal generator 23 Memory controller 25 CPU 26 First motor drive circuit 27 Second motor drive circuit 28 Third motor drive circuit 29 Flash unit 30 switching circuits 31 Operation switch 32 EEPROM 33 batteries 34 power switch 100 analog / digital LSI 101 Analog signal processor 102 Digital signal processor

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification code FI theme code (reference) G03B 17/02 H04N 101: 00 5C024 H04N 5/335 G02B 7/11 D // H04N 101: 00 G03B 3 / 00 AF term (reference) 2H002 EB01 JA07 ZA03 2H011 AA03 BA31 BB04 2H051 AA00 BA47 CE14 GB15 2H100 CC07 EE03 FF01 5C022 AA13 AB01 AB20 AB22 AB37 AC31 AC42 AC69 5C024 AX01 BX01 CX03 EX03 G46 XH18

Claims (3)

[Claims] 1. An imaging device having an IC in which an analog signal processing circuit and a digital signal processing circuit are mounted together
Switching means for switching between a still image shooting mode for shooting frames and a continuous shooting mode for continuously shooting a plurality of images, and when the still image shooting mode is selected by the switching means,
A first control means for operating the analog signal processing circuit and the digital signal processing circuit in a time division manner, and the analog signal processing circuit and the digital signal when the continuous shooting mode is selected by the switching means. An image pickup apparatus comprising: a second control unit that permits simultaneous operation of the processing circuits. 2. An imaging device having an IC in which an analog signal processing circuit and a digital signal processing circuit are mounted together,
An ISO sensitivity switching unit for switching the SO sensitivity, and when the ISO sensitivity switched and set by the ISO sensitivity switching unit is higher than a predetermined sensitivity, the analog signal processing circuit and the digital signal processing circuit are operated in a time division manner. When the ISO sensitivity set by the first sensitivity control means and the ISO sensitivity switching means is lower than a predetermined sensitivity,
An image pickup apparatus comprising: a second control unit that allows simultaneous operation of the analog signal processing circuit and the digital signal processing circuit. 3. An image pickup device having an image pickup device, and an IC in which an analog signal processing circuit for processing a video signal output from the image pickup device and a digital signal processing circuit are mounted together. An exposure amount calculation based on the above, and a calculation unit that performs calculation for autofocus, and at least while reading a video signal for calculating the exposure amount from the image sensor or a video signal for autofocus, An image pickup apparatus comprising: a control unit that prohibits the operation of the digital signal processing circuit.