JP2003152157A - Integrated circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain an integrated circuit, high in isolation between circuit blocks. SOLUTION: The integrated circuit is provided with capacitors 6 and inductors 7, which are designed so as to cancel the value of reactance of a wiring structure connecting a ground pad 3 to the ground terminal 4 of a package 2 and inserted between the ground terminals 4 and grounds 8 while being connected in parallel to each other.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention mainly mounts, on a printed circuit board, a component in which a high frequency circuit of a wireless device such as a cordless remote controller, a cordless phone or a mobile phone is integrated on a semiconductor substrate and a semiconductor integrated circuit is packaged. The present invention relates to an integrated circuit configured, and more particularly, to an integrated circuit used for applications requiring high isolation between a plurality of integrated circuit blocks.

[0002]

2. Description of the Related Art A conventional integrated circuit will be described with reference to the drawings. FIG. 6 is a block diagram of a conventional integrated circuit.

In FIG. 6, 1 is a semiconductor integrated circuit, 2 is a package, 3 is a ground pad, 4 is a ground terminal,
Reference numeral 5 is a wiring structure, and 8 is a ground.

A semiconductor integrated circuit 1 is formed on a semiconductor substrate. Then, the semiconductor integrated circuit 1 is packaged with resin to be a finished IC. At this time, the grounding pad 3 of the semiconductor integrated circuit 1 and the package lead forming the grounding terminal 4 of the package 2 are connected by a bonding wire and then packaged. The package 2 is mounted on a printed board. The ground terminal 4 of the package 2 is connected to the ground 8. Here, the ground 8 is a high-frequency ground, and is generally composed of a ground pattern formed on a printed circuit board and having a relatively large area. The wiring structure 5 is the ground pad 3
To the ground terminal 4, and usually has an inductance component of several nH to several tens nH as a reactance component.

[0005]

However, the above-mentioned conventional integrated circuit has a problem that the isolation of the circuit cannot be sufficiently obtained.

As described above, since the wiring structure 5 has an inductance component, the voltage of the high frequency signal in the semiconductor integrated circuit 1 is generated at one end of the wiring structure 5 and the voltage in the circuit connected to the same ground pad is increased. It was a cause of a large decrease in isolation.

The fact that isolation is not sufficiently obtained in the integrated circuit has been a factor that makes it difficult to integrate the high frequency circuit.

[0008]

In order to solve the above conventional problems, an integrated circuit of the present invention is a semiconductor integrated circuit, a package for housing the semiconductor integrated circuit, a ground pad of the semiconductor integrated circuit, and A wiring structure for connecting the ground terminal of the package and a capacitor and an inductor inserted between the ground terminal and the ground and connected in parallel to each other are provided, and the absolute value of the reactance value of the inductor at a desired frequency is the reactance value of the capacitor. The absolute value of the combined reactance of the capacitor and the inductor is substantially the same as the absolute value of the reactance value of the wiring structure.

Since the capacitor and the inductor are set so as to cancel the inductance value of the wiring structure at the frequency of the high frequency signal, they are grounded at a high frequency. That is, since high frequency voltage is not generated in the ground pad, large isolation can be obtained.

[0010]

A first aspect of the present invention is a semiconductor integrated circuit, a package that houses the semiconductor integrated circuit, and a wiring structure that connects a ground pad of the semiconductor integrated circuit and a ground terminal of the package. A capacitor and an inductor inserted between the ground terminal and the ground and connected in parallel with each other, the absolute value of the reactance value of the inductor at a desired frequency is set to be larger than the absolute value of the reactance value of the capacitor, The absolute value of the combined reactance of the inductor is substantially the same as the absolute value of the reactance value of the wiring structure. Since the capacitor and the inductor are set so as to cancel the inductance value of the wiring structure at the frequency of the high frequency signal, the capacitor and the inductor are grounded at a high frequency and a large isolation can be obtained.

According to a second aspect of the present invention, a semiconductor integrated circuit, first and second ground pads formed in the semiconductor integrated circuit and connected to each other, a package for housing the semiconductor integrated circuit, and the first and second ground pads. First and second wiring structures for connecting the first and second ground pads to the first and second ground terminals of the package, respectively, and a reactance at a desired frequency inserted between the second ground terminal and the ground. The absolute value of the value is the second
The first ground terminal is connected to the ground by including a capacitor having substantially the same absolute value as the reactance value of the wiring structure. In addition to the conventional structure of the ground terminal, the second ground terminal and the capacitor are provided to cancel the inductance value of the wiring structure so that the high frequency impedance is set to be small.
The isolation can be further increased, providing isolation over a wide range of frequencies.

According to a third aspect of the present invention, a semiconductor integrated circuit, a first ground pad connected to the first circuit block of the semiconductor integrated circuit, and a second circuit block of the semiconductor integrated circuit are connected. A second ground pad, and a third ground pad connected between the first circuit block and the second circuit block and connected to a substrate of a semiconductor substrate that constitutes the semiconductor integrated circuit. A package accommodating the semiconductor integrated circuit, first, second and third ground pads respectively connecting the first, second and third ground pads and the first, second and third ground terminals of the package. Wiring structure, and the third
And a capacitor and an inductor inserted between the ground terminal and the ground and connected in parallel with each other, the absolute value of the reactance value of the inductor at a desired frequency is set to be larger than the absolute value of the reactance value of the capacitor, The absolute value of the combined reactance of the inductor is substantially the same as the absolute value of the reactance value of the third wiring structure, and the first and second ground terminals are connected to the ground. Further, since the signal transmitted between the circuit blocks via the substrate is grounded at the third ground terminal, it is possible to prevent the isolation deterioration between the plurality of circuit blocks via the substrate.

According to a fourth aspect of the present invention, a semiconductor integrated circuit, first and second circuit blocks of the semiconductor integrated circuit, and a package for housing the semiconductor integrated circuit are provided.
A reactance value of the inductor at a desired frequency, including a wiring structure that connects a ground pad of the semiconductor integrated circuit and a ground terminal of the package, and a capacitor and an inductor that are inserted between the ground terminal and the ground and connected in parallel with each other. Is set to be larger than the absolute value of the reactance value of the capacitor, the absolute value of the combined reactance of the capacitor and the inductor is substantially the same as the absolute value of the reactance value of the wiring structure, and the first circuit block And the ground wiring of the second circuit block are connected at the point of the ground pad or in the vicinity of the ground pad. Since the common impedance between the circuits can be made extremely small, the isolation between the plurality of circuit blocks connected to one ground terminal can be increased.

According to a fifth aspect of the present invention, a semiconductor integrated circuit, first and second circuit blocks of the semiconductor integrated circuit, and a package that houses the semiconductor integrated circuit,
First and second wiring structures for connecting the first and second ground pads of the semiconductor integrated circuit and the first and second ground terminals of the package, respectively, and the second wiring structure.
And a capacitor having an absolute value of a reactance value at a desired frequency that is substantially the same as an absolute value of a reactance value of the second wiring structure, the first ground terminal being connected to the ground. Is
The ground wiring of the first circuit block and the ground wiring of the second circuit block are connected at a point of the second ground pad or in the vicinity of the second ground pad. Also, since it is not necessary to connect an inductor with a reactance larger than the absolute value of the reactance of the connected capacitor, unnecessary resonance does not occur, and isolation between multiple circuit blocks connected to one ground terminal is further increased. It can also be obtained over a wide range of frequencies.

[0015]

Embodiments of the present invention will be described below with reference to the drawings.

In the present embodiment, an example will be described in which the aim is to improve the isolation when the frequency is around 400 MHz.

Example 1 FIG. 1 is a pattern diagram on a semiconductor substrate of an integrated circuit of Example 1 according to the present invention. Figure 1
The integrated circuit of this embodiment will be described with reference to FIG.

In FIG. 1, 1 is a semiconductor integrated circuit, 2 is a package, 3 is a ground pad, 4 is a ground terminal,
Reference numeral 5 is a wiring structure, 6 is a capacitor, 7 is an inductor, and 8 is a ground.

The semiconductor integrated circuit 1 is constructed on a semiconductor substrate. Then, the semiconductor integrated circuit 1 is packaged with resin to be a finished IC. At this time, the grounding pad 3 of the semiconductor integrated circuit 1 and the package lead forming the grounding terminal 4 of the package 2 are connected by a bonding wire and then packaged. The package 2 is mounted on a printed board. The ground terminal 4 of the package 2 is connected to the ground 8 of the printed board via the capacitor 6 and the inductor 7 which are connected in parallel with each other. Here, the ground 8 is a high-frequency ground. The wiring structure 5 is a structure including the ground pads 3 to 8.

This embodiment is designed to obtain isolation at a frequency of 400 MHz. Wiring structure 5 is 4
Since it has an inductance component of nH, 400MH
At z, it has a reactance component of j10Ω. Then, the capacitor 6 and the inductance 7 are set so as to cancel the inductance component. That is, the capacitor 6 is set to 39.8 pF and the inductor 7 is set to 1 microH. Here, the combined reactance component of the capacitor 6 and the inductor 7 is -j1 at 400 MHz.
Since it is 0Ω, the reactance component of the wiring structure 5 is canceled. That is, the impedance from the ground pad 3 to the ground 8 at 400 MHz becomes zero.

Therefore, 400 MHz in the semiconductor integrated circuit 1
Since a high frequency signal is not excited at one end of the wiring structure by the high frequency signal, a large isolation can be obtained.

(Embodiment 2) FIG. 2 is a configuration diagram of an integrated circuit of Embodiment 2 of the present invention. In FIG. 2, 9 is a first ground pad, 10 is a second ground pad, 11 is a first ground terminal, 12 is a second ground terminal, 13 is a first wiring structure, and 14 is a second wiring. It is a structure. The same components as those in FIG. 1 are shown with the same numbers.

The feature of the present invention is that the first ground terminal 11 is provided.
In addition to the above, a second ground terminal is provided.

The first and second ground pads of the semiconductor integrated circuit 1 are connected to each other. Then, the first ground terminal 11 and the first ground pad 9 of the package 2
Are connected by the first wiring structure 13. Further, the first ground terminal 11 is connected to the ground 8 formed on the printed board.

On the other hand, the second ground terminal 12 of the package 2 and the second ground pad 10 form the second wiring structure 14
Connected by. And the second ground terminal 12
Is connected to the ground 8 via the capacitor 6. Here, the capacitance of the capacitor 6 is set so as to cancel the reactance component of the second wiring structure 14 at 400 MHz.

In this embodiment, in addition to the first ground terminal 11 which is a conventional ground terminal, the second ground terminal 1 is used.
2 is provided. The first ground terminal 11 can be grounded over a relatively wide frequency range from a DC component to a high frequency component. However, in the high frequency region, it becomes impossible to obtain a complete ground due to the presence of a reactance component due to the wiring structure. Therefore, for 400 MHz where particularly large isolation is required, the wiring structure is formed by the capacitor 6 of the second ground terminal 12. By canceling out the reactance of 14, the impedance of the second ground terminal is made zero.

In the present embodiment, in addition to the fact that the inductor component is not necessary, the impedance of the second ground terminal 10 is lowered only by the constitution of the second wiring structure 14 and the capacitor 6, so that the intermediate frequency is maintained. Parallel resonance due to inductor and capacitor does not occur. Therefore, the impedance can be reduced over a wide frequency range, and high isolation can be obtained.

In this embodiment, two ground pads are provided, but one ground pad may be connected to two ground terminals.

(Third Embodiment) FIG. 3 is a block diagram of an integrated circuit according to a third embodiment of the present invention. In FIG. 3, 15 is a first circuit block, 16 is a second circuit block, and 17 is a third circuit block.
Ground pad, 18 is a third ground terminal, and 19 is a third wiring structure. The same components as those in FIGS. 1 and 2 are designated by the same reference numerals.

A feature of the present invention is that the third ground pad is provided to prevent a decrease in isolation between a plurality of circuit blocks via the substrate. In general, in a semiconductor integrated circuit in which a plurality of circuit blocks are formed on a semiconductor substrate, a configuration is used in which an individual ground pad is provided for each circuit block and grounded to the ground to increase the isolation between the circuit blocks. However, in an actual configuration, it is necessary to use a structure in which a ground wiring or the like is connected to a substrate of a semiconductor substrate in order to secure surge resistance or prevent a latch-up phenomenon. Here, the substrate means a base material such as silicon which is a wafer of a semiconductor substrate, and elements such as transistors are formed on the base material called the substrate to form a semiconductor integrated circuit. However, connecting the ground wiring to the substrate has a harmful effect that the circuit blocks are connected to each other by the substrate resistor and the isolation is deteriorated.

In this embodiment, the third ground pad 17 is provided in the semiconductor integrated circuit 1 in order to solve the above problems. The third ground pad 17 is connected to the ground wiring connected to the substrate located between the first and second circuit blocks 15 and 16 of the semiconductor integrated circuit 1. The third ground pad 17 is connected to the third ground terminal 1 of the package by the third wiring structure 19.
8 is connected. Further, the third ground terminal 18 is connected to the ground 8 via the capacitor 6 and the inductor 7 as in the first embodiment.

As described above, by setting the impedance on the substrate path that causes the isolation reduction between the first circuit block 15 and the second circuit block 16 to zero, the high frequency signal transmitted between the circuit blocks is reduced. Since it can be attenuated, the isolation between the circuit blocks can be increased.

Although the capacitor 6 and the inductor 7 are used in this embodiment, the inductor may be infinite, that is, no inductor may be used, and only the capacitor 6 may be used. Especially for the purpose of improving isolation of high frequency signals, only a capacitor is required.

(Fourth Embodiment) FIG. 4 is a block diagram of an integrated circuit according to a fourth embodiment of the present invention. In FIG. 4, 20 is a ground wiring of the first circuit block, and 21 is a ground wiring of the second circuit block. The same components as those in FIGS. 1, 2 and 3 are designated by the same reference numerals.

A feature of the present invention is that isolation between a plurality of circuit blocks can be obtained with a small number of ground terminals.

The ground wiring 20 of the first circuit block and the ground wiring 21 of the second circuit block are connected at the position (point) of the ground pad. With such a configuration, no common impedance is generated from the first and second circuit blocks to the ground pad 3. Then, as in the first embodiment, the capacitor 6 and the inductor 7 are used to connect the ground pad 3 to the ground terminal 4
The reactance component up to and cancel the ground pad 3
By setting the impedance of 0 to zero, no common impedance is generated from the first and second circuit blocks to the ground 8.

As a result, the isolation between the circuit blocks can be increased.

(Embodiment 5) FIG. 5 is a block diagram of an integrated circuit according to a fifth embodiment of the present invention. 5, the same components as those in FIGS. 2 and 4 are designated by the same reference numerals.

A feature of the present invention is that isolation between a plurality of circuit blocks can be further increased. That is, the first ground terminal 11 and the ground 8
By connecting to, it is possible to ground over a relatively wide frequency range from direct current to high frequency. For 400 MHz, which requires particularly large isolation, the capacitor 6 connected to the second ground terminal cancels the reactance component of the second wiring structure 14 to obtain even greater isolation.

In each of the above-described embodiments, the isolation improving frequency is set to 400 MHz, but the invention can be applied to any frequency of 400 MHz or less or 400 MHz or more. For example, even at 2 GHz, the same idea can be applied by changing the values of the capacitor and the inductor.

[0041]

As is apparent from the above description, according to the integrated circuit of the present invention, since the capacitor and the inductor are set so as to cancel the inductance value of the wiring structure at the frequency of the high frequency signal, they are grounded at a high frequency. ,
There is an effect that a large isolation can be obtained.

[Brief description of drawings]

FIG. 1 is a configuration diagram of an integrated circuit according to a first embodiment of the present invention.

FIG. 2 is a configuration diagram of an integrated circuit according to a second embodiment of the present invention.

FIG. 3 is a configuration diagram of an integrated circuit according to a third embodiment of the present invention.

FIG. 4 is a configuration diagram of an integrated circuit according to a fourth embodiment of the present invention.

FIG. 5 is a configuration diagram of an integrated circuit according to a fifth embodiment of the present invention.

FIG. 6 is a pattern diagram of a conventional semiconductor integrated circuit.

[Explanation of symbols]

1 Semiconductor integrated circuit 2 packages 3 ground pads 4 ground terminals 5 wiring structure 6 capacitors 7 inductor 8 grand 9 First ground pad 10 Second ground pad 11 First ground terminal 12 Second ground terminal 13 First wiring structure 14 Second wiring structure 15 First circuit block 16 Second circuit block 17 Third ground pad 18 Third ground terminal 19 Third wiring structure 20 Ground wiring of the first circuit block 21 Ground wiring of the second circuit block

Claims (5)

[Claims] 1. A semiconductor integrated circuit, a package that houses the semiconductor integrated circuit, a wiring structure that connects a ground pad of the semiconductor integrated circuit and a ground terminal of the package, and a wiring structure that is inserted between the ground terminal and the ground. A capacitor and an inductor connected in parallel, the absolute value of the reactance value of the inductor at a desired frequency is set to be larger than the absolute value of the reactance value of the capacitor, and the absolute value of the combined reactance of the capacitor and the inductor is An integrated circuit that has almost the same absolute value as the reactance value of the wiring structure. 2. A semiconductor integrated circuit, first and second ground pads formed in the semiconductor integrated circuit and connected to each other, a package for housing the semiconductor integrated circuit, and the first and second ground pads. And first and second wiring structures respectively connecting the first and second ground terminals of the package, and the absolute value of the reactance value at a desired frequency inserted between the second ground terminal and the ground is the first and second wiring structures. An integrated circuit comprising a capacitor having a reactance value substantially equal to that of a wiring structure of No. 2, and the first ground terminal is connected to the ground. 3. A semiconductor integrated circuit, a first ground pad connected to a first circuit block of the semiconductor integrated circuit, and a second ground pad connected to a second circuit block of the semiconductor integrated circuit. And a third ground pad connected between the first circuit block and the second circuit block and connected to a substrate of a semiconductor substrate that constitutes the semiconductor integrated circuit, and the semiconductor integrated circuit is housed. And a first, second and third wiring structure for connecting the first, second and third ground pads to the first, second and third ground terminals of the package, respectively, and 3 includes a capacitor and an inductor inserted between the ground terminal and the ground and connected in parallel to each other, and the reactance value of the inductor at a desired frequency. Is set to be larger than the absolute value of the reactance value of the capacitor, and the absolute value of the combined reactance of the capacitor and the inductor is substantially the same as the absolute value of the reactance value of the third wiring structure. And an integrated circuit in which the second ground terminal is connected to the ground. 4. A semiconductor integrated circuit, first and second circuit blocks of the semiconductor integrated circuit, a package that houses the semiconductor integrated circuit, a ground pad of the semiconductor integrated circuit, and a ground terminal of the package are connected. And a capacitor and an inductor inserted between the ground terminal and the ground and connected in parallel with each other, and the absolute value of the reactance value of the inductor at a desired frequency is set to be larger than the absolute value of the reactance value of the capacitor. The absolute value of the combined reactance of the capacitor and the inductor is substantially the same as the absolute value of the reactance value of the wiring structure, and the ground wiring of the first circuit block and the ground wiring of the second circuit block are the same. Ground pad point or near the ground pad An integrated circuit connected by the side. 5. A semiconductor integrated circuit, first and second circuit blocks of the semiconductor integrated circuit, a package housing the semiconductor integrated circuit, and a first of the semiconductor integrated circuits.
And first and second wiring structures connecting the second ground pad and the first and second ground terminals of the package, respectively, and a reactance value at a desired frequency inserted between the second ground terminal and the ground. Is provided with a capacitor whose absolute value is substantially the same as the absolute value of the reactance value of the second wiring structure, the first ground terminal is connected to the ground, and the ground wiring of the first circuit block and the second wiring The ground wiring of the circuit block is the point of the second ground pad or the second ground pad.
Integrated circuit connected near the ground pad of the.