JP2003151976A - High-permittivity insulating film, gate insulating film and semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a high-permittivity insulating film and a semiconductor device using it, the insulating film being able to be used as a gate insulating film of an MOSFET having improved leakage and break down voltage characteristics, improved surface smoothness and a relatively high permittivity, and enabling microfabrication and miniaturization. SOLUTION: The semiconductor device has a semiconductor substrate 4 and the high-permittivity insulating film 8, formed directly or via an other layer on the surface of the semiconductor substrate 4. The main component of the high-permittivity insulating film 8 is a bismuth laminar compound, and the c axis of the bismuth laminar compound is oriented to be perpendicular to the surface of the semiconductor substrate, and the bismuth laminar compound is expressed by the composition formula: (Bi2 O2 )<2+> (Am-1 Bm O3+1 )2- or Bi2 Am-1 Bm O3m+3 , where m is a positive number, a symbol A denotes at least one element selected from among Na, K, Pb, Ba, Sr, Ca and Bi, and symbol B denotes at least one element selected from among Fe, Co, Cr, Ga, Ti, Nb, Ta, Sb, V, Mo and W.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high-dielectric-constant insulating film, and more specifically, it has excellent leak characteristics, withstand voltage characteristics and surface smoothness, and has a relatively high dielectric constant, such as semiconductor devices and inorganic EL elements. The present invention relates to a high dielectric constant insulating film that can be used for various electronic components such as, and can be preferably used as a gate insulating film of a MOSFET that can be miniaturized and downsized, and a semiconductor device using the same.

[0002]

2. Description of the Related Art With the miniaturization and high integration of LSI,
Miniaturization of elements such as MOSFETs used in large numbers in LSI is also required, and accordingly, reduction of gate length (width of gate electrode) and thinning of gate insulating film are progressing. As a conventional gate insulating film, a silicon oxide film is used because of its ease of film formation.

However, since the relative dielectric constant of the silicon oxide film is as low as about 4, an electric field applied to the narrow gate electrode is channeled through the gate insulating film to the channel on the surface of the semiconductor substrate (generally a silicon substrate). In order to apply to the region, the film thickness of the silicon oxide film has to be further reduced. The reason is that the silicon oxide film having a low dielectric constant is used as the gate insulating film, so that the film thickness has to be reduced in order to increase the capacitive coupling between the gate electrode and the channel region.

However, when a thin silicon oxide film is used as a gate insulating film, a leak current due to a tunnel current becomes a problem, and using a silicon oxide film as a gate insulating film becomes a bottleneck for miniaturization of elements such as MOSFETs. Is coming.

Therefore, recently, it has been proposed to use a high dielectric constant thin film as a gate insulating film. Since the high dielectric constant thin film has a larger relative dielectric constant and a larger capacitive coupling than the silicon oxide film, it does not need to be as thin as the silicon oxide film and has excellent leakage current resistance characteristics.
It is expected to contribute to miniaturization of elements such as OSFETs.

Conventional high dielectric constant thin films proposed as gate insulating films include ZrO ₂ , HfO ₂ , and La.
There are high dielectric constant thin films such as oxides of rare earth elements such as ₂ O ₃ . The relative permittivity of these thin films is about 20-30.

However, when these thin films are formed directly on the surface of the silicon substrate, silicon oxide having a low dielectric constant is formed at the interface with the silicon substrate, which lowers the effective dielectric constant of the gate insulating film. Will end up. Therefore, in order to obtain the necessary capacitive coupling characteristics, the film thickness of the gate insulating film has to be reduced, which also has problems in leak characteristics and withstand voltage characteristics.

[0008]

SUMMARY OF THE INVENTION The present invention has been made in view of such circumstances, and its object is to have excellent leak characteristics, pressure resistance characteristics and surface smoothness, a relatively high dielectric constant, a fine structure and a small size. (EN) Provided are a high dielectric constant insulating film which can be preferably used as a gate insulating film of a MOSFET that can be realized, and a semiconductor device using the same.

[0009]

Means for Solving the Problems The inventors of the present invention have made extensive studies as to the material of the gate insulating film. As a result, a bismuth layered compound having a specific composition is used, and the c-axis ([001] of the bismuth layered compound is used. The high-dielectric-constant insulating film is formed by orienting (orientation) perpendicular to the substrate surface, that is, a c-axis oriented film of bismuth layer compound (thin film normal is parallel to c-axis) is formed on the substrate surface. As a result, even if it is thin, it has a relatively high dielectric constant and low loss (tan).
A high-dielectric-constant insulating film having excellent leakage characteristics, improved breakdown voltage, excellent temperature characteristics of dielectric constant, and excellent surface smoothness, and a gate insulating film using the same can be provided. I found that I could do it. Further, by using such a high dielectric constant insulating film as the gate insulating film, the leak characteristics and the breakdown voltage of the gate insulating film are improved, and the MOSF
They have found that the ET can be miniaturized and have completed the present invention.

That is, the high dielectric constant insulating film according to the present invention
Is bismuth whose c-axis is oriented perpendicular to the substrate surface.
A high dielectric constant insulating film having a layered compound, comprising:
The layered compound has a composition formula: (Bi_TwoO_Two)²⁺(A
_m-1B_m O_{3m + 1})^2-, Or Bi_TwoA
_m-1B_mO_{3m + 3}Which is represented by
Number m is a positive number, symbol A is Na, K, Pb, Ba, Sr, C
at least one element selected from a and Bi, a symbol
B is Fe, Co, Cr, Ga, Ti, Nb, Ta, S
at least one element selected from b, V, Mo and W
It is characterized by being prime.

In the gate insulating film according to the present invention, the c-axis is the substrate.
With a bismuth layered compound oriented perpendicular to the plane
Which is a gate insulating film, wherein the bismuth layered compound is
Composition formula: (Bi_TwoO_Two)²⁺(A_m-1B_m O
_{3m + 1})^2-, Or Bi_TwoA_m-1B_mO
_{3m + 3}And the symbol m in the composition formula is a positive number,
A is from Na, K, Pb, Ba, Sr, Ca and Bi
At least one element selected, symbol B is Fe, Co,
Cr, Ga, Ti, Nb, Ta, Sb, V, Mo and
Characterized by being at least one element selected from W
And

A semiconductor device according to the present invention is a semiconductor substrate
And directly on the surface of the semiconductor substrate or through another layer
A semiconductor device having a high dielectric constant insulating film formed by
Therefore, the high dielectric constant insulating film is mainly composed of a bismuth layered compound.
As a component, the c-axis of the bismuth layered compound is the semiconductor
Oriented perpendicular to the surface of the substrate, said bismuth
The layered compound has a composition formula: (Bi_TwoO_Two)²⁺(A
_m-1B _mO_{3m + 1})^2-, Or Bi_TwoA
_m-1B_mO_{3m + 3}Which is represented by
Number m is a positive number, symbol A is Na, K, Pb, Ba, Sr, C
at least one element selected from a and Bi, a symbol
B is Fe, Co, Cr, Ga, Ti, Nb, Ta, S
at least one element selected from b, V, Mo and W
It is characterized by being prime.

In the present invention, it is particularly preferable that the c-axis of the bismuth layered compound is 100% oriented perpendicular to the substrate surface, that is, the degree of c-axis orientation of the bismuth layered compound is 100%. 100% c-axis orientation
It doesn't have to be. Preferably, the c-axis orientation degree of the bismuth layered compound is 80% or more.

Preferably, the bismuth layer compound is
Rare earth elements (Sc, Y, La, Ce, Pr, Nd, P
m, Sm, Eu, Gd, Tb, Dy, Ho, Er, T
at least one element selected from m, Yb and Lu).

[0015]

Preferably, the high dielectric constant insulating film is formed on the surface of the semiconductor substrate, a gate electrode having a predetermined pattern is formed on the surface of the high dielectric constant insulating film, and the high dielectric constant insulating film is gate insulating. Functions as a film.

Alternatively, a buffer layer is formed on the surface of the semiconductor substrate, the high dielectric constant insulating film is formed on the surface of the buffer layer, and a gate electrode having a predetermined pattern is formed on the surface of the high dielectric constant insulating film. The buffer layer and the high dielectric constant insulating film may function as a gate insulating film.

Alternatively, a buffer layer is formed on the surface of the semiconductor substrate, a floating gate having a predetermined pattern is formed on the surface of the buffer layer, and the high dielectric constant insulating film is formed on the surface of the floating gate. A gate electrode may be formed on the surface of the high dielectric constant insulating film, the buffer layer may function as a gate insulating film, and the high dielectric constant insulating film may function as an intermediate insulating film.

The method for producing the high dielectric constant insulating film according to the present invention is not particularly limited, but for example, cubic crystal, tetragonal crystal,
A composition formula: (Bi ₂ O ₂ ) ²⁺ (A
_{m-1 B m O 3m +} 1) 2 -, or _Bi 2 A
expressed in _{m-1 B m O 3m +} 3, the symbol m is a positive number in the composition formula, the symbol A is Na, K, Pb, Ba, Sr, C
at least one element selected from a and Bi, and the symbol B is Fe, Co, Cr, Ga, Ti, Nb, Ta, S
It can be manufactured by forming a high dielectric constant insulating film having as a main component a bismuth layered compound which is at least one element selected from b, V, Mo and W.

The high-dielectric-constant insulating film composed of the bismuth layer compound having the above-mentioned composition in the c-axis orientation has a relatively high dielectric constant (for example, a relative dielectric constant of more than 100) even if the film thickness is reduced.
And low loss (tan δ is 0.02 or less) and excellent in leak characteristics (for example, a leak current measured at an electric field strength of 50 kV / cm is 1 × 10 ⁻⁷ A / cm ² or less, a short circuit rate is 10% or less), Withstand voltage is improved (for example, 1000
kV / cm or more), excellent temperature characteristic of permittivity (for example, the average rate of change of permittivity with respect to temperature is a reference temperature of 25 ° C.).
And within ± 500 ppm / ° C.) and excellent surface smoothness (for example, surface roughness Ra is 2 nm or less).

Further, since the high dielectric constant insulating film according to the present invention can maintain a relatively high dielectric constant even when it is thin and has good surface smoothness, it can be used as a gate insulating film of a MOSFET, an EPROM or an EEPROM. It can be preferably used as an intermediate insulating film of a MOSFET having a floating gate used.

Further, the high dielectric constant insulating film of the present invention is excellent in frequency characteristics (for example, the value of the dielectric constant in the high frequency region 1 MHz under a specific temperature and 1 in the low frequency region lower than that).
The ratio to the value of the dielectric constant at kHz is 0.9 to 1.
1), excellent voltage characteristics (for example, a dielectric constant value at a measurement voltage of 0.1 V under a specific frequency and a measurement voltage of 5 V)
The ratio with the value of the dielectric constant at 0.9 is an absolute value of 0.9 to 1.1).

Furthermore, the high dielectric constant insulating film of the present invention is
Excellent temperature characteristics of capacitance (average rate of change of capacitance with temperature is ± 500 ppm / ° C at standard temperature 25 ° C)
Within).

[0024]

BEST MODE FOR CARRYING OUT THE INVENTION The present invention will be described below based on the embodiments shown in the drawings. 1 (A) and 1 (B) are cross-sectional views of essential parts showing a state in which a high dielectric constant insulating film according to the present invention is formed on the surface of a semiconductor substrate, FIG. 2 (A) and FIG.
(B) is a MOSF having a high dielectric constant insulating film according to the present invention
FIG. 3 is a cross-sectional view of a main part of an ET, FIG. 3 is a cross-sectional view of a main part of a test sample of a high dielectric constant insulating film used in an example of the present invention, and FIG. FIG. 5 is a graph showing characteristics, and FIG. 5 is a graph showing voltage characteristics of the test sample of the high dielectric constant insulating film of Example 8.

First Embodiment As shown in FIG. 1A, in this embodiment, a high dielectric constant insulating film 8 is formed on the surface of a substrate 4. The high dielectric constant insulating film 8 is used as a gate insulating film of MOSFET, for example.

The substrate 4 is not particularly limited, and a single crystal having a good lattice matching (for example, SrTiO ₃ single crystal,
MgO single crystal, LaAlO ₃ single crystal, silicon single crystal, etc.), amorphous material (eg, glass, fused silica, SiO ₂ / Si, etc.), other materials (eg, ZrO ₂ / Si, CeO ₂ / Si, etc.), etc. Composed of. In particular, it is preferable that the substrate is composed of a substrate having a [100] orientation such as cubic, tetragonal, orthorhombic, or monoclinic.

However, in this embodiment, the substrate 4 is composed of a semiconductor substrate such as a silicon single crystal substrate. Board 4
Is not particularly limited, and is, for example, 100 to 1000.
It is about μm.

The high dielectric constant insulating film 8 has a composition formula: (Bi_Two
O_Two)²⁺(A_m-1B_mO _{3m + 1})^2-,
Or Bi_TwoA_m-1B_mO_{3m + 3}Represented by
Contains a smut layered compound. Generally, bismuth layering
The compound is (m-1) ABO_ThreePerov composed of
Above and below a layered perovskite layer with a series of skeite lattices
Is sandwiched between a pair of Bi and O layers to form a layered structure.
Shows the structure. In the present embodiment, such bismuth layering
Orientation of compound to [001] direction, that is, c-axis orientation
Has been increased. That is, c of the bismuth layered compound
High dielectric constant so that the axis is oriented perpendicular to the substrate 4.
The edge film 8 is formed.

In the present invention, the c-axis orientation degree of the bismuth layered compound is particularly preferably 100%, but the c-axis orientation degree may not necessarily be 100%, and the bismuth layered compound is preferably 80% or more. , More preferably 90%
As described above, more preferably 95% or more should be c-axis oriented. For example, when the bismuth layered compound is c-axis oriented using the substrate 4 made of an amorphous material such as glass, the c-axis orientation degree of the bismuth layered compound is preferably 80% or more. When the bismuth layered compound is c-axis oriented by using various thin film forming methods described later, the degree of c-axis orientation of the bismuth layered compound is preferably 90% or more, more preferably 95% or more. .

The c-axis orientation degree (F) of the bismuth layered compound referred to here is the X-ray diffraction intensity of the c-axis of the polycrystalline body having a completely random orientation, and P0 is the actual X-axis of the c-axis. When the line diffraction intensity is P, F (%) = (P−P0) /
(1−P0) × 100 (Equation 1)
P in Expression 1 is the reflection intensity I (00
The ratio ({ΣI (00l) / ΣI (hkl)}) between the total ΣI (001) of l) and the total ΣI (hkl) of the reflection intensity I (hkl) from each crystal plane (hkl), and P0
Is also the same. However, in Equation 1, 10 in the c-axis direction
The X-ray diffraction intensity P in the case of 0% orientation is 1. Further, according to the equation 1, when the orientation is completely random (P = P0), F = 0%, and when the orientation is completely in the c-axis direction (P = 1), , F = 100%
Is.

The c-axis of the bismuth layer compound means the direction connecting the pair of (Bi ₂ O ₂ ) ²⁺ layers, that is, the [001] orientation. By thus orienting the bismuth layered compound in the c-axis direction, the dielectric properties of the high dielectric constant insulating film 8 are maximized. That is, even if the film thickness of the high dielectric constant insulating film 8 is thin, for example, 100 nm or less, a relatively high dielectric constant and low loss (low tan δ) can be given, excellent leak characteristics can be obtained, and breakdown voltage can be improved. Excellent temperature characteristics of permittivity and excellent surface smoothness. If tan δ decreases, the loss Q (1 / tan δ) value increases.

In the above formula, the symbol m is not particularly limited as long as it is a positive number.

If the symbol m is an even number, the mirror plane has a plane parallel to the c-plane, so that the spontaneous polarization c is bounded by the plane.
The axial components cancel each other out and have no polarization axis in the c-axis direction. Therefore, the paraelectric property is maintained, the temperature characteristic of the dielectric constant is improved, and the low loss (t
is low).

In the above formula, the symbol A is Na, K, Pb, B.
It is composed of at least one element selected from a, Sr, Ca and Bi. When the symbol A is composed of two or more elements, their ratio is arbitrary.

In the above formula, the symbol B is Fe, Co, Cr,
It is composed of at least one element selected from Ga, Ti, Nb, Ta, Sb, V, Mo and W. When the symbol B is composed of two or more elements, their ratio is arbitrary.

The bismuth layered compounds forming the high dielectric constant insulating film 8 are Sc, Y, La, Ce, Pr, Nd, Pm,
Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Y
It is preferable to further include at least one element (rare earth element Re) selected from b and Lu. The amount of substitution with a rare earth element varies depending on the value of m. For example, when m = 3 where m is an odd number, the composition formula: Bi ₂ A
_{In 2-x} Re _x B ₃ O ₁₂ , preferably 0.
4 ≦ x ≦ 1.8, more preferably 1.0 ≦ x ≦ 1.4. By substituting the rare earth element in this range, the Curie temperature (phase transition temperature from the ferroelectric substance to the paraelectric substance) of the high dielectric constant insulating film 8 is preferably −100 ° C. or higher and 100 ° C. or lower, and more preferably −50. It is possible to keep the temperature within the range of 50 ° C to 50 ° C. Curie point is -100 ° C to + 100 ° C
Then, the dielectric constant of the high dielectric constant insulating film 8 increases. The Curie temperature can also be measured by DSC (differential scanning calorimetry) or the like. The Curie point is room temperature (2
(5 ° C.), tan δ further decreases, and as a result, the loss Q value further increases.

Further, for example, when m is an even number m = 4, the composition formula: Bi ₂ A _3-x Re _x B ₄ O ₁₅
In, it is preferably 0.01 ≦ x ≦ 2.0, and more preferably 0.1 ≦ x ≦ 1.0.

Even if the dielectric thin film 8 does not contain the rare earth element Re, it has excellent leak characteristics as will be described later. However, when it has this, the leak characteristic can be further improved.

For example, it does not contain the rare earth element Re
High dielectric constant insulating film 8 is measured at an electric field strength of 50 kV / cm
The leak current is preferably 1 × 10^-7A /
cm ^TwoOr less, more preferably 5 × 10^-8A / cm
^TwoThe short rate can be
10% or less, more preferably 5% or less
You can

On the other hand, in the high dielectric constant insulating film 8 containing the rare earth element Re, the leak current measured under the same conditions is preferably 5 × 10 ⁻⁸ A / cm ² or less, more preferably It can be 1 × 10 ⁻⁸ A / cm ² or less, and the short-circuit rate can be preferably 5% or less, more preferably 3% or less.

When used as a gate insulating film, the high dielectric constant insulating film 8 preferably has a film thickness of 200 nm or less, and more preferably 10 in terms of high capacitance.
It is 0 nm or less, more preferably 50 nm or less. The lower limit of the film thickness is preferably about 10 nm in consideration of the insulating property as the gate insulating film.

The high dielectric constant insulating film 8 of this embodiment has a surface roughness (Ra) according to JIS-B0601, for example.
It is preferably 2 nm or less, more preferably 1 nm or less.

The high dielectric constant insulating film 8 preferably has a dielectric constant of more than 200, more preferably 250 or more at 25 ° C. (room temperature) and a measurement frequency of 100 kHz (AC 20 mV).

In the high dielectric constant insulating film 8, tan δ at 25 ° C. (room temperature) and a measurement frequency of 100 kHz (AC 20 mV) is preferably 0.02 or less, more preferably 0.01 or less. The loss Q value is preferably 50 or more, more preferably 100 or more.

In the high dielectric constant insulating film 8, even if the frequency at a specific temperature (for example, 25 ° C.) is changed to a high frequency region of, for example, about 1 MHz, the dielectric constant changes (especially decreases).
Less is. Specifically, for example, the ratio between the value of the dielectric constant at a high frequency region of 1 MHz under a specific temperature and the value of the dielectric constant at a frequency of 1 kHz at a lower frequency region than that is expressed as an absolute value.
It can be set to 0.9 to 1.1. That is, the frequency characteristic is good.

In the high dielectric constant insulating film 8, even if the measurement voltage (applied voltage) under a specific frequency (eg, 10 kHz, 100 kHz, 1 MHz) is changed to, for example, about 5 V, the change in dielectric constant is small. Specifically, for example, the ratio between the value of the dielectric constant at a measurement voltage of 0.1 V under a specific frequency and the value of the dielectric constant at a measurement voltage of 5 V is expressed as an absolute value.
It can be set to 0.9 to 1.1. That is, the voltage characteristics are good.

Such a high dielectric constant insulating film 8 is formed by vacuum vapor deposition, high frequency sputtering, pulse laser vapor deposition (PLD), MOCVD (Metal Organic Chemical Vap).
or Deposition) method, sol-gel method, and various other thin film forming methods.

In this embodiment, the high dielectric constant insulating film 8 is formed by using a substrate or the like oriented in a specific orientation ([100] orientation, etc.).
To form.

The high dielectric constant insulating film 8 of the present embodiment has a relatively high dielectric constant, low loss, excellent leak characteristics, and improved withstand voltage even if the film thickness is thinned to 100 nm or less. Excellent temperature characteristics of permittivity and excellent surface smoothness. The high dielectric constant insulating film 8 is also excellent in frequency characteristics and voltage characteristics. Therefore, this high dielectric constant insulating film 8 can be preferably used as a gate insulating film.

Second Embodiment As shown in FIG. 1B, in this embodiment, after the buffer layer 7 is formed on the surface of the semiconductor substrate 4, the buffer layer 7 is formed on the surface of the first embodiment. In the same manner as above, the high dielectric constant insulating film 8 is formed. In this embodiment, the laminated film of the buffer layer 7 and the high dielectric constant insulating film 8 functions as a gate insulating film.

The buffer layer 7 is, for example, a silicon oxide (SiO ₂ ) film, a silicon oxide containing nitrogen (SiO ₂ ).
N) film, zirconium oxide (ZrO ₂ ) film, yttrium-stabilized zirconia (YSZ) film, cerium oxide (CeO ₂ ) film HfO ₂ , La ₂ O ₃ and other rare earth oxides. , Preferably 1
It is about 10 nm, more preferably about 1 to 5 nm. The method for forming the buffer layer 7 is not particularly limited, and examples thereof include a thermal oxide film forming method, a vacuum vapor deposition method, a sputtering method, a CVD method and the like.

By forming the high dielectric constant insulating film 8 after forming the buffer layer 7, the high dielectric constant insulating film can be easily formed. Further, the existence of the buffer layer 7 lowers the effective dielectric constant of the gate insulating film, but there is no problem because the high dielectric constant insulating film 8 has an extremely high dielectric constant.

Third Embodiment As shown in FIG. 2A, in this embodiment, the high dielectric constant insulating film 8 is used as a gate insulating film to form a MOSFET 20. After forming the high dielectric constant insulating film 8 shown in the first embodiment on the surface of the semiconductor substrate 4 composed of a silicon single crystal substrate or the like, a conductive layer to be the gate electrode 15 is formed, and the conductive layer is formed. Is etched to form the gate electrode 15. The conductive layer forming the gate electrode 15 is not particularly limited, and a polysilicon film or the like is exemplified. The gate electrode 15 may be a multilayer film.

A large number of gate electrodes 15 are formed on the surface of the semiconductor substrate 4 in a predetermined pattern, P-type or N-type impurities are ion-implanted, and then a heat treatment is performed to form a source.
The drain region 17 is formed in self-alignment with the gate electrode 15. The surface of the semiconductor substrate 4 located below the gate electrode 15 (immediately below the high dielectric constant insulating film 8) serves as a channel connecting the source / drain regions 17.

An N-type well (region of conductivity type N) is formed on the surface of the semiconductor substrate 4, and the MOSFET is formed on the N-type well.
In the case of forming P.sub.2, P-type impurities are used at the time of ion implantation for forming the source / drain regions 17, and a P-channel type MOSFET is formed. In addition, when a P-type well (a region having a P-type conductivity) is formed on the surface of the semiconductor substrate 4 and a MOSFET is formed on the P-type well, the ion implantation for forming the source / drain regions 17 is performed. Is an N-type impurity,
A channel type MOSFET is formed.

Since the MOSFET 20 of this embodiment uses the high dielectric constant insulating film 8 as a gate insulating film,
The gate insulating film has excellent leakage characteristics and breakdown voltage characteristics, and MO
This contributes to miniaturization and downsizing of the SFET 20.

Fourth Embodiment In the embodiment shown in FIG. 2B, a high dielectric constant insulating film 8a is used as an intermediate insulating film to form a semiconductor device 20a having a floating gate 19. In the present embodiment, first, the buffer layer 7a is formed on the surface of the semiconductor substrate 4 composed of a silicon single crystal substrate or the like. The buffer layer 7a is a portion that functions as a gate insulating film, and is made of, for example, the same material as that of the buffer layer 7 shown in FIG.

Next, a first conductive layer to be the floating gate 19 is formed on the surface of the buffer layer 7a. The first conductive layer is composed of, for example, a polysilicon film. This first conductive layer is etched by a predetermined pattern, and then the high dielectric constant insulating film 8a is formed on the surface of the first conductive layer.
To form a film. The high dielectric constant insulating film 8a is the same as the high dielectric constant insulating film 8 in the first embodiment.

After that, a second conductive layer to be the gate electrode 15a is formed on the surface of the high dielectric constant insulating film 8a, and the second conductive layer is etched to form the gate electrode 15a.
Subsequent to the etching process of the gate electrode 15a, the excess high dielectric constant insulating film 8a and the floating gate 19 are also etched at the same time. As a result, the floating gate 19 becomes an isolated pattern under the gate electrode 15a along the longitudinal direction thereof.

This semiconductor device 20a has, for example, an EPR.
It can be used as a non-volatile memory such as OM or EEPROM. By applying a predetermined write voltage to the gate electrode 15a, charges can be accumulated in the floating gate 19 from the source / drain 17 by a tunnel current through the buffer layer 7a which is a gate insulating film, and data can be stored.

Since the gate electrode 15a and the floating gate 19 are satisfactorily capacitively coupled via the high dielectric constant insulating film 8a, the reliability of data writing and reading is improved. That is, the high dielectric constant insulating film of the present invention is a semiconductor device 20 having a floating gate 19.
It can also be suitably used as the intermediate insulating film of a.

The present invention is not limited to the above-mentioned embodiments, but can be variously modified within the scope of the present invention. For example, the high dielectric constant insulating film according to the present invention can be preferably used not only as a gate insulating film of MOSFET but also as an insulating film of other semiconductor devices. Furthermore, the high dielectric constant insulating film according to the present invention is also good as an insulating film for an inorganic EL element, for example.

[0063]

EXAMPLES The present invention will be described below based on more detailed examples, but the present invention is not limited to these examples.

[0064]Example 1 CaRuO used as the lower electrode thin film 6 shown in FIG._ThreeTo [1
00] orientation epitaxially grown SrTiO_Three
Single crystal substrate 4 ((100) CaRuO_Three// (100)
SrTiO_Three) Was heated to 850 ° C. Next, CaR
uO_ThreeOn the surface of the lower electrode thin film 6, pulsed laser deposition method
At SrBi_ThreeTi_TwoTaO₁₂(Hereafter, SBT
Also called T) sintered body (this sintered body has a composition formula: Bi_Two
A_m-1 B_mO_{3m + 3}, The symbol m = 3, the symbol
A_Two= Sr₁, Bi₁And symbol B_Three= Ti
_Two, Ta₁Is expressed as
Form an SBTT thin film (high dielectric constant insulating film 8) of about 200 nm
I made it.

When the crystal structure of this SBTT thin film was measured by X-ray diffraction (XRD), it was found that it was oriented in the [001] direction, that is, it was c-axis oriented perpendicular to the surface of the SrTiO ₃ single crystal substrate. Was confirmed. Also,
The surface roughness (Ra) of this SBTT thin film was measured according to JIS-B0.
According to 601, the measurement was performed with an AFM (atomic force microscope, manufactured by Seiko Instruments Inc., SPI3800).

Next, on the surface of the SBTT thin film, 0.1 mm
A Pt upper electrode thin film 10 of φ was formed by a sputtering method to prepare a test sample 2 of a high dielectric constant insulating film.

The electrical characteristics (dielectric constant, tan δ, loss Q value, leak current, short-circuit rate) and temperature characteristics of the dielectric constant of the obtained test sample of the high dielectric constant insulating film were evaluated.
The dielectric constant (no unit) was measured by using a digital LCR meter (4274A manufactured by YHP) at room temperature (25 ° C.) at a measurement frequency of 100 kHz (AC20 m for the test sample).
It was calculated from the capacitance measured under the condition V), the electrode dimensions of the test sample, and the distance between the electrodes. tan δ
Is measured under the same conditions as those for measuring the capacitance,
Along with this, the loss Q value was calculated.

Leakage current characteristics (unit: A / cm ² ).
Was measured at an electric field strength of 50 kV / cm. The short-circuit rate (unit:%) was measured for 20 upper electrodes, and the ratio of those short-circuited was calculated. The temperature characteristic of the permittivity is -55 to + when the permittivity is measured for the test sample under the above conditions and the reference temperature is 25 ° C.
The average change rate (Δε) of the dielectric constant with respect to the temperature in the temperature range of 150 ° C. was measured, and the temperature coefficient (ppm / ° C.) was calculated. The results are shown in Table 1.

Comparative Example 1 SrTiO ₃ single crystal substrate ((110) CaRuO ₃ // (110) SrTiO ₃ ) on which CaRuO ₃ to be a lower electrode thin film was epitaxially grown in the [110] direction.
CaR was prepared in the same manner as in Example 1 except that ₃ ) was used.
On the surface of the uO ₃ lower electrode thin film, SB with a thickness of about 200 nm
A TT thin film (high dielectric constant insulating film) was formed. This SBTT
When the crystal structure of the thin film was measured by X-ray diffraction (XRD),
It was confirmed that they were oriented in the [118] direction and were not c-axis oriented perpendicularly to the surface of the SrTiO ₃ single crystal substrate. Then, as in Example 1, the surface roughness (Ra) of the SBTT thin film and the electrical characteristics and temperature characteristics of the dielectric constant of the test sample of the high dielectric constant insulating film were evaluated. The results are shown in Table 1.

Comparative Example 2 SrTiO ₃ single crystal substrate ((111) CaRuO ₃ // (111) SrTiO ₃ ) on which CaRuO ₃ to be a lower electrode thin film was epitaxially grown in the [111] direction.
CaR was prepared in the same manner as in Example 1 except that ₃ ) was used.
On the surface of the uO ₃ lower electrode thin film, SB with a thickness of about 200 nm
A TT thin film (high dielectric constant insulating film) was formed. This SBTT
When the crystal structure of the thin film was measured by X-ray diffraction (XRD),
It was confirmed that they were oriented in the [104] direction and were not c-axis oriented perpendicularly to the surface of the SrTiO ₃ single crystal substrate. Then, in the same manner as in Example 1, the surface roughness (Ra) of the SBTT thin film and the electrical characteristics and temperature characteristics of the dielectric constant of the test sample of the thin film high dielectric constant insulating film were evaluated. The results are shown in Table 1.

[0071]

[Table 1]

As shown in Table 1, it was confirmed that the c-axis oriented film of the bismuth layered compound obtained in Example 1 was excellent in leak characteristics, although the dielectric constant was inferior. As a result, further thinning can be expected, and it was confirmed that the gate insulating film having a high dielectric constant is preferable.

It was also confirmed that in Example 1, the temperature characteristics were superior to those of the other orientation directions obtained in Comparative Examples 1 and 2. Further, it was confirmed that Example 1 is excellent in surface smoothness as compared with Comparative Examples 1 and 2, and thus contributes to the film thickness uniformity of the gate insulating film. That is, Example 1
Thus, the effectiveness of the c-axis oriented film of the bismuth layered compound was confirmed.

Example 2 The surface roughness (Ra) of the SBTT thin film was measured in the same manner as in Example 1 except that an SBTT thin film (high dielectric constant insulating film) having a thickness of about 35 nm was formed on the surface of the CaRuO ₃ lower electrode thin film. )
And the electrical characteristics (dielectric constant, tan δ, loss Q value, leak current, breakdown voltage) and temperature characteristics of the dielectric constant of the high dielectric constant insulating film were evaluated. The results are shown in Table 2. The breakdown voltage (unit is k
V / cm) was measured by increasing the voltage in the leak characteristic measurement.

Example 3 The surface roughness (Ra) of the SBTT thin film was measured in the same manner as in Example 1 except that an SBTT thin film (high dielectric constant insulating film) having a thickness of about 50 nm was formed on the surface of the CaRuO ₃ lower electrode thin film. )
And the electrical characteristics of the high dielectric constant insulating film and the temperature characteristics of the dielectric constant were evaluated. The results are shown in Table 2.

Example 4 A film thickness of about 100 nm was formed on the surface of the CaRuO ₃ lower electrode thin film.
Except that the SBTT thin film (high dielectric constant insulating film) of
In the same manner as in Example 1, the surface roughness (R
a) and the electrical characteristics of the high dielectric constant insulating film and the temperature characteristics of the dielectric constant were evaluated. The results are shown in Table 2.

[0077]

[Table 2]

As shown in Table 2, it was confirmed that when the film thickness of the c-axis alignment film is reduced, the leak characteristics are slightly deteriorated, but the surface roughness and the dielectric constant do not change.

Reference 1 (Y. Sakashita,
H. Segawa, K .; Tominaga and
M. Okada, J .; Appl. Phys. 73,78
57 (1993)), C-axis oriented PZT (Zr /
The relationship between the film thickness of the Ti = 1) thin film and the dielectric constant is shown. Here, the PZT thin film has a thickness of 500 nm, 200
nm and 80 nm, the dielectric constant (@ 1
The results show that the (kHz) decreases to 300, 250 and 100. Reference 2 (Y. Takeshima, KT
anaka and Y. Sakabe, Jpn. J.
Appl. Phys. 39, 5389 (2000)), BST (Ba: Sr = 0.6: 0.
4) The relationship between the film thickness of the thin film and the dielectric constant is shown. Here, the thickness of the BST thin film is 150 nm, 100 nm,
As the thickness is reduced to 50 nm, the dielectric constant is 1200,
The results are shown to decrease to 850 and 600. Reference 3
(H.J.Cho and H.J.Kim, App
l. Phys. Lett. 72,786 (1998))
Then, a-axis oriented BST (Ba: Sr = 0.35:
0.65) The relationship between the film thickness of the thin film and the dielectric constant is shown. Here, the thickness of the BST thin film is 80 nm and 55 n.
m, 35 nm, the dielectric constant (@ 10
The results show that (kHz) decreases to 330, 220 and 180.

It was also confirmed that the withstand voltage of 1000 kV / cm or more could be obtained even with the film thickness of 35 nm in Example 2. Therefore, the high dielectric constant insulating film of the present invention is
It can be said that it is suitable as a gate insulating film. Further, the high dielectric constant insulating film of the present invention has excellent surface smoothness,
From this point as well, it can be said that the thin film material is suitable as a gate insulating film.

Example 5 Sr _x Bi was used as a raw material by the pulsed laser deposition method.
_{4-x Ti 3-x Ta} x O 12 (SBTT) sintered body (This sintered body compositional _{formula: Bi 2 A m-1 B} m O
_{In 3m + 3} , the symbol m = 3 and the symbol A ₂ = S
r _{x, Bi 2-x} and symbols _{B 3 = Ti 3-x,}
Expressed as ta _x. Here, x = 0.4, 0.
6, 0.8, 1.0, 1.2) was used, and an SBTT thin film (high dielectric constant insulating film) having a film thickness of about 50 nm was formed in the same manner as in Example 1 The Curie point of the thin film and the electrical characteristics (dielectric constant, tan δ, loss Q value) of the test sample of the high dielectric constant insulating film were evaluated. The results are shown in Table 3. The Curie point (unit: ° C) of the high-dielectric-constant insulating film was obtained by changing the dielectric constant with temperature.

[0082]

[Table 3]

As shown in Table 3, when the composition x of the SBTT c-axis oriented film is increased, the Curie point is lowered and the dielectric constant at room temperature (25 ° C.) is increased. Composition x
Is about 1, the Curie point is near room temperature, and the dielectric constant is maximum at room temperature. Therefore, when the composition x is about 1 or more, it becomes a paraelectric phase at room temperature, and the loss Q value is improved. That is, the composition range 1.0 <x <for the needs requiring high capacity.
It was confirmed that 1.2 is suitable.

[0084] As a raw material according to Example 6 pulsed laser _{deposition, La x Bi 4-x Ti} 3 O that La as the rare earth element is added
₁₂ (LBT) sintered body (this sintered body has a composition formula: Bi
In _{2 A m-1 B m O} 3m + 3, symbol m =
3, symbol A ₂ = Bi _2-x , La _x and symbol B
_It is represented as ₃ = Ti ₃ . Here, x = 0, 0.
4, 0.6, 0.8, 1.0, 1.2, 1.4) was used, and an LBT thin film (high dielectric constant insulating film) having a thickness of about 50 nm was formed. L as in Example 1
The Curie point of the BT thin film and the electrical characteristics (dielectric constant, tan δ, loss Q value) of the high dielectric constant insulating film were evaluated. The results are shown in Table 4.

[0085]

[Table 4]

As shown in Table 4, when the composition x is increased in the c-axis oriented film of LBT, the Curie point is lowered and the dielectric constant at room temperature (25 ° C.) is increased. When the composition x is about 1.2, the Curie point is near room temperature, and the dielectric constant at room temperature becomes maximum. Therefore, when the composition x is about 1.2 or more, it becomes a paraelectric phase at room temperature, and the loss Q value is improved.
That is, the composition range 1.0 <
It was confirmed that x <1.4 was suitable.

Example 7 A high dielectric constant insulating film test sample was prepared in the same manner as in Example 6, and the electrical characteristics of the high dielectric constant insulating film (leakage current,
The short circuit rate) was evaluated. The results are shown in Table 5.

[0088]

[Table 5]

As shown in Table 5, when the composition x is increased in the c-axis oriented film of LBT, the leak current is decreased and the short circuit rate is decreased. That is, it was confirmed that the composition range 0.4 <x <1.4 is suitable for improving the leak characteristics.

Example 8 In this example, the frequency characteristic and the voltage characteristic were evaluated using the test sample of the high dielectric constant insulating film produced in Example 1.

The frequency characteristic was evaluated as follows. For the test sample of the high-dielectric-constant insulating film, the frequency was changed from 1 kHz to 1 MHz at room temperature (25 ° C.), the capacitance was measured, and the dielectric constant was calculated.
It was shown to. An LCR meter was used to measure the capacitance.
As shown in FIG. 4, it was confirmed that the value of the dielectric constant did not change even if the frequency under a specific temperature was changed to 1 MHz. That is, it was confirmed that the frequency characteristics were excellent.

The voltage characteristics were evaluated as follows.
For the test sample of the high dielectric constant insulating film, the measured voltage (applied voltage) under a specific frequency (100 kHz) was set to 0.
1 V (electric field strength 5 kV / cm) to 5 V (electric field strength 25
5 kV / cm), the capacitance under a specific voltage was measured (measurement temperature was 25 ° C.), and the dielectric constant was calculated. The results are shown in FIG. An LCR meter was used to measure the capacitance. As shown in FIG. 5, it was confirmed that the value of the dielectric constant did not change even when the measurement voltage under a specific frequency was changed to 5V. That is, it was confirmed that the voltage characteristics were excellent.

[0093]Example 11 CaRuO as the lower electrode thin film_ThreeTo [100] direction
Epitaxially grown SrTiO_ThreeSingle crystal substrate
((100) CaRuO_Three// (100) SrTiO
_Three) Was heated to 800 ° C. Next, CaRuO_Threeunder
Na on the surface of the partial electrode thin film by pulsed laser deposition.
_0.5Bi_4.5Ti_FourO₁₅(Hereafter, with NBT
Sintered body (also referred to as the composition formula: Bi_TwoA
_m-1B_mO _{3m + 3}, The symbol m = 4, the symbol
A_Three= Na_0.5, Bi_2.5And symbol B_Four
= Ti_FourThe film thickness is about 2
A 00 nm NBT thin film (high dielectric constant insulating film) was formed.

The crystal structure of this NBT thin film was analyzed by X-ray diffraction (X
RD) As a result of measurement, it was confirmed that the orientation was in the [001] direction, that is, the orientation was c-axis perpendicular to the surface of the SrTiO ₃ single crystal substrate. The surface roughness (Ra) of this NBT thin film was measured in the same manner as in Example 1.

With respect to the high dielectric constant insulating film made of this NBT thin film, the electrical characteristics (dielectric constant, tan δ, loss Q value, leak current, short circuit rate) and the temperature characteristic of the dielectric constant were measured in the same manner as in Example 1. evaluated. These results are shown in Table 6.
Shown in.

Comparative Example 11 SrTiO ₃ single crystal substrate ((110) CaRuO ₃ // (110) SrTiO ₃ ) on which CaRuO ₃ to be a lower electrode thin film was epitaxially grown in the [110] direction.
Ca) was used in the same manner as in Example 11 except that ₃ ) was used.
On the surface of the RuO ₃ lower electrode thin film, N of about 200 nm thickness is formed.
A BT thin film (high dielectric constant insulating film) was formed. The crystal structure of this NBT thin film was measured by X-ray diffraction (XRD),
It was confirmed that they were oriented in the [118] direction and were not c-axis oriented perpendicularly to the surface of the SrTiO ₃ single crystal substrate. Then, as in Example 11, the surface roughness (Ra) of the NBT thin film and the electrical characteristics and temperature characteristics of the dielectric constant of the test sample of the high dielectric constant insulating film were evaluated. The results are shown in Table 6.

Comparative Example 12 SrTiO ₃ single crystal substrate ((111) CaRuO ₃ // (111) SrTiO ₃ ) on which CaRuO ₃ to be a lower electrode thin film was epitaxially grown in the [111] direction.
CaR was prepared in the same manner as in Example 1 except that ₃ ) was used.
uO ₃ NB with a thickness of about 200 nm on the surface of the lower electrode thin film
A T thin film (high dielectric constant insulating film) was formed. When the crystal structure of this NBT thin film was measured by X-ray diffraction (XRD), [1
It was confirmed that they were oriented in the [04] direction and were not c-axis oriented perpendicularly to the surface of the SrTiO ₃ single crystal substrate. Then, as in Example 11, the surface roughness (Ra) of the NBT thin film and the electrical characteristics and temperature characteristics of the dielectric constant of the test sample of the high dielectric constant insulating film were evaluated. The results are shown in Table 6.
Shown in.

[0098]

[Table 6]

As shown in Table 6, it was confirmed that the c-axis oriented film of the bismuth layered compound obtained in Example 11 was excellent in leak characteristics, although the dielectric constant was inferior. As a result, it was confirmed that further thinning can be expected, and thus the film can be suitably used as a gate insulating film.

In Example 11, the temperature coefficient is +30.
It was also confirmed that the dielectric constant was relatively large as 150 even though it was very small as ppm / ° C., and the temperature characteristics were superior to the films in the other orientation directions obtained in Comparative Examples 11 to 12. Furthermore, since Example 11 is excellent in surface smoothness as compared with Comparative Examples 11 to 12, it was confirmed that it was a thin film suitable as a gate insulating film. That is, Example 11 confirmed the effectiveness of the c-axis oriented film of the bismuth layered compound.

Example 12 The surface roughness (Ra) of the NBT thin film was measured in the same manner as in Example 11 except that an NBT thin film (high dielectric constant insulating film) having a thickness of about 35 nm was formed on the surface of the CaRuO ₃ lower electrode thin film. )
And the electrical characteristics (dielectric constant, tan δ, loss Q value, leak current, breakdown voltage) and temperature characteristics of the dielectric constant of the high dielectric constant insulating film were evaluated. The results are shown in Table 7. The breakdown voltage (unit is k
V / cm) was measured by increasing the voltage in the leak characteristic measurement.

Example 13 The surface roughness (Ra) of the NBT thin film was measured in the same manner as in Example 11 except that an NBT thin film (high dielectric constant insulating film) having a thickness of about 50 nm was formed on the surface of the CaRuO ₃ lower electrode thin film. )
And the electrical characteristics and the temperature characteristics of the dielectric constant of the test sample of the high dielectric constant insulating film were evaluated. The results are shown in Table 7.

Example 14 A film thickness of about 100 nm was formed on the surface of a CaRuO ₃ lower electrode thin film.
The surface roughness (Ra) of the NBT thin film was obtained in the same manner as in Example 11 except that the NBT thin film (high dielectric constant insulating film) was formed.
And the electrical characteristics and the temperature characteristics of the dielectric constant of the test sample of the high dielectric constant insulating film were evaluated. The results are shown in Table 7.

[0104]

[Table 7]

As shown in Table 7, it was confirmed that when the film thickness of the c-axis alignment film was reduced, the leak characteristics were slightly deteriorated, but the surface roughness and the dielectric constant did not change.

It was also confirmed that the withstand voltage of 1000 kV / cm or more was obtained even with the film thickness of 35 nm in Example 12. Therefore, it can be said that the high dielectric constant insulating film of the present invention is suitable as a gate insulating film. further,
It was also confirmed that in Examples 12 to 14, the temperature coefficient was +30 ppm / ° C., which was extremely small, but the dielectric constant was 150, which was relatively large, and the temperature characteristics were excellent. Furthermore, since it has excellent surface smoothness, it can be said to be a thin film suitable as a gate insulating film.

Example 15 Na _0.5 La _x Bi doped with La as a rare earth element as a raw material by the pulsed laser deposition method
_{2.5-x Ti 4 O 15 (} NLBT) sintered body (This sintered body compositional _{formula: Bi 2 A m-1 B} m O
_{In 3m + 3} , the symbol m = 4 and the symbol A ₃ = Na
_0.5 Bi _2.5-x , La _x and symbol B ₄
= Ti ₄ . Where x = 0, 0.2,
(Changed to 0.4), and NLB with a film thickness of about 50 nm
Example 1 except that a T thin film (high dielectric constant insulating film) was formed
In the same manner as in No. 1, the electrical characteristics (leakage current, short circuit rate) of the high dielectric constant insulating film test sample were evaluated. The results are shown in Table 8.

[0108]

[Table 8]

As shown in Table 8, it was found that when the composition x was increased in the LBT c-axis oriented film, the leak current was decreased and the short-circuit rate was decreased.

Example 21 While heating a single crystal silicon (100) substrate at 600 ° C., Bi was formed on the surface of the substrate by a pulse laser deposition method.
₄ Ti ₃ O ₁₂ (hereinafter, also referred to as BiT) sintered body (This sintered body compositional _{formula: Bi 2 A m-1 B} m O
_{In 3m + 3} , the symbol m = 3 and the symbol A ₂ = Bi ₂
And a symbol B ₃ = Ti ₃ ) was used as a raw material to form a BiT thin film (high-dielectric-constant insulating film) having a film thickness of about 50 nm.

The crystal structure of this BiT thin film was measured by X-ray diffraction (XRD) in the same manner as in Example 1. As a result, [00]
It was confirmed that they were oriented in the 1] direction, that is, they were c-axis oriented perpendicular to the surface of the single crystal silicon substrate.

Next, on the surface of this BiT thin film, 0.1 m
An mφ Pt upper electrode thin film was formed by a sputtering method to prepare a test sample of a high dielectric constant insulating film.

The electrical characteristics (dielectric constant, leak current) of the obtained high dielectric constant insulating film were evaluated in the same manner as in Example 1.
The obtained high-dielectric-constant insulating film has a dielectric constant of 100 at room temperature and a measurement frequency of 100 kHz (AC 20 mV), and a leakage current of 1 at an electric field strength of 1 V / cm.
It was × 10 ⁻⁷ A / cm ² .

[0114] As a raw material according to Example 22 pulsed laser _{deposition, La x Bi 4-x Ti} 3 O that La as the rare earth element is added
₁₂ (LBT) sintered body (this sintered body has a composition formula: Bi
In _{2 A m-1 B m O} 3m + 3, symbol m =
3, symbol A ₂ = Bi _2-x , La _x and symbol B
_It is represented as ₃ = Ti ₃ . Here, x = 0, 0.
2, 0.4, 0.6), and the film thickness is about 50
The dielectric constant and the leak current of the high dielectric constant insulating film were obtained in the same manner as in Example 22 except that the LBT thin film (high dielectric constant insulating film) having a thickness of 20 nm was formed. The results are shown in Table 9.

[0115]

[Table 9]

As shown in Table 9, as the content ratio of the rare earth increases with respect to the LBT thin film (high dielectric constant insulating film),
It was confirmed that the dielectric constant increased and the leak current decreased. That is, it was confirmed that the high dielectric constant insulating film of the present invention was suitable as a gate insulating film.

[0117]

As described above, according to the present invention, a MOS which is excellent in leak characteristics, withstand voltage characteristics and surface smoothness, has a relatively high dielectric constant, and can be miniaturized and downsized.
A high dielectric constant insulating film that can be preferably used as a gate insulating film of an FET and a semiconductor device using the same can be provided.

[Brief description of drawings]

FIG. 1A and FIG. 1B are cross-sectional views of relevant parts showing a state in which a high dielectric constant insulating film according to the present invention is formed on a surface of a semiconductor substrate.

FIG. 2A and FIG. 2B are cross-sectional views of a main part of a MOSFET having a high dielectric constant insulating film according to the present invention.

FIG. 3 is a cross-sectional view of essential parts of a high dielectric constant insulating film test sample used in an example of the present invention.

FIG. 4 is a graph showing frequency characteristics of a test sample of a high dielectric constant insulating film of Example 8.

FIG. 5 is a graph showing voltage characteristics of a test sample of a high dielectric constant insulating film of Example 8.

[Explanation of symbols]

2… Sample for test 4 ... Substrate 6 ... Lower electrode thin film 7, 7a ... Buffer layer 8, 8a ... High dielectric constant insulating film 10 ... Upper electrode thin film 15, 15a ... Gate electrode 17 ... Source / drain regions 19 ... Floating gate 20 ... MOSFET 20a ... Semiconductor device

─────────────────────────────────────────────────── ───

[Procedure amendment]

[Submission date] March 28, 2002 (2002.3.2)
8)

[Procedure Amendment 1]

[Document name to be amended] Statement

[Correction target item name] 0114

[Correction method] Change

[Correction content]

[0114] As a raw material according to Example 22 pulsed laser _{deposition, La x Bi 4-x Ti} 3 O that La as the rare earth element is added
₁₂ (LBT) sintered body (this sintered body has a composition formula: Bi
In _{2 A m-1 B m O} 3m + 3, symbol m =
3, symbol A ₂ = Bi _2-x , La _x and symbol B
_It is represented as ₃ = Ti ₃ . Here, x = 0, 0.
2, 0.4, 0.6), and the film thickness is about 50
The dielectric constant and leak current of the high dielectric constant insulating film were obtained in the same manner as in Example 21 except that the LBT thin film (high dielectric constant insulating film) having a thickness of 10 nm was formed. The results are shown in Table 9.

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification code FI theme code (reference) H01L 27/04 H01L 29/78 301G 5F101 27/115 29/62 G 5F140 29/43 27/04 C 29 / 78 29/788 29/792 F-term (reference) 4K029 AA06 BA50 BC00 BC05 BD01 CA01 DB20 4M104 AA01 BB06 CC05 DD37 EE03 EE14 GG09 GG10 GG14 GG16 5F038 AC05 AC15 EZ11 EPZ20 EP5F058 BA01 BA09 BC03 BF06 EP08 EP3 B0604 BF12 EP02 GA06 HA08 JA02 JA05 JA12 JA17 JA38 JA45 PR25 5F101 BA01 BA26 BA36 BB05 BH01 BH12 5F140 AA19 AA24 AC36 BA01 BA12 BA20 BD01 BD04 BD05 BD07 BD09 BD11 BD13 BE09 BE10 BF01 BF04 CB08

Claims (12)

[Claims] 1. The c-axis is oriented perpendicular to the substrate surface.
Is a high dielectric constant insulating film containing a bismuth layered compound
hand, The bismuth layered compound has a composition formula: (Bi_TwoO_Two)
²⁺(A_m-1B_m O_{3m + 1})^2-, Or Bi
_TwoA_m-1B_mO_{3m + 3}Represented by the above composition formula
Symbol m in the figure is a positive number, symbol A is Na, K, Pb, Ba, S
at least one element selected from r, Ca and Bi
Elementary, symbol B is Fe, Co, Cr, Ga, Ti, Nb, T
at least 1 selected from a, Sb, V, Mo and W
A high-dielectric-constant insulating film characterized by being one element. 2. The high dielectric constant insulating film according to claim 1, wherein the degree of c-axis orientation of the bismuth layered compound is 80% or more. 3. The bismuth layered compound is a rare earth element (Sc, Y, La, Ce, Pr, Nd, Pm, Sm, E).
At least one element selected from u, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu) is included, The high dielectric constant insulating film according to claim 1 or 2. 4. The c-axis is oriented perpendicular to the substrate surface.
A gate insulating film having a bismuth layered compound The bismuth layered compound has a composition formula: (Bi_TwoO_Two)
²⁺(A_m-1B_m O_{3m + 1})^2-, Or Bi
_TwoA_m-1B_mO_{3m + 3}Represented by the above composition formula
Symbol m in the figure is a positive number, symbol A is Na, K, Pb, Ba, S
at least one element selected from r, Ca and Bi
Elementary, symbol B is Fe, Co, Cr, Ga, Ti, Nb, T
at least 1 selected from a, Sb, V, Mo and W
A gate insulating film characterized by being one element. 5. The gate insulating film according to claim 4, wherein the bismuth layered compound has a degree of c-axis orientation of 80% or more. 6. The bismuth layer compound is a rare earth element (Sc, Y, La, Ce, Pr, Nd, Pm, Sm, E).
6. The gate insulating film according to claim 4, further comprising at least one element selected from u, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu. 7. A semiconductor substrate, Formed directly on the surface of the semiconductor substrate or through another layer
A semiconductor device having a high dielectric constant insulating film formed by
hand, The high dielectric constant insulating film is mainly composed of a bismuth layered compound.
However, the c-axis of the bismuth layered compound is
Oriented perpendicular to the surface, The bismuth layered compound has a composition formula: (Bi
_TwoO_Two)²⁺(A_m-1B
_mO_{3m + 1})^2-, Or Bi_TwoA_m-1B
_mO_{3m + 3}And the symbol m in the composition formula is positive.
Number, symbol A is Na, K, Pb, Ba, Sr, Ca and
At least one element selected from Bi, symbol B is F
e, Co, Cr, Ga, Ti, Nb, Ta, Sb, V,
At least one element selected from Mo and W
A semiconductor device characterized by the above. 8. The semiconductor device according to claim 7, wherein the bismuth layered compound has a degree of c-axis orientation of 80% or more. 9. The bismuth layer compound is a rare earth element (Sc, Y, La, Ce, Pr, Nd, Pm, Sm, E).
9. The semiconductor device according to claim 7, further comprising at least one element selected from u, Gd, Tb, Dy, Ho, Er, Tm, Yb and Lu. 10. The high dielectric constant insulating film is formed on a surface of the semiconductor substrate, a gate electrode having a predetermined pattern is formed on the surface of the high dielectric constant insulating film, and the high dielectric constant insulating film is a gate insulating film. The MOSFET type semiconductor device according to any one of claims 7 to 9, which functions as a semiconductor device. 11. A buffer layer is formed on the surface of the semiconductor substrate, the high dielectric constant insulating film is formed on the surface of the buffer layer, and a gate electrode having a predetermined pattern is formed on the surface of the high dielectric constant insulating film. 10. The MOSFET according to claim 7, wherein the buffer layer and the high dielectric constant insulating film function as a gate insulating film.
Type semiconductor device. 12. A buffer layer is formed on the surface of the semiconductor substrate, a floating gate having a predetermined pattern is formed on the surface of the buffer layer, and the high dielectric constant insulating film is formed on the surface of the floating gate. 10. The floating gate according to claim 7, wherein a gate electrode is formed on the surface of the high dielectric constant insulating film, the buffer layer functions as a gate insulating film, and the high dielectric constant insulating film functions as an intermediate insulating film. Semiconductor device.