JP2003142586A5 - - Google Patents

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JP2003142586A5
JP2003142586A5 JP2001335287A JP2001335287A JP2003142586A5 JP 2003142586 A5 JP2003142586 A5 JP 2003142586A5 JP 2001335287 A JP2001335287 A JP 2001335287A JP 2001335287 A JP2001335287 A JP 2001335287A JP 2003142586 A5 JP2003142586 A5 JP 2003142586A5
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Japan
Prior art keywords
oscillator
circuit
semiconductor integrated
integrated circuit
circuit according
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JP2001335287A
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JP3925160B2 (en
JP2003142586A (en
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Priority claimed from JP2001335287A external-priority patent/JP3925160B2/en
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Publication of JP2003142586A5 publication Critical patent/JP2003142586A5/ja
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Claims (13)

デジタル回路とアナログ回路が混在して半導体基板上に形成された半導体集積回路と、
前記半導体基板を共有する発振器と、
前記発振器の出力のジッタ値を測定するジッタ測定回路とを備えることを特徴とするノイズ検出装置。A semiconductor integrated circuit in which a digital circuit and an analog circuit are mixed and formed on a semiconductor substrate;
An oscillator sharing the semiconductor substrate;
And a jitter measuring circuit for measuring a jitter value of the output of the oscillator. 前記発振器は、リング発振器または電圧制御発振器であることを特徴とする請求項１記載のノイズ検出装置。  The noise detection apparatus according to claim 1, wherein the oscillator is a ring oscillator or a voltage controlled oscillator. デジタル回路とアナログ回路とが混在して形成された半導体基板と、
前記半導体基板に形成され、前記デジタル回路で発生するノイズを検出する発振器とを備えることを特徴とする半導体集積回路。A semiconductor substrate formed by mixing digital circuits and analog circuits;
A semiconductor integrated circuit comprising: an oscillator formed on the semiconductor substrate and detecting noise generated in the digital circuit. 前記発振器は、リング発振器または電圧制御発振器であることを特徴とする請求項３記載の半導体集積回路。  4. The semiconductor integrated circuit according to claim 3, wherein the oscillator is a ring oscillator or a voltage controlled oscillator. 前記発振器は、前記アナログ回路と電源配線を共有することを特徴とする請求項３または４記載の半導体集積回路。  5. The semiconductor integrated circuit according to claim 3, wherein the oscillator shares a power supply wiring with the analog circuit. 前記発振器は、ドライバ回路を介して外部出力端子に接続されることを特徴とする請求項３〜５のいずれか１項記載の半導体集積回路。  The semiconductor integrated circuit according to claim 3, wherein the oscillator is connected to an external output terminal via a driver circuit. 前記ドライバ回路は、前記アナログ回路の出力回路と外部出力端子を共有することを特徴とする請求項６記載の半導体集積回路。  The semiconductor integrated circuit according to claim 6, wherein the driver circuit shares an external output terminal with an output circuit of the analog circuit. 前記発振器および前記ドライバ回路の動作を制御する制御回路をさらに備えることを特徴とする請求項６または７記載の半導体集積回路。  8. The semiconductor integrated circuit according to claim 6, further comprising a control circuit for controlling operations of the oscillator and the driver circuit. 前記制御回路は、１つまたは複数の外部入力信号に基づいて、前記発振器および前記ドライバ回路の動作を制御することを特徴とする請求項８記載の半導体集積回路。  9. The semiconductor integrated circuit according to claim 8, wherein the control circuit controls operations of the oscillator and the driver circuit based on one or more external input signals. 前記ドライバ回路に接続されるメタル配線またはコンタクトの位置を変更することにより、前記デジタル回路の論理回路を修正することを特徴とする請求項６〜９のいずれか１項記載の半導体集積回路。  10. The semiconductor integrated circuit according to claim 6, wherein a logic circuit of the digital circuit is modified by changing a position of a metal wiring or a contact connected to the driver circuit. 前記発振器または前記ドライバ回路に接続されるメタル配線またはコンタクトの位置の変更により、前記発振器が不活性状態にされることを特徴とする請求項６〜１０のいずれか１項記載の半導体集積回路。  The semiconductor integrated circuit according to claim 6, wherein the oscillator is rendered inactive by changing a position of a metal wiring or a contact connected to the oscillator or the driver circuit. 前記発振器は、前記デジタル回路のレイアウト領域の内部またはその周辺の空き領域に配置されていることを特徴とする請求項３〜１１のいずれか１項記載の半導体集積回路。  12. The semiconductor integrated circuit according to claim 3, wherein the oscillator is arranged in an empty area inside or around the layout area of the digital circuit. 前記発振器の発振周波数を制御する電圧が入力されるトランジスタのチャネルの導電型は、前記半導体基板の導電型と逆であることを特徴とする請求項３〜１２のいずれか１項記載の半導体集積回路。  13. The semiconductor integrated circuit according to claim 3, wherein a conductivity type of a channel of a transistor to which a voltage for controlling an oscillation frequency of the oscillator is input is opposite to a conductivity type of the semiconductor substrate. circuit.
JP2001335287A 2001-10-31 2001-10-31 Noise detection device and semiconductor integrated circuit Expired - Fee Related JP3925160B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001335287A JP3925160B2 (en) 2001-10-31 2001-10-31 Noise detection device and semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001335287A JP3925160B2 (en) 2001-10-31 2001-10-31 Noise detection device and semiconductor integrated circuit

Publications (3)

Publication Number Publication Date
JP2003142586A JP2003142586A (en) 2003-05-16
JP2003142586A5 true JP2003142586A5 (en) 2005-07-07
JP3925160B2 JP3925160B2 (en) 2007-06-06

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JP2001335287A Expired - Fee Related JP3925160B2 (en) 2001-10-31 2001-10-31 Noise detection device and semiconductor integrated circuit

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Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4070725B2 (en) * 2004-01-21 2008-04-02 ファナック株式会社 Electronic equipment with noise detection function
JP2008249529A (en) * 2007-03-30 2008-10-16 Nec Electronics Corp Jitter determination circuit and jitter determination method
KR101102015B1 (en) * 2007-06-20 2012-01-04 가부시키가이샤 어드밴티스트 Noise measurement device and tester
JP6369191B2 (en) * 2014-07-18 2018-08-08 セイコーエプソン株式会社 CIRCUIT DEVICE, ELECTRONIC DEVICE, MOBILE BODY, AND RADIO COMMUNICATION SYSTEM
CN108037331B (en) * 2017-11-20 2020-08-11 中国电子科技集团公司第五十五研究所 Probe card suitable for digital-analog hybrid circuit on-chip test and design and manufacturing method
CN108020704B (en) * 2017-11-27 2019-08-16 清华大学 A kind of thunder and lightning substrate current inversion method based on deconvolution

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