JP2003140637A - Data array converting device, image processing system, and image input device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a data array converting device which can reduce memory capacity used for data array conversion. SOLUTION: Provided are an input port to which data having pixel data of two odd and even horizontal lines regularly arrayed in one horizontal period is inputted and a memory part which stores the data inputted to the input port and the memory part comprises three blocks 31 to 33 each having storage capacity for input data of one line; and one of odd-line and even-line input data is saved in one specified block among the three blocks and the other input data is stored in the remaining two blocks alternately by lines. An array converting means 15 is provided to read the stored data out of the three blocks one after another and converts the data array.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data array conversion device suitable for an image input device or the like that can pick up an object to be photographed such as a document and display the photographed image on an external display device.

[0002]

2. Description of the Related Art In an image input device for picking up an image of an object to be photographed such as a document and displaying the image on an external monitor or screen using a projector or the like, image processing such as white balance and color correction is performed on the imaged data. After the application, the image pickup data is separated into a luminance (Y) signal and a color difference (UV) signal.

Then, for each of the separated Y signal and UV signal, odd, e within one horizontal (H) period.
In order to transfer data in which pixel data for two horizontal lines of ven are alternately arranged in a dot-sequential manner to a means for adapting the angle of view of an externally connected display device such as a resolution converting means, it is represented by YUV422. A device for converting into a data array format is used.

Further, in an image input device in which an object is reflected by one mirror and then captured by an image pickup device such as a CCD, an image which has been horizontally inverted once by the mirror is converted into left-right symmetric data and displayed on a display device. Need to send.

For this reason, a method has been proposed in which the output data for one horizontal line read from the data array conversion device is read from the reverse of the case of storing the data input, thereby obtaining the data which is bilaterally symmetrical.

[0006]

However, in the above-mentioned conventional example, the pixel data obtained by picking up an image which is horizontally inverted by one mirror, and further includes odd, eve.
In order to separate odd and even from pixel data of n horizontal lines that are regularly arranged, such as dot sequential, and to perform symmetric array conversion for each line, conventionally four lines are required. The above memory capacity is required.

Therefore, a memory-integrated ASIC (appl
In the case of ication spesified IC), the IC size greatly depends on the capacity of the built-in memory, and it is difficult to realize a size-saving ASIC that is said to be advantageous in terms of cost and size.

Therefore, it is an object of the present invention to provide a data array conversion device capable of reducing the memory capacity used for data array conversion.

[0009]

In order to achieve the above object, the data array conversion apparatus of the present invention uses o within one horizontal period.
An input port to which data in which pixel data for two horizontal lines of dd (odd number) and even (even) are regularly arranged is input, and a memory unit for storing the data input to this input port are provided. The memory section is configured by three blocks each having a storage capacity of input data for one line, and one specific block of these three blocks is provided with one input data of the odd line and the even line. Save and save the other input data for each line alternately in the remaining two blocks.
Arrangement conversion means for converting the data arrangement by sequentially reading the stored data from the three blocks is provided.

For example, for the specific block, 2
After writing the above-mentioned one data of the first line of the horizontal line in the forward direction, reading this data in the reverse direction, and writing the above-mentioned one data of the second line in the reverse direction, and then writing this data For the other two blocks, the data is read in the positive direction, and the other input data of the first and second lines is written in the positive direction and then read in the reverse direction. As a result, it is possible to perform a left-right symmetric array conversion for each line of data in which pixel data for two horizontal lines of odd and even are regularly arrayed within one horizontal period using a memory capacity of three lines. Becomes Therefore, it is effective for downsizing a memory integrated IC.

An image processing system for processing the data of the luminance signal and the data of the color difference signal is provided with two of the above-mentioned data array conversion devices, and these are operated at the same time. Array conversion,
The other data array conversion device may be used to perform array conversion of the color difference signals.

By using the data array conversion device as an image input device for picking up an image that is horizontally inverted by the reflecting member, it is possible to obtain a display image in which the left and right are correctly corrected.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS (First Embodiment) FIG. 1 shows a document camera as an image input device according to an embodiment of the present invention. In addition, FIG. 2 shows a configuration of an image input system provided in the document camera.

In FIG. 1, 1 is a document camera, and 2
Is a manuscript table. An object to be photographed such as the document 100 is placed on the original table 2.

Reference numeral 5 is a mirror (reflecting member) arranged above the original table 2, and 3 is an image pickup section. In this image pickup unit 3,
An image pickup optical unit (not shown) and an image pickup device such as a CCD are housed. Further, the image pickup unit 3 has a shooting control unit that performs AE, AF control, and the like of the shooting optical unit.

Reference numeral 4 denotes an illuminating unit disposed above and below the document table 2 and illuminates an object to be photographed placed on the document table 2. Reference numeral 20 is an operation unit provided with various operation switches.

In the document camera 1 thus constructed, the light flux from the object to be photographed is horizontally inverted by the mirror 5 and is incident on the image pickup section 3. The light flux that has entered the image pickup unit 3 forms an image on the image pickup device, and an image of the image pickup object whose left and right are inverted is picked up.

In FIG. 10, reference numeral 10 denotes an image processing unit, which takes in an image signal imaged (photoelectrically converted) by the image pickup unit 3, and outputs the amplitude and white balance of the image signal.
The processing relating to the frequency characteristic is performed and output as a digitized image signal A.

Reference numeral 15 denotes an array conversion unit, which is the image signal A described above.
Is subjected to data array conversion processing, which will be described later, in the array conversion unit 15, and is temporarily stored in the memory (RAM) 14. In addition,
Although only one array conversion unit 15 is shown in the drawing, actually two array conversion units 15 are provided for the luminance signal and the color difference signal.

Reference numeral 12 denotes a CPU that executes each process based on a program stored in the ROM 13. CPU12
Controls the devices connected to the system bus 21 in a centralized manner.

Reference numeral 11 denotes a RAM, which functions as a main memory, a work area, etc. of the CPU 12. An illumination control unit 22 receives a control command from the CPU 12 and performs ON / OFF control of the illumination unit 4.

Reference numeral 16 denotes an input pre-specified size and pre-specified speed (for example, 15 frames /
Resolution, speed conversion I that enables output of an image of (second) at a size and speed (for example, 60 frames / second) that can be input to an output device such as a monitor or a projector (not shown).
A resolution conversion unit represented by a scan converter such as C.

An output unit interface 19 outputs the data output from the resolution conversion unit 16 to an image display device such as a monitor or a projector.

Reference numeral 17 denotes an operation unit controller which sends a signal to each device connected to the system bus 21 in response to a signal from a switch or the like provided in the operation unit 20.

Next, a more detailed structure of the array converter 15 (including the memory 14) will be described with reference to FIG. FIG. 5 is a block diagram showing the configuration of the array conversion unit 15 for the luminance (Y) signal and the memory 14. Although not shown, the array conversion unit 15 for the color difference (UV: Cr, Cb) signals also has the same configuration. ing.

In FIG. 5, reference numeral 30 denotes a memory controller, which is a dual port memory A (31) and a dual port memory B (32) as blocks in the memory 14.
Also, control signals such as the address of the dual port memory C (33) and chip select are controlled to control the input / output of data to / from the memories 31 to 33.

Reference numeral 34 is a selector, which is a memory 31-3.
The data read from the data No. 3 is selectively performed so as to match the data output timing shown in FIG.

FIG. 3 is a timing chart showing the arrangement of input data from the image processing unit 10 to the arrangement conversion unit 15. Further, in FIG. 4, an array of data output from the array conversion unit 15 (here, an array in the YUV422 format) is shown as a timing chart.

Next, the data array conversion operation of the array conversion unit 15 will be described with reference to FIGS. 6 and 7. FIG. 6 is a timing chart showing the data writing and reading operations in the array conversion unit 15 for the luminance (Y) signal, and although not shown, the array conversion unit 15 for the color difference (UV) signal also performs the same operation. Further, FIG. 7 is a flowchart showing a data writing sequence in the memories A to C (31 to 33) in the data array conversion operation, and FIG.
3 is a flowchart showing a data reading sequence from 1 to 33). The same operation is performed in the color difference (UV) signal arrangement conversion unit 15 at the same time as the operation of the luminance (Y) signal arrangement conversion unit 15.

First, the memories A to C (31 to 31 shown in FIG.
The data write sequence to 33) will be described.

When the write sequence is started at step 0 (abbreviated as S in the figure) of FIG. 7, a vertical synchronizing signal is detected at step 1.

Next, in step 2, the process waits until the horizontal synchronizing signal is detected, and when it is detected, the process proceeds to step 3.

In steps 3 and 4, the time until the data write timing is counted, and when the counter value C reaches the specified value LastK in step 4, the process proceeds to step 5.

In step S5, the counter value C is reset and the initial value of the memory write address is set.

Then, in step 6, as shown in FIG. 6, the data of the Yodd pixel is written in the memory A (31). At the same time, in step 7, the data of the Even pixel is written in the memory B (32). At this time,
Both data are respectively written in the memories A (31) and B (32) in the positive direction (the direction in which the address count value AD increases).

In step 8, the count value AD of the memory write address is incremented every time steps 6 and 7 are executed.

Then, in step 9, it is judged whether or not the memory write address has reached the address LastAD of the last pixel. If the address of the last pixel has not been reached, the process returns to step 6, and if the address of the last pixel is reached, the step is performed. Go to 10. In FIG. 6, Yo of the first line to the memories A (31) and B (32) from the start to here
dd, Even pixel data (Y1odd, Y1eve
The writing of n) is completed.

In step 10, the counter value B for counting the predetermined blanking period is set to the initial value (0).

Next, at step 11, the counter value B for counting the blanking period is increased. Then, in step 12, it is determined whether or not the blanking period counter value B has reached the specified value LastB. If it has not reached, the process returns to step 11 to continue counting, and if it has reached, the process proceeds to step 13.

In step 13, the initial value of the memory write address and the specified value LastAD are set. Then, in S14, the Yodd pixel data of the next line is sequentially written into the memory A (31) from the final address side (that is, from the reverse direction). This is because the data written in the memory A (31) in the later-described read sequence is read from the final address side and set as an empty address in order to horizontally reverse the image data.

In step 15, the count value AD_A of the write address of the memory A (31) is decreased.

At the same time as step 13, step 1
6, the even pixel data of the next line is stored in the memory C.
Write in the positive direction in (33). Then, in step 17, the count value AD of the write address of the memory C (33) is increased.

Then, in step 18, the memory C (3
The write address of 3) is the address Last of the last pixel
It is determined whether AD has been reached (the write address of the memory A has reached the address of the first pixel). If not reached, the procedure returns to step 14, and if reached, step 19 is performed.
Proceed to. In FIG. 6, the Yodd and Yeven pixel data (Y2odd, Y2odd, Y) of the second line to the memories A (31) and C (33) from the first blanking period up to this point.
Writing of (Y2even) is completed.

Next, in step 19, the count value B of the blanking period is set to an initial value, and in step 20, the count value B of the blanking period is increased.

Next, at step 21, it is judged whether or not the vertical synchronizing signal is detected, and if not detected, the routine proceeds to step 22, where the counter value B of the blanking period has reached the specified value LastB. It is determined whether (the blanking period has ended). If not completed, the process returns to step 20, and if completed, the process returns to step 2 to write data for the next two lines.

By repeating the above write sequence, the pixel data of all horizontal lines of the image pickup device are sequentially written to the memories A to C (31 to 33).

Next, the memories A to C (31 to 31 shown in FIG.
The data read sequence from 33) will be described.

When the read sequence is started in step 100 of FIG. 8, a vertical sync signal is detected in step 101.

Next, at step 102, the memory A (3
The process waits until it is detected that the writing of data for 1 line to 1) is completed, and the process proceeds to step 103.

In step 103, the counter value AD of the memory read address is initialized and the specified value LastAD is set.

Next, at step 104, the memory A (3
From 1), data is read from the final address side (in the reverse direction). By thus reading the data written in the forward direction in the writing sequence from the reverse direction, the image data which is horizontally inverted is obtained. In FIG. 6, the Yodd pixel data of the first line (Y1od
After d) is written in the memory A (31), the Yodd pixel data of the first line is read in the reverse direction.

Then, in step 105, the memory A
The count value AD of the read address of (31) is decreased, and in the next step 106, it is determined whether or not the counter value has reached the address of the first pixel. If not, the process returns to step 104 and is reached. When step 107
Proceed to. In FIG. 6, after the reading of the Yodd pixel data of the first line from the memory A (31) is started, the reading of the same pixel data is completed up to this point.

In step 107, the initial value of the counter value BL for counting the blanking period is set, and in the next step 108, the counter value BL is increased.

Then, in step 109, it is determined whether or not the counter value BL has reached the specified value LastBL. If it has not reached, the process returns to step 108, and if it has reached, the process proceeds to step 110.

In step 110, the counter value AD of the memory read address is initialized and the specified value LastAD is set.

Next, in step 111, the memory B (3
From 2), the data is read from the final address side (in the reverse direction). In FIG. 6, after the reading of the Yodd pixel data (Y1odd) of the first line is completed, a blanking period is passed, and the Even pixel data (Y1e of the first line is read.
ven) is read from the memory B (32) in the reverse direction.

Then, in step 112, the memory B
The count value AD of the read address in (32) is decremented, and in the next step 113, it is determined whether or not the counter value has reached the address of the first pixel. Step 11
Go to 4. In FIG. 6, 1 from the memory B (32)
After the start of reading the Even pixel data of the line, the reading of the same pixel data is completed by this point.

In step 114, the initial value of the counter value BL for counting the blanking period is set, and in the next step 115, the counter value BL is increased.

Then, in step 116, it is determined whether or not the counter value BL has reached the specified value LastBL. If it has not reached, the process returns to step 115, and if it has reached, the process proceeds to step 117.

In step 117, the counter value AD of the memory read address is initialized and the specified value LastAD is set.

Next, at step 118, the memory A (3
From 1), data is read from the first address side (in the positive direction). This is for reading the data written in the reverse direction from the forward direction in step 14 of the above-described write sequence. In FIG. 6, the Yodd pixel data (Y2odd) on the second line is the memory A.
After being written in (31) (after reading the Even line pixel data (Y1even) of the first line from the memory B (32)), the Yodd pixel data of the second line is read in the positive direction.

Then, in step 119, the memory A
The count value AD of the read address in (31) is incremented, and in the next step 120, it is determined whether or not the counter value has reached the address LastAD of the last pixel. If so, the process proceeds to step 121. In FIG. 6, the memory A (3
After the reading of the Yodd pixel data of the second line from 1) is started, the reading of the same pixel data is completed by this point.

In step 121, the initial value of the counter value BL for counting the blanking period is set, and in the next step 122, the counter value BL is increased.

Then, in step 123, it is determined whether or not the counter value BL has reached the specified value LastBL, and if it has not reached it returns to step 122, and if it has reached to step 124.

In step 124, the counter value AD of the memory read address is initialized and the specified value LastAD is set.

Next, at step 125, the memory C (3
From 3), the data is read from the final address side (in the reverse direction). In FIG. 6, after the reading of the Yodd pixel data (Y2odd) of the second line is completed, a blanking period is passed, and then the Even pixel data (Y2e of the second line).
ven) is read from the memory C (33) in the reverse direction.

Then, in step 126, the memory C
The count value AD of the read address of (33) is decremented, and in the next step 127, it is determined whether or not the counter value has reached the address of the first pixel. If not, the process returns to step 125 to reach it. Step 10
Return to 2. In FIG. 6, 2 from the memory C (33)
After the start of reading the Even pixel data of the line, the reading of the same pixel data is completed by this point.

By repeating the above reading sequence, the pixel data of all horizontal lines of the image pickup device are sequentially read from the memories A to C (31 to 33).

Thus, odd, even, odd, ev
The pixel data read out in the order of en ... Are arranged as shown in FIG. 4 by writing and reading data to and from the three memories by the 15-memory controller as described above.

[0070]

As described above, according to the present invention,
It is possible to perform a left-right symmetric array conversion for each line of data in which pixel data for two horizontal lines of odd and even are regularly arrayed within one horizontal period using a memory capacity for three lines. Therefore, it is effective for downsizing a memory integrated IC.

If the data array conversion device of the present invention is used as an image input device for picking up an image which is horizontally inverted by the reflecting member, a display image whose right and left are correctly corrected can be obtained.

[Brief description of drawings]

FIG. 1 is an external view showing a document image camera (image input device) according to an embodiment of the present invention.

FIG. 2 is a block diagram showing an electrical configuration of the image input device.

FIG. 3 is a timing chart showing an array of input data in the array conversion unit.

FIG. 4 is a timing chart showing an array of output data in the array conversion unit.

FIG. 5 is a block diagram showing a configuration of the array conversion unit.

FIG. 6 is a timing chart showing a data write / read operation in the array conversion unit.

FIG. 7 is a flowchart showing a data write operation in the array conversion unit.

FIG. 8 is a flowchart showing a data read operation in the array conversion unit.

[Explanation of symbols]

1 Document camera 2 Platen 3 Imaging unit 4 Lighting section 5 mirror 10 Image processing section 11 RAM 12 CPU 13 ROM 14 memory 15 Array converter 16 Resolution converter 17 Operation unit controller 19 Output section I / F 20 Operation part 22 Lighting control unit 100 documents

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification code FI theme code (reference) H04N 11/20 H04N 1/04 Z F term (reference) 5C022 CA07 5C057 AA01 BA13 EB15 GG04 GG06 GG07 5C072 AA01 BA01 EA04 UA12 UA20 XA10 5C082 AA03 AA27 BA12 BA26 BA34 BB26 BD09 CB03 DA59 DA61 DA86 EA17 EA18 MM04

Claims (5)

[Claims] 1. An input port to which data in which pixel data for two horizontal lines of odd and even are regularly arranged is input in one horizontal period, and a memory unit for storing the data input to this input port. And the memory section is composed of three blocks each having a storage capacity of one line of input data, and one of these three blocks has an odd number in one specific block.
The input data of one of the d line and the even line is stored, the other input data is alternately stored in the other two blocks for each line, and the stored data is sequentially stored from the three blocks. A data array conversion device comprising array conversion means for reading and converting a data array. 2. The array conversion means writes the data of one of the first lines of the two horizontal lines in the positive direction to the specific block, reads the data in the reverse direction, and After writing the one data of the second line in the reverse direction, the data is read in the positive direction, and the other input data of the first and second lines is positively written to the other two blocks. The data array conversion apparatus according to claim 1, wherein the data array conversion device writes data in a direction and then reads data in a reverse direction. 3. A data array conversion apparatus according to claim 1 or 2 is provided, and these data array conversion apparatuses are operated at the same time, and one of the data array conversion apparatuses outputs a luminance signal of the input image data. An image processing system characterized by performing array conversion and performing array conversion of color difference signals by the other data array conversion device. 4. An image input device comprising the image processing system according to claim 3. 5. A reflection member for reflecting a light flux from an object to be photographed, and an image pickup unit for picking up an image laterally inverted by the reflection member and outputting image data. The image input device described.