JP2003133993A - Radio system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a radio system with a frequency divider which divides the frequency of an output signal from a local oscillator to generate transmission carrier signal which will send no unwanted transmission signal when the transmission carrier signals do not exist. SOLUTION: A divider 30 that frequency divides the frequency of an output signal from a local oscillator 140 to generate the transmission carrier signal is constituted to have a capability to control a free-running oscillation.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wireless device suitable for a terminal device, a base station device, etc. in a mobile wireless communication system.

[0002]

2. Description of the Related Art FIG. 17 is a block diagram of a conventional wireless device. The wireless device includes a transmitter 10, a receiver 20, a common local oscillator 140, a reference oscillator 101, a duplexer 107, and an antenna 106. In the transmission unit 10, the frequency divider 121 divides the output signal of the common local oscillator 140 and outputs a transmission carrier signal. The modulator 102 modulates the transmission carrier signal, which is the output signal of the frequency divider 121, with the quadrature baseband signal (I, Q) and outputs a modulated signal. The filter 104 reduces unnecessary frequency components in the output signal of the modulator 102. The power amplifier 105 includes a filter 104.
Power amplification of the output signal of. The duplexer 107 sends the amplified signal to the antenna 106 for transmission.

In this configuration, the output signal of the common local oscillator 140 is divided to obtain the transmission carrier signal, so that the modulator 10
2 and the frequency of the output signal of the common local oscillator 140 are different. Therefore, the common local oscillator 140
The influence of the output signal of 1) on the output signal of the modulator 102 is reduced, and transmission carrier signal leakage, modulation accuracy deterioration, and the like can be reduced.

FIG. 18 shows an example of the configuration of the frequency divider 121. In the frequency divider 121, the two frequency dividers 121a and 121b are connected in cascade to form a four frequency divider. The output signal of the common local oscillator 140 input from the input terminal 150 is divided by two, further divided by two, and output from the output terminal 151. In addition to the function as such a frequency divider, it also has the function as a 90-degree phase shifter. The operation of the 90-degree phase shifter will be described with reference to FIG. The frequency divider input signal shown in FIG. 19a is input from the input terminal 150 and divided by two. The signal at point A in FIG. 18 after dividing by 2 is shown in FIG. 19b. FIG. 19c shows the inverted signal of FIG. 19b at the point A of FIG. 18, and this inverted signal is input to the frequency divider of the next stage and divided by 2 together with the non-inverted signal. The output terminal 151 of FIG.
The output signals at are 19d and 19e. FIG. 19
FIG. 19d is a figure obtained by dividing FIG. 19b by two, and FIG.
Is divided by two.

Here, paying attention to the cycles of FIGS. 19d and 19e, FIG. 19d is ahead of FIG. 19e by a quarter cycle.
That is, it is possible to obtain two signals that are shifted by 90 degrees. Furthermore, in the case of the 90-degree phase shifter using the above-mentioned 4 frequency divider,
Even if the duty ratio of the input signal is not 50% as in a, it is possible to accurately obtain two signals that are deviated by 90 degrees. As described above, by using the frequency divider 121 as a 90-degree phase shifter, the modulator 102 of FIG. 17 does not need the 90-degree phase shifter portion, and the circuit can be simplified.

[0006]

In the radio device having the above-mentioned structure, the frequency dividers 121a and 121b forming the frequency divider 121 shown in FIG.
EC having a structure as shown in A of FIG.
When an L (emitter coupled logic) type T flip-flop is used, the following phenomenon occurs. In FIG. 17, when the output signal of the common local oscillator 140, which is the input signal of the frequency divider 121, does not exist, that is, 2
The ECL type T-type flip-flops as the frequency dividers 121a and 121b, when the input is in the non-input state,
It is known to oscillate at a certain frequency.

The frequency divider 121 constituting the frequency divider 121
When the ECL type T-type flip-flops as a and 121b self-oscillate, a signal obtained by dividing the free-running oscillation signal of the T-type flip-flop is input to the modulator 102 instead of the transmission carrier signal, and the quadrature baseband signal is input. (I, Q)
Modulate with and output the modulated signal. Modulation signal is filter 1
It is transmitted as a transmission output signal from the antenna 106 via 04, the power amplifier 105, and the duplexer 107. As described above, although the transmission carrier signal does not originally exist, an unnecessary transmission signal is transmitted as a signal obtained by dividing the free-running oscillation signal as the transmission carrier signal, which causes malfunction of the wireless device or the wireless system. It has drawbacks.

An object of the present invention is to solve the above-mentioned conventional problems, and it is an object of the present invention to provide a radio apparatus which does not transmit an unnecessary transmission signal when there is no transmission carrier signal.

[0009]

In order to achieve the above object, the present invention provides a first local oscillator and a frequency divider that divides an output signal of the first local oscillator to generate a modulated signal. A modulator that modulates the modulated signal with a transmission signal and outputs the modulated signal as a radio transmission signal; and a first signal converter that frequency-converts the reception signal with the output signal of the first local oscillator to generate a first reception intermediate frequency. The output signal of the reception frequency converter, the second local oscillator, and the first reception frequency converter is used as the second output signal.
And a second reception frequency converter that performs frequency conversion by the output signal of the local oscillator to generate a second reception intermediate frequency,
The frequency divider is configured to have means for suppressing the occurrence of free-running oscillation. With this configuration, the wireless device does not transmit an unnecessary transmission signal when the transmission carrier signal does not exist.

In order to achieve the above object, the present invention provides a first local oscillator, a frequency divider that divides an output signal of the first local oscillator to generate a modulated signal, and the frequency divider. A modulator that modulates a modulated signal with a transmission signal, a transmission frequency converter that performs frequency conversion of the output signal of the modulator with the output signal of the first local oscillator, and outputs a radio transmission signal, and a second local oscillator A first reception frequency converter for converting the frequency of the reception signal by the output signal of the second local oscillator to generate a first reception intermediate frequency; and an output signal of the first reception frequency converter for a fixed frequency signal. A second reception frequency converter that generates a second reception intermediate frequency by performing frequency conversion with the frequency divider, the frequency divider having a means for suppressing the occurrence of free-running oscillation, and the frequency of the transmission signal and the frequency of the reception signal. Is different By this arrangement that is configured at the same time for transmitting and receiving, when the transmission carrier signal is not present, the wireless device and thus does not transmit unwanted transmit signal.

The present invention is also configured to use the output signal of the third local oscillator as the fixed frequency signal input to the second reception frequency converter.

The present invention further comprises a reference oscillator for generating a reference signal input to the first local oscillator and the second local oscillator, and a fixed frequency signal input to the second reception frequency converter. Is used as a signal obtained by multiplying the output signal of the reference oscillator.

Further, according to the present invention, the frequency divider is used as a first frequency divider, and the output signal of the first local oscillator is frequency-divided and output to the first frequency divider and the transmission frequency converter. Second
Is further provided, and the second frequency divider is configured to have a means for suppressing the occurrence of free-running oscillation.

The present invention further comprises selecting means for selecting the output signal of the first local oscillator or the output signal of the second local oscillator and outputting the selected output signal to the second frequency divider. The means is configured to select the output signal of the first local oscillator when transmitting / receiving at the same time, and select the output signal of the second local oscillator when transmitting / receiving in time division.

Further, according to the present invention, the first frequency divider and / or
Alternatively, the second frequency divider is an emitter-coupled logic type T-current type logic type T-type composed of a master flip-flop and a slave flip-flop.
Of the input differential pair of the master flip-flop, the emitter size of the transistor connected to the hold side of the differential switch is larger.

Further, according to the present invention, among the transistors of the input differential pair of the slave flip-flop, the emitter size of the transistor connected to the hold side of the differential switch is larger.

Further, the present invention is configured to include a current source for supplying a current to each differential switch of the master flip-flop and the slave flip-flop.

[0018]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to FIGS. 1 to 16. (First Embodiment) FIG. 1 is a functional block diagram showing the configuration of a radio apparatus according to the first embodiment of the present invention. In FIG. 1, the wireless device includes a transmitter 10 and a receiver 2.
0, reference oscillator 101, common local oscillator 140, duplexer 107, and antenna 106. Reference oscillator 1
Reference numeral 01 is a circuit that oscillates a reference signal that serves as a reference for each oscillator. The common local oscillator 140 is an oscillating circuit that doubles as a transmitting local oscillator and a first receiving local oscillator, and generates a transmitting local signal and a first receiving local signal based on a reference signal, and switches the oscillation frequency between transmitting and receiving. .

The frequency divider 30 is a frequency dividing circuit for dividing the output signal of the common local oscillator 140 to generate a transmission carrier signal, and has a function of suppressing free-running oscillation. The modulator 102 is a circuit that modulates a transmission carrier signal with a quadrature baseband signal. The filters 104 and 110 are bandpass filters. The power amplifier 105 is a circuit that power-amplifies a transmission signal. The antenna 106 is an antenna for both transmission and reception. The duplexer 107 is a circuit that separates a transmission signal to the antenna and a reception signal from the antenna.

The low noise amplifier 108 converts the received signal into a high S / N ratio.
It is a circuit that amplifies. The first reception frequency converter 109 is a circuit that converts a reception signal into a low-frequency first intermediate frequency signal. The second reception frequency converter 111 is a circuit that converts the first intermediate frequency signal into a second intermediate frequency signal having a lower frequency. The second receiving local oscillator 124 is an oscillator circuit that generates a second receiving local signal based on a reference signal.

The operation of the radio apparatus according to the first embodiment of the present invention configured as above will be described. At first,
The operation of the transmission system will be described. The frequency divider 30 frequency-divides the output signal of the common local oscillator 140 and outputs a transmission carrier signal. The modulator 102 then receives the quadrature baseband signal (I,
In Q), the transmission carrier signal output from the frequency divider 30 is modulated and a modulated signal is output. Filter 104 then reduces unwanted frequency components in the output signal of modulator 102. The power amplifier 105 then power amplifies the output signal of the filter 104. Next, the duplexer 107 sends the amplified signal to the antenna 106 and transmits it to the other party.

Next, the operation of the receiving system will be described. The received signal received by the antenna 106 is input from the duplexer 107 to the low noise amplifier 108 and amplified. Next, the first reception frequency converter 109 frequency-converts the first reception local signal, which is the output signal of the common local oscillator 140, and outputs the first intermediate frequency signal. Next, the first reception frequency converter 10
The unnecessary frequency component in the output signal of 9 is reduced by the filter 110. Next, the output signal of the filter 110 is frequency-converted by the second reception frequency converter 111 by the second reception local signal which is the output signal of the second reception local oscillator 124 to generate the second signal.
Obtain an intermediate frequency signal.

Next, the operation of the transmission section 10 when the output signal of the common local oscillator 140 does not exist will be described.
When the output signal of the common local oscillator 140 does not exist, that is, even when the input of the frequency divider 30 is in the non-input state, the free-running oscillation is suppressed in the frequency divider 30 and the modulator 10
There is no transmit carrier signal input to 2. Therefore, since the output signal of the modulator 102 is not generated, the filter 1
No unnecessary transmission signal is transmitted from the antenna 106 via 04, the power amplifier 105, and the duplexer 107.

Next, the structure and operation of the frequency divider 30 will be described. FIG. 2 is a functional block diagram showing the configuration of the frequency divider 30. Similarly to the frequency divider 121 shown in FIG. 18, the frequency divider 30 has two divide-by-2 frequency dividers 300a and 300b connected in cascade to form a divide-by-four frequency divider. The output signal of the common local oscillator 140 input from the input terminal 150 is divided by 2 and further divided by 2
The frequency is divided and output from the output terminal 151. Frequency divider 3
Like the frequency divider 121, 0 also has a function as a 90-degree phase shifter in addition to the function as a frequency divider. Therefore, by using the frequency divider 30 as a 90-degree phase shifter, the modulator 102 of FIG. 1 does not require the 90-degree phase shifter portion, and the circuit can be simplified. The frequency divider 30 is different from the frequency divider 121 shown in FIG. 18 in that the frequency divider 2 is composed of an ECL type T flip-flop having a free-running oscillation suppressing function.

FIG. 3 shows an example of an ECL type T-type flip-flop having a free-running oscillation suppressing function as the divide-by-2 frequency divider 300. The configuration of an ECL type T-type flip-flop having a free-running oscillation suppressing function as the frequency divider 300 will be described. The ECL type T-type flip-flop having the free-running oscillation suppressing function as the frequency divider 300 is a master flip-flop B1 and a slave flip-flop B2.
It is composed of. The master flip-flop B1 is composed of the first, second and third differential switch circuits 311, 313, 3
14, emitter follower transistors Q13, Q14, resistors 319, 320, 323, 324 and constant current source 317.
It is composed of. The slave flip-flop B2 includes fourth, fifth and sixth differential switch circuits 312, 315, 3
16, an emitter follower transistor Q15, Q16, a resistor 321, 322, 325, 326, and a constant current source 318.
It is composed of.

The first differential switch 311 is composed of transistors Q1 and Q2, and the emitters of the transistors Q1 and Q2 are connected. Hereinafter, for simplification, the transistor is simply referred to as “Q1” or the like. Since the emitter size of Q2 is larger than the emitter size of Q1, the saturation current of Q2 (hereinafter referred to as Is) is larger than Is of Q1 and when the same potential is applied to the bases of Q1 and Q2,
The collector current I2 of 2 flows more than the collector current I1 of Q1. I2 drives the third differential switch 314 and I1 drives the second differential switch 313.

Like the first differential switch 311, the fourth differential switch 312 is also composed of transistors Q3 and Q4, and the emitters of the transistors Q3 and Q4 are connected. Since the emitter sizes of Q3 and Q4 are the same, when the same potential is applied to the bases of Q3 and Q4,
The same current flows as the collector current I3 of Q3 and the collector current I4 of Q4. I3 drives the fifth differential switch 315, and I4 drives the sixth differential switch 316.

The bases of Q1 and Q4 are connected to each other, and the bases of Q2 and Q3 are connected to each other, and signals are differentially input to the input terminals Vin1 and Vin2, respectively. The output signal of the master flip-flop B1 is input to the fifth differential switch 315 of the slave flip-flop B2, and the output signal of the slave flip-flop B2 is output from the output terminals Vo1 and Vo2 as the output signal of the divide-by-2 frequency divider 300. And master flip-flop B1
Is input to the second differential switch 313. The above configuration is shown in FIG. 4A of Japanese Patent Laid-Open No. 64-41330, except that the emitter size of one of the two transistors forming the first differential switch 311 is increased. The configuration is the same.

Next, the operation of the ECL type T-type flip-flop having the free-running oscillation suppressing function as the frequency divider 300 when there is no input will be described. Input terminals Vin1 and V
When in2 has no signal, the base potentials of Q1, Q2, Q3 and Q4 are the same. However, the emitter size of Q2 is larger than that of Q1.
Only the second side is turned on, the third differential switch 314 is driven, and the second differential switch 313 is cut off. The fourth differential switch 312 turns on both Q3 and Q4.
Therefore, the fifth differential switch 315 and the sixth differential switch 316 are in a driving state.

Now, in this state, the output of the sixth differential switch 316 of the slave flip-flop B2 is input to the second differential switch 313 of the master flip-flop B1, but the second differential switch 313 is Since it is in the cutoff state, a feedback path from the slave flip-flop B2 to the master flip-flop B1 is not formed, and the third differential switch 314 of the master flip-flop B1 and the slave flip-flop B2 continue to hold a constant state. . Therefore, free-running oscillation does not occur. Thus, in the wireless device, as the frequency divider 30 that divides the output signal of the local oscillator 140 to generate the transmission carrier signal,
Since the frequency divider having the function of suppressing free-running oscillation is provided, unnecessary transmission signals are not transmitted when there is no transmission carrier signal.

The frequency divider 30 is formed by connecting the frequency dividers 2 by 300 in cascade, but the frequency division number may be any number as long as it is an integral multiple of 2. Further, when the frequency divider 30 is used as a 90-degree phase shifter, if the frequency division number is 4 or more, the frequency divider 3
Even if the duty ratio of the input signal to 0 is not 50%,
It is possible to obtain two signals that are exactly 90 degrees apart. Therefore, the 90-degree phase shifter portion of the modulator 102 is unnecessary, and the wireless device can be downsized.

Further, an ECL type T-type flip-flop 30 having a free-running oscillation suppressing function as the frequency divider 300.
In the first differential switch 311 of 0, the emitter size of Q2 is larger than that of Q1, but in the fourth differential switch 312, the emitter size of Q4 is larger than that of Q3. Also has the same effect. Although the ECL type T-type flip-flop as the frequency divider 300 is composed of a bipolar transistor, if the device has a similar function such as a MOS transistor, the same effect as when the bipolar transistor is used can be obtained.

(Second Embodiment) FIG. 4 is a functional block diagram showing the configuration of a radio apparatus according to the second embodiment of the present invention. 1 is the same as FIG. 1 except that the configuration of the frequency divider 31 is different from that of the frequency divider 30 of FIG. 1. The configuration of the frequency divider 31 will be described. FIG. 5 is a functional block diagram showing the configuration of the frequency divider 31. Similarly, the frequency divider 31 has two frequency dividers 301a, 3a and 3a.
01b is connected in cascade to form a divide-by-four frequency divider.

FIG. 6 shows a divide-by-two frequency divider 30 constituting a frequency divider 31.
1 is another ECL type T-type flip-flop having a free-running oscillation suppressing function. First differential switch 31
1 has a larger emitter size of Q2 than the emitter size of Q1 and is different from the ECL type T-type flip-flop 300 having the free-running oscillation suppressing function of FIG. The emitter size is set larger than that of Q3. Therefore, in the first differential switch 311, Is of Q2 is larger than that of Q1, and Q1, Q
When the same potential is applied to the base of 2, the collector current I2 of Q2 flows more than the collector current I1 of Q1. In the fourth differential switch 312, Q4
Is larger than Q3 and the same potential is applied to the bases of Q3 and Q4, the collector current I4 of Q4 is Q3.
It flows more than the collector current I3 of. I1 drives the second differential switch 313, I2 drives the third differential switch 314, I3 drives the fifth differential switch 315, and I4 drives the sixth differential switch 316. To do.

Next, the operation of another ECL type T flip-flop having the free-running oscillation suppressing function as the frequency divider 301 when there is no input will be described. Input terminal Vin
When 1, Vin2 is no signal, Q1, Q2, Q3, Q4
Have the same base potential. However, the emitter sizes of Q2 and Q4 are larger than those of Q1 and Q3, and in the first differential switch 311, only the Q2 side is ON, the third differential switch 314 is in the driving state, and the second differential switch 313 is cut off, only the Q4 side of the fourth differential switch is turned on, the sixth differential switch 316 is driven, and the fifth differential switch 315 is cut off.

Now, in this state, the output of the sixth differential switch 316 of the slave flip-flop B2 is input to the second differential switch 313 of the master flip-flop B1, but the second differential switch 313 is Since it is in the cutoff state, a feedback path from the slave flip-flop B2 to the master flip-flop B1 is not formed. Further, the third differential switch 314 of the master flip-flop B1
Is input to the fifth differential switch 315 of the slave flip-flop B2, the fifth differential switch 31
5 is in the cutoff state, the master flip-flop B1
Signal path is not formed from the slave flip-flop B2 to the slave flip-flop B2. The master flip-flop B1 and the slave flip-flop B2 continue to hold a constant state. Therefore, free-running oscillation does not occur.

First of another ECL type T-type flip-flop having a free-running oscillation suppressing function as the frequency divider 301.
In the differential switch 311 and the fourth differential switch 312, the emitter sizes of Q2 and Q4 are larger than the emitter sizes of Q1 and Q3, but the ratio of the emitter sizes of the respective transistors is Q1: Q2 = Q3: Q4
If set so that the first differential switch 311 and the fourth differential switch 312 are in the opposite phase relationship of the differential pair, the collector current I1 of Q1 and the collector currents I2 and Q3 of Q2 are set. The unbalanced current ratio between the collector current I3 of Q4 and the collector current I4 of Q4 is about 1/2 of that in the case where the emitter size of only one of Q2 and Q4 is increased as in the first embodiment. Since the free-running oscillation can be suppressed by the collector current ratio, the input sensitivity deterioration due to the free-running oscillation suppression can be reduced to about half. Therefore, it is possible to prevent the unnecessary transmission signal from being transmitted while reducing the input sensitivity deterioration. It is possible.

As described above, in the radio device, the frequency divider for dividing the output signal of the local oscillator to generate the transmission carrier signal is provided with the frequency divider having the function of suppressing free-running oscillation. , No unnecessary transmission signal is transmitted when there is no transmission carrier signal.

The frequency divider 31 is divided by 2 frequency dividers 301a and 3a.
Although 01b is connected in cascade to form a frequency divider, the number of frequency divisions may be any number as long as it is an integral multiple of 2. Further frequency divider 31
Is used as a 90-degree phase shifter, the duty ratio of the input signal to the frequency divider 31 is 50 if the frequency division number is 4 or more.
Even if it is not%, it is possible to obtain two signals that are exactly 90 degrees apart. Therefore, the 90-degree phase shifter portion of the modulator 102 is unnecessary, and the wireless device can be downsized. Further, although the ECL type T-type flip-flop as the frequency divider 301 is composed of the bipolar transistor, if the device has a similar function such as the MOS transistor, the same effect as the case of using the bipolar transistor can be obtained.

(Third Embodiment) FIG. 7 is a functional block diagram showing the configuration of a radio apparatus according to the third embodiment of the present invention. 1 is the same as FIG. 1 except that the configuration of the frequency divider 32 is different from that of the frequency divider 30 of FIG. The configuration of the frequency divider 32 will be described. FIG. 8 is a functional block diagram showing the configuration of the frequency divider 32. Similarly, the frequency divider 32 has two frequency dividers 302a and 302b.
Are cascade-connected to form a divide-by-four frequency divider.

FIG. 9 is a divide-by-two frequency divider 30 which constitutes the frequency divider 32.
2 is a CML (current mode logic) type T-type flip-flop having a free-running oscillation suppressing function.
The difference from the ECL type T-type flip-flop having the free-running oscillation suppression function of FIG. 6 is that the emitter follower Q13 to
Q16 is omitted, and the collector outputs of the second and third differential switches 313 and 314 and the fifth and sixth differential switches 315 and 316 are output to the master flip-flop B1 and the slave flip-flop B2, respectively. To the differential switch inputs of the slave B1 and the slave flip-flop B2.
It is directly connected without going through Q16. The CML type T-type flip-flop having such a free-running oscillation suppressing function operates in the same manner as the ECL-type T-type flip-flop having the free-running oscillation suppressing function.

This CML type T-type flip-flop has an emitter follower Q13 at the collector output of the differential switch.
Since there is no ~ Q16, it consumes less power than the ECL type T-type flip-flop. However, the load resistance 31
Since the capacitance between the collector and substrate (IC substrate) of the transistors connected to 9, 320 and the load resistors 321 and 322 is connected to the respective frequency division inputs of the master flip-flop B1 and the slave flip-flop B2, the ECL type T High-speed operation cannot be expected in comparison with type flip-flops.

Next, the operation of the CML type T-type flip-flop having the free-running oscillation suppressing function as the frequency divider 302 when there is no input will be described. The frequency divider 301 of FIG.
ECL type T with self-running oscillation suppression function as
Type flip-flops, input terminals Vin1, Vi
When n2 has no signal, the base potentials of Q1, Q2, Q3 and Q4 are the same. However, the emitter sizes of Q2 and Q4 are larger than those of Q1 and Q3, and the first differential switch 3
In No. 11, only the Q2 side is turned on, the third differential switch 314 is driven, the second differential switch 313 is turned off, and only the Q4 side of the fourth differential switch 312 is turned on and the sixth differential switch 312 is turned on. The differential switch 316 is driven and the fifth differential switch 315 is cut off.

Now, in this state, the output of the sixth differential switch 316 of the slave flip-flop B2 is input to the second differential switch 313 of the master flip-flop B1, but the second differential switch 313 is Since it is in the cutoff state, a feedback path from the slave flip-flop B2 to the master flip-flop B1 is not formed. Further, the third differential switch 314 of the master flip-flop B1
Is input to the fifth differential switch 315 of the slave flip-flop B2, the fifth differential switch 31
5 is in the cutoff state, the master flip-flop B1
Signal path is not formed from the slave flip-flop B2 to the slave flip-flop B2. The master flip-flop B1 and the slave flip-flop B2 continue to hold a constant state. Therefore, free-running oscillation does not occur.

As described above, in the radio device, the frequency divider 32 for dividing the output signal of the local oscillator 140 to generate the transmission carrier signal is provided with the frequency divider having the function of suppressing free-running oscillation. Therefore, if there is no transmission carrier signal, an unnecessary transmission signal is not transmitted.

The frequency divider 32 is composed of the frequency dividers 302a and 3a.
Although 02b is connected in cascade to form a divide-by-four frequency divider, any number may be used as long as it is an integral multiple of two. Further, when the frequency divider 32 is used as a 90-degree phase shifter, if the frequency division number is 4 or more, the duty ratio of the input signal to the frequency divider 32 is 50%.
Even if it is not, it is possible to obtain two signals that are accurately deviated by 90 degrees. Therefore, the 90-degree phase shifter portion of the modulator 102 is unnecessary, and the wireless device can be downsized. Further, as in the first embodiment, it is possible to suppress the free-running oscillation by increasing the emitter size of only one of Q2 and Q4. Further, although the ECL type T-type flip-flop as the frequency divider 302 is composed of a bipolar transistor, if the device has a similar function such as a MOS transistor, the same effect as when the bipolar transistor is used can be obtained.

(Fourth Embodiment) FIG. 10 is a functional block diagram showing the structure of a radio apparatus according to the fourth embodiment of the present invention. 3 is the same as FIG. 1 except that the configuration of the frequency divider 33 is different from the configuration of the frequency divider 30 of FIG. 1. The configuration of the frequency divider 33 will be described. FIG. 11 is a functional block diagram showing the configuration of the frequency divider 33. Similarly, the frequency divider 33 is divided by two frequency dividers 303 a and 303.
b is connected in cascade to form a divide-by-four frequency divider.

FIG. 12 shows the frequency divider 3 which constitutes the frequency divider 33.
03 is another CML (current mode logic) type T-type flip-flop having another free-running oscillation suppressing function. CML type T with self-propelled oscillation suppression function of FIG.
The difference from the type flip-flop is that constant current sources 327, 328, 329, 3 are connected to the emitter connection parts of the differential switches 313, 314, 315, 316 of the master flip-flop B1 and the slave flip-flop B2.
I have connected 30.

The CML type T-type flip-flop having such a structure operates in the same manner as the ECL type T-type flip-flop and the CML type T-type flip-flop. In this CML type T flip-flop, when a frequency-divided input signal is input from the input terminals Vin1 and Vin2, Q1 of the first differential switch 311 and Q4 of the second differential switch 312, and the first differential switch 312 The Q2 of the differential switch 311 and the Q3 of the second differential switch 312 are alternately turned ON, and accordingly, the second differential switch 313 and the sixth differential switch 316, and the third differential switch 314 and the third differential switch 314 are turned on. The differential switch 315 of 5 alternately repeats the drive state and the cutoff state to perform the frequency dividing operation. The constant current sources 327, 328, 329, 330 connected to the second, third, fifth and sixth differential switches 313, 314, 315, 316 always keep a constant current flowing through the respective differential switches.

Q1, Q4 and Q of the fourth differential switch
When 2 and Q3 are in the cutoff state, the drive currents I1 and I4 of the second and sixth differential switches and the drive currents I2 and I3 of the third and fifth differential switches disappear, but the constant current source 32
Since there are 7, 328, 329, and 330, the second, sixth differential switches, and the third, fifth differential switches are never cut off. Therefore, the second, third, fifth and sixth
Differential switches Q5, Q6, Q7, Q8, Q9, Q1
Current always flows through 0, Q11, and Q12, and the influence of the capacitance between the collector and substrate (IC substrate) of each transistor can be reduced, and high-speed operation becomes possible.

Next, when there is no input, another CML type T-type flip-flop having a free-running oscillation suppressing function as the divide-by-2 frequency divider 303 is a CML-type having a free-running oscillation suppressing function as the divide-by-2 frequency divider 302. As with the T-type flip-flop, the master flip-flop B1 and the slave flip-flop B2 continue to hold a constant state, so that free-running oscillation does not occur. As described above, in the wireless device, as the frequency divider 33 that divides the output signal of the local oscillator 140 to generate the transmission carrier signal, the frequency divider is configured to include a frequency divider having a function of suppressing free-running oscillation. When there is no transmission carrier signal, unnecessary transmission signals are not transmitted.

The frequency divider 33 is composed of two frequency dividers 303a and 3a.
Although 03b is connected in cascade to form a divide-by-four frequency divider, any number of divisions may be used as long as it is an integral multiple of two. Further, when the frequency divider 33 is used as a 90-degree phase shifter, if the frequency division number is 4 or more, the duty ratio of the input signal to the frequency divider 33 is 50%.
Even if it is not, it is possible to obtain two signals that are accurately deviated by 90 degrees. Therefore, the 90-degree phase shifter portion of the modulator 102 is unnecessary, and the wireless device can be downsized. Further, as in the first embodiment, it is possible to suppress the free-running oscillation by increasing the emitter size of only one of Q2 and Q4.

CML type T having a free-running oscillation suppressing function
Switch 31 of the master flip-flop B1 and the slave flip-flop B2 of the type flip-flop
The constant current sources 327, 328, 329, and 330 are connected to the respective emitter connection portions of 3, 314, 315, and 316, but are connected to the respective emitter common connection portions of the T-type flip-flops of FIGS. 3, 6, and 9. Even if a constant current source is connected, the influence of the capacitance between the collector and substrate (IC substrate) of each transistor can be reduced and high speed operation becomes possible.
Although the ECL type T-type flip-flop as the frequency divider 303 is composed of a bipolar transistor, if it is a device having a similar function such as a MOS transistor,
The same effect as when using a bipolar transistor is obtained.

(Fifth Embodiment) FIG. 13 is a functional block diagram showing the structure of a radio apparatus according to the fifth embodiment of the present invention. In FIG. 13, the reference oscillator 101
Is a transmission local oscillator 122 and a reception first local oscillator 123.
And a circuit that oscillates a reference signal that serves as a reference for the reception third local oscillator 124. The transmission local oscillator 122 is an oscillation circuit that generates a transmission local signal based on a reference signal.
The first reception local oscillator 123 is configured to generate the first reception local oscillator 123 based on the reference signal.
It is an oscillation circuit that generates a reception local signal. The second receiving local oscillator 124 is an oscillator circuit that generates a second receiving local signal based on a reference signal. The frequency divider 32 is a frequency dividing circuit that divides the output signal of the transmission local oscillator 122 to generate a transmission carrier signal, and has a function of suppressing free-running oscillation. The frequency divider 32 is configured to use any of the T-type flip-flops having the free-running oscillation suppressing function shown in FIGS. 3, 6, 9, and 12.

The modulator 102 is a circuit that modulates a transmission carrier signal with a quadrature baseband signal. The transmission frequency converter 103 is a circuit that converts a modulated signal into a transmission signal having a high frequency. The filters 104 and 110 are bandpass filters. The power amplifier 105 is a circuit that power-amplifies a transmission signal. The antenna 106 is an antenna for both transmission and reception. The duplexer 107 is a circuit that separates a transmission signal to the antenna and a reception signal from the antenna. The low noise amplifier 108 is a circuit that amplifies a received signal with high S / N. The first reception frequency converter 109 is a circuit that converts a reception signal into a low-frequency first intermediate frequency signal. The second reception frequency converter 111 is a circuit that converts the first intermediate frequency signal into a second intermediate frequency signal having a lower frequency.

The operation of the radio apparatus according to the fifth embodiment of the present invention configured as above will be described. At first,
The operation of the transmission system will be described. The frequency divider 32 frequency-divides the output signal of the transmission local oscillator 122 and outputs a transmission carrier signal. The modulator 102 then receives the quadrature baseband signal (I,
In Q), the transmission carrier signal which is the output of the first frequency divider 32 is modulated and a modulated signal is output. Next, the transmission frequency converter 103 frequency-converts the modulation signal, which is the output signal of the modulator 102, with the transmission local signal, which is the output signal of the transmission local oscillator 122. Next, the filter 104 reduces unnecessary frequency components in the output signal of the transmission frequency converter 103. The power amplifier 105 then power amplifies the output signal of the filter 104. Next, the duplexer 107 sends the amplified signal to the antenna 106 and transmits it to the other party.

Next, the operation of the receiving system will be described. The received signal received by the antenna 106 is input from the duplexer 107 to the low noise amplifier 108 and amplified. Then, in the first reception frequency converter 109, frequency conversion is performed by the first reception local signal which is the output signal of the first reception local oscillator 123, and the
Outputs an intermediate frequency signal. Then, the unnecessary frequency component in the output signal of the first reception frequency converter 109 is filtered by the filter 110.
To reduce. The output signal of the filter 110 is then fed to the second
The reception frequency converter 111 frequency-converts the second reception local signal, which is the output signal of the second reception local oscillator 124, to obtain a second intermediate frequency signal.

Next, an unnecessary frequency component at the time of transmission of time division transmission / reception (half-duplex communication) and simultaneous transmission / reception (full-duplex communication) will be described. The transmission carrier signal input to the modulator 102 is obtained by dividing the output signal of the transmission local oscillator 122 by the frequency divider 3
It is divided by 2. Frequency f2 of transmission carrier signal
And the frequency f1 of the output signal of the transmission local oscillator 122, the frequency division ratio of the first frequency divider 121 is N (N = 1, 2, 3).
..), f1 = N × f2 (1)

The relationship between the frequency fo of the transmission signal, which is the output signal of the transmission frequency converter 103, and the frequency f2 of the transmission carrier signal divided by the frequency divider 32 is fo = f1 + f2 = (N + 1) × f2.・ ・ (2) Therefore, of the harmonics of the transmission carrier signal (frequency f2), the component closest to the frequency fo of the transmission signal is (N + 1) × f2, which always overlaps with the frequency fo of the transmission signal. Therefore, the (N + 1) th harmonic of the transmission carrier signal is buried in the transmission signal, and unnecessary frequency components do not occur near the transmission frequency.

Next, the operation of the transmitter 10 when the output signal of the transmitter local oscillator 122 does not exist will be described.
It is assumed that when the output signal of the transmission local oscillator 122 does not exist, that is, when the input of the frequency divider 32 is in the non-input state, the free-running oscillation of the frequency divider 32 occurs. A signal obtained by dividing the free-running oscillation signal of the frequency divider 32 is input to the modulator 102 instead of the transmission carrier signal, and the transmission frequency converter 103 is free-running of the frequency divider 32 instead of the transmission local signal. The oscillation signal is input. Therefore, in the modulator 102, the signal obtained by dividing the free-running oscillation signal of the frequency divider 32 is modulated with the quadrature baseband signals (I, Q), and the modulated signal is the transmission frequency converter 1
In 03, the frequency is converted by the free-running oscillation signal of the frequency divider 32, and the filter 104, the power amplifier 105, the duplexer 10
An unnecessary transmission signal will be transmitted from the antenna 106 via 7.

In the present embodiment, any of the T-type flip-flops having the free-running oscillation suppressing function shown in FIGS. 3, 6, 9, and 12 is used as the frequency divider 32.
Free-running oscillation in the frequency divider 32 is suppressed, and the transmission carrier signal and the transmission frequency converter 103 input to the modulator 102 are suppressed.
There is no transmitter local signal input to. Therefore, since the output signal of the transmission frequency converter 103 is not generated, an unnecessary transmission signal is not transmitted from the antenna 106 via the filter 104, the power amplifier 105, and the duplexer 107.

In this way, the transmission local oscillator 122 and the first
Since the reception local oscillator 123 is separately provided, the output frequency of the transmission local oscillator 122 and the output frequency of the first reception local oscillator 123 can be individually set in the simultaneous transmission / reception and the time division transmission / reception. Therefore, unnecessary frequency components can be prevented from being generated in the vicinity of the transmission frequency, a filter for removing unnecessary frequency components is unnecessary, and the wireless device can be downsized. Further, since the frequency divider 32 is a frequency divider having a function of suppressing free-running oscillation, it does not transmit an unnecessary transmission signal when there is no transmission carrier signal.

By incorporating the above-described wireless device into a terminal device of a mobile wireless communication system such as a mobile phone which performs simultaneous transmission / reception or time division transmission / reception using a reception frequency different from the transmission frequency, the terminal can be made compact. At the same time, unnecessary transmission signals are not transmitted when there is no transmission carrier signal. This wireless device can also be used as a base station device of a mobile wireless communication system.

As described above, in the fifth embodiment of the present invention, the radio device divides the output signal of the transmission local oscillator 122 provided independently of the reception circuit 20 to generate the transmission carrier signal, Since the frequency divider 32, which modulates the quadrature baseband signal, frequency-converts the output signal of the transmission local oscillator 122 to generate a transmission signal, and further generates a transmission carrier signal, suppresses free-running oscillation, During division transmission / reception and simultaneous transmission / reception, unnecessary frequency components do not occur in the transmission band, the wireless device can be downsized, and unnecessary transmission signals are not transmitted when there is no transmission carrier signal.

It should be noted that the frequency divider 32 is divided into two as shown in FIG.
Although the frequency dividers 302a and 302b are connected in cascade to form a frequency divider 4, the number of frequency divisions may be any integer multiple of two. Further, when the frequency divider 32 is used as a 90 degree phase shifter,
If the number of frequency divisions is 4 or more, it is possible to obtain two signals accurately shifted by 90 degrees even if the duty ratio of the input signal to the frequency divider 32 is not 50%. Therefore, the 90-degree phase shifter portion of the modulator 102 is unnecessary, and the wireless device can be downsized.

(Sixth Embodiment) FIG. 14 is a functional block diagram showing the structure of a radio apparatus according to the sixth embodiment of the present invention. In FIG. 14, the multiplier 125 is a multiplier that multiplies the output signal of the reference oscillator 101. Other configurations are the same as those of the fifth embodiment shown in FIG. The operation of the wireless device according to the sixth embodiment of the present invention configured as described above will be described. In the sixth embodiment, the second embodiment in the fifth embodiment shown in FIG.
Instead of the output signal of the receiving local oscillator 124, the output signal of the multiplier 125 that multiplies the output signal of the reference oscillator 101 is used. Since the second receiving local oscillator 124 is unnecessary, the wireless device can be further downsized.

As described above, according to the sixth embodiment of the present invention, the radio apparatus performs frequency conversion of the received first intermediate frequency signal with the signal obtained by multiplying the reference signal to generate the received second intermediate frequency signal. With this configuration, the wireless device can be further downsized, and an unnecessary transmission signal is not transmitted when there is no transmission carrier signal. As shown in FIG. 8, the frequency divider 32 is configured by dividing the frequency dividers 302a and 302b into cascades to form a frequency divider 4. However, the frequency division number may be any integer multiple of two. Further, when the frequency divider 32 is used as a 90-degree phase shifter, if the frequency division number is 4 or more, even if the duty ratio of the input signal to the frequency divider 32 is not 50%, it is accurately deviated by 90 degrees. Two signals can be obtained. Therefore, modulator 1
The 90 degree phase shifter of 02 is not required, and the wireless device can be downsized.

(Seventh Embodiment) FIG. 15 is a functional block diagram showing the structure of a radio apparatus according to the seventh embodiment of the present invention. In FIG. 15, the frequency divider 34 is a frequency divider that frequency-divides the output signal of the transmission local oscillator 122.
The other configuration is the same as that of the sixth embodiment. The operation of the wireless device according to the seventh embodiment of the present invention configured as described above will be described. In the seventh embodiment, a second frequency divider 34 that divides the output signal of the transmission local oscillator 122 in the sixth embodiment shown in FIG. 14 to generate a transmission local signal is added. The frequency divider 34 has a configuration shown in FIGS.
It is assumed that one of the T-type flip-flops having the free-running oscillation suppressing function shown in FIGS. 9 and 12 is used.

The relationship between the frequency f2 of the transmission carrier signal input to the modulator 102 and the frequency f1 'of the output signal of the transmission local oscillator 122 is determined by dividing the frequency division ratio of the frequency divider 32 by N (N = N).
1, 2, 3, ..., And the frequency division ratio of the frequency divider 34 is K (K =
1, 2, 3, ..., Then, f1 ′ = K × N × f2 (3) Further, the relationship between the frequency fo of the transmission signal, which is the output signal of the transmission frequency converter 103, and the frequency f2 of the transmission carrier signal obtained by frequency division by the frequency divider 32 is the same as in the first embodiment. , As shown in equation (2).

Therefore, the transmission carrier signal (frequency f
Of the harmonics of 2), the component closest to the frequency fo of the transmission signal is (N + 1) × f2, and the frequency fo of the transmission signal is
Always overlaps with. Therefore, the (N +
1) The higher harmonics are buried in the transmission signal, and unnecessary frequency components do not occur near the transmission frequency. Further, by adding the frequency divider 34, the frequency f1 ′ of the output signal of the transmission local oscillator 122 can be set higher than the output frequency f1 of the transmission local oscillator 122 of the second embodiment. Is. The frequency f1 ′ of the output signal of the transmission local oscillator 122 is set to the transmission local oscillator 12 of the second embodiment.
When the output frequency f1 of 2 is set to K times (K = 1, 2, 3 ...), the relationship between f1 ′ and f1 is f1 ′ = K × f1 (4).

In the case of simultaneous transmission / reception, the transmission local oscillator 122
Unnecessary frequency components fi1 and f3 generated by mutual interference between the output signal of the first receiving local oscillator 123 and the output signal of the first receiving local oscillator 123.
i2, where the frequency of the output signal of the first reception local oscillator 123 is f3, fi1 = 2 × K × f1-f3 (5) fi2 = 2 × f3-K × f1 (6) Become. However, K = 1, 2, 3, ...

On the other hand, in the second embodiment, the third-order unnecessary frequency components fi1 ′ and fi2 ′ are fi1 ′ = 2 × f1− when the frequency of the output signal of the first receiving local oscillator 123 is f3. f3 ... (7) fi2 ′ = 2 × f3-f1 (8)

As described above, the frequency interval between the frequency of the transmission output and the third-order unnecessary frequency component can be made wider in this embodiment than in the second embodiment. Therefore, the influence of the third-order unnecessary frequency component on the transmission output can be reduced. In this embodiment, an example in which the second receiving local signal is generated by the multiplier 125 has been described, but as in the fifth embodiment, the second receiving local signal is generated by the second receiving local oscillator 124. Good.

The operation of the transmitter 10 when the output signal of the transmitter local oscillator 122 does not exist will be described. It is assumed that when the output signal of the transmission local oscillator 122 does not exist, that is, when the input of the frequency divider 34 is not input, the free-running oscillation of the frequency divider 34 occurs. A signal obtained by dividing the free-running oscillation signal of the frequency divider 34 and further dividing the output of the frequency divider 34 by the frequency divider 32 is input to the modulator 102 instead of the transmission carrier signal, and is transmitted to the transmission frequency converter. A signal obtained by dividing the free-running oscillation signal of the frequency divider 34 is input to 103 instead of the transmission local signal. Therefore, in the modulator 102, the free-running oscillation signal of the frequency divider 34 is frequency-divided, and the signal frequency-divided by the frequency divider 32 is modulated by the quadrature baseband signals (I, Q), and the modulation signal is transmitted at the transmission frequency. In the converter 103, the free-running oscillation signal of the frequency divider 34 is frequency-converted by the frequency-divided signal, and an unnecessary transmission signal is transmitted from the antenna 106 via the filter 104, the power amplifier 105, and the duplexer 107. When the output of the frequency divider 34 does not exist, the frequency divider 32 causes free-running oscillation.

In this embodiment, since any of the T-type flip-flops having the free-running oscillation suppressing function shown in FIGS. 3, 6, 9 and 12 is used as the frequency dividers 32 and 34, the frequency dividers 32 and 34 are divided. The free-running oscillations in the frequency dividers 32 and 34 are suppressed, and the transmission carrier signal input to the modulator 102 and the transmission local signal input to the transmission frequency converter 103 do not exist.
Therefore, since the output signal of the transmission frequency converter 103 is not generated, the filter 104, the power amplifier 105, the duplexer 1
No unnecessary transmission signal is transmitted from the antenna 106 via 07.

As described above, in the seventh embodiment of the present invention, the radio apparatus is configured to divide the output signal of the transmission local oscillator 122 to generate the transmission local signal and frequency-convert the modulated signal. Therefore, the transmission local oscillator 122 and the reception first
The effect of mutual interference of the local oscillator 123 can be reduced, and an unnecessary transmission signal is not transmitted when there is no transmission carrier signal.

It should be noted that the frequency divider 32 is divided into two as shown in FIG.
Although the frequency dividers 302a and 302b are connected in cascade to form a frequency divider 4, the number of frequency divisions may be any integer multiple of two. Further, when the frequency divider 32 is used as a 90 degree phase shifter,
If the number of frequency divisions is 4 or more, it is possible to obtain two signals accurately shifted by 90 degrees even if the duty ratio of the input signal to the frequency divider 32 is not 50%. Therefore, the 90-degree phase shifter portion of the modulator 102 is unnecessary, and the wireless device can be downsized.

(Eighth Embodiment) FIG. 16 is a functional block diagram showing the structure of a radio apparatus according to the eighth embodiment of the present invention. In FIG. 16, a switch 127 indicates whether the output signal of the transmission local oscillator 122 or the first reception local oscillator 1
It is a switching device for selecting any of the output signals of 23 and inputting it to the frequency divider 34. It is assumed that the frequency dividers 32 and 34 are configured by using any one of the T-type flip-flops having the free-running oscillation suppressing function shown in FIGS. 3, 6, 9, and 12. The other configuration is the same as that of the seventh embodiment.

The operation of the radio apparatus according to the eighth embodiment of the present invention configured as above will be described. In the eighth embodiment, in the wireless device of the seventh embodiment shown in FIG. 15, either the output signal of the transmission local oscillator 122 or the output signal of the first reception local oscillator 123 is selected. ,
A switch 127 for inputting to the second frequency divider 302 is added, and in the case of simultaneous transmission / reception, the switch 127 is used to transmit the local oscillator 12
The output signal of 2 is selected and input to the frequency divider 34, and in the case of time division transmission / reception, the first receiving local oscillator 12 is switched by the switch 127.
The output signal No. 3 is selected and input to the frequency divider 34. In the case of time division transmission / reception, since the operation of the transmission local oscillator 122 is stopped, power consumption can be reduced.

In this embodiment, an example in which the second receiving local signal is generated by the multiplier 125 has been described. However, as in the fifth embodiment, the second receiving local signal is generated by the second receiving local oscillator 124. May occur. Further, although the example using the frequency divider 34 has been described, it is also possible to directly use the output signal of the transmission local oscillator 122 without using the frequency divider 34 as in the fifth embodiment.

As described above, according to the eighth embodiment of the present invention, the output signal of the transmission local oscillator 122 is selected by the radio device when performing simultaneous transmission / reception, and by the time division transmission / reception in the wireless device. 1 Since the output signal of the receiving local oscillator 123 is selected and the input signal is divided by the frequency divider 34 to generate the transmitting local signal to be input to the transmission frequency converter 103, in the case of time division transmission / reception To the transmitter local oscillator 122
Since the operation is stopped, the power consumption can be reduced and an unnecessary transmission signal is not transmitted when there is no transmission carrier signal.

[0082]

As is apparent from the above description, in the present invention, unnecessary frequency components do not occur in the transmission band during time division transmission / reception and simultaneous transmission / reception, and it is possible to reduce the size of the wireless device and to reduce the transmission carrier signal. An effect that an unnecessary transmission signal is not transmitted when it does not exist is obtained.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a wireless device according to a first embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a frequency divider of the wireless device according to the first embodiment of the present invention.

FIG. 3 is a circuit diagram showing a configuration of a divide-by-2 frequency divider of the wireless device according to the first embodiment of the present invention.

FIG. 4 is a block diagram showing a configuration of a wireless device according to a second embodiment of the present invention.

FIG. 5 is a block diagram showing a configuration of a frequency divider of a wireless device according to a second embodiment of the present invention.

FIG. 6 is a circuit diagram showing a configuration of a divide-by-2 frequency divider of the wireless device according to the second embodiment of the present invention.

FIG. 7 is a block diagram showing a configuration of a wireless device according to a third embodiment of the present invention.

FIG. 8 is a block diagram showing a configuration of a frequency divider of a wireless device according to a third embodiment of the present invention.

FIG. 9 is a circuit diagram showing a configuration of a divide-by-two frequency divider of the wireless device according to the third embodiment of the present invention.

FIG. 10 is a block diagram showing a configuration of a wireless device according to a fourth embodiment of the present invention.

FIG. 11 is a block diagram showing a configuration of a frequency divider of a wireless device according to a fourth embodiment of the present invention.

FIG. 12 is a circuit diagram showing a configuration of a divide-by-2 frequency divider of the wireless device according to the fourth embodiment of the present invention.

FIG. 13 is a block diagram showing a configuration of a wireless device according to a fifth embodiment of the present invention.

FIG. 14 is a block diagram showing a configuration of a wireless device according to a sixth embodiment of the present invention.

FIG. 15 is a block diagram showing a configuration of a wireless device according to a seventh embodiment of the present invention.

FIG. 16 is a block diagram showing a configuration of a wireless device according to an eighth embodiment of the present invention.

FIG. 17 is a block diagram showing a configuration of a conventional wireless device.

FIG. 18 is a block diagram showing a configuration of a frequency divider of a conventional wireless device.

FIG. 19 is a timing chart showing main signals of a conventional wireless device.

[Explanation of symbols]

30, 31, 32, 33, 34, 121, 302 Frequency divider 101 Reference oscillator 102 Modulator 103, 109, 111 Frequency converter 104, 110 Filter 105 Power amplifier 106 Antenna 107 Duplexer 108 Low noise amplifier 122, 123, 124, 140 Local oscillator 125 Multiplier 127 Switcher B1 Master flip-flop B2 Slave flip-flops Q1, Q2, Q3, Q4, Q5, Q6, Q7, Q8, Q
9, Q10, Q11, Q12, Q13, Q14, Q1
5, Q16 transistors 317, 318, 327, 328, 329, 330 constant current sources 319, 320, 321, 322, 323, 324, 3
25,326 resistance

Claims (9)

[Claims] 1. A first local oscillator, a frequency divider that divides an output signal of the first local oscillator to generate a modulated signal, and modulates the modulated signal with a transmission signal to transmit wirelessly. A modulator for outputting as a signal, a first reception frequency converter for frequency-converting the reception signal with an output signal of the first local oscillator to generate a first reception intermediate frequency, a second local oscillator, the first local oscillator, 1 a second reception frequency converter that frequency-converts the output signal of the reception frequency converter with the output signal of the second local oscillator to generate a second reception intermediate frequency, and the frequency divider is a free-running oscillator. A wireless device configured to include a means for suppressing occurrence. 2. A first local oscillator, a frequency divider that divides an output signal of the first local oscillator to generate a modulated signal, and a modulator that modulates the modulated signal with a transmission signal. A transmission frequency converter for frequency-converting the output signal of the modulator with the output signal of the first local oscillator and outputting it as a radio transmission signal; a second local oscillator; and a reception signal for the second local oscillator. A first reception frequency converter that performs frequency conversion by the output signal of 1 to generate a first reception intermediate frequency; and an output signal of the first reception frequency converter that performs frequency conversion by a signal of a fixed frequency to generate a second reception intermediate frequency. A second reception frequency converter for generating the frequency divider, the frequency divider having means for suppressing the occurrence of free-running oscillation, and the frequency of the transmission signal and the frequency of the reception signal are different from each other, and transmission and reception are simultaneously performed. And it has a wireless device. 3. The radio apparatus according to claim 2, wherein the output signal of the third local oscillator is used as a fixed frequency signal input to the second reception frequency converter. 4. A reference oscillator for generating a reference signal input to the first local oscillator and the second local oscillator, wherein the reference is used as a fixed frequency signal input to the second reception frequency converter. The wireless device according to claim 2, wherein the wireless device is configured to use a signal obtained by multiplying an output signal of the oscillator. 5. The frequency divider is used as a first frequency divider, and a first frequency divider is used.
Further comprising a second frequency divider for frequency-dividing the output signal of the local oscillator to output to the first frequency divider and the transmission frequency converter, the second frequency divider generating free-running oscillation. The wireless device according to claim 2, wherein the wireless device is configured to have a means for suppressing 6. The selecting means further comprises selecting means for selecting an output signal of the first local oscillator or an output signal of the second local oscillator and outputting the selected output signal to the second frequency divider, wherein the selecting means comprises:
6. The output signal of the first local oscillator is selected when transmitting and receiving at the same time, and the output signal of the second local oscillator is selected when transmitting and receiving in a time division manner. The wireless device according to any one of claims. 7. The first frequency divider and / or the second frequency divider is an emitter-coupled logic type composed of a master flip-flop and a slave flip-flop,
Alternatively, in a frequency divider circuit of a current mode logic type T-type flip-flop, the emitter size of the transistor connected to the hold side of the differential switch among the transistors of the input differential pair of the master flip-flop may be larger. The wireless device according to any one of claims 1 to 6, which is configured. 8. The wireless device according to claim 7, wherein among the transistors of the input differential pair of said slave flip-flop, the emitter size of the transistor connected to the hold side of the differential switch is larger. 9. The wireless device according to claim 7, further comprising a current source that supplies a current to each differential switch of the master flip-flop and the slave flip-flop.