JP2003133970A - Ssb high frequency signal generating method synchronized with phase of output signals from reference oscillator - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve the phase fluctuation problem accompanying usage of a PLL (phase locked loop) frequency synthesizer oscillator without using complex and expensive devices, and eliminate harmonic components of upper and lower side band signals. SOLUTION: The system is equipped with an upper side band transmitter 35 and a lower side band transmitter 41, which are respectively supplied with signals generated at an upper side band generating circuit 34 and a lower side band generating circuit 40 where a part of the output of a PLL frequency synthesizer oscillator 31 outputting carrier signals is supplied, and generate respectively an upper side band signal and a lower side band signal. A part of the respective output signal of the upper side band transmitter 35 and the lower side band transmitter 41 is respectively supplied to the upper side band generating circuit 34 and the lower side band generating circuit 40, in feedback to synchronize high-frequency frequency of carrier signal with high-frequency frequency of upper and lower side bans signals.

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention relates to, for example, a D-VOR.
In devices such as PLL (Phase Locked L)
CAR) using a frequency synthesizer oscillator
(Carrier wave) signal and SSB
A SSB high-frequency signal generation method for generating a (single side band) signal, which generates an SSB signal in synchronization with a CAR signal, and is a crystal oscillator in a radio equipment change work or a new construction work accompanying a frequency change. By eliminating the need for the procurement of quartz oscillators, the problems associated with shortening the construction period and procuring crystal oscillators will be solved.

[0002]

2. Description of the Related Art FIG. 3 shows C in a conventional D-VOR device.
It is a block diagram which shows the generation system of AR signal and SSB signal. In the figure, 11 is a CAR crystal oscillator (Fo), 1
2 is a CAR transmitter (SIN), 13 is a mixer, 14 is a phase comparison circuit, 15 is a low pass filter, 16 is an upper sideband (UPPER SSB) crystal oscillator (Fo + 10KH)
z), 17 is the upper sideband (UPPER SSB) transmitter,
18 is an upper sideband transmitter (SIN), 19 is an upper sideband transmitter (COS), 20 is a mixer, 21 is a phase comparison circuit, 2
2 is a low-pass filter, 23 is a lower sideband (LOWER
SSB) Crystal oscillator (Fo-10 KHz), 24 is a lower sideband (LOWER SSB) transmitter, 25 is a lower sideband transmitter (SIN), 26 is a lower sideband transmitter (COS), 2
Reference numeral 7 is a reference oscillator (10 KNz). That is, CA
The output from the R crystal oscillator (Fo) 11 is input to the CAR transmitter (SIN) 12, and the CAR transmitter (SIN) 1
A carrier signal is output from 2. Upper sideband (UPPER
The output from the SSB) crystal oscillator (Fo + 10 KHz) 16 is input to the upper sideband transmitter (SIN) 18 and the upper sideband transmitter (COS) 19, and the upper sideband transmitter (SI
N) 18 outputs the upper sideband SIN signal, and the upper sideband transmitter (COS) 19 outputs the upper sideband COS signal. Lower sideband (LOWER SSB) Crystal oscillator (F
The output from the lower sideband transmitter (S-10
IN) 25 and the lower sideband transmitter (COS) 26, and the lower sideband transmitter (SIN) 25 inputs the lower sideband SIN.
The signal is output, and the lower sideband COS signal is output from the lower sideband transmitter (COS) 26. CAR transmitter 12, upper sideband transmitter (SIN) 18, upper sideband transmitter (CO
S) 19, the lower sideband transmitter (SIN) 25, and the lower sideband transmitter (COS) 26 are crystal oscillators,
CAR crystal oscillator (Fo) 11, upper sideband (UPPER
SSB) crystal oscillator (Fo + 10 KHz) 16 and lower sideband (LOWER SSB) crystal oscillator (Fo-10)
KHz) 23 picks up a part of the output and mixes these signals by mixers 13 and 20 to obtain beat signals (10 KHz) of CAR transmitter frequency and SSB transmitter frequency.
Generate. The phase comparison circuits 14 and 21 compare the phases of the beat signal (10 KHz) and the reference signal from the reference oscillator (10 KHz) 27 to detect a phase error signal. This phase error signal passes through the low-pass filters 15 and 22 and the upper sideband (UPPER SSB) crystal oscillator (F
o + 10KHz) 16, lower sideband (LOWER SS
B) Add to the error signal input of the crystal oscillator (Fo-10 KHz) 23. Upper sideband (UPPER SSB) Crystal oscillator (Fo + 10KHz) 16, Lower sideband (LOWER)
The SSB crystal oscillator (Fo-10 KHz) 23 uses a voltage variable crystal oscillator (VCXO), and an upper sideband (UPPER SSB) crystal oscillator (Fo + 10 KHz) 16 and a lower sideband (LOWER S) depending on a phase error signal.
SB) The oscillation frequency (phase) of the crystal oscillator (Fo-10 KHz) 23 is varied to work so as to minimize the frequency (phase) error.

[0003]

In the conventional method,
The crystal oscillator is used for the CAR transmitter, and the crystal oscillator is procured after the specified frequency of the radio station is determined. It took about 3-4 months to procure the crystal oscillator. There has been a demand for eliminating the crystal oscillator procurement period in the wireless equipment change work and new construction work accompanying the frequency change. As a countermeasure for this, there is a method using a PLL frequency synthesizer oscillator instead of a crystal oscillator, but the method using a PLL frequency synthesizer oscillator has phase fluctuations that affect the performance of the D-VOR device, and so on, in order to solve this problem. Required complex and expensive equipment.

The present invention has been made in view of the above circumstances, and by using a PLL frequency synthesizer oscillator as a carrier wave oscillator, it is possible to eliminate the lead time of the crystal oscillator due to the frequency change, and to use the PLL frequency synthesizer oscillator. SS that can solve the problem of phase fluctuations associated with use without using a complicated and expensive device, and further can remove harmonic components of the upper sideband signal and the lower sideband signal
It is an object of the present invention to provide a B high frequency signal generation method.

[0005]

In order to achieve the above object, an SSB high frequency signal generating system according to the present invention comprises a PLL frequency synthesizer oscillator for outputting a carrier signal and the P frequency synthesizer oscillator.
A carrier wave transmitter that is supplied with an output of an LL frequency synthesizer oscillator and outputs a carrier wave, an upper sideband generation circuit and a lower sideband generation circuit that is supplied with a part of the output of the PLL frequency synthesizer oscillator, and the upper sideband. An upper sideband transmitter and a lower sideband transmitter, to which the signals generated by the generating circuit and the lower sideband generating circuit are correspondingly supplied, and which respectively output the corresponding upper sideband signal and lower sideband signal, A part of the output signals respectively corresponding to the upper sideband transmitter and the lower sideband transmitter are respectively fed back to the upper sideband generating circuit and the lower sideband generating circuit, respectively, and supplied as a carrier signal. It is characterized by comprising means for synchronizing the high frequency of the upper sideband signal and the lower sideband signal.

Further, in the present invention, in the SSB high-frequency signal generation system, a 90-degree phase difference two-divider that divides an input carrier signal into two is used as an upper sideband generation circuit or a lower sideband generation circuit, The signals divided into two by the phase difference two-way divider are respectively supplied to the local input terminals, and the reference sine wave signals are respectively supplied to the RF terminals with a phase difference of 90 degrees. A Q modulation circuit, an in-phase combiner that outputs the upper sideband signal or the lower sideband signal by combining the output signals of the I / Q modulation circuits, and an upper sideband signal that is output from the in-phase combiner. An error amplifying circuit that generates an error signal by supplying a part of the lower sideband signal, and an error signal generated by the error amplifying circuit is fed back to each I / Q modulating circuit to obtain each I / Q.
And a means for outputting the upper sideband signal or the lower sideband signal synchronized with the carrier signal by keeping the high frequency signal amplitude and phase of the modulation circuit constant.

[0007]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention. In the figure, 31 is a PLL frequency synthesizer oscillator (108 MHz to 118 MH) of a carrier wave oscillator.
z), 32 is a directional coupler, 33 is a carrier transmitter, 34
Is an upper sideband generator, 35 is an upper sideband transmitter, 36 is an upper sideband transmitter (SIN), and 37 is an upper sideband transmitter (CO
S), 38 is a directional coupler, 39 is a directional coupler, 40
Is a lower sideband generator, 41 is a lower sideband transmitter, 42 is a lower sideband transmitter (SIN), and 43 is a lower sideband transmitter (CO
S) and 44 are directional couplers, and 45 is a directional coupler.

That is, the carrier wave signal output from the PLL frequency synthesizer oscillator 31 is a directional coupler 32.
Is supplied to the carrier wave transmitter 33 through the carrier wave transmitter 3
A carrier signal is output from 3. A part of the carrier wave signal output from the PLL frequency synthesizer oscillator 31 is picked up by the directional coupler 32 and supplied to the upper sideband generating circuit 34 and the lower sideband generating circuit 40. 10 KH for the lower sideband generation circuit 40
z / 20KHz reference clock signal and 10KHz reference S
An IN input signal is provided. The upper sideband signal generated by the upper sideband generating circuit 34 is supplied to an upper sideband transmitter (SIN) 36 and an upper sideband transmitter (COS) 37, and after amplification,
Upper sideband transmitter (SIN) 36 and upper sideband transmitter (C
OS) 37 to the corresponding directional couplers 38, 3 respectively
The upper sideband SIN signal and the upper sideband COS signal are output via 9. A part of the output signals from the upper sideband transmitter (SIN) 36 and the upper sideband transmitter (COS) 37 is picked up by the directional couplers 38 and 39 and the upper sideband SI.
The N feedback signal and the upper sideband COS feedback signal are fed back and supplied to the upper sideband generating circuit 34, and the upper sideband generating circuit 34 synchronizes the high frequency (phase) of the carrier signal and the upper sideband signal. . Further, the lower sideband signal generated by the lower sideband generating circuit 40 is supplied to the lower sideband transmitter (SIN) 42 and the lower sideband transmitter (COS) 43, and after amplification, the lower sideband signal is supplied. A lower sideband SIN signal and a lower sideband COS signal are output from a transmitter (SIN) 42 and a lower sideband transmitter (COS) 43 through corresponding directional couplers 44 and 45, respectively.
Lower sideband transmitter (SIN) 42 and lower sideband transmitter (C
A part of the output signal from the OS) 43 is directional coupler 44,
The signal is picked up by 45 and fed back as a lower sideband SIN feedback signal and a lower sideband COS feedback signal to the lower sideband generating circuit 40. In the lower sideband generating circuit 40, a carrier signal and a lower sideband are supplied. It synchronizes the high frequency (phase) of the signal.

FIG. 2 shows the upper sideband (UPPER) according to the present invention.
It is a block diagram which shows a SSB) generation circuit. In the figure, 51 is a + 45 ° phase shifter, 52 is a −45 ° phase shifter, 5
3 is a switch circuit, 54 is an upper sideband signal generator, 55 is a 90-degree phase difference two-divider, 56 is an I / Q modulation circuit (double balance mixer), 57 is an I / Q modulation circuit (double balance mixer), 58 is an in-phase combiner, 59 is an amplifier, 60
Is a directional coupler, 61 is a detection circuit, 62 is an amplifier, 63
Is an error amplifier, and the upper sideband signal generation unit 54 includes a 90-degree phase difference two-divider 55, an I / Q modulation circuit (double balance mixer) 56, an I / Q modulation circuit (double balance mixer) 57, and in-phase synthesis. It is composed of a container 58.

That is, the carrier wave signal (Fo) is divided into two by the two-way divider 55 having a 90-degree phase difference, and is input to the local input terminals of the corresponding I / Q modulation circuits 56 and 57. RF terminals of the I / Q modulation circuits 56 and 57 (I
And a Q terminal), a 10 KHz reference sine wave signal is input with a phase difference of 90 degrees via the phase shifters 51 and 52 and the switch circuit 53, and the output terminals of the I / Q modulation circuits 56 and 57 are connected to the in-phase combiner. An upper sideband (UPPER SSB) signal that is higher than the carrier signal by 10 KHz is output via 58, and the upper sideband (UPPER SSB) signal is passed through an amplifier 59 and a directional coupler 60 to generate an upper sideband signal (fo + 10).
KHz) is output. With respect to the degree of suppression of the harmonic component of this output signal, since the amplitude and the phase of the local input high frequency signal to the I / Q modulation circuits 56 and 57 are not the same, a harmonic component of 2 times or 3 times is generated. In order to remove this harmonic component, a part of the output of the upper sideband signal is picked up by the directional coupler 60, detected by the detection circuit 61, and amplified by the amplifier 62. Amplifier circuit 63
Is converted into a DC component with four error signals (IOffset, QOf
fset, IMAG, QPHASE) is generated. Error amplifier circuit 6
3K input 10KHz SIN clock, 10KHz
A COS clock input, a 20 KHz SIN clock input, and a 20 KHz COS clock input are provided. These error signals (IOffset, QOffset, IMAG
, QPHASE) is fed back to the upper sideband signal generating section 54, and the I / Q modulation circuit (double balance mixer) 5
By keeping the amplitude and phase of the high frequency signals 6 and 57 always constant, an upper sideband signal having a low harmonic component synchronized with the carrier signal is output.

In this system, even if the phase of the output signal of the reference oscillator varies (even when the system using the PLL frequency synthesizer oscillator is used), the upper sideband generator circuit depends on this carrier signal (synchronization). Therefore, the problem of phase fluctuation between the carrier wave transmitter and the upper sideband transmitter does not occur.

By picking up a part of the output generated by the upper sideband generating circuit and extracting the harmonic components of 2 times and 3 times and feeding it back to the upper sideband generating circuit to minimize the amplitude and phase, It is possible to reduce harmonic components that are twice or three times as high as the waveband signal output. By reducing this harmonic component, it can be used in the oscillation circuit of the D-VOR device.

In the above embodiment, the upper sideband (UPP
Although the ER SSB) generating circuit has been described, the lower sideband (LOWER SSB) generating circuit has the same configuration and operation, and therefore description thereof will be omitted.

[0015]

As described above, according to the present invention, it is possible to eliminate the procurement period of the crystal oscillator in the radio equipment change work and the new construction work accompanying the frequency change, and
The SSB high frequency signal generation method required for the D-VOR device can be realized without using a complicated and expensive device.

[Brief description of drawings]

FIG. 1 is a block diagram illustrating an exemplary embodiment of the present invention.

FIG. 2 is an upper sideband (UPPER SSB) according to the present invention.
It is a block diagram showing a generation circuit.

FIG. 3 shows a CAR signal and S in a conventional D-VOR device.
It is a block diagram showing a generation method of an SB signal.

[Explanation of symbols]

31 PLL Frequency Synthesizer Oscillator 32 directional coupler 33 Carrier wave transmitter 34 Upper sideband generation circuit 35 Upper sideband transmitter 36 Upper Sideband Transmitter (SIN) 37 Upper Sideband Transmitter (COS) 38 Directional coupler 39 Directional coupler 40 Lower sideband generation circuit 41 Lower sideband transmitter 42 Lower Sideband Transmitter (SIN) 43 Lower Sideband Transmitter (COS) 44 directional coupler 45 directional coupler 55 90 degree phase difference 2 distributor 56 I / Q modulation circuit (double balance mixer) 57 I / Q modulation circuit (double balance mixer) 58 In-phase combiner 63 Error amplification circuit

Claims (2)

[Claims] 1. A reference oscillator, a carrier wave transmitter to which an output of the reference oscillator is supplied and outputs a carrier wave, and an upper sideband generating circuit to which a part of the output of the reference oscillator is supplied. A lower sideband generating circuit, and an upper sideband which outputs the upper sideband signal and the lower sideband signal respectively corresponding to which the signals generated by the upper sideband generating circuit and the lower sideband generating circuit are respectively supplied. And a part of the output signals of the upper sideband transmitter and the lower sideband transmitter respectively corresponding to the upper sideband generator and the lower sideband. An SSB high frequency signal generation method comprising: means for feeding back to a generation circuit and synchronizing the high frequency frequencies of a carrier wave signal, an upper sideband signal and a lower sideband signal. 2. An upper sideband generation circuit or a lower sideband generation circuit, which divides an inputted carrier wave signal into two, a 90-degree phase difference 2-divider and a 90-degree phase difference 2-divider. A plurality of I / Q modulation circuits to which signals are respectively supplied to local input terminals and reference sinusoidal signals are respectively supplied to RF terminals with a phase difference of 90 degrees; An in-phase combiner that outputs the upper sideband signal or the lower sideband signal by combining the output signals of the circuit and a part of the upper sideband signal or the lower sideband signal output from the in-phase combiner is supplied. An error amplification circuit that generates an error signal, and an error signal generated by the error amplification circuit is fed back to each I / Q modulation circuit to make the high-frequency signal amplitude and phase of each I / Q modulation circuit constant so that the carrier wave Same as signal SS according to claim 1, characterized by comprising the and means for outputting the upper sideband signal or the lower sideband signal
B high frequency signal generation method.